WO2020019326A1 - 一种半导体发光元件 - Google Patents

一种半导体发光元件 Download PDF

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Publication number
WO2020019326A1
WO2020019326A1 PCT/CN2018/097578 CN2018097578W WO2020019326A1 WO 2020019326 A1 WO2020019326 A1 WO 2020019326A1 CN 2018097578 W CN2018097578 W CN 2018097578W WO 2020019326 A1 WO2020019326 A1 WO 2020019326A1
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WO
WIPO (PCT)
Prior art keywords
semiconductor light
emitting element
layer
substrate
light emitting
Prior art date
Application number
PCT/CN2018/097578
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English (en)
French (fr)
Inventor
柯韦帆
吴俊毅
钟秉宪
Original Assignee
天津三安光电有限公司
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Application filed by 天津三安光电有限公司 filed Critical 天津三安光电有限公司
Priority to CN201880025748.3A priority Critical patent/CN110574175B/zh
Priority to PCT/CN2018/097578 priority patent/WO2020019326A1/zh
Publication of WO2020019326A1 publication Critical patent/WO2020019326A1/zh
Priority to US17/157,127 priority patent/US20210143306A1/en

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0095—Post-treatment of devices, e.g. annealing, recrystallisation or short-circuit elimination
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0093—Wafer bonding; Removal of the growth substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26—Materials of the light emitting region
    • H01L33/30—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008—Processes
    • H01L2933/0033—Processes relating to semiconductor body packages
    • H01L2933/0066—Processes relating to semiconductor body packages relating to arrangements for conducting electric current to or from the semiconductor body

Definitions

  • the present invention relates to a semiconductor light emitting element, and specifically to design an LED chip structure.
  • a conventional LED epitaxial structure is transferred to a transfer substrate having a metal reflective layer or a metal bonding layer, Etching or laser stripping removes the original substrate.
  • the epitaxial structure on the metal reflective layer or the metal bonding layer is first removed by etching to form a dicing path, and then a single chip structure is separated by the dicing path through blade dicing or laser dicing.
  • the blade is cut.
  • There are technical problems such as wide scribe lines, chipping due to dicing, etc.
  • the advantages of laser scribe cutting are flat and the scribe lines are relatively narrow, which has wider application prospects.
  • a large amount of metal remelted material is sputtered to the side wall of the light emitting layer, which may cause leakage of the light emitting layer and decrease the brightness of the light absorbed by the reflowed material.
  • the present invention proposes a semiconductor light emitting element with guaranteed reliability and high reliability, which includes a bonding substrate.
  • the bonding substrate of the semiconductor light emitting element includes a first surface and a first surface. Two surfaces, a multilayer metal layer on the first surface, and a semiconductor light emitting sequence on the multilayer metal layer, the edges of the bonding substrate form a step structure, so that the edges of the first surface of the bonding substrate are not cover.
  • the width of the exposed portion of the edge of the bonding substrate is at least 2 micrometers, more preferably, 2-10 micrometers, and more preferably, 3-6 micrometers.
  • the edge of the multilayer metal layer forms a second step structure, and the second step structure is formed such that the semiconductor light emitting sequence on the edge of the multilayer metal layer is removed, and its width is 1.5 ⁇ m to 10 ⁇ m, more preferably Ground, the mesa area is 3-8 microns.
  • a side surface of the bonding substrate has a relatively flat first portion and an uneven first portion. Two parts.
  • the second portion of the sidewall surface of the bonding substrate that is uneven is an uneven convex-concave structure.
  • the second portion having an uneven surface is close to the first surface of the bonding substrate or further extends to the first surface.
  • the second portion having an uneven surface is close to the second surface of the bonding substrate or extends to the second surface.
  • the second portion of the surface of the side wall which is not flat is located at a depth of 1 / 3-1 / 2 with respect to the first surface, and is relatively flat to the first surface side and the second surface side. portion.
  • the bonding substrate of the semiconductor light emitting element is a non-metal substrate.
  • a longitudinal projection area ratio of the substrate is at least 50%.
  • a longitudinal projection area ratio of the substrate of the semiconductor epitaxial light emitting sequence is at least 70% or 80%.
  • the edge of the bonding substrate forms a stepped structure, so that a portion of the edge of the first surface of the bonding substrate is exposed.
  • a transparent insulating layer exists on at least part of the interface between the semiconductor light emitting sequence of the semiconductor light emitting element and the multilayer metal layer, and the transparent insulating layer is one or more layers.
  • the semiconductor light emitting element is a gallium arsenide-based light emitting element.
  • a current spreading layer exists between the semiconductor light emitting sequence and the transparent insulating layer.
  • the second step structure is formed on the current spreading layer, and the semiconductor light emitting sequence at the edge of the current spreading layer is removed, and its width is 1.5 micrometers to 10 micrometers. More preferably, the mesa area It is 3-8 microns.
  • At least one of the multilayer metal layer, the transparent insulating layer, or the current spreading layer of the semiconductor light emitting element has a projected area extending in the direction of the substrate, or the edge forms at least one stepped structure.
  • At least one of the multilayer metal layer, the transparent insulating layer, or the current spreading layer of the semiconductor light emitting element changes a projection area direction of the substrate in a direction of increasing or projecting area.
  • the multilayer metal layer includes at least one of a bonding layer, a metal reflective layer, and an ohmic contact layer.
  • the non-metal substrate is a conductive substrate, and a conductive metal layer is provided on a side opposite to the semiconductor light emitting sequence.
  • the conductive substrate is a substrate that absorbs laser light.
  • the conductive substrate is a silicon or silicon carbide substrate.
  • the present invention provides a method for preparing a semiconductor light-emitting element, which includes the following steps: (1) preparing a semiconductor light-emitting element before cutting, wherein the bonding substrate of the semiconductor light-emitting element includes a first surface and a second surface; A surface, a multilayer metal layer on a first surface, and a semiconductor light emitting sequence on the multilayer metal layer; (2) etching the semiconductor light emitting sequence to form a first platform; ( 3 ) further etching to remove the multilayer metal layer along the first platform, The substrate is exposed to form a second stage area; (4) The semiconductor light emitting element is separated along the second stage area to obtain a single chip structure.
  • a part of the region between the multilayer metal reflection layer and the semiconductor light emitting sequence further has an insulating protection layer, and the preparation method further includes etching and removing the insulating protection layer in step (3).
  • the scoring step includes laser scoring or laser cutting.
  • the insulating protection layer may be one or more layers, and the etching method is dry etching.
  • the method for removing the multilayer metal layer in the step (3) is a wet etching method or a combination of dry and wet etching methods.
  • the present invention obtains a semiconductor light-emitting element capable of ensuring luminous efficiency and high reliability.
  • it is possible to reduce sputtering of a reflow material generated by laser slicing to a side of a light-emitting region of a semiconductor light-emitting element Wall to reduce the occurrence of leakage phenomenon and improve the yield of chip separation; at the same time, it can effectively reduce the area of the dicing track and can effectively increase the area ratio of the light-emitting area, thereby improving the light-emitting efficiency.
  • FIG. 1 is a schematic diagram of a structure obtained by implementing step (1) of a method for preparing a light emitting diode according to the present invention.
  • FIG. 2 is a schematic structural diagram of a step (2) for forming a first platform for implementing the light emitting diode manufacturing method of the present invention. Illustration.
  • FIG. 3 is a schematic structural view of a step (3) for forming a second platform for implementing the light emitting diode manufacturing method of the present invention.
  • FIG. 4 (a) is a step of the method for manufacturing a light emitting diode according to the present invention (4) a side view after laser cutting.
  • FIG. 4 (b) is a plan view of a method for manufacturing a light emitting diode according to the present invention (4) a plan view after laser cutting.
  • FIG. 5 is a schematic diagram of the final structure obtained by implementing the method for preparing a light emitting diode of the present invention.
  • FIG. 1 to FIG. 5 Please refer to FIG. 1 to FIG. 5. It should be noted that the diagram provided in this embodiment only illustrates the basic idea of the present invention in a schematic manner, and only the components related to the present invention are shown in the diagram. It is not drawn according to the number, shape, and size of components during actual implementation. The type, quantity, and proportion of each component during actual implementation may be changed at will, and the component layout may be more complicated.
  • the manufacturing process of the light-emitting element of the present invention includes the following steps: (1) Obtaining the following light-emitting structure before cutting, as shown in the figure: including a bonding substrate, a bonding substrate back
  • the back side has a metal electrode 1 on the side
  • the front side includes multiple metal layers from bottom to top.
  • the multilayer metal layer specifically includes a metal bonding layer, a metal reflective layer, a transparent insulating layer 4 and a semiconductor light emitting sequence, and a front metal electrode.
  • the semiconductor light emitting sequence includes The p-type cladding layer as the first semiconductor layer of the first conductivity type, the n-type cladding layer as the second semiconductor layer of the second conductivity type different from the first conductivity type, the p-type cladding layer and n A light-emitting layer of an active layer that can emit light with a predetermined wavelength; a light-emitting layer, an n-type contact layer, and a p-type contact layer are each formed of a III-V compound semiconductor.
  • it can be formed by using compound semiconductors such as GaAs, GaP, and InP, ternary compound semiconductors such as InG aAs, InGaP, and AlGaAs, and quaternary compound semiconductors such as AlGalnP.
  • compound semiconductors such as GaAs, GaP, and InP
  • ternary compound semiconductors such as InG aAs, InGaP, and AlGaAs
  • quaternary compound semiconductors such as AlGalnP.
  • the light-emitting layer has an n-type cladding layer 106 (which is formed by containing an n-type AlGalnP) and a p-type cladding layer (which is formed by containing a p-type AlGalnP) sandwiching an active layer (which is made of undoped as Structure of the body of the undoped AlGalnP-based compound semiconductor (doped dopant), P-type cladding
  • the layer preferably includes a p-GaP layer that facilitates current expansion on the P-layer semiconductor layer side (the layer is located on the transparent insulating layer 4, not shown in the figure).
  • the present invention specifically relates to the transfer of a gallium arsenide-based epitaxial structure to a bond A semiconductor light-emitting element behind a substrate.
  • the light extraction surface formed on the light emitting layer that is, an n-type contact layer formed on a part of the surface on the opposite side to the active layer side of the n-type cladding layer; more preferably, in order to improve the light emission efficiency, A concave and convex portion formed on the other surface side of the light emitting layer and a side surface of the light emitting layer; It is provided on the opposite side of the reflective layer side of the light-emitting layer, that is, the front electrode on the n-type contact layer; it is provided on the front electrode as a wire bonding pad electrode; the front electrode is not limited to this shape, and when viewed from above , Can also be formed into a circular shape, a polygonal shape (for example, a hexagon, etc.).
  • the pad electrode is formed in contact with the surface of the front electrode.
  • the front electrode is formed of a metal material in ohmic contact with the n-type contact layer.
  • the surface electrode is formed of a metal material containing Au, Ge, Ni, or the like.
  • the pad electrode is formed of a metal material containing, for example, Ti, Au, or the like.
  • a reflective layer made of metal which is provided on one surface side of the light emitting layer and reflects light emitted from the active layer; and is formed of a conductive material having a high reflectance with respect to the light emitted from the active layer.
  • the reflective layer is formed of a conductive material having a reflectance of 80% or more for the light.
  • the reflective layer reflects the light from the active layer that has reached the reflective layer toward the active layer side.
  • the reflective layer is formed of a metal material such as Al, Au, Ag, or the like, or an alloy containing at least one metal material selected from these metal materials.
  • the reflective layer is formed of Au with a predetermined film thickness.
  • the reflective layer may be formed by further including a barrier layer made of a metal material such as Ti or Pt, or a bonding film that is easily bonded to the bonding layer.
  • a dielectric layer that is, an insulating film, provided between the light emitting layer and the reflective layer, and between the p-type contact layer and the reflective layer;
  • the insulating film may be, for example, , Silicon dioxide, silicon nitride.
  • the insulating film may be formed of a plurality of insulating layers having different refractive indexes from each other, that is, a multilayer film in which a film made of silicon dioxide and a film made of silicon nitride are stacked in multiple layers.
  • the multilayer film as the plurality of insulating layers may be stacked in the order of decreasing the refractive index in a direction away from the other surface of the light emitting layer (ie, the light extraction surface) and the side surface of the light emitting layer, for example.
  • the dielectric layer may be formed of a laminated structure of thin films composed of a plurality of materials having different refractive indices.
  • the dielectric layer can also be made into a distributed Bragg mirror structure.
  • a dielectric layer having a DBR structure may be formed: a layer made of Si0 2 having a predetermined film thickness and a layer made of 110 2 having a predetermined film thickness are made into a pair, and The resulting counter layer is laminated multiple times to form a DBR structure.
  • a p-type contact layer as a contact layer formed between the light-emitting layer and the reflective layer, an ohmic contact portion is provided on a surface of the p-type contact layer where no dielectric layer is provided, and the ohmic contact portion is formed on a portion of the dielectric layer. In the provided opening, the p-type contact layer and the reflective layer are electrically connected.
  • the ohmic contact portion is formed of a metal material containing Au, Zn, such as an Au Zn alloy.
  • the conductive support substrate is composed of a semiconductor substrate such as a p-type or n-type conductive n-doped conductive silicon substrate, or a silicon carbide substrate, and the conductive substrate is preferably capable of absorbing
  • a laser-cut substrate is provided on a back electrode supporting a surface of the substrate opposite to the surface in contact with the bonding layer.
  • the bonding layer may be formed of an ohmic contact electrode layer containing ohmic contact with a supporting substrate, a barrier layer made of a metal material such as Ti, Pt, or a bonding film that is easily bonded to a reflective layer.
  • the ohmic contact electrode may be formed of a metal material containing Au, Ti, A1, or the like; the barrier layer may be formed of Pt with a predetermined film thickness.
  • the barrier layer suppresses transmission of the material constituting the bonding film to the ohmic contact electrode.
  • the bonding layer is formed of a material that is electrically and mechanically bonded to the reflective layer, and as an example, it may be formed of Au having a predetermined film thickness as described above.
  • the back electrode is formed of a material electrically bonded to the support substrate, for example, a metal material such as Ti or Au.
  • the back electrode is gold.
  • a layer of photoresist is coated on the N-side light-emitting surface, and a photoresist pattern is produced by exposure and development.
  • the etching method is preferably dry etching to form a first platform as shown in FIG. 2.
  • the bottom of the first platform is a GaP layer and the bottom thickness of the GaP layer Some directions are retained.
  • the mirror layer and the bonding layer in the scribe lane area are further removed to expose the silicon substrate to form a second platform for subsequent separation, and the first platform is transformed into a first step structure.
  • a photoresist is formed on at least the sidewall of the first platform and the surface of the top light-emitting surface, and a photoresist pattern is produced through exposure and development to expose the bottom of the first platform, and the bottom edge portion of the first platform is covered with photoresist.
  • the GaP layer and the insulating layer are removed by dry etching, and the metal layer is removed by wet etching or combined wet and dry etching methods, such as gold zinc, gold reflective layer using wet etching, and titanium platinum barrier layer using Dry method
  • wet etching or combined wet and dry etching methods, such as gold zinc, gold reflective layer using wet etching, and titanium platinum barrier layer using Dry method
  • the combination of etching is used to expose the substrate.
  • multiple step structures may be formed on the edge.
  • another step is used to remove the reflection by wet etching. Layers such as gold, gold zinc, etc.
  • the process of etching may also cause the GaP layer, the insulating layer, and the multilayer metal layer to form inclined sidewalls, leading to a change in width along the thickness deep into the substrate, preferably showing increased or projected area
  • the increasing trend is beneficial to the formation of the angle of light reflection and the light emitted from the side wall is reflected by the metal layer.
  • the semiconductor light emitting element is separated on the exposed substrate surface, preferably a conductive substrate that absorbs laser light, preferably a semiconductor substrate, a Si substrate, a silicon carbide substrate, etc., and this embodiment is a Si substrate.
  • the substrate is hidden by laser cutting, as shown in FIGS. 4 (a) and 4 (b).
  • the front side is preferably hidden cutting.
  • the node formed on the first surface of the substrate by controlling the intensity of the laser is 1/3 to 1
  • the depth of / 2 forms continuous or discontinuous nodes, as shown in FIG. 5, and finally splits the separation chip on the front side. As shown in FIG.
  • the light emitting diode obtained by the present invention includes a bonding substrate, and the bonding substrate of the semiconductor light emitting element includes a first surface and a second surface, a multilayer metal layer on the first surface, a multilayer A semiconductor light emitting sequence on a metal layer, wherein the surface of the side wall of the bonding substrate has a relatively flat first portion and an uneven second portion.
  • the second portion having an uneven surface is close to the first surface of the bonding substrate, and the second portion having the uneven surface is close to the second surface of the bonding substrate or located at an intermediate position of the substrate,
  • the side wall near the first surface side and the second surface side is a second portion opposite to the platform, or a second portion with an uneven surface extends directly to the first surface or the second surface.
  • the step structure is caused by the hidden position of the laser being a certain distance away from the side wall of the metal layer. On multiple metal layers, a metal reflow is generated.
  • the laser hidden cutting can also be replaced by laser scribing.
  • a continuous laser is used to The first surface of the substrate is etched to form a certain depth of groove, and then the semiconductor light emitting element is cleaved with a cleaver to form a single light emitting element.
  • the manufacturing method of the present invention is also applicable to the structure separation of a nitride-based transfer substrate to form a single light-emitting chip, and it is more preferable to use a transfer substrate capable of absorbing laser light, such as silicon or carbonization.
  • a transfer substrate capable of absorbing laser light such as silicon or carbonization.
  • etching a multilayer metal layer to the surface of the substrate to form a second platform can reduce sputtering of the reflow material generated by laser slicing to the sidewall of the light emitting region of the semiconductor light emitting element, and reduce leakage current.
  • the occurrence of this phenomenon improves the yield of chip separation.
  • the laser scribing method can effectively reduce the area of the cutting track, and can effectively increase the area ratio of the light emitting area, thereby improving the light emitting efficiency.

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Abstract

一种半导体发光元件，其包括键合衬底，该半导体发光元件的键合衬底包括第一表面和第二表面，第一表面上的多层金属层，多层金属层上的半导体发光序列，该键合衬底的边缘形成台阶结构，以使键合衬底的第一表面的边缘部分未被覆盖。

Description

一种半导体发光元件
技术领域
[0001] 涉及一种半导体发光元件， 具体设计一种 LED芯片结构。
背景技术
[0002] 今年来， 为了获得更高亮度、 高功率或者高热辐射率的 LED结构， 将传统的 LE D外延结构进行基板转移到具有金属反射层或金属键合层的转移基板上， 通过化 学湿蚀刻或激光剥离的方式去除原始衬底。 针对这类结构， 首先蚀刻去除金属 反射层和或金属键合层上的外延结构， 以形成切割道， 再通过刀片划裂或激光 划裂的方式通过切割道分离单一的芯片结构， 然而刀片切割存在切割道宽， 切 割导致芯片崩裂等的技术问题， 而激光划裂切割断面平坦， 切割道相对窄的优 势而具备更广泛的运用前景。 然而激光划裂后会造成大量的金属回熔物溅射到 发光层侧壁,易造成发光层的漏电及出光遭回熔物吸收之亮度下降。
发明概述
技术问题
问题的解决方案
技术解决方案
[0003] 为了达到上述目的， 本发明提出以下一种保证发光效率且可靠性高的半导体发 光元件， 其包括键合衬底， 所述的半导体发光元件的键合衬底包括第一表面和 第二表面， 第一表面上的多层金属层， 多层金属层上的半导体发光序列， 所述 的键合衬底的边缘形成台阶结构， 以使键合衬底的第一表面的边缘未被覆盖。
[0004] 优选地， 所述键合衬底的边缘的露出部分宽度至少 2微米， 更有选地， 为 2-10 微米， 更优选地， 为 3-6微米。
[0005] 优选地， 所述的多层金属层边缘形成第二台阶结构， 第二台阶结构形成为多层 金属层边缘上的半导体发光序列被去除， 其宽度为 1.5微米 -10微米， 更优选地， 所述的台面面积为 3-8微米。
[0006] 优选地， 其中所述的键合衬底侧壁表面具有相对平坦的第一部分和不平坦的第 二部分。
[0007] 优选地， 所述的键合衬底侧壁表面不平坦的第二部分为不平整的凸凹结构。
[0008] 优选地， 所述的表面不平坦的第二部分靠近键合衬底的第一表面或进一步地延 伸至第一表面。
[0009] 优选地， 所述的表面不平坦的第二部分靠近键合衬底的第二表面或延伸至第二 表面。
[0010] 优选地， 所述侧壁的表面不平坦的第二部分位于相对于第一表面深度至 1/3-1/2 位置， 靠近第一表面侧和第二表面侧为相对平坦的第一部分。
[0011] 优选地， 所述的半导体发光元件的键合衬底为非金属衬底。
[0012] 优选地， 所述的半导体外延发光序列的为基板的纵向投影面积比至少为 50%。
[0013] 优选地， 所述的半导体外延发光序列的基板的纵向投影面积比至少为 70%或 80 %。
[0014] 优选地， 所述的键合衬底的边缘形成台阶结构， 以使键合衬底的第一表面的边 缘露出部分。
[0015] 优选地， 所述的半导体发光元件的半导体发光序列与多层金属层之间至少部分 界面存在透明绝缘层， 所述的透明绝缘层为一层或多层。
[0016] 优选地， 所述的半导体发光元件为砷化镓基发光元件。
[0017] 优选地， 所述的半导体发光序列与透明绝缘层之间存在电流扩展层。
[0018] 优选地， 所述的第二台阶结构为形成在电流扩展层上， 电流扩展层边缘的半导 体发光序列被去除， 其宽度为 1.5微米 -10微米， 更优选地， 所述的台面面积为 3-8 微米。
[0019] 优选地， 所述的半导体发光元件的多层金属层或透明绝缘层或电流扩展层至少 之一延衬底方向的投影面积是变化的， 或边缘形成至少一台阶结构。
[0020] 优选地， 所述的半导体发光元件的多层金属层或透明绝缘层或电流扩展层至少 之一延衬底方向的投影面积变化是呈现增加或投影面积增加的趋势。
[0021] 优选地， 所述的多层金属层包括键合层、 金属反射层、 欧姆接触层至少一种。
[0022] 优选地， 所述的非金属衬底为导电性衬底， 与半导体发光序列相反一侧有导电 金属层。 [0023] 优选地， 所述的导电性衬底为吸收激光镭射的衬底。
[0024] 优选地， 所述的导电性衬底为硅或碳化硅衬底。
[0025] 本发明提供一种半导体发光元件的制备方法， 其包括如下步骤： （1） 准备待 切割前的半导体发光元件， 所述的半导体发光元件的键合衬底包括第一表面和 第二表面， 第一表面上的多层金属层， 多层金属层上的半导体发光序列； （2） 蚀刻半导体发光序列形成第一平台； （3） 沿着第一平台进一步蚀刻去除多层金 属层， 露出基板形成第二平台区域； （4） 沿着第二平台区域分离半导体发光元 件以获得单一的芯片结构。
[0026] 优选地， 所述多层金属反射层与半导体发光序列之间部分区域还有绝缘保护层 ， 所述的制备方法还包括在步骤 （3） 中蚀刻去除所述的绝缘保护层。
[0027] 优选地， 所述的划裂步骤包括激光划裂或激光隐切。
[0028] 优选地， 所述的绝缘保护层可为一层或多层， 所述的蚀刻方法为干法蚀刻。
[0029] 优选地， 所述的步骤 （3） 中去除多层金属层的方法为湿法蚀刻或干湿法蚀刻 结合的方式。
发明的有益效果
有益效果
[0030] 本发明的结构具备以下技术效果：
[0031] 本发明获得一种能够保证发光效率且可靠性高的半导体发光元件， 同时根据本 发明的制备方法， 能够减少激光划裂产生的回熔物溅射到半导体发光元件的发 光区域的侧壁， 减少漏电现象的产生， 提升芯片分离的良率； 同时能够有效减 少切割道的面积， 可有效提高发光区域的面积比， 从而提高发光效率。
对附图的简要说明
附图说明
[0032] 附图用来提供对本发明的进一步理解， 并且构成说明书的一部分， 与本发明的 实施例一起用于解释本发明， 并不构成对本发明的限制。 此外， 附图数据是描 述概要， 不是按比例绘制。
[0033] 附图 1为实施本发明的发光二极管制备方法步骤 （1） 获得的结构示意图。
[0034] 附图 2为实施本发明的发光二极管制备方法步骤 （2） 形成第一平台的结构示意 图。
[0035] 附图 3为实施本发明的发光二极管制备方法步骤 （3） 形成第二平台的结构示意 图。
[0036] 附图 4 （a） 为实施本发明的发光二极管制备方法步骤 （4） 激光隐切后的侧视 图。
[0037] 附图 4 （b） 为实施本发明的发光二极管制备方法步骤 （4） 激光隐切后的俯视 图。
[0038] 附图 5为实施本发明的发光二极管制备方法获得的最终结构示意图。
[0039] 编号说明： 1.背面金属电极， 2.键合衬底， 3.多层金属层， 4.透明绝缘层， 5.半 导体发光序列， 6 -正面电极。
发明实施例
本发明的实施方式
[0040] 请参阅图 1~图5， 需要说明的是， 本实施例中所提供的图示仅以示意方式说明 本发明的基本构想， 遂图示中仅显示与本发明中有关的组件而非按照实际实施 时的组件数目、 形状及尺寸绘制， 其实际实施时各组件的型态、 数量及比例可 为一种随意的改变， 且其组件布局型态也可能更为复杂。
[0041] 如图 （1） 所示， 本发明的发光元件的制作工艺包括如下步骤， （1） 获得切割 前的如下发光结构， 如图所示： 包括键合衬底， 键合衬底背侧具有背面金属电 极 1， 正面由下至上包括多层金属层， 多层金属层上具体包括金属键合层、 金属 反射层， 透明绝缘层 4和半导体发光序列、 正面金属电极， 半导体发光序列包括 作为第 1导电型的第 1半导体层的 p型包覆层、 作为与第 1导电型不同的第 2导电型 的第 2半导体层的 n型包覆层、 夹于 p型包覆层和 n型包覆层并可发出规定波长的 光的活性层的发光层； 发光层、 n型接触层和 p型接触层分别由 III- V族化合物半 导体形成。 具体而言， 可通过使用 GaAs系、 GaP系、 InP系等化合物半导体， InG aAs系、 InGaP系、 AlGaAs系等三元系化合物半导体， AlGalnP系等四元系化合物 半导体而形成。 例如， 发光层具有 n型包覆层 106（其通过含有 n型的 AlGalnP而形 成）和 p型包覆层（其通过含有 p型的 AlGalnP而形成）夹持活性层（其由未掺杂作为杂 质的掺杂剂的未掺杂的 AlGalnP系的化合物半导体的本体形成）的结构， P型包覆 层优选地包括一层 p-GaP层利于 P层半导体层侧的电流扩展 （该层位于透明绝缘 层 4上， 图中未示出） ， 本发明具体为砷化镓基外延结构转移至键合衬底后的半 导体发光元件。
[0042] 形成于发光层的光取出面， 即， 在 n型包覆层的活性层侧的相反侧的表面的一 部上形成的 n型接触层； 更优选地， 为了提高发光效率， 在发光层的另一个表面 侧和发光层的侧面分别形成的凹凸部； 覆盖发光层的另一个表面的凹凸部和发 光层的侧面的凹凸部的透明绝缘膜。 设置于发光层的反射层侧的相反侧， 即 n型 接触层上的正面电极； 设置于正面电极上的作为导线接合用焊盘电极； 正面电 极不受限于这样的形状， 从上方观看时， 也可形成为圆形状、 多边形状（例如， 六边形等）。 另外， 焊盘电极形成为与正面电极的表面相接触。 正面电极由欧姆 接触于 n型接触层的金属材料形成。 例如， 表面电极由含有 Au、 Ge、 Ni等的金属 材料来形成。 另外， 焊盘电极由含有例如 Ti、 Au等的金属材料来形成。
[0043] 设置于发光层的一个表面侧并反射活性层所发出的光的由金属形成的反射层； 由对于活性层所发出的光而言反射率高的导电性材料形成。 作为一个实例， 反 射层， 由对于该光而言反射率为 80%以上的导电性材料形成。 反射层将活性层 所发出的光中到达了反射层的光反射向活性层侧。 反射层由例如 Al、 Au、 Ag等 金属材料或包含选自这些金属材料的至少一种金属材料的合金形成。 作为一个 实例， 反射层由规定膜厚的 Au形成。 反射层也可通过进一步含有由 Ti、 Pt等金属 材料形成的阻挡层、 容易接合于接合层的接合膜而形成。
[0044] 在除了设置有欧姆接触部的区域以外的区域， 在发光层与反射层之间， 在 p型 接触层与反射层之间所设置的电介质层， 即绝缘膜； 绝缘膜可由， 例如， 二氧 化硅、 氮化硅形成。 另外， 绝缘膜也可由折射率互不相同的多个绝缘层， 即， 由二氧化硅形成的膜和由氮化硅形成的膜经过多层层叠的多层膜形成。 对于作 为该多个绝缘层的多层膜， 例如， 可按照沿着从发光层的另一个表面（:即， 光取 出面）和发光层的侧面远离的方向折射率降低的顺序来层叠。 电介质层也可由折 射率各不相同的多个材料构成的薄膜的层叠结构形成。 例如， 电介质层也可制 成分布式布拉格反射镜结构。 作为一个实例， 可形成具有如下 DBR结构的电介 质层： 将规定膜厚的由 Si0 2形成的层、 规定膜厚的由 110 2形成的层制成对， 将 所得的对层多次层叠形成 DBR结构。 作为发光层与反射层之间所形成的接触层 的 p型接触层， 欧姆接触部设置于 p型接触层的表面的未设置电介质层的区域， 欧姆接触部形成于贯通电介质层的一部分区域而设置的开口内， 将 p型接触层和 反射层电连接。 作为一个实例， 欧姆接触部由包含 Au、 Zn的金属材料， 例如 Au Zn合金来形成。
[0045] 导电性的支撑衬底， 由 p型或 n型的导电性 n-掺杂的导电性硅衬底、 或碳化硅衬 底等半导体衬底构成， 该导电性衬底优选为能够吸收激光隐切的衬底， 设置于 支撑衬底的与接合层接触的表面的相反侧的表面的背面电极。 键合层也可以是 含有欧姆接触于支撑衬底的欧姆接触电极层， 由 Ti、 Pt等的金属材料形成的阻挡 层、 容易接合于反射层的键合膜而形成。 作为一个实例， 欧姆接触电极可由包 含 Au、 Ti、 A1等的金属材料形成； 阻挡层可由规定膜厚的 Pt形成。 另外， 阻挡层 抑制构成接合膜的材料向欧姆接触电极传输。 进一步， 键合层由电接合和机械 接合于反射层的材料形成， 作为一个实例， 如上述可由规定膜厚的 Au形成。
[0046] 背面电极由电接合于支撑衬底的材料形成， 例如， 由 Ti、 Au等金属材料形成。
在本实施例中， 所述的背面电极为金。
[0047] (2) 蚀刻至少半导体发光序列形成第一平台；
[0048] 首先在 N侧出光面涂覆一层光刻胶， 并通过曝光、 显影方式制作光刻胶图案
， 露出需要制作切割道的区域。 接着， 蚀刻穿过发光层并停留于电流扩展层 GaP 层， 蚀刻方式优选为干法蚀刻， 以形成第一平台如图 2所示， 所述第一平台的底 部为 GaP层， GaP层底部厚度方向有部分被保留。
[0049] (3) 进一步采用蚀刻去除多层金属层；
[0050] 如图 3所示， 进一步移除切割道区域之镜面层， 键合层， 使其裸露出硅基板形 成第二平台以进行后续分离， 第一平台处转化成为了第一台阶结构。 具体操作 为， 至少在第一平台侧壁以及顶面出光面表面形成光刻胶， 通过曝光、 显影方 式制作光刻胶图案， 露出第一平台底部， 第一平台底部边缘部分被光刻胶覆盖 ， 避免后续蚀刻工艺对半导体序列侧壁进行蚀刻产生发光面积损失。 接着针对 光刻胶露出部分， 通过干法蚀刻去除 GaP层以及绝缘层、 湿法蚀刻或干湿法结合 蚀刻方式去除金属层， 如金锌、 金反射层采用湿法蚀刻， 钛铂阻挡层采用干法 蚀刻结合的方式以露出衬底， 在多道蚀刻工序切换蚀刻后可能会在边缘形成多 个台阶结构， 如干法蚀刻去除 GaP层以及绝缘层后， 采用另外一种工序进行湿法 蚀刻去除反射层如金、 金锌等， 蚀刻的过程也可能会导致 GaP层、 绝缘层以及多 层金属层形成倾斜的侧壁， 导致沿着厚度深入到基板方向的宽度变化的， 优选 呈现增加或投影面积增加的趋势， 以利于形成光线反射的角度， 利于侧壁出光 被金属层反射出去。
[0051] (4) 分离半导体发光元件以获得单一的芯片结构。
[0052] 在露出的衬底表面分离半导体发光元件， 优选吸收激光的导电性衬底， 优选为 半导体衬底 Si衬底、 碳化硅衬底等， 本实施例为 si衬底。 接着激光隐切衬底， 如 图 4 (a) 和 4(b) 所示， 本实施例优选正面隐切， 通过控制激光的强度在衬底的 第一表面形成的节点为 1/3到 1/2的深度形成连续或不连续的节点， 如图 5所示， 最后正面劈开分离芯片。 如图 5所示， 劈开所述的衬底时， 由于激光产生的节点 处的应力减弱， 而成为衬底断裂的截面产生处， 键合衬底侧壁表面会形成具有 相对平坦的第一部分和不平坦的第二部分， 所述的键合衬底侧壁表面不平坦的 第二部分为不平整的凸凹结构， 所述的键合衬底侧壁表面不平整的凸凹结构是 由于激光隐切所产生的连续或不连续的节点导致的， 其粗糙度会高于衬底侧壁 未被形成节点而断开形成侧壁截面的区域。
[0053] 因此， 通过本发明获得的发光二极管包括键合衬底， 所述的半导体发光元件的 键合衬底包括第一表面和第二表面， 第一表面上的多层金属层， 多层金属层上 的半导体发光序列， 其中所述的键合衬底侧壁表面具有相对平坦的第一部分和 不平坦的第二部分。
[0054] 所述的表面不平坦的第二部分靠近键合衬底的第一表面， 所述的表面不平坦的 第二部分靠近键合衬底的第二表面或位于衬底的中间位置， 靠近第一表面侧和 第二表面侧的侧壁为相对平台的第二部分， 或表面不平坦的第二部分直接延伸 至第一表面或第二表面。 并且在衬底的第一表面边缘存在台阶结构， 该台阶结 构表面无多层金属层， 该台阶结构是由于激光隐切位置为远离金属层侧壁一定 的距离而导致的， 避免激光直接打到多层金属层上， 产生金属回熔物。
[0055] 作为替代性的实施例， 激光隐切也可被激光划裂替代， 首先采用连续的激光在 衬底的第一表面进行蚀刻形成一定深度的凹槽， 接着采用劈刀将半导体发光元 件劈裂形成单一的发光元件。
[0056] 作为替代型的实施例， 本发明的制作方法， 同样适用于氮化物基获得的转移衬 底的结构分离形成单一发光芯片， 更优选采用能够吸收激光的转移衬底， 如硅 或碳化硅的衬底， 并且衬底上， 半导体发光序列下方采用采用金属反射层或金 属层做电接触或金属键合层的结构。
[0057] 根据本发明的制备方法， 进一步蚀刻多层金属层到衬底表面形成第二平台， 能 够减少激光划裂产生的回熔物溅射到半导体发光元件的发光区域的侧壁， 减少 漏电现象的产生， 提升芯片分离的良率。 采用激光划裂方式能够有效减少切割 道的面积， 可有效提高发光区域的面积比， 从而提高发光效率。
[0058] 上述实施例仅例示性说明本发明的原理及其功效， 而非用于限制本发明。 任何 熟悉此技术的人士皆可在不违背本发明的精神及范畴下， 对上述实施例进行修 饰或改变。 因此， 举凡所属技术领域中具有通常知识者在未脱离本发明所揭示 的精神与技术思想下所完成的一切等效修饰或改变， 仍应由本发明的权利要求 所涵盖。

Claims

权利要求书
[权利要求 1] 一种半导体发光元件， 其包括键合衬底， 所述的半导体发光元件的键 合衬底包括第一表面和第二表面， 第一表面上的多层金属层， 多层金 属层上的半导体发光序列， 所述的键合衬底的边缘形成台阶结构， 以 使键合衬底的第一表面的边缘部分未被覆盖。
[权利要求 2] 根据权利要求 i所述的半导体发光元件， 其特征在于， 所述键合衬底 的边缘的台阶结构宽度至少 2微米， 更有选地为 2-10微米， 更优选地 ， 为 3-6微米。
[权利要求 3] 根据权利要求 1所述的半导体发光元件， 其特征在于， 所述的多层金 属层边缘形成第二台阶结构， 第二台阶结构形成为多层金属层边缘上 的半导体发光序列被去除， 其宽度为 1.5-10微米， 更优选地， 所述的 台面面积为 3-8微米。
[权利要求 4] 根据权利要求 1所述的半导体发光元件， 其特征在于， 其中所述的键 合衬底侧壁表面具有相对平坦的第一部分和不平坦的第二部分。
[权利要求 5] 根据权利要求 1所述的半导体发光元件， 其特征在于， 所述的键合衬 底侧壁表面不平坦的第二部分为不平整的凸凹结构。
[权利要求 6] 根据权利要求 1所述的半导体发光元件， 其特征在于， 所述的表面不 平坦的第二部分靠近键合衬底的第一表面或进一步地延伸至第一表面
[权利要求 7] 根据权利要求 1所述的半导体发光元件， 其特征在于， 所述的表面不 平坦的第二部分靠近键合衬底的第二表面或延伸至第二表面。
[权利要求 8] 根据权利要求 1所述的半导体发光元件， 其特征在于， 所述侧壁的表 面不平坦的第二部分位于相对于第一表面深度至 1/3 - 1/2位置， 靠近第 一表面侧和第二表面侧为相对平坦的第一部分。
[权利要求 9] 根据权利要求 1所述的半导体发光元件， 其特征在于， 所述的半导体 发光元件的键合衬底为非金属衬底。
[权利要求 10] 根据权利要求 1所述的半导体发光元件， 其特征在于， 所述的半导体 外延发光序列的为基板的纵向投影面积比至少为 50%。 [权利要求 11] 根据权利要求 1所述的半导体发光元件， 其特征在于， 所述的半导体 外延发光序列的基板的纵向投影面积比至少为 70%或 80%。
[权利要求 12] 根据权利要求 1所述的半导体发光元件， 其特征在于， 所述的半导体 发光元件的半导体发光序列与多层金属层之间至少部分界面存在透明 绝缘层， 所述的透明绝缘层为一层或多层。
[权利要求 13] 根据权利要求 1所述的半导体发光元件， 其特征在于， 所述的半导体 发光元件为砷化镓基发光元件。
[权利要求 14] 根据权利要求 13所述的半导体发光元件， 其特征在于， 所述的半导体 发光序列与透明绝缘层之间存在电流扩展层。
[权利要求 15] 根据权利要求 13所述的半导体发光元件， 其特征在于， 所述的第二台 阶结构为形成在电流扩展层上， 电流扩展层边缘的半导体发光序列被 去除。
[权利要求 16] 根据权利要求 13或 16所述的半导体发光元件， 其特征在于， 所述的半 导体发光元件的多层金属层或透明绝缘层或电流扩展层至少之一延衬 底方向的投影面积是变化的， 或边缘形成至少一台阶结构。
[权利要求 17] 根据权利要求 13或 16所述的半导体发光元件， 其特征在于， 所述的半 导体发光元件的多层金属层或透明绝缘层或电流扩展层至少之一延衬 底方向的投影面积变化是呈现增加趋势。
[权利要求 18] 根据权利要求 1所述的半导体发光元件， 其特征在于， 所述的多层金 属层包括键合层、 金属反射层、 欧姆接触层至少一种。
[权利要求 19] 根据权利要求 1所述的半导体发光元件， 其特征在于， 所述的非金属 衬底为导电性衬底， 与半导体发光序列相反一侧有导电金属层。
[权利要求 20] 根据权利要求 1所述的半导体发光元件， 其特征在于， 所述的导电性 衬底为吸收激光镭射的衬底。
[权利要求 21] 根据权利要求 1所述的半导体发光元件， 其特征在于， 所述的导电性 衬底为硅或碳化硅衬底。
[权利要求 22] 一种半导体发光元件的制备方法， 其包括如下步骤： （1） 准备待切 割前的半导体发光元件所述的半导体发光元件的键合衬底包括第一表 面和第二表面， 第一表面上的多层金属层， 多层金属层上的半导体发 光序列； （2） 蚀刻半导体发光序列形成第一平台； （3） 沿着第一平 台进一步蚀刻去除多层金属层， 露出基板形成第二平台区域； （4） 沿着第二平台区域分离半导体发光元件以获得单一的芯片结构。
[权利要求 23] 根据权利要求 22所述的制备方法， 其特征在于： 所述多层金属反射层 与半导体发光序列之间部分区域还有绝缘保护层， 所述的制备方法还 包括在步骤 （3） 中蚀刻去除所述的绝缘保护层。
[权利要求 24] 根据权利要求 22所述的制备方法， 其特征在于： 所述的划裂步骤包括 激光划裂或激光隐切。
[权利要求 25] 根据权利要求 23所述的制备方法， 其特征在于： 所述的绝缘保护层可 为一层或多层， 所述的蚀刻方法为干法蚀刻。
[权利要求 27] 根据权利要求 24所述的制备方法， 其特征在于： 所述的步骤 （3） 中 去除多层金属层的方法为湿法蚀刻或干湿法蚀刻结合的方式。
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