WO2020004522A1 - High-frequency passive component - Google Patents

High-frequency passive component Download PDF

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Publication number
WO2020004522A1
WO2020004522A1 PCT/JP2019/025527 JP2019025527W WO2020004522A1 WO 2020004522 A1 WO2020004522 A1 WO 2020004522A1 JP 2019025527 W JP2019025527 W JP 2019025527W WO 2020004522 A1 WO2020004522 A1 WO 2020004522A1
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WIPO (PCT)
Prior art keywords
layer
substrate
wide wall
conductor layer
dielectric layer
Prior art date
Application number
PCT/JP2019/025527
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French (fr)
Japanese (ja)
Inventor
理 額賀
勝 文屋
磊 徐
Original Assignee
株式会社フジクラ
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP2019112855A external-priority patent/JP2020010325A/en
Application filed by 株式会社フジクラ filed Critical 株式会社フジクラ
Priority to US17/255,675 priority Critical patent/US20210242556A1/en
Publication of WO2020004522A1 publication Critical patent/WO2020004522A1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01P—WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
    • H01P3/00—Waveguides; Transmission lines of the waveguide type
    • H01P3/12—Hollow waveguides

Definitions

  • the present invention relates to a high-frequency passive component.
  • This application claims priority based on Japanese Patent Application No. 2018-123211 filed in Japan on June 28, 2018 and Japanese Patent Application No. 2019-112855 filed in Japan on June 18, 2019. The contents are incorporated herein.
  • Patent Document 1 proposes a mode converter using a post-wall waveguide (Post-wall @ Waveguide).
  • the wide wall of the waveguide structure has a large conductor layer area. Therefore, when a dielectric layer is formed on a wide wall, the wide wall may be separated from the substrate. In particular, this problem becomes remarkable when a material excellent in high-frequency characteristics is preferentially selected as a substrate, rather than adhesion to a wiring layer.
  • the present invention has been made in view of the above problems, and has as its object to provide a high-frequency passive component capable of preventing a wide wall from peeling off from a substrate.
  • a high-frequency passive component includes a substrate formed of a dielectric including a waveguide region, a first wide wall formed on a first surface of the substrate, and the substrate.
  • a second wide wall formed on the second surface, and a plurality of through-electrodes connected to both the first wide wall and the second wide wall.
  • the upper conductor layer includes the first dielectric layer, the substrate between the first dielectric layer and the first wide wall, the first wide wall, It may be formed over the second dielectric layer.
  • the upper conductor layer may be arranged at least at a corner of an outer peripheral portion of the first wide wall.
  • the upper conductor layer may be arranged on the entire outer peripheral portion of the first wide wall.
  • the substrate may be formed of glass, and the first dielectric layer and the second dielectric layer may be formed of resin.
  • At least a part of the upper conductor layer may be sealed with a resin.
  • the high-frequency passive component has a penetrating structure including penetrating electrodes penetrating through both surfaces of the substrate at a position different from the waveguide structure, and a third structure formed on the substrate at a distance from the penetrating structure.
  • a first dielectric layer located outside the second wide wall and an upper conductor layer are formed on the second surface, and the upper conductor layer includes the first dielectric layer, It may be formed over the substrate between the first dielectric layer and the second wide wall and over the second wide wall.
  • an end of the first wide wall is provided.
  • a contact portion and a separation portion are formed, the separation portion is separated from the substrate, and the contact portion contacts the substrate and is located outside the separation portion.
  • an end of the first wide wall is provided.
  • a contact portion, a separation portion, and a recess are formed, the separation portion is separated from the substrate, the contact portion contacts the substrate, and the recess is located between the separation portion and the contact portion.
  • the upper conductor layer may be depressed toward the inside of the first wide wall, and enter the inside of the recess.
  • the arrangement of the dielectric layer and the upper conductor layer is devised to suppress the wide wall from peeling off from the substrate. be able to.
  • FIG. 3 is an enlarged view of a portion A in FIG. 2. It is a figure which shows the 1st modification of FIG. It is a figure which shows the 2nd modification of FIG. FIG.
  • FIG. 18 is a diagram illustrating a third modification of FIG. 17. It is a figure which shows the 4th modification of FIG. It is a figure which shows the 5th modification of FIG.
  • FIG. 18 is a diagram illustrating a sixth modification of FIG. 17.
  • FIG. 18 is a diagram illustrating a seventh modification of FIG. 17.
  • FIG. 18 is a diagram illustrating an eighth modification of FIG. 17.
  • FIG. 18 is a diagram illustrating a ninth modification example of FIG. 17.
  • FIG. 18 is a diagram illustrating a tenth modification example of FIG. 17.
  • FIG. 18 is a diagram illustrating an eleventh modification of FIG. 17.
  • Fig. 1 illustrates the appearance of the high-frequency passive component.
  • a waveguide structure 21 is formed on a substrate 10.
  • the substrate 10 include a dielectric substrate such as a glass substrate, a sapphire substrate, and a quartz substrate, a single crystal substrate, and a composite substrate.
  • the waveguide structure 21 can be used as a waveguide structure of a high-frequency device through which a high-frequency signal (electromagnetic wave) such as a millimeter wave propagates.
  • the frequency is not particularly limited, but is, for example, 30 to 300 GHz, 60 to 80 GHz, or the like.
  • the substrate is preferably made of a material having excellent high frequency characteristics such as a small dielectric loss tangent.
  • a specific example of the cross-sectional structure of the high-frequency passive component will be described.
  • FIG. 2 shows a cross-sectional structure of the high-frequency passive component of the first embodiment.
  • the substrate 10 has a first surface 10a and a second surface 10b.
  • the thickness direction of the substrate 10 is simply referred to as “thickness direction”, and a cross section along the thickness direction is simply referred to as “cross section”.
  • the first surface 10a side is referred to as an upper side
  • the second surface 10b side is referred to as a lower side.
  • a first wide wall 11 is formed on the first surface 10a
  • a second wide wall 12 is formed on the second surface 10b.
  • the substrate 10 is made of a dielectric material such as glass and includes the waveguide region 20 of the waveguide structure 21.
  • the waveguide structure 21 includes a first wide wall 11, a second wide wall 12, and a plurality of through electrodes 13.
  • the first wide wall 11, the second wide wall 12, and the plurality of through electrodes 13 form the waveguide region 20. It is arranged to surround.
  • the plurality of through electrodes 13 are connected to the first wide wall 11 and the second wide wall 12.
  • the waveguide region 20 functions as a path through which a high-frequency signal propagates.
  • the waveguide structure 21 may constitute a passive component (passive device) such as a waveguide, a filter, a diplexer, a directional coupler, and a distributor.
  • the wide walls 11 and 12 can be composed of a conductor layer such as a metal thin film.
  • the wide walls 11, 12 may be connected to a ground potential (not shown).
  • the through electrode 13 is provided on an inner wall of a through hole 13 a formed in the substrate 10.
  • the through electrode 13 may be configured to be hollow inside the through hole 13a, or the inside of the through hole 13a may be solidly filled.
  • the waveguide structure 21 may include at least the wide walls 11 and 12 and the through electrode 13 that are in contact with the waveguide region 20.
  • a region 22 outside the waveguide structure 21 is a region outside the substrate 10 excluding the waveguide region 20. As shown in FIG. 2, the wide walls 11 and 12 may extend to the region 22.
  • a wall surrounding the waveguide region 20 can be formed.
  • the wall formed by the through electrode 13 include a narrow wall facing the width direction of the waveguide structure 21, a short wall provided at an end in the longitudinal direction, and other side walls.
  • the shape of the through-electrode 13 forming the wall is not limited to a conductor pillar (post) having a cylindrical shape as shown in FIG.
  • a shape continuous along the wall, a shape continuous along the corner, and the like can be adopted.
  • various arrangements of the arrangement of the through electrodes 13 are possible according to the function of the passive component and the like. For example, a portion where the through electrodes 13 are arranged at equal intervals, a portion where the intervals between the through electrodes 13 are uneven, a portion where the through electrodes 13 are not arranged over a predetermined section, or the like may be provided.
  • the outer peripheral portions 11 e and 12 e of the wide walls 11 and 12 are arranged on the substrate 10.
  • a first dielectric layer 15 is formed on a portion located outside the wide wall 11.
  • a second dielectric layer 16 is formed on the wide wall 11.
  • the second dielectric layer 16 is arranged inside the waveguide region 20 in plan view when viewed from the thickness direction.
  • the first dielectric layer 15 and the second dielectric layer 16 may be collectively referred to as dielectric layers 15 and 16.
  • the dielectric layers 15 and 16 may be formed by the same film forming process or may be formed by separate film forming processes.
  • a material forming the dielectric layers 15 and 16 for example, a resin is used.
  • the upper conductor layer 14 arranged on the surface of the second dielectric layer 16 reaches the first dielectric layer 15 via the outer peripheral portion 11 e of the wide wall 11. Between the wide wall 11 and the first dielectric layer 15, the upper conductor layer 14 is disposed on the first surface 10a of the substrate 10. As shown in FIG. 2, the upper conductor layer 14 may have a void 14 a such as a hole or a gap on the surface of the second dielectric layer 16. When the upper conductor layer 14 is formed on the through-electrode 13, the connection portion 14b with the through-electrode 13 may be formed in the through-hole 13a.
  • the end 14e of the upper conductor layer 14 arranged on the second dielectric layer 16 is arranged at a position away from the substrate 10 in the thickness direction.
  • the position of the end 14e may be arranged on the upper surface of the second dielectric layer 16 along the surface direction of the substrate 10 or on the side surface of the second dielectric layer 16 along the thickness direction of the substrate 10. You may.
  • the upper conductor layer 14 arranged on the second dielectric layer 16 may have a pad for external connection.
  • the pad can be formed of a conductor pattern wider than the wiring.
  • the planar shape of the pad is not particularly limited, and examples include a polygon such as a quadrangle, a circle, and the like.
  • the upper conductor layer 14 is formed over the first dielectric layer 15, the substrate 10 between the first dielectric layer 15 and the wide wall 11, the wide wall 11, and the second dielectric layer 16. . Since the upper conductor layer 14 is connected to the wide wall 11, the outer peripheral portion 11 e of the large wall 11 having a large area is replaced with the end 14 e of the upper conductor layer 14 arranged on the first dielectric layer 15 in a simulated manner. Can be. For example, when the film is formed by photolithography, the wide wall 11, the dielectric layers 15, 16 and the upper conductor layer 14 are superposed in this order. Therefore, the end 14 e of the upper conductor layer 14 can be arranged on the surface of the first dielectric layer 15 or on the surface of the second dielectric layer 16.
  • the arrangement of the upper conductor layer 14 and the dielectric layers 15 and 16 can prevent the wide wall 11 from peeling off from the substrate 10.
  • the present invention is not particularly limited. For example, the following hypothesis is considered.
  • the wide wall 11 may peel off from the substrate 10 depending on the use environment. For example, when the temperature rise or the temperature drop is excessive, a stress is generated between the materials constituting the conductor layer of the wide wall 11 and the material constituting the dielectric layer 16 due to a difference in coefficient of thermal expansion. This stress may cause the wide wall 11 to peel off. The peeling of the wide wall 11 occurs from the outer peripheral portion 11e of the wide wall 11 as a starting point.
  • the first dielectric layer 15 is provided at a position away from the wide wall 11, and the end 14 e of the upper conductor layer 14 is arranged on the surface of the first dielectric layer 15.
  • the stress is reduced via the first dielectric layer 15 without the end 14 e of the upper conductor layer 14 coming into contact with the substrate 10. For this reason, peeling from the end portion 14e of the upper conductor layer 14 is unlikely to occur, and furthermore, since the upper conductor layer 14 covers the outer peripheral portion 11e of the wide wall 11, peeling of the outer peripheral portion 11e of the wide wall 11 is also suppressed. It is considered possible.
  • the upper conductor layer 14 is arranged at least at a corner of the outer peripheral portion 11 e of the wide wall 11 or at the entire outer peripheral portion 11 e of the wide wall 11.
  • the upper conductor layer 14 includes the first dielectric layer 15, the substrate 10 between the first dielectric layer 15 and the wide wall 11, and the wide wall 11. And the second dielectric layer 16.
  • the upper conductor layer 14 only needs to cover the outer peripheral portion 11 e of the wide wall 11. Therefore, the upper conductor layer 14 may be formed over the first dielectric layer 15, the substrate 10 between the first dielectric layer 15 and the wide wall 11, and the wide wall 11. In this case, the second dielectric layer 16 may not be provided on the wide wall 11.
  • FIG. 3 shows a cross-sectional structure of the high-frequency passive component according to the second embodiment.
  • the second dielectric layer 16 is formed not only on the waveguide region 20 but also on the outer region 22.
  • the second dielectric layer 16 reaches over the wide wall 11 in a region 22 outside the waveguide structure 21 over the through electrode 13.
  • the size of the second dielectric layer 16 extending outward beyond the through electrode 13 is not particularly limited, but may be, for example, about the same as the diameter of the through electrode 13.
  • the wide wall 11 can be prevented from peeling off from the substrate 10. .
  • FIG. 4 shows a cross-sectional structure of the high-frequency passive component according to the third embodiment.
  • an opening 11 a is provided in the wide wall 11 at a position in contact with the waveguide region 20.
  • the position of the opening 11a may be a portion where the second dielectric layer 16 is laminated, or may be another position.
  • an opening may be provided in the wide wall 12 on the opposite surface (the second surface 10b).
  • FIG. 5 shows a cross-sectional structure of the high-frequency passive component according to the fourth embodiment.
  • the high-frequency passive component of the fourth embodiment has a via 17 formed by a conductor.
  • the via 17 penetrates through the second dielectric layer 16 so as to connect between the wide wall 11 and the upper conductor layer 14.
  • the wide wall 11 and the upper conductor layer 14 can be electrically connected.
  • FIG. 6 shows a cross-sectional structure of the high-frequency passive component according to the fifth embodiment.
  • the high-frequency passive component according to the fifth embodiment has a mode converter 18.
  • the mode converter 18 includes a conductor (blind via) that does not penetrate the waveguide region 20 of the substrate 10. Thereby, when the transmission path of the electric signal is provided in the upper conductor layer 14, the signal can be propagated between the transmission path of the upper conductor layer 14 and the waveguide region 20 of the waveguide structure 21.
  • the signal can be propagated to the waveguide structure 21.
  • the mode converter 18 can be allowing the mode converter 18 to receive the signal propagated through the waveguide region 20, the signal can be propagated to the transmission path of the upper conductor layer 14.
  • a pin 18 a projecting from the opening 11 a of the wide wall 11 to the waveguide region 20 is formed below the mode converter 18.
  • a through conductor 18b connected to the upper conductor layer 14 is formed above the mode converter 18.
  • FIG. 7 shows a cross-sectional structure of the high-frequency passive component according to the sixth embodiment.
  • a sealing layer 19 made of resin or the like is laminated on the upper conductor layer 14.
  • the sealing layer 19 may have, for example, openings 19a and 19b for external connection.
  • the upper conductor layer 14 may have a pad for external connection in a portion exposed through the openings 19a and 19b.
  • FIG. 8 shows a cross-sectional structure of the high-frequency passive component according to the seventh embodiment.
  • the wiring layer 32 is provided on the sealing layer 19.
  • the wiring layer 32 and the upper conductor layer 14 are connected by a via 31 penetrating the sealing layer 19.
  • an electric signal can be input to the upper conductor layer 14 via the wiring layer 32, or an electric signal can be output from the upper conductor layer 14 via the wiring layer 32.
  • the upper conductor layer 14 provided on the second dielectric layer 16 may not have an opening.
  • FIG. 9 shows a cross-sectional structure of the high-frequency passive component according to the eighth embodiment.
  • the high-frequency passive component according to the eighth embodiment has a mode converter 18.
  • the mode converter 18 has a pin 18a and a through conductor 18b.
  • the pin 18 a is located below the mode converter 18 and protrudes into the waveguide region 20.
  • the through conductor 18b is located above the mode converter 18 and is connected to the via 31 of the wiring layer 32.
  • the pin 18a and the through conductor 18b are electrically connected. Thereby, an electric signal can be input from the wiring layer 32 to the waveguide region 20 of the waveguide structure 21 via the mode converter 18. Alternatively, an electric signal can be output from the waveguide region 20 of the waveguide structure 21 to the wiring layer 32 via the mode converter 18.
  • FIG. 10 shows a cross-sectional structure of the high-frequency passive component according to the ninth embodiment.
  • the high-frequency passive component of the ninth embodiment has a penetration structure 33 including penetration electrodes penetrating through both surfaces of the substrate 10 at positions different from the waveguide structure 21.
  • a third dielectric layer 35 is formed at a position away from the penetrating structure 33 outward.
  • a connection conductor layer 34 electrically connected to the through structure 33 is formed.
  • the connection conductor layer 34 is formed over the through structure 33, the substrate 10 between the through structure 33 and the third dielectric layer 35, and the third dielectric layer 35.
  • the connection conductor layer 34 may be formed integrally with the wiring layer 32.
  • the third dielectric layer 37 and the connection conductor layer 36 are provided on the second surface 10 b side of the substrate 10.
  • the third dielectric layer 37 is formed at a position away from the through structure 33 to the outside.
  • the connection conductor layer 36 is electrically connected to the through structure 33.
  • the connection conductor layer 36 may be formed over the through structure 33, the substrate 10 between the through structure 33 and the third dielectric layer 37, and the third dielectric layer 37.
  • the end portions 34e, 36e of the connection conductor layers 34, 36 are provided not on the substrate 10 but on the surfaces of the third dielectric layers 35, 37 made of resin or the like, so that the third dielectric layers 35, 37 are provided. 37 functions as a stress relaxation layer. Thereby, peeling at the ends 34e and 36e of the connection conductor layers 34 and 36 can be suppressed. Further, since the end portions 34e and 36e of the connection conductor layers 34 and 36 are all disposed on the third dielectric layers 35 and 37, pattern formation by photolithography or the like is easy.
  • connection conductor layers 34 and 36 may be sealed with sealing layers 38 and 39 made of a dielectric material such as a resin, except for parts for external connection.
  • sealing layers 38 and 39 made of a dielectric material such as a resin, except for parts for external connection.
  • a sealing layer 38 for sealing the connection conductor layer 36 may be added, or a sealing layer 39 for sealing the connection conductor layer 34 may be added. Both the sealing layer 38 and the sealing layer 39 may be provided.
  • sealing layers 38 and 39 may have, for example, openings for external connection.
  • the connection conductor layers 34 and 36 exposed through the openings of the sealing layers 38 and 39 may have pads for external connection and the like.
  • FIG. 10 illustrates an example in which the opening 38 a is provided in the sealing layer 38, the opening need not be provided in the sealing layer 38.
  • an opening is not shown in the sealing layer 39, an opening may be provided in the sealing layer 39.
  • FIG. 11 shows a cross-sectional structure of the high-frequency passive component according to the tenth embodiment.
  • the first dielectric layer 15 is formed outside the wide walls 11 and 12 on both surfaces (the first surface 10a and the second surface 10b) of the substrate 10. Further, a second dielectric layer 16 is formed on the wide wall 11. On the first surface 10 a side, the upper conductor layer 14 is disposed on the second dielectric layer 16. On the second surface 10b side, the upper conductor layer 14 is arranged without providing the second dielectric layer 16.
  • the two upper conductor layers 14 reach the first dielectric layer 15 from the wide walls 11 and 12 via the outer peripheral portions 11e and 12e of the wide walls 11 and 12, respectively.
  • An upper conductor layer 14 is disposed on the substrate 10 between the wide walls 11 and 12 and the first dielectric layer 15.
  • the end 14e of each upper conductor layer 14 is arranged at a position away from the substrate 10 in the thickness direction.
  • the upper conductor layers 14 are provided on the outer peripheral portions 11 e and 12 e of the wide walls 11 and 12, the peeling of the wide walls 11 and 12 from the substrate 10 is suppressed. Can be.
  • FIG. 12 shows a cross-sectional structure of the high-frequency passive component of the eleventh embodiment.
  • the second dielectric layer 16 is formed not only on the wide wall 11 but also on the wide wall 12. Therefore, the upper conductor layer 14 is disposed on the second dielectric layer 16 also on the side of the wide wall 12.
  • the first dielectric layer 15 is formed on both sides of the substrate 10 outside the wide walls 11 and 12, and the upper conductor is formed similarly to the high-frequency passive component of the tenth embodiment.
  • a layer 14 is provided. With this configuration, peeling of the wide walls 11 and 12 from the substrate 10 can be suppressed.
  • FIG. 13 shows a cross-sectional structure of the high-frequency passive component of the twelfth embodiment.
  • the second dielectric layer 16 is formed not only on the waveguide region 20 but also on the outer region 22 on both surfaces of the substrate 10.
  • the two second dielectric layers 16 extend over the through electrodes 13 and reach the wide walls 11 and 12 in the region 22 outside the waveguide structure 21.
  • the size of the two second dielectric layers 16 extending outward beyond the through electrode 13 is not particularly limited, but may be, for example, about the same as the diameter of the through electrode 13.
  • the first dielectric layer 15 is formed on both sides of the substrate 10 outside the wide walls 11 and 12, and the upper conductor is formed similarly to the high-frequency passive component of the tenth embodiment. Since the layer 14 is provided, peeling of the wide walls 11 and 12 from the substrate 10 can be suppressed.
  • FIG. 14 shows a cross-sectional structure of the high-frequency passive component according to the thirteenth embodiment.
  • the openings 11 a and 12 a are provided in the wide walls 11 and 12 at positions that are in contact with the waveguide region 20. Thereby, the mode of the waveguide region 20 and the external mode can be converted through the openings 11a and 12a.
  • the positions of the openings 11a and 12a may be the portions where the second dielectric layer 16 is laminated, or may be other positions.
  • the first dielectric layer 15 is formed outside the wide walls 11 and 12 on both surfaces of the substrate 10, and the upper conductor is formed similarly to the high-frequency passive component of the tenth embodiment. Since the layer 14 is provided, peeling of the wide walls 11 and 12 from the substrate 10 can be suppressed.
  • FIG. 15 shows a cross-sectional structure of the high-frequency passive component according to the fourteenth embodiment.
  • a via 17 made of a conductor penetrating through the second dielectric layer 16 is provided so as to connect between the wide wall 11 and the upper conductor layer 14.
  • the wide wall 11 and the upper conductor layer 14 can be electrically connected.
  • the first dielectric layer 15 is formed outside the wide walls 11 and 12 on both surfaces of the substrate 10, and the upper conductor is formed similarly to the high-frequency passive component of the tenth embodiment. Since the layer 14 is provided, peeling of the wide walls 11 and 12 from the substrate 10 can be suppressed.
  • FIG. 16 shows a cross-sectional structure of the high-frequency passive component according to the fifteenth embodiment.
  • the high-frequency passive component according to the fifteenth embodiment has a mode converter 18.
  • the mode converter 18 includes a conductor (blind via) that does not penetrate the waveguide region 20 of the substrate 10. Thereby, when the transmission path of the electric signal is provided in the upper conductor layer 14, the signal can be propagated between the transmission path of the upper conductor layer 14 and the waveguide region 20 of the waveguide structure 21.
  • the first dielectric layer 15 is formed outside the wide walls 11 and 12 on both surfaces of the substrate 10, and the upper conductor is formed similarly to the high-frequency passive component of the tenth embodiment. Since the layer 14 is provided, peeling of the wide walls 11 and 12 from the substrate 10 can be suppressed.
  • FIG. 17 is an enlarged view of a portion where the upper conductor layer 14 covers the outer peripheral portions 11e and 12e (for example, a portion A in FIG. 2).
  • the upper conductor layer 14 is not provided on the second surface 10b side.
  • the following description is also applicable to a case where the upper conductor layer 14 is provided on the second surface 10b side as shown in FIG. Therefore, as shown in FIG. 17, the configuration of both the first surface 10a side and the second surface 10b side will be described together with the reference numerals of the wide walls 11, 12 and the outer peripheral portions 11e, 12e.
  • the upper conductor layer 14 is preferably formed along the surfaces of the outer peripheral portions 11e and 12e of the wide walls 11 and 12.
  • the shape of the side surfaces of the outer peripheral portions 11e and 12e is not limited to a surface perpendicular to the substrate 10 as shown in FIG.
  • the side surfaces of the outer peripheral portions 11e and 12e are inclined or flat surfaces such that the width of the wide walls 11 and 12 increases as the distance from the substrate 10 increases, or the width of the wide walls 11 and 12 decreases as the distance from the substrate 10 increases. It may be a plane or a curved surface or the like inclined as described above.
  • the outer peripheral portions 11e and 12e can be formed so that, for example, when the patterns of the wide walls 11 and 12 are formed of resist, the shape of the end face of the resist is complementary to the outer peripheral portions 11e and 12e.
  • convex portions may be provided on the end surfaces of the resist.
  • a concave portion may be provided on the end face of the resist.
  • FIG. 18 shows a first modification of the configuration in which the upper conductor layer 14 covers the outer peripheral portions 11e and 12e of the wide walls 11 and 12.
  • the contact portions 41 and the separation portions 42 are formed on the outer peripheral portions 11 e and 12 e of the wide walls 11 and 12.
  • the contact portion 41 is in contact with the substrate 10.
  • the separation portion 42 is separated from the substrate 10 in the thickness direction, and is not in contact with the substrate 10.
  • the contact portion 41 protrudes from the separation portion 42 toward the outside of the wide walls 11 and 12.
  • the contact area between the substrate 10 and the wide walls 11 and 12 is increased because the contact portion 41 is located outside the wide walls 11 and 12 relative to the separation portion 42. Further, since the contact portion 41 protrudes from the separation portion 42, the contact area between the upper conductor layer 14 and the wide walls 11, 12 also increases. As described above, since the contact area between the substrate 10 and the wide walls 11 and 12 and the contact area between the wide walls 11 and 12 and the upper conductor layer 14 are large, the mutual adhesion is excellent. For this reason, the effect that the upper conductor layer 14 suppresses peeling of the wide walls 11 and 12 from the substrate 10 can be enhanced.
  • FIG. 19 shows a second modification of the configuration in which the upper conductor layer 14 covers the outer peripheral portions 11 e and 12 e of the wide walls 11 and 12.
  • a contact portion 41, a separation portion 42, and a concave portion 43 are formed on outer peripheral portions 11e, 12e of the wide walls 11, 12.
  • the contact portion 41 is in contact with the substrate 10.
  • the separation part 42 is separated from the substrate 10 in the thickness direction, and is not in contact with the substrate 10.
  • the recess 43 is located between the contact portion 41 and the separation portion 42 and is recessed toward the inside of the wide walls 11 and 12.
  • the upper conductor layer 14 is formed along the surfaces of the contact portion 41, the separation portion 42, and the concave portion 43. That is, the upper conductor layer 14 enters into the recess 43. As a result, the contact area between the upper conductor layer 14 and the wide walls 11 and 12 is increased, so that mutual adhesion is excellent. For this reason, the effect that the upper conductor layer 14 suppresses peeling of the wide walls 11 and 12 from the substrate 10 can be enhanced.
  • the cross-sectional shape of the concave portion 43 is a wedge shape (V shape) in which the width of the concave portion 43 gradually decreases toward the inside of the wide walls 11 and 12.
  • the cross-sectional shape of the concave portion 43 is not limited to this, and may be semicircular, U-shaped, W-shaped, C-shaped, or the like.
  • FIG. 20 shows a third modification of the configuration in which the upper conductor layer 14 covers the outer peripheral portions 11 e and 12 e of the wide walls 11 and 12.
  • a contact portion 41, a separation portion 42, and a concave portion 43 are formed on the outer peripheral portions 11e, 12e of the wide walls 11, 12.
  • the contact portion 41 is in contact with the substrate 10.
  • the separation part 42 is separated from the substrate 10 in the thickness direction, and is not in contact with the substrate 10.
  • the recess 43 is located between the contact portion 41 and the separation portion 42 and is recessed toward the inside of the wide walls 11 and 12.
  • the contact portion 41 is located outside the wide walls 11 and 12 than the separation portion 42.
  • the contact area between the substrate 10 and the wide walls 11 and 12 is increased, and the contact area between the upper conductor layer 14 and the wide walls 11 and 12 is increased. For this reason, the effect that the upper conductor layer 14 suppresses peeling of the wide walls 11 and 12 from the substrate 10 can be enhanced.
  • FIG. 21 shows a fourth modification of the configuration in which the upper conductor layer 14 covers the outer peripheral portions 11e and 12e of the wide walls 11 and 12. Since the fourth modified example is similar to the first modified example (FIG. 18), differences will be described.
  • the wide walls 11 and 12 have a first layer 44 in contact with the substrate 10 and a second layer 45 formed on the first layer 44. Further, the end portion 44a of the first layer 44 is the contact portion 41 described above. Further, the end 45a of the second layer 45 is the above-mentioned separation part 42.
  • the contact area between the substrate 10 and the wide walls 11 and 12 is increased, and the contact area between the upper conductor layer 14 and the wide walls 11 and 12 is increased. For this reason, the effect that the upper conductor layer 14 suppresses peeling of the wide walls 11 and 12 from the substrate 10 can be enhanced.
  • the first layer 44 of the wide walls 11 and 12 is formed by vapor deposition of titanium (Ti) or the like, sputtering, electroless plating or the like, and the second layer 45 of the wide walls 11 or 12 is formed by electrolytic plating of copper (Cu) or the like. It may be formed.
  • FIG. 22 shows a fifth modification of the configuration in which the upper conductor layer 14 covers the outer peripheral portions 11 e and 12 e of the wide walls 11 and 12. Since the fifth modified example is similar to the third modified example (FIG. 20), differences will be described.
  • the wide walls 11 and 12 have a first layer 44 in contact with the substrate 10 and a second layer 45 formed on the first layer 44. Further, the end portion 44a of the first layer 44 is the contact portion 41 described above. Further, the end 45a of the second layer 45 is the above-mentioned separation part 42 and the concave part 43.
  • the distance from the first layer 44 gradually decreases toward the back (inside of the wide walls 11 and 12), and the distance from the first layer 44 becomes zero at the deepest. I have. Thereby, the contact area between the substrate 10 and the wide walls 11 and 12 is increased, and the contact area between the upper conductor layer 14 and the wide walls 11 and 12 is increased. For this reason, the effect that the upper conductor layer 14 suppresses peeling of the wide walls 11 and 12 from the substrate 10 can be enhanced.
  • the cross-sectional shape of the recess 43 is not limited to this.
  • the shape of the concave portion 43 is arbitrary as long as the contact area between the first layer 44 and the upper conductor layer 14 increases.
  • FIG. 23 shows a sixth modification of the configuration in which the upper conductor layer 14 covers the outer peripheral portions 11 e and 12 e of the wide walls 11 and 12. Since the sixth modified example is similar to the fourth modified example (FIG. 21), differences will be described.
  • the upper conductor layer 14 has a first layer 46 and a second layer 47.
  • the first layer 46 of the upper conductor layer 14 covers the upper surfaces of the second layers 45 of the wide walls 11 and 12 and the separation part 42.
  • the second layer 47 of the upper conductor layer 14 covers the entire first layer 46 of the upper conductor layer 14.
  • FIG. 24 shows a seventh modification of the configuration in which the upper conductor layer 14 covers the outer peripheral portions 11 e and 12 e of the wide walls 11 and 12. Since the seventh modified example is similar to the fifth modified example (FIG. 22), differences will be described.
  • the upper conductor layer 14 has a first layer 46 and a second layer 47.
  • the first layer 46 of the upper conductor layer 14 covers the upper surface of the second layer 45 of the wide walls 11 and 12, the separation part 42, and the recess 43.
  • the second layer 47 of the upper conductor layer 14 covers the entire first layer 46 of the upper conductor layer 14. Both the first layer 46 and the second layer 47 of the upper conductor layer 14 are formed along the surface of the recess 43.
  • FIG. 25 shows an eighth modification of the configuration in which the upper conductor layer 14 covers the outer peripheral portions 11 e and 12 e of the wide walls 11 and 12. Since the eighth modified example is similar to the fourth modified example (FIG. 21), differences will be described.
  • the upper conductor layer 14 has a first layer 46 and a second layer 47.
  • the first layer 46 of the upper conductor layer 14 includes an upper surface of the second layer 45 of the wide walls 11 and 12, a separation portion 42, an upper surface of the first layer 44 outside the second layer 45, a contact portion 41, It covers the substrate 10 outside the first layer 44.
  • the second layer 47 of the upper conductor layer 14 covers the entire first layer 46.
  • FIG. 26 shows a ninth modification of the configuration in which the upper conductor layer 14 covers the outer peripheral portions 11 e and 12 e of the wide walls 11 and 12.
  • the ninth modified example is similar to the fifth modified example (FIG. 22), and therefore, only the differences will be described.
  • the upper conductor layer 14 has a first layer 46 and a second layer 47.
  • the first layer 46 of the upper conductor layer 14 is in contact with the upper surface of the second layer 45 of the wide walls 11 and 12, the separation portion 42, the concave portion 43, and the upper surface of the first layer 44 outside the second layer 45.
  • the portion 41 and the top of the substrate 10 outside the first layer 44 are covered.
  • the second layer 47 of the upper conductor layer 14 covers the entire first layer 46. Both the first layer 46 and the second layer 47 of the upper conductor layer 14 are formed along the surface of the recess 43.
  • FIG. 27 shows a tenth modification of the configuration in which the upper conductor layer 14 covers the outer peripheral portions 11 e and 12 e of the wide walls 11 and 12. Since the tenth modified example is similar to the fourth modified example (FIG. 21), differences will be described.
  • the upper conductor layer 14 has a first layer 46 and a second layer 47.
  • the first layer 46 of the upper conductor layer 14 includes the upper surface of the second layer 45 of the wide walls 11 and 12, the upper surface of the first layer 44 outside the second layer 45, the contact portion 41, and the first layer 44. It covers the substrate 10 on the outside.
  • the second layer 47 of the upper conductor layer 14 covers the entire area covered by the first layer 46, as well as the separation portion 42.
  • FIG. 28 shows an eleventh modification of the configuration in which the upper conductor layer 14 covers the outer peripheral portions 11 e and 12 e of the wide walls 11 and 12. Since the eleventh modified example is similar to the fifth modified example (FIG. 22), differences will be described.
  • the upper conductor layer 14 has a first layer 46 and a second layer 47.
  • the first layer 46 of the upper conductor layer 14 includes an upper surface of the second layer 45 of the wide walls 11 and 12, and a second layer 45 of the wide walls 11 and 12 of the upper surface of the first layer 44 outside the second layer 45. Covers the area that is not below the Further, the first layer 46 covers the contact portion 41 and the top of the substrate 10 outside the first layer 44.
  • the second layer 47 of the upper conductor layer 14 includes, in addition to the entire first layer 46 of the upper conductor layer 14, the separation portion 42 and the second layer 45 of the upper surface of the first layer 44 outside the second layer 45. And is formed along the surface of the concave portion 43.
  • the first layer 46 of the upper conductor layer 14 is formed by vapor deposition of titanium (Ti) or the like, sputtering, electroless plating, or the like, and the second layer 47 of the upper conductor layer 14 is formed of copper (Cu). ) May be formed by electrolytic plating or the like.
  • the second layer 47 of the upper conductor layer 14 may be formed on either the first layer 44 of the wide wall 11 or the first layer 46 of the upper conductor layer 14.
  • the material forming the first layer 44 of the wide wall 11 and the material forming the first layer 46 of the upper conductor layer 14 may be the same or different.
  • the material forming the second layer 45 of the wide wall 11 and the material forming the second layer 47 of the upper conductor layer 14 may be the same or different.
  • Examples of a method for forming a conductor layer such as a wide wall, a through electrode, and an upper conductor layer include vapor deposition, sputtering, electroless plating, electrolytic plating, and conductor paste. Two or more kinds of conductor materials or film forming methods may be used in combination, or two or more kinds of conductors may be laminated to form a conductor layer. For example, after forming a thin seed layer on the surface of a substrate such as glass, a plating layer having a desired thickness may be laminated on the seed layer.
  • Examples of the end of the conductor layer include an end in the longitudinal direction of a wiring or the like, a pattern of a pad or the like, and the like.
  • the contact surface between the end of the conductor layer and the dielectric layer may be parallel, perpendicular or inclined with respect to the plane direction of the substrate. All the ends of the conductor layer may be arranged on the dielectric layer.
  • a plurality of components may be configured on the same substrate.
  • Other components configured on the substrate are not limited to high frequency passive components, and may include other passive components, active components, and the like.
  • a high-frequency module can be configured.
  • the high-frequency module of the present embodiment is, for example, a module including the above-described high-frequency passive component.
  • Various components necessary for the function can be incorporated in the module.

Abstract

This high-frequency passive component is provided with: a substrate which is formed of a dielectric material and comprises a waveguide region; a waveguide structure which is arranged in such a manner that a first wide wall, a second wide wall and a plurality of through electrodes surround the waveguide region; a first dielectric layer which is positioned outside the first wide wall; a second dielectric layer which is formed on the first wide wall; and an upper conductor layer. The upper conductor layer is formed so as to extend over the first dielectric layer, a part of the substrate positioned between the first dielectric layer and the first wide wall, and the first wide wall.

Description

高周波受動部品High frequency passive components
　本発明は、高周波受動部品に関する。
　本願は、２０１８年６月２８日に日本に出願された特願２０１８－１２３２１１号、および２０１９年６月１８日に日本に出願された特願２０１９－１１２８５５号に基づき優先権を主張し、その内容をここに援用する。 The present invention relates to a high-frequency passive component.
This application claims priority based on Japanese Patent Application No. 2018-123211 filed in Japan on June 28, 2018 and Japanese Patent Application No. 2019-112855 filed in Japan on June 18, 2019. The contents are incorporated herein.
　近年、ミリ波帯を利用した数Ｇ［ｂｐｓ］の高速大容量通信が提案され、その一部が実現されつつある。小型で安価なミリ波通信モジュールを実現する形態として、例えば、特許文献１には、ポスト壁導波路（Ｐｏｓｔ－ｗａｌｌ　Ｗａｖｅｇｕｉｄｅ）を利用したモード変換器が提案されている。 In recent years, high-speed, large-capacity communication of several gigabits per second (bps) using the millimeter wave band has been proposed, and a part thereof is being realized. As a mode for realizing a small and inexpensive millimeter-wave communication module, for example, Patent Document 1 proposes a mode converter using a post-wall waveguide (Post-wall @ Waveguide).
日本国特開２０１４－１５８２４３号公報JP 2014-158243 A
　導波路構造のうち広壁は導体層の面積が大きい。このため、広壁の上に誘電体層を形成すると、広壁が基板から剥離する場合があった。特に、配線層に対する密着性よりも、高周波特性に優れた材質を、優先的に基板として選択する場合に、この課題は顕著になる。 広 The wide wall of the waveguide structure has a large conductor layer area. Therefore, when a dielectric layer is formed on a wide wall, the wide wall may be separated from the substrate. In particular, this problem becomes remarkable when a material excellent in high-frequency characteristics is preferentially selected as a substrate, rather than adhesion to a wiring layer.
　本発明は、上記課題に鑑みてなされたものであり、基板から広壁が剥離することを抑制することが可能な高周波受動部品を提供することを目的とする。 The present invention has been made in view of the above problems, and has as its object to provide a high-frequency passive component capable of preventing a wide wall from peeling off from a substrate.
　前記課題を解決するため、本発明の一態様に係る高周波受動部品は、導波領域を含む誘電体により形成された基板と、前記基板の第１面に形成された第１広壁、前記基板の第２面に形成された第２広壁、並びに前記第１広壁および前記第２広壁の双方に接続された複数の貫通電極を含み、前記第１広壁と前記第２広壁と前記複数の貫通電極が前記導波領域を囲むように配置された導波路構造と、前記第１面の上に形成され、前記第１広壁の外側に位置する第１誘電体層と、前記第１広壁の上に形成された第２誘電体層と、上部導体層と、を備え、前記上部導体層は、前記第１誘電体層と、前記第１誘電体層および前記第１広壁の間の前記基板上と、前記第１広壁と、にわたって形成されている。 In order to solve the above problem, a high-frequency passive component according to one embodiment of the present invention includes a substrate formed of a dielectric including a waveguide region, a first wide wall formed on a first surface of the substrate, and the substrate. A second wide wall formed on the second surface, and a plurality of through-electrodes connected to both the first wide wall and the second wide wall. A waveguide structure in which the plurality of through electrodes are arranged to surround the waveguide region; a first dielectric layer formed on the first surface and located outside the first wide wall; A second dielectric layer formed on the first wide wall; and an upper conductor layer, wherein the upper conductor layer includes the first dielectric layer, the first dielectric layer, and the first wide layer. It is formed over the substrate between the walls and the first wide wall.
　上記態様の高周波受動部品において、前記上部導体層は、前記第１誘電体層と、前記第１誘電体層および前記第１広壁の間の前記基板上と、前記第１広壁と、前記第２誘電体層と、にわたって形成されていてもよい。 In the high-frequency passive component according to the above aspect, the upper conductor layer includes the first dielectric layer, the substrate between the first dielectric layer and the first wide wall, the first wide wall, It may be formed over the second dielectric layer.
　また、前記上部導体層が、前記第１広壁の外周部の少なくとも隅部に配置されていてもよい。 The upper conductor layer may be arranged at least at a corner of an outer peripheral portion of the first wide wall.
　また、前記上部導体層が、前記第１広壁の外周部の全体に配置されていてもよい。 The upper conductor layer may be arranged on the entire outer peripheral portion of the first wide wall.
　また、前記基板はガラスにより形成され、前記第１誘電体層および前記第２誘電体層は樹脂により形成されていてもよい。 The substrate may be formed of glass, and the first dielectric layer and the second dielectric layer may be formed of resin.
　また、前記上部導体層は、少なくとも一部を、樹脂で封止されていてもよい。 Further, at least a part of the upper conductor layer may be sealed with a resin.
　また、上記態様の高周波受動部品は、前記導波路構造とは異なる位置において、前記基板の両面に貫通した貫通電極を含む貫通構造と、前記基板上において前記貫通構造から離れて形成された第３誘電体層と、接続導体層と、を有し、前記接続導体層は、前記貫通構造と、前記貫通構造および前記第３誘電体層の間の前記基板上と、前記第３誘電体層と、にわたって形成されていてもよい。 Further, the high-frequency passive component according to the above aspect has a penetrating structure including penetrating electrodes penetrating through both surfaces of the substrate at a position different from the waveguide structure, and a third structure formed on the substrate at a distance from the penetrating structure. A dielectric layer and a connection conductor layer, wherein the connection conductor layer is formed on the substrate between the through structure, the through structure and the third dielectric layer, and the third dielectric layer. , May be formed.
　また、前記第２面には、前記第２広壁の外側に位置する第１誘電体層と、上部導体層と、が形成され、前記上部導体層は、前記第１誘電体層と、前記第１誘電体層および前記第２広壁の間の前記基板上と、前記第２広壁と、にわたって形成されていてもよい。 In addition, a first dielectric layer located outside the second wide wall and an upper conductor layer are formed on the second surface, and the upper conductor layer includes the first dielectric layer, It may be formed over the substrate between the first dielectric layer and the second wide wall and over the second wide wall.
　また、前記上部導体層が、前記第１誘電体層および前記第１広壁の間の前記基板上と、前記第１広壁の端部とを覆う箇所において、前記第１広壁の端部には接触部および離隔部が形成され、前記離隔部は前記基板から離隔し、前記接触部は前記基板に接触するとともに前記離隔部よりも外側に位置してもよい。 Further, at a position where the upper conductor layer covers the substrate between the first dielectric layer and the first wide wall and an end of the first wide wall, an end of the first wide wall is provided. A contact portion and a separation portion are formed, the separation portion is separated from the substrate, and the contact portion contacts the substrate and is located outside the separation portion.
　また、前記上部導体層が、前記第１誘電体層および前記第１広壁の間の前記基板上と、前記第１広壁の端部とを覆う箇所において、前記第１広壁の端部には接触部、離隔部、および凹部が形成され、前記離隔部は前記基板から離隔し、前記接触部は前記基板に接触し、前記凹部は、前記離隔部と前記接触部との間に位置するとともに前記第１広壁の内部に向けて窪み、前記凹部の内部に前記上部導体層が進入していてもよい。 Further, at a position where the upper conductor layer covers the substrate between the first dielectric layer and the first wide wall and an end of the first wide wall, an end of the first wide wall is provided. A contact portion, a separation portion, and a recess are formed, the separation portion is separated from the substrate, the contact portion contacts the substrate, and the recess is located between the separation portion and the contact portion. At the same time, the upper conductor layer may be depressed toward the inside of the first wide wall, and enter the inside of the recess.
　本発明の上記態様に係る高周波受動部品によれば、導波路構造を有する基板上において、誘電体層と上部導体層との配置を工夫することにより、基板から広壁が剥離することを抑制することができる。 According to the high-frequency passive component according to the aspect of the present invention, on the substrate having the waveguide structure, the arrangement of the dielectric layer and the upper conductor layer is devised to suppress the wide wall from peeling off from the substrate. be able to.
高周波受動部品の外観を例示する斜視図である。It is a perspective view which illustrates the external appearance of a high frequency passive component. 第１実施形態の高周波受動部品を示す断面図である。It is sectional drawing which shows the high frequency passive component of 1st Embodiment. 第２実施形態の高周波受動部品を示す断面図である。It is sectional drawing which shows the high frequency passive component of 2nd Embodiment. 第３実施形態の高周波受動部品を示す断面図である。It is sectional drawing which shows the high frequency passive component of 3rd Embodiment. 第４実施形態の高周波受動部品を示す断面図である。It is sectional drawing which shows the high frequency passive component of 4th Embodiment. 第５実施形態の高周波受動部品を示す断面図である。It is sectional drawing which shows the high frequency passive component of 5th Embodiment. 第６実施形態の高周波受動部品を示す断面図である。It is sectional drawing which shows the high frequency passive component of 6th Embodiment. 第７実施形態の高周波受動部品を示す断面図である。It is sectional drawing which shows the high frequency passive component of 7th Embodiment. 第８実施形態の高周波受動部品を示す断面図である。It is sectional drawing which shows the high frequency passive component of 8th Embodiment. 第９実施形態の高周波受動部品を示す断面図である。It is sectional drawing which shows the high frequency passive component of 9th Embodiment. 第１０実施形態の高周波受動部品を示す断面図である。It is sectional drawing which shows the high frequency passive component of 10th Embodiment. 第１１実施形態の高周波受動部品を示す断面図である。It is sectional drawing which shows the high frequency passive component of 11th Embodiment. 第１２実施形態の高周波受動部品を示す断面図である。It is sectional drawing which shows the high frequency passive component of 12th Embodiment. 第１３実施形態の高周波受動部品を示す断面図である。It is sectional drawing which shows the high frequency passive component of 13th Embodiment. 第１４実施形態の高周波受動部品を示す断面図である。It is sectional drawing which shows the high frequency passive component of 14th Embodiment. 第１５実施形態の高周波受動部品を示す断面図である。It is sectional drawing which shows the high frequency passive component of 15th Embodiment. 図２のＡ部の拡大図である。FIG. 3 is an enlarged view of a portion A in FIG. 2. 図１７の第１変形例を示す図である。It is a figure which shows the 1st modification of FIG. 図１７の第２変形例を示す図である。It is a figure which shows the 2nd modification of FIG. 図１７の第３変形例を示す図である。FIG. 18 is a diagram illustrating a third modification of FIG. 17. 図１７の第４変形例を示す図である。It is a figure which shows the 4th modification of FIG. 図１７の第５変形例を示す図である。It is a figure which shows the 5th modification of FIG. 図１７の第６変形例を示す図である。FIG. 18 is a diagram illustrating a sixth modification of FIG. 17. 図１７の第７変形例を示す図である。FIG. 18 is a diagram illustrating a seventh modification of FIG. 17. 図１７の第８変形例を示す図である。FIG. 18 is a diagram illustrating an eighth modification of FIG. 17. 図１７の第９変形例を示す図である。FIG. 18 is a diagram illustrating a ninth modification example of FIG. 17. 図１７の第１０変形例を示す図である。FIG. 18 is a diagram illustrating a tenth modification example of FIG. 17. 図１７の第１１変形例を示す図である。FIG. 18 is a diagram illustrating an eleventh modification of FIG. 17.
　以下、好適な実施形態に基づき、図面を参照して本発明を説明する。 Hereinafter, the present invention will be described based on preferred embodiments with reference to the drawings.
　図１に、高周波受動部品の外観を例示する。この高周波受動部品においては、基板１０に導波路構造２１が形成されている。基板１０としては、例えば、ガラス基板、サファイア基板、石英基板などの誘電体基板、単結晶基板、複合基板等が挙げられる。この導波路構造２１は、例えばミリ波などの高周波信号（電磁波）が伝搬される高周波デバイスの導波路構造として利用することができる。周波数は特に限定されないが、例えば３０～３００ＧＨｚ、６０～８０ＧＨｚ等が挙げられる。基板は、誘電正接が小さい等、高周波特性の優れた材料が好ましい。以下、高周波受動部品の断面構造の具体例を説明する。 Fig. 1 illustrates the appearance of the high-frequency passive component. In this high-frequency passive component, a waveguide structure 21 is formed on a substrate 10. Examples of the substrate 10 include a dielectric substrate such as a glass substrate, a sapphire substrate, and a quartz substrate, a single crystal substrate, and a composite substrate. The waveguide structure 21 can be used as a waveguide structure of a high-frequency device through which a high-frequency signal (electromagnetic wave) such as a millimeter wave propagates. The frequency is not particularly limited, but is, for example, 30 to 300 GHz, 60 to 80 GHz, or the like. The substrate is preferably made of a material having excellent high frequency characteristics such as a small dielectric loss tangent. Hereinafter, a specific example of the cross-sectional structure of the high-frequency passive component will be described.
（第１実施形態）
　図２に、第１実施形態の高周波受動部品の断面構造を示す。基板１０は、第１面１０ａと、第２面１０ｂと、を有している。本明細書では、基板１０の厚さ方向を単に「厚さ方向」といい、厚さ方向に沿う断面を単に「断面」という。また、厚さ方向において、第１面１０ａ側を上方、第２面１０ｂ側を下方という。第１面１０ａには第１広壁１１が形成されており、第２面１０ｂには第２広壁１２が形成されている。 (1st Embodiment)
FIG. 2 shows a cross-sectional structure of the high-frequency passive component of the first embodiment. The substrate 10 has a first surface 10a and a second surface 10b. In the present specification, the thickness direction of the substrate 10 is simply referred to as “thickness direction”, and a cross section along the thickness direction is simply referred to as “cross section”. In the thickness direction, the first surface 10a side is referred to as an upper side, and the second surface 10b side is referred to as a lower side. A first wide wall 11 is formed on the first surface 10a, and a second wide wall 12 is formed on the second surface 10b.
　基板１０は、ガラス等の誘電体からなり、導波路構造２１の導波領域２０を含む。導波路構造２１は、第１広壁１１、第２広壁１２、および複数の貫通電極１３を含み、第１広壁１１と第２広壁１２と複数の貫通電極１３が導波領域２０を囲むように配置されている。複数の貫通電極１３は、第１広壁１１および第２広壁１２に接続されている。導波領域２０は、高周波信号が伝搬する経路として機能する。導波路構造２１は、導波路、フィルタ、ダイプレクサ、方向性結合器、分配器等の受動部品（パッシブデバイス）を構成してもよい。 The substrate 10 is made of a dielectric material such as glass and includes the waveguide region 20 of the waveguide structure 21. The waveguide structure 21 includes a first wide wall 11, a second wide wall 12, and a plurality of through electrodes 13. The first wide wall 11, the second wide wall 12, and the plurality of through electrodes 13 form the waveguide region 20. It is arranged to surround. The plurality of through electrodes 13 are connected to the first wide wall 11 and the second wide wall 12. The waveguide region 20 functions as a path through which a high-frequency signal propagates. The waveguide structure 21 may constitute a passive component (passive device) such as a waveguide, a filter, a diplexer, a directional coupler, and a distributor.
　広壁１１，１２が形成される基板１０の両面（第１面１０ａおよび第２面１０ｂ）は、厚さ方向で互いに対向している。広壁１１，１２は、例えば金属薄膜等の導体層から構成することができる。広壁１１，１２は、グランド電位（図示せず）に接続されていてもよい。貫通電極１３は、基板１０に形成された貫通孔１３ａの内壁に設けられる。貫通電極１３が、貫通孔１３ａ内で中空に構成されてもよく、貫通孔１３ａ内を中実に充填してもよい。 両 面 Both surfaces (the first surface 10a and the second surface 10b) of the substrate 10 on which the wide walls 11 and 12 are formed are opposed to each other in the thickness direction. The wide walls 11 and 12 can be composed of a conductor layer such as a metal thin film. The wide walls 11, 12 may be connected to a ground potential (not shown). The through electrode 13 is provided on an inner wall of a through hole 13 a formed in the substrate 10. The through electrode 13 may be configured to be hollow inside the through hole 13a, or the inside of the through hole 13a may be solidly filled.
　導波路構造２１は、少なくとも導波領域２０に接する広壁１１，１２および貫通電極１３を備えればよい。導波路構造２１の外側の領域２２は、基板１０において導波領域２０を除いた外側の領域である。図２に示すように、広壁１１，１２は、領域２２まで延在してもよい。 The waveguide structure 21 may include at least the wide walls 11 and 12 and the through electrode 13 that are in contact with the waveguide region 20. A region 22 outside the waveguide structure 21 is a region outside the substrate 10 excluding the waveguide region 20. As shown in FIG. 2, the wide walls 11 and 12 may extend to the region 22.
　図１に示すように、例えば多数の貫通電極１３を配列することで、導波領域２０を囲む壁部を構成することができる。貫通電極１３から構成される壁部としては、導波路構造２１の幅方向に対向する狭壁、長手方向の端部に設けられるショート壁、その他の側壁等が挙げられる。壁部を構成する貫通電極１３の形状は、図１のような円柱形状等の導体柱（ポスト）に限定されない。例えば、壁部に沿って連続した形状、隅部に沿って連続した形状などを採用することもできる。また、貫通電極１３の配列も、受動部品の機能等に応じて種々の構成が可能である。例えば、貫通電極１３が等間隔に配置された部分、貫通電極１３の間隔が不均等の部分、貫通電極１３が所定の区間にわたり配置されていない部分等を設けてもよい。 壁 As shown in FIG. 1, for example, by arranging a large number of through electrodes 13, a wall surrounding the waveguide region 20 can be formed. Examples of the wall formed by the through electrode 13 include a narrow wall facing the width direction of the waveguide structure 21, a short wall provided at an end in the longitudinal direction, and other side walls. The shape of the through-electrode 13 forming the wall is not limited to a conductor pillar (post) having a cylindrical shape as shown in FIG. For example, a shape continuous along the wall, a shape continuous along the corner, and the like can be adopted. Also, various arrangements of the arrangement of the through electrodes 13 are possible according to the function of the passive component and the like. For example, a portion where the through electrodes 13 are arranged at equal intervals, a portion where the intervals between the through electrodes 13 are uneven, a portion where the through electrodes 13 are not arranged over a predetermined section, or the like may be provided.
　広壁１１，１２の外周部１１ｅ，１２ｅは、基板１０上に配置されている。基板１０の第１面１０ａ上において、広壁１１の外側に位置する部分には、第１誘電体層１５が形成されている。また、広壁１１の上には、第２誘電体層１６が形成されている。図２に示す第１実施形態の高周波受動部品の場合は、第２誘電体層１６が、厚さ方向から見た平面視で導波領域２０の内側に配置されている。 外 周 The outer peripheral portions 11 e and 12 e of the wide walls 11 and 12 are arranged on the substrate 10. On the first surface 10 a of the substrate 10, a first dielectric layer 15 is formed on a portion located outside the wide wall 11. On the wide wall 11, a second dielectric layer 16 is formed. In the case of the high-frequency passive component of the first embodiment shown in FIG. 2, the second dielectric layer 16 is arranged inside the waveguide region 20 in plan view when viewed from the thickness direction.
　以下の説明では、第１誘電体層１５および第２誘電体層１６を総称して、誘電体層１５，１６という場合がある。誘電体層１５，１６は、同一の成膜プロセスで形成してもよく、別々の成膜プロセスで形成してもよい。誘電体層１５，１６を構成する材料としては、例えば樹脂が挙げられる。 In the following description, the first dielectric layer 15 and the second dielectric layer 16 may be collectively referred to as dielectric layers 15 and 16. The dielectric layers 15 and 16 may be formed by the same film forming process or may be formed by separate film forming processes. As a material forming the dielectric layers 15 and 16, for example, a resin is used.
　第２誘電体層１６の表面上に配置された上部導体層１４は、広壁１１の外周部１１ｅを経て、第１誘電体層１５に達している。広壁１１と第１誘電体層１５との間においては、上部導体層１４が基板１０の第１面１０ａ上に配置されている。図２に示すように、上部導体層１４は、第２誘電体層１６の表面上において、穴、間隙等の空隙部１４ａを有してもよい。上部導体層１４が貫通電極１３上に形成される場合には、貫通電極１３との接続部１４ｂが貫通孔１３ａ内に形成されてもよい。 {Circle around (2)} The upper conductor layer 14 arranged on the surface of the second dielectric layer 16 reaches the first dielectric layer 15 via the outer peripheral portion 11 e of the wide wall 11. Between the wide wall 11 and the first dielectric layer 15, the upper conductor layer 14 is disposed on the first surface 10a of the substrate 10. As shown in FIG. 2, the upper conductor layer 14 may have a void 14 a such as a hole or a gap on the surface of the second dielectric layer 16. When the upper conductor layer 14 is formed on the through-electrode 13, the connection portion 14b with the through-electrode 13 may be formed in the through-hole 13a.
　第２誘電体層１６に配置された上部導体層１４の端部１４ｅは、基板１０から厚さ方向に離れた位置に配置されている。端部１４ｅの位置は、基板１０の面方向に沿った第２誘電体層１６の上面に配置されてもよく、基板１０の厚さ方向に沿った第２誘電体層１６の側面に配置されてもよい。第２誘電体層１６に配置された上部導体層１４が、外部接続用のパッドを有してもよい。パッドは、配線よりも幅が広い導体パターンで構成することができる。パッドの平面形状は特に限定されず、例えば四角形等の多角形、円形等が挙げられる。 (4) The end 14e of the upper conductor layer 14 arranged on the second dielectric layer 16 is arranged at a position away from the substrate 10 in the thickness direction. The position of the end 14e may be arranged on the upper surface of the second dielectric layer 16 along the surface direction of the substrate 10 or on the side surface of the second dielectric layer 16 along the thickness direction of the substrate 10. You may. The upper conductor layer 14 arranged on the second dielectric layer 16 may have a pad for external connection. The pad can be formed of a conductor pattern wider than the wiring. The planar shape of the pad is not particularly limited, and examples include a polygon such as a quadrangle, a circle, and the like.
　上部導体層１４が、第１誘電体層１５と、第１誘電体層１５および広壁１１の間の基板１０上と、広壁１１と、第２誘電体層１６と、にわたって形成されている。上部導体層１４が広壁１１に接続されているため、面積が大きい広壁１１の外周部１１ｅを疑似的に第１誘電体層１５に配置された上部導体層１４の端部１４ｅに置き換えることができる。例えばフォトリソグラフィにより成膜する場合、広壁１１、誘電体層１５，１６、上部導体層１４の順に重ね合わせられる。このため、上部導体層１４の端部１４ｅは、第１誘電体層１５の表面上または第２誘電体層１６の表面上に配置することができる。 The upper conductor layer 14 is formed over the first dielectric layer 15, the substrate 10 between the first dielectric layer 15 and the wide wall 11, the wide wall 11, and the second dielectric layer 16. . Since the upper conductor layer 14 is connected to the wide wall 11, the outer peripheral portion 11 e of the large wall 11 having a large area is replaced with the end 14 e of the upper conductor layer 14 arranged on the first dielectric layer 15 in a simulated manner. Can be. For example, when the film is formed by photolithography, the wide wall 11, the dielectric layers 15, 16 and the upper conductor layer 14 are superposed in this order. Therefore, the end 14 e of the upper conductor layer 14 can be arranged on the surface of the first dielectric layer 15 or on the surface of the second dielectric layer 16.
　第１実施形態の高周波受動部品によれば、上部導体層１４と誘電体層１５，１６との配置を工夫することにより、基板１０から広壁１１が剥離することを抑制することができる。この理由については、特に本発明を限定するものではないが、例えば次のような仮説が考えられる。 According to the high-frequency passive component of the first embodiment, the arrangement of the upper conductor layer 14 and the dielectric layers 15 and 16 can prevent the wide wall 11 from peeling off from the substrate 10. For this reason, the present invention is not particularly limited. For example, the following hypothesis is considered.
　広壁１１上に第２誘電体層１６が形成されるときには、使用環境によっては広壁１１が基板１０から剥離する場合がある。例えば、温度上昇や温度降下が甚だしいと、広壁１１の導体層を構成する材料と、誘電体層１６を構成する材料との熱膨張率の違いから、層間に応力が生じる。この応力により、広壁１１が剥離する場合がある。広壁１１の剥離は、広壁１１の外周部１１ｅを起点として生じる。 と き に は When the second dielectric layer 16 is formed on the wide wall 11, the wide wall 11 may peel off from the substrate 10 depending on the use environment. For example, when the temperature rise or the temperature drop is excessive, a stress is generated between the materials constituting the conductor layer of the wide wall 11 and the material constituting the dielectric layer 16 due to a difference in coefficient of thermal expansion. This stress may cause the wide wall 11 to peel off. The peeling of the wide wall 11 occurs from the outer peripheral portion 11e of the wide wall 11 as a starting point.
　そこで本実施形態では、広壁１１から離れた位置に第１誘電体層１５を設け、上部導体層１４の端部１４ｅを第１誘電体層１５の表面上に配置している。この構成により、上部導体層１４の端部１４ｅが基板１０に接することなく、第１誘電体層１５を介して応力が緩和される。このため、上部導体層１４の端部１４ｅからの剥離は起こりにくく、さらには、上部導体層１４が広壁１１の外周部１１ｅを覆っているため、広壁１１の外周部１１ｅの剥離も抑制できると考えられる。 Therefore, in the present embodiment, the first dielectric layer 15 is provided at a position away from the wide wall 11, and the end 14 e of the upper conductor layer 14 is arranged on the surface of the first dielectric layer 15. With this configuration, the stress is reduced via the first dielectric layer 15 without the end 14 e of the upper conductor layer 14 coming into contact with the substrate 10. For this reason, peeling from the end portion 14e of the upper conductor layer 14 is unlikely to occur, and furthermore, since the upper conductor layer 14 covers the outer peripheral portion 11e of the wide wall 11, peeling of the outer peripheral portion 11e of the wide wall 11 is also suppressed. It is considered possible.
　上部導体層１４が、広壁１１の外周部１１ｅの少なくとも隅部、あるいは広壁１１の外周部１１ｅの全体に配置されていることが好ましい。 It is preferable that the upper conductor layer 14 is arranged at least at a corner of the outer peripheral portion 11 e of the wide wall 11 or at the entire outer peripheral portion 11 e of the wide wall 11.
　図２に示した第１実施形態の高周波受動部品では、上部導体層１４は、第１誘電体層１５と、第１誘電体層１５および広壁１１の間の基板１０上と、広壁１１と、第２誘電体層１６と、にわたって形成されている。しかしながら、上部導体層１４は広壁１１の外周部１１ｅを覆っていればよい。そこで、上部導体層１４は、第１誘電体層１５と、第１誘電体層１５および広壁１１の間の基板１０上と、広壁１１と、にわたって形成されていてもよい。この場合、広壁１１の上に第２誘電体層１６が設けられていなくてもよい。 In the high-frequency passive component of the first embodiment shown in FIG. 2, the upper conductor layer 14 includes the first dielectric layer 15, the substrate 10 between the first dielectric layer 15 and the wide wall 11, and the wide wall 11. And the second dielectric layer 16. However, the upper conductor layer 14 only needs to cover the outer peripheral portion 11 e of the wide wall 11. Therefore, the upper conductor layer 14 may be formed over the first dielectric layer 15, the substrate 10 between the first dielectric layer 15 and the wide wall 11, and the wide wall 11. In this case, the second dielectric layer 16 may not be provided on the wide wall 11.
（第２実施形態）
　次に、本発明に係る第２実施形態について説明するが、第１実施形態と基本的な構成は同様である。このため、同様の構成には同一の符号を付してその説明は省略し、異なる点についてのみ説明する。 (2nd Embodiment)
Next, a second embodiment according to the present invention will be described, but the basic configuration is the same as that of the first embodiment. For this reason, the same components are denoted by the same reference numerals, and description thereof will be omitted. Only different points will be described.
　図３に、第２実施形態の高周波受動部品の断面構造を示す。第２実施形態の高周波受動部品では、第２誘電体層１６が導波領域２０の上だけでなく、外側の領域２２にも形成されている。第２誘電体層１６は、貫通電極１３上を超えて、導波路構造２１の外側の領域２２における広壁１１上に達している。第２誘電体層１６が貫通電極１３上を超えて外側に広がる寸法は、特に限定されないが、例えば、貫通電極１３の直径と同程度でもよい。第２実施形態の高周波受動部品の場合も、第１実施形態の高周波受動部品と同様に上部導体層１４が設けられているため、基板１０から広壁１１が剥離することを抑制することができる。 FIG. 3 shows a cross-sectional structure of the high-frequency passive component according to the second embodiment. In the high-frequency passive component of the second embodiment, the second dielectric layer 16 is formed not only on the waveguide region 20 but also on the outer region 22. The second dielectric layer 16 reaches over the wide wall 11 in a region 22 outside the waveguide structure 21 over the through electrode 13. The size of the second dielectric layer 16 extending outward beyond the through electrode 13 is not particularly limited, but may be, for example, about the same as the diameter of the through electrode 13. Also in the case of the high-frequency passive component of the second embodiment, since the upper conductor layer 14 is provided similarly to the high-frequency passive component of the first embodiment, the wide wall 11 can be prevented from peeling off from the substrate 10. .
（第３実施形態）
　次に、本発明に係る第３実施形態について説明するが、第２実施形態と基本的な構成は同様である。このため、同様の構成には同一の符号を付してその説明は省略し、異なる点についてのみ説明する。 (Third embodiment)
Next, a third embodiment according to the present invention will be described, but the basic configuration is the same as that of the second embodiment. For this reason, the same components are denoted by the same reference numerals, and description thereof will be omitted. Only different points will be described.
　図４に、第３実施形態の高周波受動部品の断面構造を示す。第３実施形態の高周波受動部品では、導波領域２０に接する位置において、広壁１１に開口１１ａが設けられている。これにより、開口１１ａを通して導波領域２０のモードと外部のモードとを変換することができる。開口１１ａの位置は、第２誘電体層１６が積層される部分でもよく、それ以外の位置でもよい。また、反対面（第２面１０ｂ）の広壁１２に開口を設けてもよい。 FIG. 4 shows a cross-sectional structure of the high-frequency passive component according to the third embodiment. In the high-frequency passive component of the third embodiment, an opening 11 a is provided in the wide wall 11 at a position in contact with the waveguide region 20. Thus, the mode of the waveguide region 20 and the external mode can be converted through the opening 11a. The position of the opening 11a may be a portion where the second dielectric layer 16 is laminated, or may be another position. Further, an opening may be provided in the wide wall 12 on the opposite surface (the second surface 10b).
（第４実施形態）
　次に、本発明に係る第４実施形態について説明するが、第３実施形態と基本的な構成は同様である。このため、同様の構成には同一の符号を付してその説明は省略し、異なる点についてのみ説明する。 (Fourth embodiment)
Next, a fourth embodiment according to the present invention will be described, but the basic configuration is the same as that of the third embodiment. For this reason, the same components are denoted by the same reference numerals, and description thereof will be omitted. Only different points will be described.
　図５に、第４実施形態の高周波受動部品の断面構造を示す。第４実施形態の高周波受動部品は、導体により形成されたビア１７を有している。ビア１７は、広壁１１と上部導体層１４との間を接続するように、第２誘電体層１６を貫通している。これにより、広壁１１と上部導体層１４との間を電気的に接続することができる。 FIG. 5 shows a cross-sectional structure of the high-frequency passive component according to the fourth embodiment. The high-frequency passive component of the fourth embodiment has a via 17 formed by a conductor. The via 17 penetrates through the second dielectric layer 16 so as to connect between the wide wall 11 and the upper conductor layer 14. Thus, the wide wall 11 and the upper conductor layer 14 can be electrically connected.
（第５実施形態）
　次に、本発明に係る第５実施形態について説明するが、第４実施形態と基本的な構成は同様である。このため、同様の構成には同一の符号を付してその説明は省略し、異なる点についてのみ説明する。 (Fifth embodiment)
Next, a fifth embodiment according to the present invention will be described, but the basic configuration is the same as that of the fourth embodiment. For this reason, the same components are denoted by the same reference numerals, and description thereof will be omitted. Only different points will be described.
　図６に、第５実施形態の高周波受動部品の断面構造を示す。第５実施形態の高周波受動部品は、モード変換部１８を有している。モード変換部１８は、基板１０の導波領域２０を貫通しない導体（ブラインドビア）を含んでいる。これにより、上部導体層１４に電気信号の伝送路を設けた場合に、上部導体層１４の伝送路と導波路構造２１の導波領域２０との間で、信号を伝搬させることができる。 FIG. 6 shows a cross-sectional structure of the high-frequency passive component according to the fifth embodiment. The high-frequency passive component according to the fifth embodiment has a mode converter 18. The mode converter 18 includes a conductor (blind via) that does not penetrate the waveguide region 20 of the substrate 10. Thereby, when the transmission path of the electric signal is provided in the upper conductor layer 14, the signal can be propagated between the transmission path of the upper conductor layer 14 and the waveguide region 20 of the waveguide structure 21.
　例えば、上部導体層１４から伝搬した信号をモード変換部１８から導波領域２０に放射することにより、導波路構造２１に信号を伝搬させることができる。また、導波領域２０を伝搬した信号をモード変換部１８に受信させることにより、上部導体層１４の伝送路に信号を伝搬させることができる。モード変換部１８の下部には、広壁１１の開口１１ａから導波領域２０に突出するピン１８ａが形成されている。モード変換部１８の上部には、上部導体層１４と接続される貫通導体１８ｂが形成されている。 For example, by radiating the signal propagated from the upper conductor layer 14 to the waveguide region 20 from the mode converter 18, the signal can be propagated to the waveguide structure 21. Further, by allowing the mode converter 18 to receive the signal propagated through the waveguide region 20, the signal can be propagated to the transmission path of the upper conductor layer 14. A pin 18 a projecting from the opening 11 a of the wide wall 11 to the waveguide region 20 is formed below the mode converter 18. Above the mode converter 18, a through conductor 18b connected to the upper conductor layer 14 is formed.
（第６実施形態）
　次に、本発明に係る第６実施形態について説明するが、第１実施形態と基本的な構成は同様である。このため、同様の構成には同一の符号を付してその説明は省略し、異なる点についてのみ説明する。 (Sixth embodiment)
Next, a sixth embodiment according to the present invention will be described, but the basic configuration is the same as that of the first embodiment. For this reason, the same components are denoted by the same reference numerals, and description thereof will be omitted. Only different points will be described.
　図７に、第６実施形態の高周波受動部品の断面構造を示す。第６実施形態の高周波受動部品では、上部導体層１４の上に、樹脂等からなる封止層１９が積層されている。封止層１９は、例えば外部接続のための開口１９ａ，１９ｂを有してもよい。上部導体層１４は、開口１９ａ，１９ｂを通して露出される部分において、外部接続用のパッドを有してもよい。 FIG. 7 shows a cross-sectional structure of the high-frequency passive component according to the sixth embodiment. In the high-frequency passive component of the sixth embodiment, a sealing layer 19 made of resin or the like is laminated on the upper conductor layer 14. The sealing layer 19 may have, for example, openings 19a and 19b for external connection. The upper conductor layer 14 may have a pad for external connection in a portion exposed through the openings 19a and 19b.
（第７実施形態）
　次に、本発明に係る第７実施形態について説明するが、第６実施形態と基本的な構成は同様である。このため、同様の構成には同一の符号を付してその説明は省略し、異なる点についてのみ説明する。 (Seventh embodiment)
Next, a seventh embodiment according to the present invention will be described, but the basic configuration is the same as that of the sixth embodiment. For this reason, the same components are denoted by the same reference numerals, and description thereof will be omitted. Only different points will be described.
　図８に、第７実施形態の高周波受動部品の断面構造を示す。第７実施形態の高周波受動部品では、封止層１９の上に配線層３２が設けられている。また、配線層３２と上部導体層１４との間は、封止層１９を貫通するビア３１で接続されている。これにより、上部導体層１４に対して配線層３２を介して電気信号を入力したり、または上部導体層１４から配線層３２を介して電気信号を出力したりすることができる。図８に示すように、第２誘電体層１６に設けられた上部導体層１４が、開口を有していなくてもよい。 FIG. 8 shows a cross-sectional structure of the high-frequency passive component according to the seventh embodiment. In the high-frequency passive component according to the seventh embodiment, the wiring layer 32 is provided on the sealing layer 19. The wiring layer 32 and the upper conductor layer 14 are connected by a via 31 penetrating the sealing layer 19. Thus, an electric signal can be input to the upper conductor layer 14 via the wiring layer 32, or an electric signal can be output from the upper conductor layer 14 via the wiring layer 32. As shown in FIG. 8, the upper conductor layer 14 provided on the second dielectric layer 16 may not have an opening.
（第８実施形態）
　次に、本発明に係る第８実施形態について説明するが、第７実施形態と基本的な構成は同様である。このため、同様の構成には同一の符号を付してその説明は省略し、異なる点についてのみ説明する。 (Eighth embodiment)
Next, an eighth embodiment according to the present invention will be described, but the basic configuration is the same as that of the seventh embodiment. For this reason, the same components are denoted by the same reference numerals, and description thereof will be omitted. Only different points will be described.
　図９に、第８実施形態の高周波受動部品の断面構造を示す。第８実施形態の高周波受動部品は、モード変換部１８を有している。モード変換部１８は、ピン１８ａおよび貫通導体１８ｂを有している。ピン１８ａは、モード変換部１８の下部に位置しており、導波領域２０に突出している。貫通導体１８ｂは、モード変換部１８の上部に位置しており、配線層３２のビア３１と接続される。 FIG. 9 shows a cross-sectional structure of the high-frequency passive component according to the eighth embodiment. The high-frequency passive component according to the eighth embodiment has a mode converter 18. The mode converter 18 has a pin 18a and a through conductor 18b. The pin 18 a is located below the mode converter 18 and protrudes into the waveguide region 20. The through conductor 18b is located above the mode converter 18 and is connected to the via 31 of the wiring layer 32.
　ピン１８ａと貫通導体１８ｂは電気的に接続されている。これにより、配線層３２から導波路構造２１の導波領域２０に対してモード変換部１８を介して電気信号を入力することができる。あるいは、導波路構造２１の導波領域２０から配線層３２に対してモード変換部１８を介して電気信号を出力したりすることができる。 The pin 18a and the through conductor 18b are electrically connected. Thereby, an electric signal can be input from the wiring layer 32 to the waveguide region 20 of the waveguide structure 21 via the mode converter 18. Alternatively, an electric signal can be output from the waveguide region 20 of the waveguide structure 21 to the wiring layer 32 via the mode converter 18.
（第９実施形態）
　次に、本発明に係る第９実施形態について説明するが、第７実施形態と基本的な構成は同様である。このため、同様の構成には同一の符号を付してその説明は省略し、異なる点についてのみ説明する。 (Ninth embodiment)
Next, a ninth embodiment according to the present invention will be described, but the basic configuration is the same as that of the seventh embodiment. For this reason, the same components are denoted by the same reference numerals, and description thereof will be omitted. Only different points will be described.
　図１０に、第９実施形態の高周波受動部品の断面構造を示す。第９実施形態の高周波受動部品は、導波路構造２１とは異なる位置において、基板１０の両面に貫通した貫通電極を含む貫通構造３３を有する。また、基板１０の第１面１０ａ上において、貫通構造３３から外側に離れた位置には、第３誘電体層３５が形成されている。さらに、貫通構造３３に電気的に接続された接続導体層３４が形成されている。接続導体層３４は、貫通構造３３と、貫通構造３３および第３誘電体層３５の間の基板１０上と、第３誘電体層３５と、にわたって形成されている。接続導体層３４は、配線層３２と一体に形成されてもよい。 FIG. 10 shows a cross-sectional structure of the high-frequency passive component according to the ninth embodiment. The high-frequency passive component of the ninth embodiment has a penetration structure 33 including penetration electrodes penetrating through both surfaces of the substrate 10 at positions different from the waveguide structure 21. On the first surface 10a of the substrate 10, a third dielectric layer 35 is formed at a position away from the penetrating structure 33 outward. Further, a connection conductor layer 34 electrically connected to the through structure 33 is formed. The connection conductor layer 34 is formed over the through structure 33, the substrate 10 between the through structure 33 and the third dielectric layer 35, and the third dielectric layer 35. The connection conductor layer 34 may be formed integrally with the wiring layer 32.
　基板１０の第２面１０ｂ側には、第３誘電体層３７および接続導体層３６が設けられている。第３誘電体層３７は、貫通構造３３から外側に離れた位置に形成されている。接続導体層３６は、貫通構造３３に電気的に接続されている。接続導体層３６は、貫通構造３３と、貫通構造３３および第３誘電体層３７の間の基板１０上と、第３誘電体層３７と、にわたって形成されていてもよい。 The third dielectric layer 37 and the connection conductor layer 36 are provided on the second surface 10 b side of the substrate 10. The third dielectric layer 37 is formed at a position away from the through structure 33 to the outside. The connection conductor layer 36 is electrically connected to the through structure 33. The connection conductor layer 36 may be formed over the through structure 33, the substrate 10 between the through structure 33 and the third dielectric layer 37, and the third dielectric layer 37.
　接続導体層３４，３６の端部３４ｅ，３６ｅが、基板１０上ではなく、樹脂等で構成された第３誘電体層３５，３７の表面上に設けられることにより、第３誘電体層３５，３７が応力緩和層として機能する。これにより、接続導体層３４，３６の端部３４ｅ，３６ｅにおける剥離を抑制することができる。また、接続導体層３４，３６の端部３４ｅ，３６ｅが全て第３誘電体層３５，３７の上に配置されるため、フォトリソグラフィー等によるパターン形成も容易である。 The end portions 34e, 36e of the connection conductor layers 34, 36 are provided not on the substrate 10 but on the surfaces of the third dielectric layers 35, 37 made of resin or the like, so that the third dielectric layers 35, 37 are provided. 37 functions as a stress relaxation layer. Thereby, peeling at the ends 34e and 36e of the connection conductor layers 34 and 36 can be suppressed. Further, since the end portions 34e and 36e of the connection conductor layers 34 and 36 are all disposed on the third dielectric layers 35 and 37, pattern formation by photolithography or the like is easy.
　接続導体層３４，３６は、外部接続用の部分等を除き、樹脂等の誘電体からなる封止層３８，３９で封止されていてもよい。例えば、接続導体層３６を封止する封止層３８を追加してもよく、あるいは、接続導体層３４を封止する封止層３９を追加してもよい。封止層３８および封止層３９の両方を設けてもよい。 (4) The connection conductor layers 34 and 36 may be sealed with sealing layers 38 and 39 made of a dielectric material such as a resin, except for parts for external connection. For example, a sealing layer 38 for sealing the connection conductor layer 36 may be added, or a sealing layer 39 for sealing the connection conductor layer 34 may be added. Both the sealing layer 38 and the sealing layer 39 may be provided.
　これらの封止層３８，３９は、例えば外部接続のための開口を有してもよい。封止層３８、３９の開口により露出する接続導体層３４，３６は、外部接続用等のパッドを有してもよい。図１０では、封止層３８に開口３８ａを設けた例を示すが、封止層３８に開口を設けなくてもよい。また、封止層３９には開口を示していないが、封止層３９に開口を設けてもよい。 封 止 These sealing layers 38 and 39 may have, for example, openings for external connection. The connection conductor layers 34 and 36 exposed through the openings of the sealing layers 38 and 39 may have pads for external connection and the like. Although FIG. 10 illustrates an example in which the opening 38 a is provided in the sealing layer 38, the opening need not be provided in the sealing layer 38. Although an opening is not shown in the sealing layer 39, an opening may be provided in the sealing layer 39.
（第１０実施形態）
　次に、本発明に係る第１０実施形態について説明するが、第１実施形態と基本的な構成は同様である。このため、同様の構成には同一の符号を付してその説明は省略し、異なる点についてのみ説明する。 (Tenth embodiment)
Next, a tenth embodiment according to the present invention will be described, but the basic configuration is the same as that of the first embodiment. For this reason, the same components are denoted by the same reference numerals, and description thereof will be omitted. Only different points will be described.
　図１１に、第１０実施形態の高周波受動部品の断面構造を示す。第１０実施形態の高周波受動部品では、基板１０の両面（第１面１０ａ、第２面１０ｂ）において、広壁１１，１２の外側に第１誘電体層１５が形成されている。また、広壁１１の上には第２誘電体層１６が形成されている。第１面１０ａ側では、第２誘電体層１６に上部導体層１４が配置されている。第２面１０ｂ側では、第２誘電体層１６を設けず、上部導体層１４が配置されている。 FIG. 11 shows a cross-sectional structure of the high-frequency passive component according to the tenth embodiment. In the high-frequency passive component of the tenth embodiment, the first dielectric layer 15 is formed outside the wide walls 11 and 12 on both surfaces (the first surface 10a and the second surface 10b) of the substrate 10. Further, a second dielectric layer 16 is formed on the wide wall 11. On the first surface 10 a side, the upper conductor layer 14 is disposed on the second dielectric layer 16. On the second surface 10b side, the upper conductor layer 14 is arranged without providing the second dielectric layer 16.
　２つの上部導体層１４はそれぞれ、広壁１１，１２から広壁１１，１２の外周部１１ｅ，１２ｅを経て、第１誘電体層１５に達している。広壁１１，１２と第１誘電体層１５との間においては、上部導体層１４が基板１０上に配置されている。各上部導体層１４の端部１４ｅは、基板１０から厚さ方向に離れた位置に配置されている。第１０実施形態の高周波受動部品の場合、広壁１１，１２の外周部１１ｅ，１２ｅに上部導体層１４が設けられているため、基板１０から広壁１１，１２が剥離することを抑制することができる。 The two upper conductor layers 14 reach the first dielectric layer 15 from the wide walls 11 and 12 via the outer peripheral portions 11e and 12e of the wide walls 11 and 12, respectively. An upper conductor layer 14 is disposed on the substrate 10 between the wide walls 11 and 12 and the first dielectric layer 15. The end 14e of each upper conductor layer 14 is arranged at a position away from the substrate 10 in the thickness direction. In the case of the high-frequency passive component of the tenth embodiment, since the upper conductor layers 14 are provided on the outer peripheral portions 11 e and 12 e of the wide walls 11 and 12, the peeling of the wide walls 11 and 12 from the substrate 10 is suppressed. Can be.
（第１１実施形態）
　次に、本発明に係る第１１実施形態について説明するが、第１０実施形態と基本的な構成は同様である。このため、同様の構成には同一の符号を付してその説明は省略し、異なる点についてのみ説明する。 (Eleventh embodiment)
Next, an eleventh embodiment according to the present invention will be described, but the basic configuration is the same as that of the tenth embodiment. For this reason, the same components are denoted by the same reference numerals, and description thereof will be omitted. Only different points will be described.
　図１２に、第１１実施形態の高周波受動部品の断面構造を示す。第１１実施形態の高周波受動部品では、広壁１１の上のみならず、広壁１２の上にも第２誘電体層１６が形成されている。よって、広壁１２の側でも、第２誘電体層１６に上部導体層１４が配置されている。第１１実施形態の高周波受動部品の場合においても、基板１０の両面において、広壁１１，１２の外側に第１誘電体層１５が形成され、第１０実施形態の高周波受動部品と同様に上部導体層１４が設けられている。この構成により、基板１０から広壁１１，１２が剥離することを抑制することができる。 FIG. 12 shows a cross-sectional structure of the high-frequency passive component of the eleventh embodiment. In the high-frequency passive component of the eleventh embodiment, the second dielectric layer 16 is formed not only on the wide wall 11 but also on the wide wall 12. Therefore, the upper conductor layer 14 is disposed on the second dielectric layer 16 also on the side of the wide wall 12. Also in the case of the high-frequency passive component of the eleventh embodiment, the first dielectric layer 15 is formed on both sides of the substrate 10 outside the wide walls 11 and 12, and the upper conductor is formed similarly to the high-frequency passive component of the tenth embodiment. A layer 14 is provided. With this configuration, peeling of the wide walls 11 and 12 from the substrate 10 can be suppressed.
（第１２実施形態）
　次に、本発明に係る第１２実施形態について説明するが、第１１実施形態と基本的な構成は同様である。このため、同様の構成には同一の符号を付してその説明は省略し、異なる点についてのみ説明する。 (Twelfth embodiment)
Next, a twelfth embodiment according to the present invention will be described, but the basic configuration is the same as that of the eleventh embodiment. For this reason, the same components are denoted by the same reference numerals, and description thereof will be omitted. Only different points will be described.
　図１３に、第１２実施形態の高周波受動部品の断面構造を示す。第１２実施形態の高周波受動部品では、基板１０の両面において、第２誘電体層１６が導波領域２０の上のみならず、外側の領域２２にも形成されている。２つの第２誘電体層１６は、貫通電極１３上を超えて、導波路構造２１の外側の領域２２における広壁１１，１２上に達している。２つの第２誘電体層１６が貫通電極１３上を超えて外側に広がる寸法は、特に限定されないが、例えば、貫通電極１３の直径と同程度でもよい。第１２実施形態の高周波受動部品の場合においても、基板１０の両面において、広壁１１，１２の外側に第１誘電体層１５が形成され、第１０実施形態の高周波受動部品と同様に上部導体層１４が設けられているため、基板１０から広壁１１，１２が剥離することを抑制することができる。 FIG. 13 shows a cross-sectional structure of the high-frequency passive component of the twelfth embodiment. In the high-frequency passive component of the twelfth embodiment, the second dielectric layer 16 is formed not only on the waveguide region 20 but also on the outer region 22 on both surfaces of the substrate 10. The two second dielectric layers 16 extend over the through electrodes 13 and reach the wide walls 11 and 12 in the region 22 outside the waveguide structure 21. The size of the two second dielectric layers 16 extending outward beyond the through electrode 13 is not particularly limited, but may be, for example, about the same as the diameter of the through electrode 13. Also in the case of the high-frequency passive component of the twelfth embodiment, the first dielectric layer 15 is formed on both sides of the substrate 10 outside the wide walls 11 and 12, and the upper conductor is formed similarly to the high-frequency passive component of the tenth embodiment. Since the layer 14 is provided, peeling of the wide walls 11 and 12 from the substrate 10 can be suppressed.
（第１３実施形態）
　次に、本発明に係る第１３実施形態について説明するが、第１２実施形態と基本的な構成は同様である。このため、同様の構成には同一の符号を付してその説明は省略し、異なる点についてのみ説明する。 (Thirteenth embodiment)
Next, a thirteenth embodiment according to the present invention will be described, but the basic configuration is the same as that of the twelfth embodiment. For this reason, the same components are denoted by the same reference numerals, and description thereof will be omitted. Only different points will be described.
　図１４に、第１３実施形態の高周波受動部品の断面構造を示す。第１３実施形態の高周波受動部品では、導波領域２０に接する位置において、広壁１１，１２に開口１１ａ，１２ａが設けられている。これにより、開口１１ａ，１２ａを通して導波領域２０のモードと外部のモードとを変換することができる。開口１１ａ，１２ａの位置は、第２誘電体層１６が積層される部分でもよく、それ以外の位置でもよい。第１３実施形態の高周波受動部品の場合においても、基板１０の両面において、広壁１１，１２の外側に第１誘電体層１５が形成され、第１０実施形態の高周波受動部品と同様に上部導体層１４が設けられているため、基板１０から広壁１１，１２が剥離することを抑制することができる。 FIG. 14 shows a cross-sectional structure of the high-frequency passive component according to the thirteenth embodiment. In the high-frequency passive component according to the thirteenth embodiment, the openings 11 a and 12 a are provided in the wide walls 11 and 12 at positions that are in contact with the waveguide region 20. Thereby, the mode of the waveguide region 20 and the external mode can be converted through the openings 11a and 12a. The positions of the openings 11a and 12a may be the portions where the second dielectric layer 16 is laminated, or may be other positions. Also in the case of the high-frequency passive component of the thirteenth embodiment, the first dielectric layer 15 is formed outside the wide walls 11 and 12 on both surfaces of the substrate 10, and the upper conductor is formed similarly to the high-frequency passive component of the tenth embodiment. Since the layer 14 is provided, peeling of the wide walls 11 and 12 from the substrate 10 can be suppressed.
（第１４実施形態）
　次に、本発明に係る第１４実施形態について説明するが、第１３実施形態と基本的な構成は同様である。このため、同様の構成には同一の符号を付してその説明は省略し、異なる点についてのみ説明する。 (14th embodiment)
Next, a fourteenth embodiment according to the present invention will be described, but the basic configuration is the same as the thirteenth embodiment. For this reason, the same components are denoted by the same reference numerals, and description thereof will be omitted. Only different points will be described.
　図１５に、第１４実施形態の高周波受動部品の断面構造を示す。第１４実施形態の高周波受動部品では、広壁１１と上部導体層１４との間を接続するように、第２誘電体層１６を貫通する導体からなるビア１７を設けている。これにより、広壁１１と上部導体層１４との間を電気的に接続することができる。第１４実施形態の高周波受動部品の場合においても、基板１０の両面において、広壁１１，１２の外側に第１誘電体層１５が形成され、第１０実施形態の高周波受動部品と同様に上部導体層１４が設けられているため、基板１０から広壁１１，１２が剥離することを抑制することができる。 FIG. 15 shows a cross-sectional structure of the high-frequency passive component according to the fourteenth embodiment. In the high-frequency passive component according to the fourteenth embodiment, a via 17 made of a conductor penetrating through the second dielectric layer 16 is provided so as to connect between the wide wall 11 and the upper conductor layer 14. Thus, the wide wall 11 and the upper conductor layer 14 can be electrically connected. Also in the case of the high-frequency passive component of the fourteenth embodiment, the first dielectric layer 15 is formed outside the wide walls 11 and 12 on both surfaces of the substrate 10, and the upper conductor is formed similarly to the high-frequency passive component of the tenth embodiment. Since the layer 14 is provided, peeling of the wide walls 11 and 12 from the substrate 10 can be suppressed.
（第１５実施形態）
　次に、本発明に係る第１５実施形態について説明するが、第１４実施形態と基本的な構成は同様である。このため、同様の構成には同一の符号を付してその説明は省略し、異なる点についてのみ説明する。 (Fifteenth embodiment)
Next, a fifteenth embodiment according to the present invention will be described, but the basic configuration is the same as the fourteenth embodiment. For this reason, the same components are denoted by the same reference numerals, and description thereof will be omitted. Only different points will be described.
　図１６に、第１５実施形態の高周波受動部品の断面構造を示す。第１５実施形態の高周波受動部品は、モード変換部１８を有している。モード変換部１８は、基板１０の導波領域２０を貫通しない導体（ブラインドビア）を含んでいる。これにより、上部導体層１４に電気信号の伝送路を設けた場合に、上部導体層１４の伝送路と導波路構造２１の導波領域２０との間で、信号を伝搬させることができる。第１５実施形態の高周波受動部品の場合においても、基板１０の両面において、広壁１１，１２の外側に第１誘電体層１５が形成され、第１０実施形態の高周波受動部品と同様に上部導体層１４が設けられているため、基板１０から広壁１１，１２が剥離することを抑制することができる。 FIG. 16 shows a cross-sectional structure of the high-frequency passive component according to the fifteenth embodiment. The high-frequency passive component according to the fifteenth embodiment has a mode converter 18. The mode converter 18 includes a conductor (blind via) that does not penetrate the waveguide region 20 of the substrate 10. Thereby, when the transmission path of the electric signal is provided in the upper conductor layer 14, the signal can be propagated between the transmission path of the upper conductor layer 14 and the waveguide region 20 of the waveguide structure 21. Also in the case of the high-frequency passive component of the fifteenth embodiment, the first dielectric layer 15 is formed outside the wide walls 11 and 12 on both surfaces of the substrate 10, and the upper conductor is formed similarly to the high-frequency passive component of the tenth embodiment. Since the layer 14 is provided, peeling of the wide walls 11 and 12 from the substrate 10 can be suppressed.
　以下、上部導体層１４が広壁１１、１２の外周部１１ｅ、１２ｅを覆う部分の構成について、図１７～図２８を用いて説明する。図１７は、上部導体層１４が外周部１１ｅ、１２ｅを覆う部分（例えば図２のＡ部）の拡大図である。なお、図２等では第２面１０ｂ側に上部導体層１４が設けられていない。しかしながら、以下の説明は、図１１のように、第２面１０ｂ側に上部導体層１４が設けられた場合についても適用可能である。そこで図１７に示すように、広壁１１、１２および外周部１１ｅ、１２ｅの符号を併記して、第１面１０ａ側および第２面１０ｂ側の両方の構成について説明する。 Hereinafter, the configuration of the portion where the upper conductor layer 14 covers the outer peripheral portions 11e and 12e of the wide walls 11 and 12 will be described with reference to FIGS. FIG. 17 is an enlarged view of a portion where the upper conductor layer 14 covers the outer peripheral portions 11e and 12e (for example, a portion A in FIG. 2). In FIG. 2 and the like, the upper conductor layer 14 is not provided on the second surface 10b side. However, the following description is also applicable to a case where the upper conductor layer 14 is provided on the second surface 10b side as shown in FIG. Therefore, as shown in FIG. 17, the configuration of both the first surface 10a side and the second surface 10b side will be described together with the reference numerals of the wide walls 11, 12 and the outer peripheral portions 11e, 12e.
　図１７に示すように、上部導体層１４は広壁１１，１２の外周部１１ｅ，１２ｅの表面に沿って形成されていることが好ましい。外周部１１ｅ，１２ｅの側面の形状は、図１７に示すような基板１０に垂直な面に限られない。例えば、外周部１１ｅ、１２ｅの側面は、基板１０から離れるほど広壁１１，１２の幅が広くなるように傾斜した平面又は曲面、あるいは基板１０から離れるほど広壁１１，１２の幅が狭くなるように傾斜した平面又は曲面等であってもよい。 上部 As shown in FIG. 17, the upper conductor layer 14 is preferably formed along the surfaces of the outer peripheral portions 11e and 12e of the wide walls 11 and 12. The shape of the side surfaces of the outer peripheral portions 11e and 12e is not limited to a surface perpendicular to the substrate 10 as shown in FIG. For example, the side surfaces of the outer peripheral portions 11e and 12e are inclined or flat surfaces such that the width of the wide walls 11 and 12 increases as the distance from the substrate 10 increases, or the width of the wide walls 11 and 12 decreases as the distance from the substrate 10 increases. It may be a plane or a curved surface or the like inclined as described above.
　外周部１１ｅ，１２ｅの形状は、例えば広壁１１，１２のパターンをレジストで形成する場合に、レジストの端面の形状を外周部１１ｅ，１２ｅと相補的になるように形成できる。例えば、外周部１１ｅ，１２ｅに凹部を設ける場合は、レジストの端面に凸部を設けてもよい。同様に、外周部１１ｅ，１２ｅに凸部を設ける場合は、レジストの端面に凹部を設けてもよい。 (4) The outer peripheral portions 11e and 12e can be formed so that, for example, when the patterns of the wide walls 11 and 12 are formed of resist, the shape of the end face of the resist is complementary to the outer peripheral portions 11e and 12e. For example, in the case where concave portions are provided on the outer peripheral portions 11e and 12e, convex portions may be provided on the end surfaces of the resist. Similarly, when providing the convex portions on the outer peripheral portions 11e and 12e, a concave portion may be provided on the end face of the resist.
　図１８に、上部導体層１４が広壁１１，１２の外周部１１ｅ，１２ｅを覆う構成の第１変形例を示す。第１変形例では、広壁１１，１２の外周部１１ｅ，１２ｅに接触部４１および離隔部４２が形成されている。接触部４１は、基板１０と接触している。離隔部４２は、基板１０から厚さ方向に離れており、基板１０と接触していない。また、接触部４１は離隔部４２から、広壁１１、１２の外側に向けて突出している。 FIG. 18 shows a first modification of the configuration in which the upper conductor layer 14 covers the outer peripheral portions 11e and 12e of the wide walls 11 and 12. In the first modification, the contact portions 41 and the separation portions 42 are formed on the outer peripheral portions 11 e and 12 e of the wide walls 11 and 12. The contact portion 41 is in contact with the substrate 10. The separation portion 42 is separated from the substrate 10 in the thickness direction, and is not in contact with the substrate 10. The contact portion 41 protrudes from the separation portion 42 toward the outside of the wide walls 11 and 12.
　第１変形例によれば、接触部４１が離隔部４２よりも広壁１１、１２の外側に位置していることにより、基板１０と広壁１１，１２との接触面積が大きくなる。さらに、接触部４１が離隔部４２から突出していることにより、上部導体層１４と広壁１１，１２との接触面積も大きくなる。このように、基板１０と広壁１１、１２の接触面積、および広壁１１、１２と上部導体層１４の接触面積が大きいことで、相互の密着性に優れる。このため、上部導体層１４が、基板１０から広壁１１，１２が剥離することを抑制する効果を高めることができる。 According to the first modification, the contact area between the substrate 10 and the wide walls 11 and 12 is increased because the contact portion 41 is located outside the wide walls 11 and 12 relative to the separation portion 42. Further, since the contact portion 41 protrudes from the separation portion 42, the contact area between the upper conductor layer 14 and the wide walls 11, 12 also increases. As described above, since the contact area between the substrate 10 and the wide walls 11 and 12 and the contact area between the wide walls 11 and 12 and the upper conductor layer 14 are large, the mutual adhesion is excellent. For this reason, the effect that the upper conductor layer 14 suppresses peeling of the wide walls 11 and 12 from the substrate 10 can be enhanced.
　図１９に、上部導体層１４が広壁１１，１２の外周部１１ｅ，１２ｅを覆う構成の第２変形例を示す。第２変形例では、広壁１１，１２の外周部１１ｅ，１２ｅに、接触部４１、離隔部４２、および凹部４３が形成されている。接触部４１は、基板１０と接触している。離隔部４２は、基板１０から厚さ方向に離隔しており、基板１０と接触していない。凹部４３は、接触部４１と離隔部４２との間に位置しており、広壁１１、１２の内部に向けて窪んでいる。 FIG. 19 shows a second modification of the configuration in which the upper conductor layer 14 covers the outer peripheral portions 11 e and 12 e of the wide walls 11 and 12. In the second modified example, a contact portion 41, a separation portion 42, and a concave portion 43 are formed on outer peripheral portions 11e, 12e of the wide walls 11, 12. The contact portion 41 is in contact with the substrate 10. The separation part 42 is separated from the substrate 10 in the thickness direction, and is not in contact with the substrate 10. The recess 43 is located between the contact portion 41 and the separation portion 42 and is recessed toward the inside of the wide walls 11 and 12.
　上部導体層１４は、接触部４１、離隔部４２、および凹部４３の表面に沿って形成されている。すなわち、凹部４３の内部まで上部導体層１４が進入している。これにより、上部導体層１４と広壁１１，１２の接触面積が大きくなるため、相互の密着性に優れる。このため、上部導体層１４が、基板１０から広壁１１，１２が剥離することを抑制する効果を高めることができる。図１９の例では、凹部４３の断面形状は、広壁１１，１２の内部に向かって凹部４３の幅が徐々に狭くなる楔型（Ｖ字形）である。ただし、凹部４３の断面形状はこれに限定されず、半円形、Ｕ字形、Ｗ字形、Ｃ字形等でもよい。 The upper conductor layer 14 is formed along the surfaces of the contact portion 41, the separation portion 42, and the concave portion 43. That is, the upper conductor layer 14 enters into the recess 43. As a result, the contact area between the upper conductor layer 14 and the wide walls 11 and 12 is increased, so that mutual adhesion is excellent. For this reason, the effect that the upper conductor layer 14 suppresses peeling of the wide walls 11 and 12 from the substrate 10 can be enhanced. In the example of FIG. 19, the cross-sectional shape of the concave portion 43 is a wedge shape (V shape) in which the width of the concave portion 43 gradually decreases toward the inside of the wide walls 11 and 12. However, the cross-sectional shape of the concave portion 43 is not limited to this, and may be semicircular, U-shaped, W-shaped, C-shaped, or the like.
　図２０に、上部導体層１４が広壁１１，１２の外周部１１ｅ，１２ｅを覆う構成の第３変形例を示す。第３変形例では、広壁１１，１２の外周部１１ｅ，１２ｅに、接触部４１、離隔部４２、および凹部４３が形成されている。接触部４１は、基板１０と接触している。離隔部４２は、基板１０から厚さ方向に離隔しており、基板１０と接触していない。凹部４３は、接触部４１と離隔部４２との間に位置しており、広壁１１、１２の内部に向けて窪んでいる。また、接触部４１は離隔部４２よりも広壁１１、１２の外側に位置している。これにより、基板１０と広壁１１，１２との接触面積が大きくなり、さらに上部導体層１４と広壁１１，１２との接触面積が大きくなるため、相互の密着性に優れる。このため、上部導体層１４が、基板１０から広壁１１，１２が剥離することを抑制する効果を高めることができる。 FIG. 20 shows a third modification of the configuration in which the upper conductor layer 14 covers the outer peripheral portions 11 e and 12 e of the wide walls 11 and 12. In the third modified example, a contact portion 41, a separation portion 42, and a concave portion 43 are formed on the outer peripheral portions 11e, 12e of the wide walls 11, 12. The contact portion 41 is in contact with the substrate 10. The separation part 42 is separated from the substrate 10 in the thickness direction, and is not in contact with the substrate 10. The recess 43 is located between the contact portion 41 and the separation portion 42 and is recessed toward the inside of the wide walls 11 and 12. The contact portion 41 is located outside the wide walls 11 and 12 than the separation portion 42. Thereby, the contact area between the substrate 10 and the wide walls 11 and 12 is increased, and the contact area between the upper conductor layer 14 and the wide walls 11 and 12 is increased. For this reason, the effect that the upper conductor layer 14 suppresses peeling of the wide walls 11 and 12 from the substrate 10 can be enhanced.
　図２１に、上部導体層１４が広壁１１，１２の外周部１１ｅ，１２ｅを覆う構成の第４変形例を示す。第４変形例は第１変形例（図１８）と類似しているため、相違点を説明する。第４変形例では、広壁１１，１２は、基板１０と接触する第１層４４と、第１層４４の上に形成された第２層４５とを有する。また、第１層４４の端部４４ａが、先述の接触部４１となっている。また、第２層４５の端部４５ａが、先述の離隔部４２となっている。 FIG. 21 shows a fourth modification of the configuration in which the upper conductor layer 14 covers the outer peripheral portions 11e and 12e of the wide walls 11 and 12. Since the fourth modified example is similar to the first modified example (FIG. 18), differences will be described. In the fourth modified example, the wide walls 11 and 12 have a first layer 44 in contact with the substrate 10 and a second layer 45 formed on the first layer 44. Further, the end portion 44a of the first layer 44 is the contact portion 41 described above. Further, the end 45a of the second layer 45 is the above-mentioned separation part 42.
　第４変形例でも、基板１０と広壁１１，１２との接触面積が大きくなり、さらに上部導体層１４と広壁１１，１２との接触面積が大きくなるため、相互の密着性に優れる。このため、上部導体層１４が、基板１０から広壁１１，１２が剥離することを抑制する効果を高めることができる。広壁１１，１２の第１層４４をチタン（Ｔｉ）等の蒸着、スパッタ、無電解メッキ等で形成し、広壁１１，１２の第２層４５を銅（Ｃｕ）等の電解メッキ等で形成してもよい。 Also in the fourth modified example, the contact area between the substrate 10 and the wide walls 11 and 12 is increased, and the contact area between the upper conductor layer 14 and the wide walls 11 and 12 is increased. For this reason, the effect that the upper conductor layer 14 suppresses peeling of the wide walls 11 and 12 from the substrate 10 can be enhanced. The first layer 44 of the wide walls 11 and 12 is formed by vapor deposition of titanium (Ti) or the like, sputtering, electroless plating or the like, and the second layer 45 of the wide walls 11 or 12 is formed by electrolytic plating of copper (Cu) or the like. It may be formed.
　図２２に、上部導体層１４が広壁１１，１２の外周部１１ｅ，１２ｅを覆う構成の第５変形例を示す。第５変形例は第３変形例（図２０）と類似しているため、相違点を説明する。第５変形例では、広壁１１，１２は、基板１０と接触する第１層４４と、第１層４４の上に形成された第２層４５とを有する。また、第１層４４の端部４４ａが、先述の接触部４１となっている。また、第２層４５の端部４５ａが、先述の離隔部４２および凹部４３となっている。 FIG. 22 shows a fifth modification of the configuration in which the upper conductor layer 14 covers the outer peripheral portions 11 e and 12 e of the wide walls 11 and 12. Since the fifth modified example is similar to the third modified example (FIG. 20), differences will be described. In the fifth modified example, the wide walls 11 and 12 have a first layer 44 in contact with the substrate 10 and a second layer 45 formed on the first layer 44. Further, the end portion 44a of the first layer 44 is the contact portion 41 described above. Further, the end 45a of the second layer 45 is the above-mentioned separation part 42 and the concave part 43.
　凹部４３の断面形状は、奥（広壁１１、１２の内部）に向かうにしたがって徐々に第１層４４との距離が狭くなり、最も奥においては第１層４４との距離はゼロとなっている。これにより、基板１０と広壁１１，１２との接触面積が大きくなり、さらに上部導体層１４と広壁１１，１２との接触面積が大きくなるため、相互の密着性に優れる。このため、上部導体層１４が、基板１０から広壁１１，１２が剥離することを抑制する効果を高めることができる。ただし、凹部４３の断面形状はこれに限らない。第１層４４と上部導体層１４との接触面積が大きくなるのであれば、凹部４３の形状は任意である。 In the cross-sectional shape of the concave portion 43, the distance from the first layer 44 gradually decreases toward the back (inside of the wide walls 11 and 12), and the distance from the first layer 44 becomes zero at the deepest. I have. Thereby, the contact area between the substrate 10 and the wide walls 11 and 12 is increased, and the contact area between the upper conductor layer 14 and the wide walls 11 and 12 is increased. For this reason, the effect that the upper conductor layer 14 suppresses peeling of the wide walls 11 and 12 from the substrate 10 can be enhanced. However, the cross-sectional shape of the recess 43 is not limited to this. The shape of the concave portion 43 is arbitrary as long as the contact area between the first layer 44 and the upper conductor layer 14 increases.
　図２３に、上部導体層１４が広壁１１，１２の外周部１１ｅ，１２ｅを覆う構成の第６変形例を示す。第６変形例は、第４変形例（図２１）と類似しているため、相違点を説明する。第６変形例では、上部導体層１４が、第１層４６と第２層４７とを有する。上部導体層１４の第１層４６は、広壁１１，１２の第２層４５の上面と、離隔部４２とを覆っている。上部導体層１４の第２層４７は、上部導体層１４の第１層４６の全体を覆っている。 FIG. 23 shows a sixth modification of the configuration in which the upper conductor layer 14 covers the outer peripheral portions 11 e and 12 e of the wide walls 11 and 12. Since the sixth modified example is similar to the fourth modified example (FIG. 21), differences will be described. In the sixth modification, the upper conductor layer 14 has a first layer 46 and a second layer 47. The first layer 46 of the upper conductor layer 14 covers the upper surfaces of the second layers 45 of the wide walls 11 and 12 and the separation part 42. The second layer 47 of the upper conductor layer 14 covers the entire first layer 46 of the upper conductor layer 14.
　図２４に、上部導体層１４が広壁１１，１２の外周部１１ｅ，１２ｅを覆う構成の第７変形例を示す。第７変形例は、第５変形例（図２２）と類似しているため、相違点を説明する。第７変形例では、上部導体層１４が、第１層４６と第２層４７とを有する。上部導体層１４の第１層４６は、広壁１１，１２の第２層４５の上面と、離隔部４２と、凹部４３とを覆っている。上部導体層１４の第２層４７は、上部導体層１４の第１層４６の全体を覆っている。上部導体層１４の第１層４６及び第２層４７の両方が、凹部４３の表面に沿って形成されている。 FIG. 24 shows a seventh modification of the configuration in which the upper conductor layer 14 covers the outer peripheral portions 11 e and 12 e of the wide walls 11 and 12. Since the seventh modified example is similar to the fifth modified example (FIG. 22), differences will be described. In the seventh modification, the upper conductor layer 14 has a first layer 46 and a second layer 47. The first layer 46 of the upper conductor layer 14 covers the upper surface of the second layer 45 of the wide walls 11 and 12, the separation part 42, and the recess 43. The second layer 47 of the upper conductor layer 14 covers the entire first layer 46 of the upper conductor layer 14. Both the first layer 46 and the second layer 47 of the upper conductor layer 14 are formed along the surface of the recess 43.
　図２５に、上部導体層１４が広壁１１，１２の外周部１１ｅ，１２ｅを覆う構成の第８変形例を示す。第８変形例は、第４変形例（図２１）と類似しているため、相違点を説明する。第８変形例では、上部導体層１４が、第１層４６と第２層４７とを有する。上部導体層１４の第１層４６は、広壁１１，１２の第２層４５の上面と、離隔部４２と、第２層４５の外側における第１層４４の上面と、接触部４１と、第１層４４の外側における基板１０の上とを覆っている。上部導体層１４の第２層４７は、第１層４６の全体を覆っている。 FIG. 25 shows an eighth modification of the configuration in which the upper conductor layer 14 covers the outer peripheral portions 11 e and 12 e of the wide walls 11 and 12. Since the eighth modified example is similar to the fourth modified example (FIG. 21), differences will be described. In the eighth modification, the upper conductor layer 14 has a first layer 46 and a second layer 47. The first layer 46 of the upper conductor layer 14 includes an upper surface of the second layer 45 of the wide walls 11 and 12, a separation portion 42, an upper surface of the first layer 44 outside the second layer 45, a contact portion 41, It covers the substrate 10 outside the first layer 44. The second layer 47 of the upper conductor layer 14 covers the entire first layer 46.
　図２６に、上部導体層１４が広壁１１，１２の外周部１１ｅ，１２ｅを覆う構成の第９変形例を示す。第９変形例は、第５変形例（図２２）と類似しているため、相違点を説明する。第９変形例では、上部導体層１４が、第１層４６と第２層４７とを有する。上部導体層１４の第１層４６は、広壁１１，１２の第２層４５の上面と、離隔部４２と、凹部４３と、第２層４５の外側における第１層４４の上面と、接触部４１と、第１層４４の外側における基板１０の上とを覆っている。上部導体層１４の第２層４７は、第１層４６の全体を覆っている。上部導体層１４の第１層４６及び第２層４７の両方が、凹部４３の表面に沿って形成されている。 FIG. 26 shows a ninth modification of the configuration in which the upper conductor layer 14 covers the outer peripheral portions 11 e and 12 e of the wide walls 11 and 12. The ninth modified example is similar to the fifth modified example (FIG. 22), and therefore, only the differences will be described. In the ninth modification, the upper conductor layer 14 has a first layer 46 and a second layer 47. The first layer 46 of the upper conductor layer 14 is in contact with the upper surface of the second layer 45 of the wide walls 11 and 12, the separation portion 42, the concave portion 43, and the upper surface of the first layer 44 outside the second layer 45. The portion 41 and the top of the substrate 10 outside the first layer 44 are covered. The second layer 47 of the upper conductor layer 14 covers the entire first layer 46. Both the first layer 46 and the second layer 47 of the upper conductor layer 14 are formed along the surface of the recess 43.
　図２７に、上部導体層１４が広壁１１，１２の外周部１１ｅ，１２ｅを覆う構成の第１０変形例を示す。第１０変形例は、第４変形例（図２１）と類似しているため、相違点を説明する。第１０変形例では、上部導体層１４が、第１層４６と第２層４７とを有する。上部導体層１４の第１層４６は、広壁１１，１２の第２層４５の上面と、第２層４５の外側における第１層４４の上面と、接触部４１と、第１層４４の外側における基板１０の上とを覆っている。上部導体層１４の第２層４７は、第１層４６が覆う範囲全体に加えて、離隔部４２を覆っている。 FIG. 27 shows a tenth modification of the configuration in which the upper conductor layer 14 covers the outer peripheral portions 11 e and 12 e of the wide walls 11 and 12. Since the tenth modified example is similar to the fourth modified example (FIG. 21), differences will be described. In the tenth modification, the upper conductor layer 14 has a first layer 46 and a second layer 47. The first layer 46 of the upper conductor layer 14 includes the upper surface of the second layer 45 of the wide walls 11 and 12, the upper surface of the first layer 44 outside the second layer 45, the contact portion 41, and the first layer 44. It covers the substrate 10 on the outside. The second layer 47 of the upper conductor layer 14 covers the entire area covered by the first layer 46, as well as the separation portion 42.
　図２８に、上部導体層１４が広壁１１，１２の外周部１１ｅ，１２ｅを覆う構成の第１１変形例を示す。第１１変形例は、第５変形例（図２２）と類似しているため、相違点を説明する。第１１変形例では、上部導体層１４が、第１層４６と第２層４７とを有する。上部導体層１４の第１層４６は、広壁１１，１２の第２層４５の上面と、第２層４５の外側における第１層４４の上面のうち広壁１１，１２の第２層４５の下側とならない領域を覆っている。また、第１層４６は、接触部４１と、第１層４４の外側における基板１０の上とを覆っている。上部導体層１４の第２層４７は、上部導体層１４の第１層４６の全体に加えて、離隔部４２と、第２層４５の外側における第１層４４の上面のうち第２層４５の下側にある領域とを覆い、かつ、凹部４３の表面に沿って形成されている。 FIG. 28 shows an eleventh modification of the configuration in which the upper conductor layer 14 covers the outer peripheral portions 11 e and 12 e of the wide walls 11 and 12. Since the eleventh modified example is similar to the fifth modified example (FIG. 22), differences will be described. In the eleventh modification, the upper conductor layer 14 has a first layer 46 and a second layer 47. The first layer 46 of the upper conductor layer 14 includes an upper surface of the second layer 45 of the wide walls 11 and 12, and a second layer 45 of the wide walls 11 and 12 of the upper surface of the first layer 44 outside the second layer 45. Covers the area that is not below the Further, the first layer 46 covers the contact portion 41 and the top of the substrate 10 outside the first layer 44. The second layer 47 of the upper conductor layer 14 includes, in addition to the entire first layer 46 of the upper conductor layer 14, the separation portion 42 and the second layer 45 of the upper surface of the first layer 44 outside the second layer 45. And is formed along the surface of the concave portion 43.
　第６～第１１変形例において、上部導体層１４の第１層４６をチタン（Ｔｉ）等の蒸着、スパッタ、無電解メッキ等で形成し、上部導体層１４の第２層４７を銅（Ｃｕ）等の電解メッキ等で形成してもよい。上部導体層１４の第２層４７は、広壁１１の第１層４４の上か、上部導体層１４の第１層４６のいずれの上に形成されてもよい。広壁１１の第１層４４を構成する材料と、上部導体層１４の第１層４６を構成する材料とは、互いに同一でもよく、あるいは異なってもよい。広壁１１の第２層４５を構成する材料と、上部導体層１４の第２層４７を構成する材料とは、互いに同一でもよく、あるいは異なってもよい。 In the sixth to eleventh modified examples, the first layer 46 of the upper conductor layer 14 is formed by vapor deposition of titanium (Ti) or the like, sputtering, electroless plating, or the like, and the second layer 47 of the upper conductor layer 14 is formed of copper (Cu). ) May be formed by electrolytic plating or the like. The second layer 47 of the upper conductor layer 14 may be formed on either the first layer 44 of the wide wall 11 or the first layer 46 of the upper conductor layer 14. The material forming the first layer 44 of the wide wall 11 and the material forming the first layer 46 of the upper conductor layer 14 may be the same or different. The material forming the second layer 45 of the wide wall 11 and the material forming the second layer 47 of the upper conductor layer 14 may be the same or different.
　以上、本発明を好適な実施形態に基づいて説明してきたが、本発明は上述の実施形態に限定されず、本発明の要旨を逸脱しない範囲で種々の改変が可能である。改変としては、各実施形態における構成要素の追加、置換、省略、その他の変更が挙げられる。また、２以上の実施形態に用いられた構成要素を適宜組み合わせることも可能である。つまり、第１～第１５実施形態で説明した構成や、第１～第１１変形例で説明した構成を、適宜組み合わせてもよい。　　 Although the present invention has been described based on the preferred embodiments, the present invention is not limited to the above embodiments, and various modifications can be made without departing from the gist of the present invention. Modifications include addition, substitution, omission, and other changes of the components in each embodiment. Also, the components used in two or more embodiments can be appropriately combined. That is, the configurations described in the first to fifteenth embodiments and the configurations described in the first to eleventh modifications may be appropriately combined.
　広壁、貫通電極、上部導体層等の導体層を形成する方法としては、蒸着、スパッタ、無電解メッキ、電解メッキ、導体ペーストなどが挙げられる。２種以上の導体材料または成膜方法を併用してもよく、２種以上の導体を積層して導体層を構成してもよい。例えば、ガラス等の基板表面に薄いシード層を形成した後、シード層の上に所望の厚みのメッキ層を積層してもよい。 導体 Examples of a method for forming a conductor layer such as a wide wall, a through electrode, and an upper conductor layer include vapor deposition, sputtering, electroless plating, electrolytic plating, and conductor paste. Two or more kinds of conductor materials or film forming methods may be used in combination, or two or more kinds of conductors may be laminated to form a conductor layer. For example, after forming a thin seed layer on the surface of a substrate such as glass, a plating layer having a desired thickness may be laminated on the seed layer.
　導体層の端部としては、配線等における長手方向の端部、パッド等におけるパターン等が挙げられる。導体層の端部と誘電体層との接触面は、基板の面方向に対して平行でも垂直でも傾斜してもよい。導体層の端部全てを誘電体層上に配置してもよい。 端 Examples of the end of the conductor layer include an end in the longitudinal direction of a wiring or the like, a pattern of a pad or the like, and the like. The contact surface between the end of the conductor layer and the dielectric layer may be parallel, perpendicular or inclined with respect to the plane direction of the substrate. All the ends of the conductor layer may be arranged on the dielectric layer.
　上述の実施形態に係る高周波受動部品においては、同一の基板に複数の部品が構成されてもよい。基板に構成される他の部品は、高周波用の受動部品に限らず、他の受動部品や能動部品等を含んでもよい。部品をモジュール化することにより、高周波モジュールを構成することもできる。本実施形態の高周波モジュールは、例えば、上述の高周波受動部品を備えるモジュールである。モジュールには、機能に必要な種々の部品を組み込むことができる。 In the high-frequency passive component according to the above-described embodiment, a plurality of components may be configured on the same substrate. Other components configured on the substrate are not limited to high frequency passive components, and may include other passive components, active components, and the like. By modularizing the components, a high-frequency module can be configured. The high-frequency module of the present embodiment is, for example, a module including the above-described high-frequency passive component. Various components necessary for the function can be incorporated in the module.
１０…基板、１１，１２…広壁、１１ａ，１２ａ…広壁の開口、１１ｅ，１２ｅ…広壁の外周部、１３…貫通電極、１３ａ…貫通孔、１４…上部導体層、２０…導波領域、２１…導波路構造、２２…導波路の外側の領域、３２…配線層、３３…貫通構造、３４，３６…接続導体層、３４ｅ，３６ｅ…接続導体層の端部、３５，３７…第３誘電体層、４１…接触部、４２…離隔部、４３…凹部。 DESCRIPTION OF SYMBOLS 10 ... board | substrate, 11, 12 ... wide wall, 11a, 12a ... opening of wide wall, 11e, 12e ... outer peripheral part of wide wall, 13 ... penetration electrode, 13a ... through hole, 14 ... upper conductor layer, 20 ... waveguide Region, 21: waveguide structure, 22: region outside the waveguide, 32: wiring layer, 33: penetrating structure, 34, 36: connection conductor layer, 34e, 36e: end of connection conductor layer, 35, 37 ... Third dielectric layer, 41 contact part, 42 separation part, 43 concave part.

Claims (10)

  1. 　導波領域を含む誘電体により形成された基板と、
    　前記基板の第１面に形成された第１広壁、前記基板の第２面に形成された第２広壁、並びに前記第１広壁および前記第２広壁の双方に接続された複数の貫通電極を含み、前記第１広壁と前記第２広壁と前記複数の貫通電極が前記導波領域を囲むように配置された導波路構造と、
    　前記第１面の上に形成され、前記第１広壁の外側に位置する第１誘電体層と、
    　前記第１広壁の上に形成された第２誘電体層と、
    　上部導体層と、
    　を備え、
    　前記上部導体層は、前記第１誘電体層と、前記第１誘電体層および前記第１広壁の間の前記基板上と、前記第１広壁と、にわたって形成されている、高周波受動部品。     A substrate formed of a dielectric including a waveguide region,
    A first wide wall formed on a first surface of the substrate, a second wide wall formed on a second surface of the substrate, and a plurality of connected to both the first wide wall and the second wide wall. A waveguide structure including a through electrode, wherein the first wide wall, the second wide wall, and the plurality of through electrodes are arranged to surround the waveguide region;
    A first dielectric layer formed on the first surface and located outside the first wide wall;
    A second dielectric layer formed on the first wide wall;
    An upper conductor layer,
    With
    The high-frequency passive component, wherein the upper conductor layer is formed over the first dielectric layer, the substrate between the first dielectric layer and the first wide wall, and the first wide wall. .
  2. 　前記上部導体層は、前記第１誘電体層と、前記第１誘電体層および前記第１広壁の間の前記基板上と、前記第１広壁と、前記第２誘電体層と、にわたって形成されている、請求項１に記載の高周波受動部品。 The upper conductor layer extends over the first dielectric layer, the substrate between the first dielectric layer and the first wide wall, the first wide wall, and the second dielectric layer. The high-frequency passive component according to claim 1, which is formed.
  3. 　前記上部導体層が、前記第１広壁の外周部の少なくとも隅部に配置されている、請求項１または２に記載の高周波受動部品。 3. The high-frequency passive component according to claim 1, wherein the upper conductor layer is disposed at least at a corner of an outer peripheral portion of the first wide wall. 4.
  4. 　前記上部導体層が、前記第１広壁の外周部の全体に配置されている、請求項１または２に記載の高周波受動部品。 The high-frequency passive component according to claim 1 or 2, wherein the upper conductor layer is disposed over the entire outer peripheral portion of the first wide wall.
  5. 　前記基板はガラスにより形成され、前記第１誘電体層および前記第２誘電体層は樹脂により形成されている、請求項１～４のいずれか１項に記載の高周波受動部品。 The high-frequency passive component according to claim 1, wherein the substrate is formed of glass, and the first dielectric layer and the second dielectric layer are formed of resin.
  6. 　前記上部導体層は、少なくとも一部を、樹脂で封止されている、請求項１～５のいずれか１項に記載の高周波受動部品。 The high frequency passive component according to any one of claims 1 to 5, wherein the upper conductor layer is at least partially sealed with a resin.
  7. 　前記導波路構造とは異なる位置において、前記基板の両面に貫通した貫通電極を含む貫通構造と、
    　前記基板上において前記貫通構造から離れて形成された第３誘電体層と、
    　接続導体層と、を有し、
    　前記接続導体層は、前記貫通構造と、前記貫通構造および前記第３誘電体層の間の前記基板上と、前記第３誘電体層と、にわたって形成されている、請求項１～６のいずれか１項に記載の高周波受動部品。     At a position different from the waveguide structure, a penetration structure including a penetration electrode penetrating both surfaces of the substrate,
    A third dielectric layer formed on the substrate away from the through structure;
    And a connection conductor layer,
    7. The connection conductor layer according to claim 1, wherein the connection conductor layer is formed over the through structure, on the substrate between the through structure and the third dielectric layer, and over the third dielectric layer. 2. The high-frequency passive component according to claim 1.
  8. 　前記第２面には、前記第２広壁の外側に位置する第１誘電体層と、上部導体層と、が形成され、前記上部導体層は、前記第１誘電体層と、前記第１誘電体層および前記第２広壁の間の前記基板上と、前記第２広壁と、にわたって形成されている、請求項１～７のいずれか１項に記載の高周波受動部品。 A first dielectric layer located outside the second wide wall and an upper conductor layer are formed on the second surface, and the upper conductor layer includes the first dielectric layer and the first dielectric layer. The high-frequency passive component according to any one of claims 1 to 7, wherein the high-frequency passive component is formed over the substrate between the dielectric layer and the second wide wall and over the second wide wall.
  9. 　前記上部導体層が、前記第１誘電体層および前記第１広壁の間の前記基板上と、前記第１広壁の端部とを覆う箇所において、前記第１広壁の端部には接触部および離隔部が形成され、
    　前記離隔部は前記基板から離隔し、
    　前記接触部は前記基板に接触するとともに前記離隔部よりも外側に位置する、請求項１～８のいずれか１項に記載の高周波受動部品。     At a location where the upper conductor layer covers the substrate between the first dielectric layer and the first wide wall and an end of the first wide wall, an end of the first wide wall has A contact portion and a separation portion are formed,
    The separation unit is separated from the substrate,
    The high-frequency passive component according to any one of claims 1 to 8, wherein the contact portion is in contact with the substrate and located outside the separation portion.
  10. 　前記上部導体層が、前記第１誘電体層および前記第１広壁の間の前記基板上と、前記第１広壁の端部とを覆う箇所において、前記第１広壁の端部には接触部、離隔部、および凹部が形成され、
    　前記離隔部は前記基板から離隔し、
    　前記接触部は前記基板に接触し、
    　前記凹部は、前記離隔部と前記接触部との間に位置するとともに前記第１広壁の内部に向けて窪み、
    　前記凹部の内部に前記上部導体層が進入している、請求項１～９のいずれか１項に記載の高周波受動部品。     At a location where the upper conductor layer covers the substrate between the first dielectric layer and the first wide wall and an end of the first wide wall, an end of the first wide wall has A contact portion, a separation portion, and a concave portion are formed,
    The separation unit is separated from the substrate,
    The contact portion contacts the substrate,
    The concave portion is located between the separation portion and the contact portion and is depressed toward the inside of the first wide wall,
    The high-frequency passive component according to any one of claims 1 to 9, wherein the upper conductor layer enters the inside of the concave portion.
PCT/JP2019/025527 2018-06-28 2019-06-27 High-frequency passive component WO2020004522A1 (en)

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Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2011048937A1 (en) * 2009-10-23 2011-04-28 国立大学法人京都大学 Conductive film using high concentration dispersion of copper-based nanoparticles, and method for producing same
WO2014126194A1 (en) * 2013-02-18 2014-08-21 株式会社フジクラ Mode converter and production method therefor

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2011048937A1 (en) * 2009-10-23 2011-04-28 国立大学法人京都大学 Conductive film using high concentration dispersion of copper-based nanoparticles, and method for producing same
WO2014126194A1 (en) * 2013-02-18 2014-08-21 株式会社フジクラ Mode converter and production method therefor

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