WO2019161688A1 - 一种像素结构及阵列基板 - Google Patents

一种像素结构及阵列基板 Download PDF

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WO2019161688A1
WO2019161688A1 PCT/CN2018/117942 CN2018117942W WO2019161688A1 WO 2019161688 A1 WO2019161688 A1 WO 2019161688A1 CN 2018117942 W CN2018117942 W CN 2018117942W WO 2019161688 A1 WO2019161688 A1 WO 2019161688A1
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sub
pixel electrode
pixel
electrode
line
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PCT/CN2018/117942
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English (en)
French (fr)
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李泽尧
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惠科股份有限公司
重庆惠科金渝光电科技有限公司
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Priority to US16/318,331 priority Critical patent/US10775673B2/en
Publication of WO2019161688A1 publication Critical patent/WO2019161688A1/zh

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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G02F1/134363—Electrodes characterised by their geometrical arrangement for applying an electric field parallel to the substrate, i.e. in-plane switching [IPS]
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136227—Through-hole connection of the pixel electrode to the active element through an insulation layer
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14601—Structural or functional details thereof
    • H01L27/14603—Special geometry or disposition of pixel-elements, address-lines or gate-electrodes
    • H01L27/14605—Structural or functional details relating to the position of the pixel elements, e.g. smaller pixel elements in the center of the imager compared to pixel elements at the periphery
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K10/00—Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having potential barriers
    • H10K10/40—Organic transistors
    • H10K10/46—Field-effect transistors, e.g. organic thin-film transistors [OTFT]
    • H10K10/462—Insulated gate field-effect transistors [IGFETs]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K10/00—Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having potential barriers
    • H10K10/40—Organic transistors
    • H10K10/46—Field-effect transistors, e.g. organic thin-film transistors [OTFT]
    • H10K10/462—Insulated gate field-effect transistors [IGFETs]
    • H10K10/484—Insulated gate field-effect transistors [IGFETs] characterised by the channel regions
    • H10K10/486—Insulated gate field-effect transistors [IGFETs] characterised by the channel regions the channel region comprising two or more active layers, e.g. forming pn heterojunctions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K19/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic element specially adapted for rectifying, amplifying, oscillating or switching, covered by group H10K10/00
    • H10K19/10—Integrated devices, or assemblies of multiple devices, comprising at least one organic element specially adapted for rectifying, amplifying, oscillating or switching, covered by group H10K10/00 comprising field-effect transistors
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G02F1/134345—Subdivided pixels, e.g. for grey scale or redundancy
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2201/00—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
    • G02F2201/12—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode
    • G02F2201/122—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode having a particular pattern
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2201/00—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
    • G02F2201/12—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode
    • G02F2201/123—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode pixel
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2201/00—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
    • G02F2201/40—Arrangements for improving the aperture ratio
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K10/00—Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having potential barriers
    • H10K10/40—Organic transistors
    • H10K10/46—Field-effect transistors, e.g. organic thin-film transistors [OTFT]

Definitions

  • the present application belongs to the field of display technologies, and in particular, to a pixel structure and an array substrate.
  • a TFT-LCD thin film transistor-liquid crystal display
  • a multi-domain pixel electrode structure is generally used to tilt the liquid crystal molecules in a plurality of different directions after alignment, thereby effectively improving the transmittance of the backlight, and is applicable to a wide viewing angle display device, and solving the color shift phenomenon of the wide viewing angle display device.
  • the embodiment of the present application provides a pixel structure and an array substrate to solve, for example, but not limited to, when a multi-domain pixel electrode structure is used, it is generally required to rely on a plurality of thin film transistors to perform switching control on different regions of the pixel electrode.
  • a plurality of thin film transistors occupy a large pixel area, thereby reducing the aperture ratio of the entire display device, and the reduction in the aperture ratio reduces the display effect of the display device.
  • An embodiment of the present application provides a pixel structure, including:
  • the pixel electrode electrically connected to the electronic switching device, the pixel electrode includes a plurality of sub-pixel electrode regions, and the transmittances of the plurality of sub-pixel electrode regions are different;
  • a gate line disposed on one side of the pixel electrode and electrically connected to the electronic switching device
  • a data line is disposed on the other side of the pixel electrode and electrically connected to the electronic switching device.
  • the sub-pixel electrode region includes:
  • the closed electrode line frame is composed of a plurality of frame electrode lines connected end to end, and the adjacent sub-pixel electrode areas share a frame electrode line;
  • a plurality of alignment electrode lines are obliquely disposed in the closed electrode line frame, and the plurality of alignment electrode lines are parallel to each other, have the same line pitch, and have the same line width.
  • a plurality of sub-pixel electrode regions of the plurality of sub-pixel electrode regions constitute a main region of the pixel electrode, and a remaining sub-pixel electrode region constitutes a sub-region of the pixel electrode;
  • all sub-pixel electrode regions in the main region are adjacent to each other, and all sub-pixel electrode regions in the sub-region are adjacent to each other, and a line width of the alignment electrode lines in the main region is larger than an orientation in the sub-region The line width of the electrode wire.
  • a slit is formed on the border electrode line at the boundary between the main area and the sub-area.
  • the number of sub-pixel electrode regions included in the main region is equal to the number of sub-pixel electrode regions in the sub-region.
  • the line spacing of the oriented electrode lines in the main region is greater than the line spacing of the oriented electrode lines in the sub-region.
  • a slit is formed on the border electrode line at the boundary between the main area and the sub-area.
  • the slit is formed on the bezel electrode line by a hollowing, etching, and cutting process.
  • the alignment electrode lines in the adjacent sub-pixel electrode regions are symmetrically distributed symmetrically with a common bezel electrode line.
  • the number of sub-pixel electrode regions included in the pixel electrode is greater than or equal to four.
  • the tilt directions of the orientation electrode lines in different sub-pixel regions are different.
  • the orientation electrode lines in the odd row sub-pixel electrode regions are tilted to the left, and the orientation electrode lines in the even row sub-pixel electrode regions are tilted to the right;
  • the alignment electrode lines in the odd-numbered sub-pixel electrode regions are inclined to the left, and the alignment electrode lines in the even-numbered column sub-pixel electrode regions are inclined to the right.
  • the one electronic switching device includes a gate, a drain, a source, and an active layer, and the active layer is disposed between the gate and the drain and the source;
  • the pixel electrode is electrically connected to the drain, the gate line is electrically connected to the gate, and the data line is electrically connected to the source.
  • the pixel structure further includes:
  • a gate insulating layer disposed between the active layer and the gate and the gate line;
  • a protective layer disposed between the pixel electrode and the data line, the source and the drain, wherein the pixel electrode is electrically connected to the drain through a via of the protective layer.
  • the drain and the source are formed on one surface of the active layer, and the gate is in another of the active layer opposite to the source and the drain a side on which a surface is formed, the gate, the drain, the source, and the active layer collectively constituting the electronic switching device, and the gate and the gate line are formed on the same layer
  • the source and the data line are formed in the same layer.
  • the active layer is composed of multiple layers of different types of semiconductor materials.
  • the active layer is an organic semiconductor active layer composed of three different types of semiconductor materials.
  • a parasitic capacitance is formed between the gate and the source of the electronic switching device.
  • slits are formed on the border electrode lines at the junction of adjacent sub-pixel electrode regions.
  • the application also provides an array substrate comprising:
  • the pixel structures are disposed on the substrate and arranged in an array, and the adjacent gate lines are electrically connected and the adjacent data lines are electrically connected;
  • the pixel structure comprises:
  • the pixel electrode electrically connected to the electronic switching device, the pixel electrode includes a plurality of sub-pixel electrode regions, and the transmittances of the plurality of sub-pixel electrode regions are different;
  • a gate line disposed on one side of the pixel electrode and electrically connected to the electronic switching device
  • a data line is disposed on the other side of the pixel electrode and electrically connected to the electronic switching device.
  • the embodiment of the present application can effectively reduce the display color deviation by providing a pixel structure including only one electronic switching device, and dividing the pixel electrode into a plurality of sub-pixel electrode regions, so that different sub-pixel electrode regions have different transmittances. Increase the aperture ratio to improve picture quality.
  • FIG. 1 is a schematic structural diagram of a pixel electrode according to an embodiment of the present application.
  • FIG. 2 is a schematic structural diagram of a pixel electrode according to another embodiment of the present application.
  • FIG. 3 is a schematic structural diagram of a pixel structure provided by an embodiment of the present application.
  • FIG. 4 is a schematic structural diagram of a pixel structure provided by another embodiment of the present application.
  • FIG. 5 is a schematic structural diagram of an array substrate provided by an embodiment of the present application.
  • the embodiment of the present application provides a pixel electrode 10 , which is applied to a single pixel, an array substrate or a display device, and only needs to be electrically connected to the switching device, so that the color deviation can be effectively reduced.
  • the electronic switching device can be any device that can be used for a display device to implement an electronic switching function, for example, a bipolar junction transistor (BJT), a field effect transistor (FET). ) or Thin Film Transistor (TFT) or the like.
  • BJT bipolar junction transistor
  • FET field effect transistor
  • TFT Thin Film Transistor
  • the pixel electrode is electrically connected to a drain electrode of the electronic switching device.
  • the pixel electrode 10 includes a plurality of sub-pixel electrode regions, and transmittances of different sub-pixel electrode regions are different.
  • the number of sub-pixel electrode regions can be set according to actual needs, and the number of sub-pixel electrode regions is the number of domains of the pixel electrode.
  • the two-domain pixel electrode includes two sub-pixel electrode regions
  • the four-domain pixel electrode includes Four sub-pixel electrode regions, the eight-domain pixel electrode including eight sub-pixel electrode regions.
  • the number of sub-pixel electrode regions included in the pixel electrode is greater than or equal to four.
  • FIG. 1 exemplarily shows that the pixel electrode 10 includes eight sub-pixel electrode regions 11.
  • the sub-pixel electrode regions may be divided in any manner, that is, the sub-pixel regions in the pixel electrodes may be arranged in any form as long as all the sub-pixel regions constitute a complete pixel electrode as a whole.
  • the shape of the sub-pixel area can also be set in any manner as long as it is ensured that different sub-pixel areas do not overlap.
  • the pixel electrode in order to make the liquid crystal molecules regularly tilt in a plurality of different directions after the alignment, instead of disorderly tilting, the pixel electrode can be divided into a plurality of regularly arranged and symmetrically distributed sub-pixel regions as much as possible, and
  • the sub-pixel area should be set as a regular shape as much as possible, for example, a triangle, a quadrangle, a regular pentagon, or a regular hexagon.
  • the sub-pixel electrode region 11 is exemplarily shown to be rectangular.
  • the sub-pixel electrode region 10 includes a closed electrode line frame 111 and a plurality of orientation electrode lines 112;
  • the closed electrode line frame 111 is composed of a plurality of frame electrode lines connected end to end, and the adjacent sub-pixel electrode areas share a frame electrode line;
  • the plurality of alignment electrode lines 112 are obliquely disposed in the closed electrode line frame 112, and the plurality of alignment electrode lines 112 are parallel to each other, the line spacing is the same, and the line width is the same;
  • the tilt direction, the line pitch, or the line width of the alignment electrode lines 112 in the different sub-pixel electrode regions 111 are different.
  • the orientation electrode line functions by applying a voltage to its corresponding liquid crystal molecules to define the tilt direction of the corresponding liquid crystal molecules.
  • the tilt direction of the liquid crystal molecules is the same as or corresponding to the corresponding orientation electrode lines.
  • the transmittance the sum of the areas of all the electrode lines of the sub-pixel electrode region / the area of the sub-pixel electrode region.
  • FIG. 1 exemplarily shows that among the eight sub-pixel regions, the line width and the line pitch of the alignment electrode lines 112 in the upper four sub-pixel electrode regions 11 are the same, and the alignment electrode lines in the lower four sub-pixel electrode regions 11 are the same.
  • the line width and line spacing of 112 are the same.
  • a plurality of sub-pixel electrode regions of the plurality of sub-pixel electrode regions constitute a main region of the pixel electrode, and the remaining sub-pixel electrode regions constitute a sub-region of the pixel electrode;
  • All sub-pixel electrode regions in the main region are adjacent to each other, and all sub-pixel electrode regions in the sub-region are adjacent to each other, and a line pitch of the alignment electrode lines in the main region is greater than an orientation in the sub-region A line pitch of the electrode lines, a line width of the alignment electrode lines in the main region being larger than a line width of the alignment electrode lines in the sub-regions.
  • the sub-pixel electrode region having a large line width and a line pitch as the main region, the high transmittance of the liquid crystal pixel region corresponding to the main region can be achieved, and the color deviation of the liquid crystal pixel region can be reduced.
  • FIG. 1 it is exemplarily shown that the line width and the line pitch of the alignment electrode lines 112 in the upper four sub-pixel electrode regions 11 are larger than the line width and the line pitch of the alignment electrode lines 112 in the lower four sub-pixel electrode regions 11.
  • the tilt directions of the alignment electrode lines in each sub-pixel electrode region may be set according to actual needs, and the tilt directions of the alignment electrode lines in different sub-pixel regions may be the same or different.
  • the tilt direction of the orientation electrode lines in each sub-pixel electrode region should be set as regularly as possible.
  • the orientation electrode lines in the odd row (or column) sub-pixel electrode region are all inclined to the left by a certain angle, and the orientation electrode lines in the even row (or column) sub-pixel electrode region are all inclined to the right by a certain angle; in the row or column
  • the alignment electrode lines in the adjacent sub-pixel electrode regions in the direction are symmetrically distributed symmetrically with respect to the common frame electrode lines.
  • the alignment electrode lines in the adjacent sub-pixel electrode regions are symmetrically distributed symmetrically with the common bezel electrode line; wherein the alignment electrode lines in the upper left corner sub-pixel electrode region are leftward Tilt, the orientation electrode line in the sub-pixel electrode region in the upper right corner is inclined to the right, and the tilt direction of the orientation electrode line in the other sub-pixel electrode regions is deduced by analogy, and will not be described again here.
  • a slit 113 is formed on a frame electrode line at a boundary between a main area and a sub-area of the pixel electrode 10 in FIG. 1, that is, a sub-pixel electrode area of the first row of the second row.
  • a slit is formed on the frame electrode line between the sub-pixel electrode regions of the third row and the first column, and between the sub-pixel electrode regions of the second row and the second column and the sub-pixel electrode regions of the third row and the second column A slit is formed on the border electrode line.
  • the slit may be formed by a process such as hollowing, etching, cutting, etc. on a complete frame electrode line, or may be formed by leaving a certain gap between the two frame electrode lines.
  • the slits on the entire pixel electrode may be formed by a process such as hollowing, etching, cutting, etc. on a complete pixel electrode, or may be formed by leaving a certain gap between adjacent alignment electrode lines.
  • the tilt directions of the liquid crystal molecules between the main region and the sub-region can be prevented from interfering with each other.
  • slits are formed on the border electrode lines at the junction of adjacent sub-pixel electrode regions.
  • an embodiment of the present application provides a pixel structure including the above-described pixel electrode 10, an electronic switching device 20, a gate line 30, and a data line 40;
  • the pixel electrode 10 is electrically connected to the electronic switching device 20 .
  • the gate line 30 is disposed on one side of the pixel electrode 10 and electrically connected to the electronic switching device 20 .
  • the data line 40 is disposed on the other side of the pixel electrode 10 and is connected to the electronic switch.
  • Device 20 is electrically connected.
  • the electronic switching device 20 includes a gate (not shown), a drain 21, a source 22, and an active layer 23, and the active layer 23 is disposed at the gate. Between the drain 21 and the source 22, the gate is electrically connected to the gate line 30, the drain 21 is electrically connected to the pixel electrode 10, and the source 22 is electrically connected to the data line 40.
  • FIG. 3 exemplarily shows a pixel structure realized based on the pixel electrode shown in FIG. 1
  • FIG. 4 exemplarily shows a pixel structure realized based on the pixel electrode shown in FIG.
  • a parasitic capacitance is formed between the gate and the source of the electronic switching device.
  • the drain and the source are formed on one surface of the active layer, and the gate is formed on the side of the other surface of the active layer opposite to the source and the drain, the gate, the drain, and the source Together with the active layer, an electronic switching device is formed, the gate and the gate lines are formed in the same layer, and the source and the data lines are formed in the same layer.
  • the active layer is composed of multiple layers of different types of semiconductor materials, for example, an organic semiconductor active layer composed of three different types of semiconductor materials.
  • the pixel structure further includes a gate insulating layer and a protective layer; wherein a gate insulating layer is disposed between the active layer and the gate and the gate line; a protective layer is disposed at the pixel Between the electrode and the data line, the source and the drain, the pixel electrode is electrically connected to the drain through a via of the protective layer.
  • a gate insulating layer is formed between the active layer and the gate, and the active layer and the gate are spaced apart to achieve insulation.
  • the data line, the source and the drain are formed on one side of the protective layer, the pixel electrode is formed on the other side of the protective layer, and the protective layer is provided with a via hole, and the pixel electrode is electrically connected to the drain electrode through the via hole.
  • the pixel structure further includes a first alignment layer disposed on a side of the protection layer opposite to the pixel electrode, and the first alignment layer is provided with a sealant, and the liquid crystal is instilled in the region formed by the sealant.
  • a second alignment layer, a common electrode, and a color film are sequentially disposed above.
  • an electronic switching device is connected to only one gate line and one data line, that is, the pixel structure provided in this embodiment includes only one gate line and one data line.
  • the area where a pixel is located is usually an area surrounded by two gate lines and two data lines.
  • two gate lines 30 and two data lines 40 are exemplarily shown; one of the gate lines 30 is disposed on the upper side of the pixel electrode 10, and the other gate line 20 is disposed. On the lower side of the pixel electrode 10, one data line 40 is disposed on the left side of the pixel electrode 10, and the other data line 40 is disposed on the right side of the pixel electrode 10.
  • intersection of the gate line and the data line in FIG. 3 or 4 only represents that the two intersect in position rather than being electrically connected.
  • an embodiment of the present application further provides an array substrate, including:
  • a plurality of the above-described pixel structures 102 are disposed on the substrate 101 and arranged in an array.
  • the adjacent gate lines 30 are electrically connected and the adjacent data lines 40 are electrically connected.
  • the substrate can be selected according to actual needs, any substrate that can be applied to a display device, for example, a glass substrate.
  • a plurality of the above-described pixel structures may be arranged on the substrate in any feasible array form to form an array substrate, for example, may be arranged in a rectangular array.
  • the array substrate is a TFT array substrate.
  • the gate and gate insulating layers of the electronic switching device and the gate lines are both formed on the substrate.
  • the aperture ratio of the display device can be improved and the aperture ratio can be improved while reducing the color deviation. Picture quality.

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Abstract

一种像素结构（102）及阵列基板，像素结构（102）包括：电子开关器件（20）；像素电极（10），与电子开关器件（20）电性连接，像素电极（10）包括多个子像素电极区域（11），多个子像素电极区域（11）的透过率相异；栅极线（30），设置于像素电极（10）的一侧，与电子开关器件（20）电性连接；以及数据线（40），设置于像素电极（10）的另一侧，与电子开关器件（20）电性连接。

Description

一种像素结构及阵列基板
本申请要求于2018年02月26日提交中国专利局，申请号为201820271972.8，发明名称为“一种像素结构及阵列基板”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请属于显示技术领域，尤其涉及一种像素结构及阵列基板。
背景技术
这里的陈述仅提供与本申请有关的背景信息，而不必然构成现有技术。随着科学技术的不断发展，各种显示装置层出不穷，为人们的生产和生活带来了极大便利。例如，TFT-LCD(薄膜晶体管液晶显示器，thin film transistor-liquid crystal display)。通常采用多畴像素电极结构，来使液晶分子在配向后沿多个不同的方向倾斜，从而有效提高背光的透过率，可以适用于广视角显示装置，解决广视角显示装置的色偏现象。
采用多畴像素电极结构时，通常需要依靠多个薄膜晶体管对像素电极的不同区域分别进行开关控制，多个薄膜晶体管会占用较多的像素面积，从而降低整个显示装置的开口率，开口率的降低会降低显示装置的画面品质。
申请内容
有鉴于此，本申请实施例提供了一种像素结构及阵列基板，以解决包括但不限于：采用多畴像素电极结构时，通常需要依靠多个薄膜晶体管对像素电极的不同区域分别进行开关控制，多个薄膜晶体管会占用较多的像素面积，从而降低整个显示装置的开口率，开口率的降低会降低显示装置的显示效果的问题。
本申请实施例提供了一种像素结构，其包括：
电子开关器件；
像素电极，与所述电子开关器件电性连接，所述像素电极包括多个子像素电极区域，所述多个子像素电极区域的透过率相异；
栅极线，设置于所述像素电极的一侧，与所述电子开关器件电性连接；以及
数据线，设置于所述像素电极的另一侧，与所述电子开关器件电性连接。
在一个实施例中，所述子像素电极区域包括：
封闭式电极线边框，由多条边框电极线首尾连接构成，相邻的所述子像素电极区域共用一条边框电极线；以及
多条取向电极线，倾斜设置在所述封闭式电极线边框中，所述多条取向电极线相互平 行、线间距相同且线宽相同。
在一个实施例中，所述多个子像素电极区域中的若干子像素电极区域构成所述像素电极的主区域，剩余子像素电极区域构成所述像素电极的分区域；
其中，所述主区域中的所有子像素电极区域相互邻接，所述分区域中的所有子像素电极区域相互邻接，所述主区域中的取向电极线的线宽大于所述分区域中的取向电极线的线宽。
在一个实施例中，位于所述主区域和所述分区域交界处的边框电极线上开有狭缝。
在一个实施例中，所述主区域包括的子像素电极区域的数量等于所述分区域的子像素电极区域的数量。
在一个实施例中，所述主区域中的取向电极线的线间距大于所述分区域中的取向电极线的线间距。
在一个实施例中，所述主区域和所述分区域交界处的边框电极线上开有狭缝。
在一个实施例中，所述狭缝在所述边框电极线上通过镂空、刻蚀、切割工艺形成。
在一个实施例中，相邻的所述子像素电极区域中的取向电极线以共用的边框电极线为对称轴对称分布。
在一个实施例中，所述像素电极包括的子像素电极区域的数量大于或等于四个。
在一个实施例中，不同的子像素区域中的取向电极线的倾斜方向不同。
在一个实施例中，奇数行子像素电极区域中的取向电极线向左倾斜，偶数行子像素电极区域中的取向电极线向右倾斜；
或者，奇数列子像素电极区域中的取向电极线向左倾斜，偶数列子像素电极区域中的取向电极线向右倾斜。
在一个实施例中，所述一个电子开关器件包括栅极、漏极、源极和有源层，所述有源层设置在所述栅极与所述漏极和所述源极之间；
所述像素电极与所述漏极电性连接，所述栅极线与所述栅极电性连接，所述数据线与所述源极电性连接。
在一个实施例中，所述像素结构还包括：
栅绝缘层，设置在所述有源层与所述栅极和所述栅极线之间；
保护层，设置在所述像素电极与所述数据线、所述源极和所述漏极之间，所述像素电极通过所述保护层的过孔与所述漏极电性连接。
在一个实施例中，所述漏极和所述源极在所述有源层的一个表面形成，所述栅极在与所述源极和所述漏极相对的所述有源层的另一个表面所在的一侧形成，所述栅极、所述漏极、所述源极和所述有源层共同构成所述电子开关器件，所述栅极和所述栅极线形成在同 一层，所述源极和所述数据线形成在同一层。
在一个实施例中，所述有源层由多层不同类型的半导体材料构成。
在一个实施例中，所述有源层是由三层不同类型的半导体材料构成的有机半导体有源层。
在一个实施例中，所述电子开关器件的栅极和源极之间形成有寄生电容。
在一个实施例中，相邻的子像素电极区域交界处的边框电极线上开有狭缝。
本申请还提供一种阵列基板，其包括：
基板；以及
多个像素结构，所述像素结构设置于所述基板且呈阵列形式排布，相邻的所述栅极线电连接且相邻的所述数据线电连接；
其中，所述像素结构包括：
电子开关器件；
像素电极，与所述电子开关器件电性连接，所述像素电极包括多个子像素电极区域，所述多个子像素电极区域的透过率相异；
栅极线，设置于所述像素电极的一侧，与所述电子开关器件电性连接；以及
数据线，设置于所述像素电极的另一侧，与所述电子开关器件电性连接。
本申请实施例通过提供一种仅包括一个电子开关器件的像素结构，并将像素电极划分为多个子像素电极区域，使不同的子像素电极区域的透过率不同，可以有效减少显示色彩偏差并提高开口率，从而提高画面品质。
附图说明
为了更清楚地说明本申请实施例中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本申请的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动性的前提下，还可以根据这些附图获得其他的附图。
图1是本申请的一个实施例提供的像素电极的结构示意图；
图2是本申请的另一个实施例提供的像素电极的结构示意图；
图3是本申请的一个实施例提供的像素结构的结构示意图；
图4是本申请的另一个实施例提供的像素结构的结构示意图；
图5是本申请的一个实施例提供的阵列基板的结构示意图。
具体实施方式
为了使本技术领域的人员更好地理解本申请方案，下面将结合本申请实施例中的附图， 对本申请实施例中的技术方案进行清楚地描述，显然，所描述的实施例是本申请一部分的实施例，而不是全部的实施例。基于本申请中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都应当属于本申请保护的范围。
本申请的说明书和权利要求书及上述附图中的术语“包括”以及它们任何变形，意图在于覆盖不排他的包含。例如包含一系列步骤或单元的过程、方法或***、产品或设备没有限定于已列出的步骤或单元，而是可选地还包括没有列出的步骤或单元，或可选地还包括对于这些过程、方法、产品或设备固有的其它步骤或单元。此外，术语“第一”、“第二”和“第三”等是用于区别不同对象，而非用于描述特定顺序。
如图1所示，本申请实施例提供一种像素电极10，其应用于单个像素、阵列基板或显示装置时，只需要与开关器件电性连接，即可在有效减少色彩偏差的前提下，实现对单个像素的液晶分子的驱动，从而减少采用多畴像素电极结构时，需要的电子开关器件个数，提高透光面积在整个像素面积中的占比，降低开口率；其中，开口率＝透光面积/像素面积。
在应用中，电子开关器件可以为任意的可以适用于显示装置的能够实现电子开关作用的器件，例如，双极性结型晶体管(bipolar junction transistor，BJT)、场效应晶体管(Field Effect Transistor，FET)或薄膜晶体管(Thin Film Transistor，TFT)等。当应用于液晶显示器时，可以选用薄膜晶体管。
在一个实施例中，所述像素电极与所述电子开关器件的漏电极电性连接。
如图1所示，在本实施例中，像素电极10包括多个子像素电极区域，不同的子像素电极区域的透过率相异。
在应用中，子像素电极区域的数量可以根据实际需要进行设置，子像素电极区域的个数即为像素电极的畴数，例如，两畴像素电极包括两个子像素电极区域，四畴像素电极包括四个子像素电极区域，八畴像素电极包括八个子像素电极区域。
在一个实施例中，所述像素电极包括的子像素电极区域的数量大于或等于四个。
图1中，示例性的示出像素电极10包括八个子像素电极区域11。
在应用中，子像素电极区域可以按照任意方式划分，即像素电极中的子像素区域可以按照任意形式排列，只要所有子像素区域整体上构成一个完整的像素电极即可。子像素区域的形状也可以按照任意方式设置，只要保证不同的子像素区域不重叠即可。
在应用中，为了使液晶分子在配向后有规律的沿多个不同的方向倾斜，而不是杂乱无章的倾斜，可以尽量的将像素电极划分为多个规则排列且对称分布的子像素区域，并且还应当尽量的将子像素区域设置为规则的形状，例如，三角形、四边形、正五边形或正六边形等。
图1中，示例性的示出子像素电极区域11为矩形。
如图1所示，在本实施例中，子像素电极区域10包括封闭式电极线边框111和多条取向电极线112；
其中，封闭式电极线边框111由多条边框电极线首尾连接构成，相邻的子像素电极区域共用一条边框电极线；
多条取向电极线112倾斜设置在封闭式电极线边框112中，多条取向电极线112相互平行、线间距相同且线宽相同；
不同的子像素电极区域111中的取向电极线112的倾斜方向、线间距或线宽不同。
在应用中，取向电极线的作用是通过对其对应的液晶分子施加电压，限定其对应的液晶分子的倾斜方向，通常液晶分子的倾斜方向与其对应的取向电极线相同或者具有对应关系。
在应用中，取向电极线的线宽越宽、线间距越小，其对应的液晶像素的透过率越高；反之，线宽越小、线间距越大，其对应的液晶像素的透过率越低；其中，透过率＝子像素电极区域的所有电极线的面积之和/子像素电极区域的面积。
图1中，示例性的示出了八个子像素区域中，上部四个子像素电极区域11中的取向电极线112的线宽和线间距都相同，下部四个子像素电极区域11中的取向电极线112的线宽线间距都相同。
在一个实施例中，多个子像素电极区域中的若干子像素电极区域构成所述像素电极的主区域，剩余子像素电极区域构成所述像素电极的分区域；
其中，所述主区域中的所有子像素电极区域相互邻接，所述分区域中的所有子像素电极区域相互邻接，所述主区域中的取向电极线的线间距大于所述分区域中的取向电极线的线间距，所述主区域中的取向电极线的线宽大于所述分区域中的取向电极线的线宽。
通过采用线宽和线间距较大的子像素电极区域作为主区域，可以实现主区域对应的液晶像素区域的高透过率，从而可以降低该液晶像素区域的色彩偏差。
图1中，示例性的示出上部四个子像素电极区域11中的取向电极线112的线宽和线间距均大于下部四个子像素电极区域11中的取向电极线112的线宽和线间距。
在应用中，每个子像素电极区域中取向电极线的倾斜方向都可根据实际需要进行设置，不同的子像素区域中的取向电极线的倾斜方向可以相同也可以不同。为了使整个像素电极对应的像素能实现均匀有规律的显示效果，应当尽量的使各子像素电极区域中的取向电极线的倾斜方向有规律的设置。例如，奇数行(或列)子像素电极区域中的取向电极线全都向左倾斜一定角度，偶数行(或列)子像素电极区域中的取向电极线全都向右倾斜一定角 度；在行或列方向上相邻的子像素电极区域中的取向电极线以共用的边框电极线为对称轴对称分布等。
图1中，示例性的示出了相邻的子像素电极区域中的取向电极线以共用的边框电极线为对称轴对称分布；其中，左上角的子像素电极区域中的取向电极线向左倾斜，右上角的子像素电极区域中的取向电极线向右倾斜，其他子像素电极区域中的取向电极线的倾斜方向依此类推，此处不再赘述。
在应用中，为了减小色彩偏差，除了通过图1所示的结构实现外，还可以通过尽量的增大主区域的面积、减小分区域的面积来实现。
如图2所示，在一个实施例中，图1中的像素电极10的主区域和分区域交界处的边框电极线上开有狭缝113，即第二行第一列的子像素电极区域和第三行第一列的子像素电极区域之间的边框电极线上开有狭缝，第二行第二列的子像素电极区域和第三行第二列的子像素电极区域之间的边框电极线上开有狭缝。
在应用中，狭缝可以是在一根完整的边框电极线上通过镂空、刻蚀、切割等工艺形成的，也可以是在两根边框电极线之间留出一定的间隙形成的，同理，整个像素电极上的狭缝均可以是在一片完整的像素电极上通过镂空、刻蚀、切割等工艺形成的，也可以是在相邻的取向电极线之间留出一定的间隙形成的。
本实施例中通过在主区域和分区域之间留出一定的间隙，可以使主区域和分区域之间的液晶分子的倾斜方向互不干扰。
在一个实施例中，相邻的子像素电极区域交界处的边框电极线上开有狭缝。通过在任意相邻的子像素电极区域之间留出一定间隙，可以使任意相邻的子像素电极区域之间的液晶分子的倾斜方向都互不干扰。
如图3或4所示，本申请的一个实施例提供一种像素结构，其包括上述的像素电极10、一个电子开关器件20、栅极线30和数据线40；
像素电极10与电子开关器件20电性连接，栅极线30设置于像素电极10的一侧且与电子开关器件20电性连接，数据线40设置于像素电极10的另一侧且与电子开关器件20电性连接。
如图3或4所示，在本实施例中，电子开关器件20包括栅极(图中未示出)、漏极21、源极22和有源层23，有源层23设置在栅极与漏极21和源极22之间，栅极与栅极线30电性连接，漏极21与像素电极10电性连接，源极22与数据线40电性连接。
图3示例性的示出了基于图1所示的像素电极实现的像素结构，图4示例性的示出了基于图2所示的像素电极实现的像素结构。
在应用中，电子开关器件的栅极和源极之间形成有寄生电容。
在应用中，漏极和源极在有源层的一个表面形成，栅极在与源极和漏极相对的有源层的另一个表面所在的一侧形成，栅极、漏极、源极和有源层共同构成电子开关器件，栅极和栅极线形成在同一层，源极和数据线形成在同一层。
在应用中，有源层由多层不同类型的半导体材料构成，例如，由三层不同类型的半导体材料构成的有机半导体有源层。
在一个实施例中，像素结构还包括栅绝缘层和保护层；其中，栅绝缘层设置在所述有源层与所述栅极和所述栅极线之间；保护层设置在所述像素电极与所述数据线、所述源极和所述漏极之间，所述像素电极通过所述保护层的过孔与所述漏极电性连接。
在应用中，栅绝缘层形成在有源层和栅极之间，将有源层和栅极间隔开，实现绝缘。数据线、源极和漏极形成在保护层一侧，像素电极形成在保护层另一侧，保护层上开有过孔，像素电极通过过孔与漏电极电性连接。
在一个实施例中，像素结构还包括、设置在保护层相对像素电极一侧的第一取向层，第一取向层上设置有封框胶，封框胶构成的区域中滴注有液晶，液晶上方依次设置有第二取向层、公共电极和彩膜。
在应用中，一个电子开关器件仅与一条栅极线和一条数据线连接，即本实施例所提供的像素结构仅包括一条栅极线和一条数据线。一个像素所在区域通常是由两条栅极线和两条数据线所围成的区域。
如图3或4所示，示例性的示出了两条栅极线30和两条数据线40；其中；一条栅极线30设置于像素电极10的上侧，另一条栅极线20设置于像素电极10的下侧，一条数据线40设置于像素电极10的左侧，另一条数据线40设置于像素电极10的右侧。
应当理解的是，图3或4中栅极线和数据线相交的地方仅代表二者在位置上相交而非电性连接。
如图5所示，本申请的一个实施例还提供一种阵列基板，其包括：
基板101；以及
多个上述的像素结构102，像素结构设置于基板101且呈阵列形式排布，相邻的栅极线30电连接且相邻的数据线40电连接。
在应用中，基板可以根据实际需要选用任意能够适用于显示装置的基板，例如，玻璃基板。
在应用中，多个上述的像素结构可以任意可行的阵列形式排布在基板上构成阵列基板，例如，可以以矩形阵列的形式排布。当电子开关器件为薄膜晶体管时，该阵列基板为TFT 阵列基板。
如图5所示，示例性的示出了呈矩形阵列形式排布的十二个像素结构102。
在一个实施例中，电子开关器件的栅极和栅绝缘层以及栅极线都形成在基板上。
本实施例通过在显示装置中采用多畴像素电极结构来控制液晶分子的倾斜角度，并使一个像素电极仅连接一个电子开关器件，可以在减少色彩偏差的同时，提高显示装置的开口率，提高画面质量。
以上所述仅为本申请的可选实施例而已，并不用以限制本申请，凡在本申请的精神和原则之内所作的任何修改、等同替换和改进等，均应包含在本申请的保护范围之内。

Claims (20)

  1. 一种像素结构，其中包括：
    电子开关器件；
    像素电极，与所述电子开关器件电性连接，所述像素电极包括多个子像素电极区域，所述多个子像素电极区域的透过率相异；
    栅极线，设置于所述像素电极的一侧，与所述电子开关器件电性连接；以及
    数据线，设置于所述像素电极的另一侧，与所述电子开关器件电性连接。
  2. 如权利要求1所述的像素结构，其中，所述子像素电极区域包括：
    封闭式电极线边框，由多条边框电极线首尾连接构成，相邻的所述子像素电极区域共用一条边框电极线；以及
    多条取向电极线，倾斜设置在所述封闭式电极线边框中，所述多条取向电极线相互平行、线间距相同且线宽相同。
  3. 如权利要求2所述的像素结构，其中，所述多个子像素电极区域中的若干子像素电极区域构成所述像素电极的主区域，剩余子像素电极区域构成所述像素电极的分区域；
    其中，所述主区域中的所有子像素电极区域相互邻接，所述分区域中的所有子像素电极区域相互邻接，所述主区域中的取向电极线的线宽大于所述分区域中的取向电极线的线宽。
  4. 如权利要求3所述的像素结构，其中，位于所述主区域和所述分区域交界处的边框电极线上开有狭缝。
  5. 如权利要求3所述的像素结构，其中，所述主区域包括的子像素电极区域的数量等于所述分区域的子像素电极区域的数量。
  6. 如权利要求3所述的像素结构，其中，所述主区域中的取向电极线的线间距大于所述分区域中的取向电极线的线间距。
  7. 如权利要求3所述的像素结构，其中，所述主区域和所述分区域交界处的边框电极线上开有狭缝。
  8. 如权利要求7所述的像素结构，其中，所述狭缝在所述边框电极线上通过镂空、刻蚀、切割工艺形成。
  9. 如权利要求2所述的像素结构，其中，相邻的所述子像素电极区域中的取向电极线以共用的边框电极线为对称轴对称分布。
  10. 如权利要求2所述的像素结构，其中，所述像素电极包括的子像素电极区域的数量大于或等于四个。
  11. 如权利要求2所述的像素结构，其中，不同的子像素区域中的取向电极线的倾斜 方向不同。
  12. 如权利要求2所述的像素结构，其中，奇数行子像素电极区域中的取向电极线向左倾斜，偶数行子像素电极区域中的取向电极线向右倾斜；
    或者，奇数列子像素电极区域中的取向电极线向左倾斜，偶数列子像素电极区域中的取向电极线向右倾斜。
  13. 如权利要求1所述的像素结构，其中，所述一个电子开关器件包括栅极、漏极、源极和有源层，所述有源层设置在所述栅极与所述漏极和所述源极之间；
    所述像素电极与所述漏极电性连接，所述栅极线与所述栅极电性连接，所述数据线与所述源极电性连接。
  14. 如权利要求13所述的像素结构，所述像素结构还包括：
    栅绝缘层，设置在所述有源层与所述栅极和所述栅极线之间；
    保护层，设置在所述像素电极与所述数据线、所述源极和所述漏极之间，所述像素电极通过所述保护层的过孔与所述漏极电性连接。
  15. 如权利要求13所述的像素结构，其中，所述漏极和所述源极在所述有源层的一个表面形成，所述栅极在与所述源极和所述漏极相对的所述有源层的另一个表面所在的一侧形成，所述栅极、所述漏极、所述源极和所述有源层共同构成所述电子开关器件，所述栅极和所述栅极线形成在同一层，所述源极和所述数据线形成在同一层。
  16. 如权利要求14所述的像素结构，其中，所述有源层由多层不同类型的半导体材料构成。
  17. 如权利要求16所述的像素结构，其中，所述有源层是由三层不同类型的半导体材料构成的有机半导体有源层。
  18. 如权利要求1所述的像素结构，其中，所述电子开关器件的栅极和源极之间形成有寄生电容。
  19. 如权利要求1所述的像素结构，其中，相邻的子像素电极区域交界处的边框电极线上开有狭缝。
  20. 一种阵列基板，其中，包括：
    基板；以及
    多个像素结构，所述像素结构设置于所述基板且呈阵列形式排布，相邻的所述栅极线电连接且相邻的所述数据线电连接；
    其中，所述像素结构包括：
    电子开关器件；
    像素电极，与所述电子开关器件电性连接，所述像素电极包括多个子像素电极区域， 所述多个子像素电极区域的透过率相异；
    栅极线，设置于所述像素电极的一侧，与所述电子开关器件电性连接；以及
    数据线，设置于所述像素电极的另一侧，与所述电子开关器件电性连接。
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