WO2019061950A1 - 显示面板的驱动装置及驱动方法 - Google Patents

显示面板的驱动装置及驱动方法 Download PDF

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Publication number
WO2019061950A1
WO2019061950A1 PCT/CN2018/072193 CN2018072193W WO2019061950A1 WO 2019061950 A1 WO2019061950 A1 WO 2019061950A1 CN 2018072193 W CN2018072193 W CN 2018072193W WO 2019061950 A1 WO2019061950 A1 WO 2019061950A1
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Prior art keywords
signal
row
pixel array
level
pixels
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PCT/CN2018/072193
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English (en)
French (fr)
Inventor
黄北洲
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惠科股份有限公司
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Priority to US16/651,586 priority Critical patent/US10984738B2/en
Publication of WO2019061950A1 publication Critical patent/WO2019061950A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3674—Details of drivers for scan electrodes
    • G09G3/3677—Details of drivers for scan electrodes suitable for active matrices only
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0202—Addressing of scan or signal lines
    • G09G2310/0205—Simultaneous scanning of several lines in flat panels
    • G09G2310/021—Double addressing, i.e. scanning two or more lines, e.g. lines 2 and 3; 4 and 5, at a time in a first field, followed by scanning two or more lines in another combination, e.g. lines 1 and 2; 3 and 4, in a second field
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0202—Addressing of scan or signal lines
    • G09G2310/0218—Addressing of scan or signal lines with collection of electrodes in groups for n-dimensional addressing
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0224—Details of interlacing
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/0281—Arrangement of scan or data electrode driver circuits at the periphery of a panel not inherent to a split matrix structure
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/0283—Arrangement of drivers for different directions of scanning
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/0286—Details of a shift registers arranged for use in a driving circuit

Definitions

  • the embodiments of the present application belong to the field of display technologies, and in particular, to a driving device and a driving method for a display panel.
  • display devices such as liquid crystal panels and displays are constantly developing in the direction of thinness, large screen, low power consumption, and low cost.
  • Large-size display panels have been widely used due to their good visual effects, and have become a development trend of display panels.
  • the current large-size display panels are usually driven by a single-sided driving method, and the gate driving chips are distributed on the same side of the pixel array of the display panel, and the pixel array is scanned and driven, resulting in the other side of the pixel array. There may be insufficient charging or poor charging due to signal delay, which seriously affects the display effect of the display panel.
  • the present application provides a driving device and a driving method for a display panel, which are intended to solve the problem that the current large-size display panels are generally driven by a single-sided driving method, and the gate driving chips are all distributed on the same side of the pixel array of the display panel. Scanning the pixel array causes the other side of the pixel array to be undercharged or poorly charged due to signal delay, which seriously affects the display effect of the display panel.
  • the present application provides a driving device for a display panel, the display panel includes a pixel array, and the driving device includes: at least one first gate driving module and at least one second gate driving module.
  • the at least one first gate driving module is disposed on one side of the pixel array, and is connected to the odd-numbered pixels of the pixel array for driving the odd-numbered rows of pixels of the pixel array row by row;
  • a second gate driving module is disposed on the other side of the pixel array and connected to the even-numbered rows of pixels of the pixel array for driving the even-numbered rows of pixels of the pixel array row by row.
  • the first gate driving module and the second gate driving module include: an input buffer unit, a shift register unit, a level converting unit, and an output buffer unit.
  • the input buffer unit is configured to input a shift control signal, a first control signal, and a second control signal.
  • the shift register The unit is connected to the input buffer unit, and is configured to sequentially move the received first level signal and the second level signal bit by bit; the level converting unit and the shift register unit a connection for level-shifting the first level signal and the second level signal output by the shift register unit to change a voltage level of the first level signal and the second level signal; Place The output buffer unit is respectively connected to the row pixels of the pixel array and the level conversion unit, and is configured to buffer the level-converted first level signal and the second level signal and output the
  • the shift register unit is a bidirectional shift register; the input buffer unit is further configured to input a first direction setting signal and a second direction setting signal, and when the first direction setting signal is input And setting a signal moving direction of the bidirectional shift register to a first direction; and when inputting the second direction setting signal, setting a signal moving direction of the bidirectional shift register to a second direction.
  • the first direction setting signal and the second direction setting signal are level signals.
  • the first control signal and the second control signal are level signals.
  • the shift control signal is a pulse signal.
  • the application further provides a driving device for a display panel, the display panel comprising a pixel array, the driving device comprising: at least two first gate driving modules and at least two second gate driving modules.
  • the at least two first gate driving modules are disposed on one side of the pixel array, wherein one of the first gate driving modules is connected to a front i row of odd rows of pixels of the pixel array, and the remaining a gate driving module connected to the remaining odd row pixels of the pixel array for driving the odd row pixels of the pixel array row by row; wherein i ⁇ 1 and being a positive integer; the at least two second a gate driving module disposed on the other side of the pixel array, wherein one of the second gate driving modules is connected to a front row of pixels of an even row of pixels of the pixel array, and the second gate driving module remains And connecting the remaining even row pixels of the pixel array for driving the even row pixels of the pixel array row by row; wherein j ⁇ 1 and being a positive integer.
  • the present application further provides a driving method of a display panel, the display panel includes a pixel array, and the driving method includes: providing at least one first gate driving module on one side of the pixel array, such that the first gate a pole driving module is connected to the odd row pixels of the pixel array, controlling the first gate driving module to drive the odd row pixels of the pixel array row by row; and setting at least one on the other side of the pixel array
  • the second gate driving module is configured to connect the second gate driving module to the even-numbered rows of pixels of the pixel array, and control the second gate driving module to drive the even-numbered rows of pixels of the pixel array row by row.
  • the gate driving module is disposed on both sides of the pixel array, and the odd row pixels and the even row pixels of the pixel array are respectively driven row by row, so that the interleaved double gate driving of all the row pixels of the pixel array can be realized.
  • the charging of the left and right sides of the pixel array is uniform, which can effectively reduce the visual difference caused by the difference in charging time between the pixels on the left and right sides of the pixel array, thereby improving the visual display effect of the pixel array.
  • FIG. 1 is a schematic structural diagram of a driving device of a display panel according to an embodiment of the present application
  • FIG. 2 is a schematic structural diagram of a first gate driving module and a second gate driving module according to an embodiment of the present application;
  • FIG. 3 is a timing diagram of operation signals of a first gate driving module and a second gate driving module according to an embodiment of the present application;
  • FIG. 4 is a block flow diagram of a driving method provided by an embodiment of the present application.
  • an embodiment of the present application provides a driving device 100 for a display panel for driving a display panel 10 , the display panel 10 including a pixel array composed of a plurality of rows of pixels and a plurality of columns of pixels, the display panel
  • the driving device includes at least one first gate driving module 20 and at least one second gate driving module 30.
  • the pixel array is exemplarily shown to include N rows of pixels, where N is greater than 1 and both are positive integers, and the pixels are exemplarily represented in FIG.
  • the first gate driving module 20 is disposed on one side of the pixel array and connected to the odd-numbered rows of pixels of the pixel array for driving the odd-numbered rows of pixels of the pixel array row by row.
  • the second gate driving module 30 is disposed on the other side of the pixel array and connected to the even-numbered rows of pixels of the pixel array for driving the even-numbered rows of pixels of the pixel array row by row.
  • the driving device includes two first gate driving modules and two second gate driving modules, wherein one first gate driving module is connected to the front i rows of the odd row pixels of the pixel array, and the other The first gate driving module is connected to the remaining odd row pixels of the pixel array; wherein one second gate driving module is connected to the first j rows of the even row pixels of the pixel array, and the other second gate driving module and the remaining of the pixel array Even-numbered pixel connections; where i, j ⁇ 1 and i, j are positive integers.
  • the one side and the other side in this embodiment are relative to the setting direction of the row pixels of the pixel array. In practical applications, it is only required to ensure that the first gate driving module and the second gate driving module are respectively connected to the pixels. Both ends of the row pixels of the array can be used.
  • the number of the first gate driving module and the second gate driving module may be set according to actual needs, specifically, the number of rows of pixels of the pixel array, the first gate driving module, and the second gate driving module.
  • the number of gate drive lines and the driving mode are related.
  • the pixel array includes 50 rows of pixels (25 rows of odd row pixels and 25 rows of even rows of pixels), gate drive lines of the first gate driving module and the second gate driving module.
  • the number is all 10. If the tri-gate transistor driving method is adopted, the data of the first gate driving module and the second gate driving module are required to be three, and the first gate is required if the double gate driving mode is adopted.
  • the number of the pole drive module and the second gate drive module is two; if the number of gate drive lines of the first gate drive module is 25, and the number of gate drive lines of the second gate drive module is 10, In the three-gate transistor driving mode, the number of first gate driving modules required is one, and the data of the second gate driving module is three. When the dual gate driving mode is used, the first gate driving module is required. The number of the second gate drive modules is two.
  • the number of first gate drive modules and second gate drive modules is equal.
  • the number of the first gate driving module 20 and the second gate driving module 30 is exemplarily shown to be two.
  • N is an odd number
  • one of the first gate driving modules 20 is for driving the first plurality of odd-line pixels including the pixels of the first row
  • the other first gate driving module 20 is for driving the pixel including the Nth row.
  • the manner in which the pixel array is driven row by row by the above interleaved bilateral driving module is specifically:
  • all the pixels included in the first row of pixels are driven one by one from left to right through the gate driving module located on one side of the pixel array, and then passed through the gate driving circuit module located on the other side of the pixel array.
  • All the pixels included in the pixels of the second row are driven one by one from right to left, and then all the pixels included in the first row of pixels are driven one by one from the left to the right by the gate driving module located on one side.
  • all the pixels included in the fourth row of pixels are driven one by one from right to left through the gate driving circuit module located on the other side of the pixel array, and so on, until all the pixels of the entire pixel array are completed.
  • Point drive is
  • the interleaved bilateral driving module provided in this embodiment can realize the interleaved double-sided gate driving of the pixel array, so that the left and right sides of the pixel array are uniformly charged, and the pixel array can be effectively reduced.
  • the difference in charging time between the side pixels causes a visual difference, thereby improving the visual display effect of the pixel array.
  • the first gate driving module 20 and the second gate driving module 30 each include an input buffer unit 101, a shift register unit 102, a level converting unit 103, and an output. Buffer unit 104.
  • the units included in the first gate driving module 20 and the second gate driving module 30 are only the same in operation principle, but the first gate driving module 20 and the second gate driving module 30 are The number of gate drive lines included can be set differently according to actual needs.
  • the input buffer unit 101 is configured to input a shift control signal, a first control signal, and a second control signal.
  • the shift control signal rises.
  • the rising edge outputs a second level signal, and the first level signal is output on the falling edge of the shift control signal.
  • the input buffer unit 101 is exemplarily provided with a control terminal R/F and a shift control terminal CKV, and the shift control terminal CKV is used for inputting a shift control signal, and the control terminal R/ F is used to input the first control signal and the second control signal.
  • the first level signal is a high level signal and the second level signal is a low level signal.
  • the input buffer unit further includes a trigger signal terminal STV for inputting a driving start signal, and a pull-down signal terminal OE for pulling the driving signal output to all the row pixels for using all the row pixels
  • the drive signal pulls up the pull-up signal terminal /XAO and the channel select terminal MODE for selecting the number of channels for outputting the drive signal.
  • the input buffer unit 101 is exemplarily shown in the embodiment to be provided with a pull-down signal terminal OE and a pull-up signal terminal /XAO.
  • the shift control signal is a pulse signal.
  • the first control signal and the second control signal are level signals, wherein the first control signal is a high level signal and the second control signal is a low level signal.
  • the input buffer unit may be a buffer, or other buffer storage device having the same buffer storage function, and is not specifically limited in this embodiment.
  • the shift register unit 102 is connected to the input buffer unit 101 for sequentially transmitting the received first level signal and the second level signal bit by bit and outputting.
  • the shift register unit is a bidirectional shift register; the input buffer unit is further configured to input a first direction setting signal and a second direction setting signal, and when the first direction setting signal is input, the The signal moving direction of the bidirectional shift register is set to a first direction, so that the bidirectional shift register sequentially shifts the first level signal and the second level signal bit by bit to the first direction; and outputs the second direction
  • the signal moving direction of the bidirectional shift register is set to the second direction, so that the bidirectional shift register sequentially shifts the first level signal and the second level signal to the second direction and outputs.
  • the bidirectional shift register is used in the above embodiment because when it is respectively disposed on one side and the other side of the pixel array, it is necessary to output driving signals from two completely opposite directions to drive the pixel array, thereby adopting
  • the bidirectional shift register may be such that the register can be disposed on one side of the pixel array or on the other side without separately using shift registers having different driving directions.
  • the first direction specifically refers to the direction from the first signal output end of the bidirectional shift register to the last signal output end
  • the second direction specifically refers to the last signal output end of the bidirectional shift register to the first The direction of a signal output.
  • the input buffer unit 101 is exemplarily shown with a shift direction setting end L/R for inputting the first direction setting signal and the second.
  • Direction setting signal As shown in FIG. 2, in the present embodiment, the input buffer unit 101 is exemplarily shown with a shift direction setting end L/R for inputting the first direction setting signal and the second.
  • Direction setting signal As shown in FIG. 2, in the present embodiment, the input buffer unit 101 is exemplarily shown with a shift direction setting end L/R for inputting the first direction setting signal and the second. Direction setting signal.
  • the first direction setting signal and the second direction setting signal are level signals, wherein the first direction setting signal is a high level signal and the second direction setting signal is a low level signal.
  • the input buffer unit includes a first trigger signal terminal STV1 for triggering the gate drive module to sequentially output a drive signal from its first signal output terminal to the last signal output terminal, and in this case for selecting the output a first channel selection terminal MODE1 of the number of channels of the driving signal; a second trigger signal terminal STV2 for triggering the gate driving module to sequentially output a driving signal from the last signal output terminal thereof to the first signal output terminal and used for In the case, the second channel selection terminal MODE2 for selecting the number of channels for outputting the drive signal.
  • the level converting unit 103 is connected to the shift register unit 102 for level-converting the first level signal and the second level signal output from the shift register unit 102 to change the first level signal and the second level.
  • the voltage level of the flat signal is connected to the shift register unit 102 for level-converting the first level signal and the second level signal output from the shift register unit 102 to change the first level signal and the second level. The voltage level of the flat signal.
  • the level shifting unit can be a level shifter or a circuit or device having an equivalent level shifting function.
  • the output buffer unit 104 is respectively connected to the row pixels of the pixel array and the level converting unit 103 for buffering the level-converted first level signal and the second level signal and outputting to the row pixels of the pixel array.
  • the input buffer unit inputs the first control signal, the odd-numbered rows of pixels of the pixel array are driven row by row; when the input buffer unit inputs the second control signal, the even-numbered rows of pixels of the pixel array are driven row by row.
  • the output buffer unit may be a buffer, or other buffer storage device having the same buffer storage function, and is not specifically limited in this embodiment.
  • the output buffer unit 104 is exemplarily shown in the embodiment to include a total of n signal outputs of out1, out2, out3, ..., out n, where n ⁇ 1 and n is a positive integer.
  • FIG. 3 exemplarily shows that the first gate driving module 20 drives the 1, 3, 5, . . . , N-1 rows of pixels and the second gate driving module 30 to drive 2, 4, 6, ..., N rows of pixels.
  • the direction of the output driving signal of the gate driving module can be controlled according to the input control signal, so that the gate driving module can be disposed in the pixel array.
  • One side can also be disposed on the other side, so that it is not necessary to provide two different gate driving modules with different driving directions in the driving device, which simplifies the assembly process, improves assembly efficiency, and improves the devices. Compatibility between.
  • An embodiment of the present application further provides a driving device for a display panel, wherein the display panel includes an array of pixels, and the driving device includes:
  • At least two first gate driving modules are disposed on one side of the pixel array, wherein one first gate driving module is connected to the first i rows of the odd row pixels of the pixel array, and the remaining first gate driving module and the pixel array are Remaining odd-line pixel connections for driving the odd-numbered rows of pixels of the pixel array row by row; wherein i ⁇ 1 and being a positive integer;
  • At least two second gate driving modules are disposed on the other side of the pixel array, wherein one second gate driving module is connected to the first j rows of the even row pixels of the pixel array, and the remaining second gate driving module and the pixel array remain The remaining even rows of pixel connections are used to drive the even-numbered rows of pixels of the pixel array row by row; where j ⁇ 1 and are positive integers.
  • an embodiment of the present application further provides a driving method of a display panel, wherein the display panel includes a pixel array, and the driving method includes:
  • Step S1 at least one first gate driving module is disposed on one side of the pixel array, the first gate driving module is connected to the odd-numbered rows of pixels of the pixel array, and the first gate driving module is controlled to perform the odd-numbered pixels of the pixel array. Drive line by line;
  • Step S2 disposing at least one second gate driving module on the other side of the pixel array, connecting the second gate driving module to the even row pixels of the pixel array, and controlling the second row driving module to the even row pixels of the pixel array Drive line by line.
  • the above driving method is implemented based on the driving device in the foregoing embodiment.
  • control step in the above driving method is performed by a control module, and the control module may specifically be a Timer/Counter Control Register (TCON, a screen driver board), and other functions have corresponding functions.
  • TCON Timer/Counter Control Register
  • the circuit or device is not particularly limited in its embodiment.
  • modules or units in all embodiments of the present application may be implemented by a general-purpose integrated circuit, such as a CPU (Central Processing Unit), or an ASIC (Application Specific Integrated Circuit). achieve.
  • a general-purpose integrated circuit such as a CPU (Central Processing Unit), or an ASIC (Application Specific Integrated Circuit).
  • the storage medium may be a magnetic disk, an optical disk, a read-only memory (ROM), or a random access memory (RAM).

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  • Crystallography & Structural Chemistry (AREA)
  • Physics & Mathematics (AREA)
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  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

一种显示面板（10）的驱动装置（100）及驱动方法，显示面板（10）包括像素阵列，驱动装置（100）包括：至少一个第一栅极驱动模块（20），设置在像素阵列的一侧，与像素阵列的奇数行像素连接，用于对像素阵列的奇数行像素进行逐行驱动；以及至少一个第二栅极驱动模块（30），设置在像素阵列的另一侧，与像素阵列的偶数行像素连接，用于对像素阵列的偶数行像素进行逐行驱动。

Description

显示面板的驱动装置及驱动方法 技术领域
本申请实施例属于显示技术领域，尤其涉及一种显示面板的驱动装置及驱动方法。
背景技术
随着显示技术的不断发展，液晶面板、显示器等显示设备不断向着轻薄化、大屏化、低功耗、低成本的方向发展。大尺寸显示面板因其良好的视觉效果，而被广泛使用，成为显示面板的一种发展趋势。
然而，目前的大尺寸显示面板通常都采用单边驱动方式来驱动，将栅极驱动芯片都分布设置在显示面板的像素阵列的同一侧，对像素阵列进行扫描驱动，导致像素阵列的另一侧会因为信号延时而存在充电不足或充电较差的情况，严重影响了显示面板的显示效果。
发明内容
本申请提供一种显示面板的驱动装置及驱动方法，旨在解决目前的大尺寸显示面板通常都采用单边驱动方式来驱动，将栅极驱动芯片都分布设置在显示面板的像素阵列的同一侧，对像素阵列进行扫描驱动，导致像素阵列的另一侧会因为信号延时而存在充电不足或充电较差的情况，严重影响了显示面板的显示效果的问题。
本申请提供一种显示面板的驱动装置，所述显示面板包括像素阵列，所述驱动装置包括：至少一个第一栅极驱动模块以及至少一个第二栅极驱动模块。所述至少一个第一栅极驱动模块设置在所述像素阵列的一侧，与所述像素阵列的奇数行像素连接，用于对所述像素阵列的奇数行像素进行逐行驱动；所述至少一个第二栅极驱动模块，设置在所述像素阵列的另一侧，与所述像素阵列的偶数行像素连接，用于对所述像素阵列的偶数行像素进行逐行驱动。
在一个实施例中，所述第一栅极驱动模块和所述第二栅极驱动模块包括：输入缓冲单元、移位寄存器单元、电平转换单元以及输出缓冲单元。所述输入缓冲单元用于输入移位控制信号、第一控制信号和第二控制信号，在输入 所述第一控制信号时，若所述驱动装置开始对所述像素阵列进行逐行驱动，则在所述移位控制信号的上升沿输出第一电平信号，在所述移位控制信号的下降沿输出第二电平信号；在输入所述第二控制信号时，若所述驱动装置开始对所述像素阵列进行逐行驱动，则在所述移位控制信号的上升沿输出第二电平信号，在所述移位控制信号的下降沿输出第一电平信号；所述移位寄存器单元与所述输入缓冲单元连接，用于将接收到的所述第一电平信号和所述第二电平信号依次逐位移动后输出；所述电平转换单元与所述移位寄存器单元连接，用于对所述移位寄存器单元输出的第一电平信号和第二电平信号进行电平转换，以改变所述第一电平信号和所述第二电平信号的电压大小；所述输出缓冲单元分别与所述像素阵列的行像素和所述电平转换单元连接，用于对电平转换后的所述第一电平信号和所述第二电平信号进行缓冲后输出至所述像素阵列的行像素，以在所述输入缓冲单元输入所述第一控制信号时，对所述像素阵列的奇数行像素进行逐行驱动；在所述输入缓冲单元输入所述第二控制信号时，对所述像素阵列的偶数行像素进行逐行驱动。
在一个实施例中，所述移位寄存器单元为双向移位寄存器；所述输入缓冲单元还用于输入第一方向设置信号和第二方向设置信号，并在输入所述第一方向设置信号时，将所述双向移位寄存器的信号移动方向设置为第一方向；在输入所述第二方向设置信号时，将所述双向移位寄存器的信号移动方向设置为第二方向。
在一个实施例中，所述第一方向设置信号和所述第二方向设置信号为电平信号。
在一个实施例中，所述第一控制信号和所述第二控制信号为电平信号。
在一个实施例中，所述移位控制信号为脉冲信号。
本申请还提供一种显示面板的驱动装置，所述显示面板包括像素阵列，所述驱动装置包括：至少两个第一栅极驱动模块以及至少两个第二栅极驱动模块。所述至少两个第一栅极驱动模块设置在所述像素阵列的一侧，其中一个所述第一栅极驱动模块与所述像素阵列的奇数行像素的前i行连接，剩余所述第一栅极驱动模块与所述像素阵列的剩余奇数行像素连接，用于对所述像素阵列的奇数行像素进行逐行驱动；其中，i≥1且为正整数；所述至少两个第二栅极驱动模块，设置在所述像素阵列的另一侧，其中一个所述第二栅极驱 动模块与所述像素阵列的偶数行像素的前j行连接，剩余所述第二栅极驱动模块与所述像素阵列的剩余偶数行像素连接，用于对所述像素阵列的偶数行像素进行逐行驱动；其中，j≥1且为正整数。
本申请还提供一种显示面板的驱动方法，所述显示面板包括像素阵列，所述驱动方法包括：在所述像素阵列的一侧设置至少一个第一栅极驱动模块，使所述第一栅极驱动模块与所述像素阵列的奇数行像素连接，控制所述第一栅极驱动模块对所述像素阵列的奇数行像素进行逐行驱动；以及在所述像素阵列的另一侧设置至少一个第二栅极驱动模块，使所述第二栅极驱动模块与所述像素阵列的偶数行像素连接，控制所述第二栅极驱动模块对所述像素阵列的偶数行像素进行逐行驱动。
本申请通过在像素阵列的两侧都设置栅极驱动模块，分别对像素阵列的奇数行像素和偶数行像素进行逐行驱动，可以实现对像素阵列的所有行像素的交错式双边栅极驱动，使像素阵列的左右两侧充电均匀，可有效减少像素阵列左右两侧像素之间的充电时间的差异所导致的视觉差异，从而提高像素阵列的视觉显示效果。
附图说明
为了更清楚地说明本申请实施例中的技术方案，下面将对实施例描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图是本申请的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1是本申请的一个实施例提供的显示面板的驱动装置的结构示意图；
图2是本申请的一个实施例提供的第一栅极驱动模块和第二栅极驱动模块的结构示意图；
图3是本申请的一个实施例提供的第一栅极驱动模块和第二栅极驱动模块的工作信号时序图；以及
图4是本申请的一个实施例提供的驱动方法的流程框图。
具体实施方式
为了使本技术领域的人员更好地理解本申请方案，下面将结合本申请实 施例中的附图，对本申请实施例中的技术方案进行清楚地描述，显然，所描述的实施例是本申请一部分的实施例，而不是全部的实施例。基于本申请中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都应当属于本申请保护的范围。
本申请的说明书和权利要求书及上述附图中的术语“包括”以及它们任何变形，意图在于覆盖不排他的包含。例如包含一系列步骤或单元的过程、方法或***、产品或设备没有限定于已列出的步骤或单元，而是可选地还包括没有列出的步骤或单元，或可选地还包括对于这些过程、方法、产品或设备固有的其它步骤或单元。此外，术语“第一”、“第二”和“第三”等是用于区别不同对象，而非用于描述特定顺序。
如图1所示，本申请的一个实施例提供一种显示面板的驱动装置100，用于驱动显示面板10，显示面板10包括由若干行像素和若干列像素组成的像素阵列，该显示面板的驱动装置包括至少一个第一栅极驱动模块20和至少一个第二栅极驱动模块30。
如图1所示，示例性的示出像素阵列包括N行像素，其中，N大于1且均为正整数，图1中用方格示例性的表示像素。
第一栅极驱动模块20，设置在像素阵列的一侧，与像素阵列的奇数行像素连接，用于对像素阵列的奇数行像素进行逐行驱动。
第二栅极驱动模块30，设置在像素阵列的另一侧，与像素阵列的偶数行像素连接，用于对像素阵列的偶数行像素进行逐行驱动。
在一个实施例中，驱动装置包括两个第一栅极驱动模块和两个第二栅极驱动模块，其中一个第一栅极驱动模块与像素阵列的奇数行像素的前i行连接，另一个第一栅极驱动模块与像素阵列的剩余奇数行像素连接；其中一个第二栅极驱动模块与像素阵列的偶数行像素的前j行连接，另一个第二栅极驱动模块与像素阵列的剩余偶数行像素连接；其中，i，j≥1且为i，j均正整数。
本实施例中的一侧和另一侧是相对于像素阵列的行像素的设置方向而言的，在实际应用中，只要保证第一栅极驱动模块和第二栅极驱动模块分别连接在像素阵列的行像素的两端即可。
在具体应用中，第一栅极驱动模块和第二栅极驱动模块的数量可以根据实际需要进行设置，具体与像素阵列的行像素数量、第一栅极驱动模块和第 二栅极驱动模块的栅极驱动线数量以及驱动方式有关，例如，像素阵列包括50行像素(25行奇数行像素和25行偶数行像素)，第一栅极驱动模块和第二栅极驱动模块的栅极驱动线数量均为10，若采用三栅极晶体管驱动方式，则需要的第一栅极驱动模块和第二栅极驱动模块的数据均为3个，若采用双栅极驱动方式则需要的第一栅极驱动模块和第二栅极驱动模块的数量均为2个；若第一栅极驱动模块的栅极驱动线数量为25、第二栅极驱动模块的栅极驱动线数量为10，则采用三栅极晶体管驱动方式时，需要的第一栅极驱动模块的数量为1、第二栅极驱动模块的数据均为3个，采用双栅极驱动方式时，需要的第一栅极驱动模块的数量为1、第二栅极驱动模块的数量则为2。
在一个实施例中，第一栅极驱动模块和第二栅极驱动模块的数量相等。
如图1所示，示例性的示出第一栅极驱动模块20和第二栅极驱动模块30的数量均为2两个。当N为奇数时，其中一个第一栅极驱动模块20用于驱动包括第1行像素在内的前面若干奇数行像素，另一个第一栅极驱动模块20用于驱动包括第N行像素在内的后面剩下的奇数行像素；其中一个第二栅极驱动模块30用于驱动包括第2行像素内的前面若干偶数行像素，另一个第二栅极驱动模块30用于驱动包括第N-1行像素在内的后面剩下的偶数行像素；当N为偶数时，其中一个第一栅极驱动模块20用于驱动第1至第N/2-1行中的奇数行像素，另一个第一栅极驱动模块20用于驱动第N/2+1至第N-1行中的奇数行像素；其中一个第二栅极驱动模块30用于驱动第2至第N/2行中的偶数行像素，另一个第二栅极驱动模块30用于驱动第N/2+2至第N行中的偶数行像素，其中，N≥1。图1中仅示出N为偶数时的情况。
在具体应用中，通过上述交错式双边驱动模组对像素阵列进行逐行驱动的方式具体为：
若触发驱动，则开始通过位于像素阵列一侧的栅极驱动模块对第一行像素所包括的所有像素点从左至右进行逐个驱动，然后通过位于像素阵列另一侧的栅极驱动电路模块对第二行像素所包括的所有像素点从右至左进行逐个驱动，然后在次通过位于一侧的栅极驱动模块对第一行像素所包括的所有像素点从左至右进行逐个驱动，然后再次通过位于像素阵列另一侧的栅极驱动电路模块对第四行像素所包括的所有像素点从右至左进行逐个驱动，……，依此类推，直到完成对整个像素阵列的所有像素点的驱动。
通过上述逐行驱动方式可知，本实施例所提供的交错式双边驱动模组可以实现对像素阵列的交错式双边栅极驱动，使像素阵列的左右两侧充电均匀，可有效减少像素阵列左右两侧像素之间的充电时间的差异所导致的视觉差异，从而提高像素阵列的视觉显示效果。
如图2所示，在本申请的一个实施例中，第一栅极驱动模块20和第二栅极驱动模块30均包括输入缓冲单元101、移位寄存器单元102、电平转换单元103及输出缓冲单元104。
在具体应用中，第一栅极驱动模块20和第二栅极驱动模块30所包括的各单元仅仅只是在工作原理上相同，但第一栅极驱动模块20和第二栅极驱动模块30所包括的栅极驱动线的数量可以根据实际的需要进行区别设置。
输入缓冲单元101用于输入移位控制信号、第一控制信号和第二控制信号，在输入第一控制信号时，若驱动装置开始对像素阵列进行逐行驱动，则在移位控制信号的上升沿输出第一电平信号，在移位控制信号的下降沿输出第二电平信号；在输入第二控制信号时，若驱动装置开始对像素阵列进行逐行驱动，则在移位控制信号的上升沿输出第二电平信号，在移位控制信号的下降沿输出第一电平信号。
如图2所示，本实施例中示例性的示出输入缓冲单元101设置有控制端R/F和移位控制端CKV，移位控制端CKV用于输入移位控制信号，控制端R/F用于输入第一控制信号和第二控制信号。
在具体应用中，第一电平信号为高电平信号，第二电平信号为低电平信号。
在一个实施例中，输入缓冲单元还包括用于输入驱动起始信号的触发信号端STV，用于将输出给所有行像素的驱动信号拉低的拉低信号端OE，用于将所有行像素的驱动信号拉高的拉高信号端/XAO以及用于选择输出驱动信号的通道数的通道选择端MODE。
如图2所示，本实施例中示例性的示出输入缓冲单元101设置有拉低信号端OE和拉高信号端/XAO。
在一个实施例中，移位控制信号为脉冲信号。
在一个实施例中，第一控制信号和第二控制信号为电平信号，其中，第一控制信号为高电平信号，第二控制信号为低电平信号。
在一个实施例中，输入缓冲单元可以是缓冲器，也可以是其他具有同等缓冲存储功能的缓冲存储器件，本实施例中不对其具体类型作特别限定。
移位寄存器单元102与输入缓冲单元101连接，用于将接收到的第一电平信号和第二电平信号依次逐位移动后输出。
在一个实施例中，移位寄存器单元为双向移位寄存器；输入缓冲单元还用于输入第一方向设置信号和第二方向设置信号，并在输入所述第一方向设置信号时，将所述双向移位寄存器的信号移动方向设置为第一方向，以使双向移位寄存器将第一电平信号和第二电平信号依次逐位向第一方向移动后输出；在输入所述第二方向设置信号时，将所述双向移位寄存器的信号移动方向设置为第二方向，以使双向移位寄存器将第一电平信号和第二电平信号依次逐位向第二方向移动后输出。
上述实施例中之所以采用双向移位寄存器是因为，当其分别设置在像素阵列一侧和另一侧时，需要从两个完全相反的方向输出驱动信号对像素阵列进行行驱动，因此，采用双向移位寄存器可以是该寄存器既可以设置在像素阵列一侧也可以设置在另一侧，而不需要通过分别采用具有不同驱动方向的移位寄存器。
在具体应用中，第一方向具体是指从双向移位寄存器的第一个信号输出端到最后一个信号输出端的方向，第二方向具体是指从双向移位寄存器的最后一个信号输出端到第一个信号输出端的方向。
如图2所示，本实施例中示例性的示出输入缓冲单元101还设置有移位方向设置端L/R，移位方向设置端L/R用于输入第一方向设置信号和第二方向设置信号。
在一个实施例中，第一方向设置信号和第二方向设置信号为电平信号，其中，第一方向设置信号为高电平信号，第二方向设置信号为低电平信号。
在一个实施例中，输入缓冲单元包括用于触发栅极驱动模块从其第一信号输出端到最后一个信号输出端依次输出驱动信号的第一触发信号端STV1和在此情况下用于选择输出驱动信号的通道数的第一通道选择端MODE1；用于触发栅极驱动模块从其最后一个信号输出端到第一个信号输出端依次输出驱动信号的第二触发信号端STV2和用于在此情况下用于选择输出驱动信号的通道数的第二通道选择端MODE2。
电平转换单元103与移位寄存器单元102连接，用于对移位寄存器单元102输出的第一电平信号和第二电平信号进行电平转换，以改变第一电平信号和第二电平信号的电压大小。
在具体应用中，电平转换单元可以为电平转换器，或者具有同等的电平转换功能的电路或者器件。
输出缓冲单元104分别与像素阵列的行像素和电平转换单元103连接，用于对电平转换后的第一电平信号和第二电平信号进行缓冲后输出至像素阵列的行像素，以在输入缓冲单元输入第一控制信号时，对像素阵列的奇数行像素进行逐行驱动；在输入缓冲单元输入第二控制信号时，对像素阵列的偶数行像素进行逐行驱动。
在一个实施例中，输出缓冲单元可以是缓冲器，也可以是其他具有同等缓冲存储功能的缓冲存储器件，本实施例中不对其具体类型作特别限定。
如图2所示，本实施例中示例性的示出输出缓冲单元104包括out1、out2、out3、……、out n共n个信号输出端，其中，n≥1且n为正整数。
如图3所示，为本申请的一个实施例提供的具有上述结构的第一栅极驱动模块20的工作时序图和具有上述结构的第二栅极驱动模块30的工作时序图。图3中示例性的示出第一栅极驱动模块20驱动1、3、5、…、N-1行像素和第二栅极驱动模块30驱动2、4、6、…、N行像素时的工作时序图，其中，N≥1且N为偶数。
本实施例中，通过在栅极驱动模块的输入缓冲单元上设置控制端，可以根据输入的控制信号来控制栅极驱动模块输出驱动信号的方向，从而使得栅极驱动模块既可以设置在像素阵列的一侧也可以设置在另一侧，从而不需要在驱动装置中设置具有不同驱动方向的两种不同的栅极驱动模块，简化了装配工序，提高了装配效率，同时也提高了各器件之间的兼容性。
本申请的一个实施例还提供一种显示面板的驱动装置，其中，显示面板包括像素阵列，驱动装置包括：
至少两个第一栅极驱动模块，设置在像素阵列的一侧，其中一个第一栅极驱动模块与像素阵列的奇数行像素的前i行连接，剩余第一栅极驱动模块与像素阵列的剩余奇数行像素连接，用于对像素阵列的奇数行像素进行逐行驱动；其中，i≥1且为正整数；
至少两个第二栅极驱动模块，设置在像素阵列的另一侧，其中一个第二栅极驱动模块与像素阵列的偶数行像素的前j行连接，剩余第二栅极驱动模块与像素阵列的剩余偶数行像素连接，用于对像素阵列的偶数行像素进行逐行驱动；其中，j≥1且为正整数。
如图4所示，本申请的一个实施例还提供一种显示面板的驱动方法，其中，显示面板包括像素阵列，所述驱动方法包括：
步骤S1：在像素阵列的一侧设置至少一个第一栅极驱动模块，使第一栅极驱动模块与像素阵列的奇数行像素连接，控制第一栅极驱动模块对像素阵列的奇数行像素进行逐行驱动；
步骤S2：在像素阵列的另一侧设置至少一个第二栅极驱动模块，使第二栅极驱动模块与像素阵列的偶数行像素连接，控制第二栅极驱动模块对像素阵列的偶数行像素进行逐行驱动。
在具体应用中，上述驱动方法基于前述实施例中的驱动装置实现。
在一个实施例中，上述驱动方法中的控制步骤通过控制模块来执行，控制模块具体可以为定时器/计数器控制寄存器(TCON，Timer Control Register，又名屏驱动板)，还以为其他具有相应功能的电路或器件，本实施例中不对其具体类型作特别限定。
在一个实施例中，本申请所有实施例中的模块或单元，均可以通过通用集成电路，例如CPU(Central Processing Unit，中央处理器)，或通过ASIC(Application Specific Integrated Circuit，专用集成电路)来实现。
本领域普通技术人员可以理解实现上述实施例方法中的全部或部分流程，是可以通过计算机程序来指令相关的硬件来完成，所述的程序可存储于一计算机可读取存储介质中，该程序在执行时，可包括如上述各方法的实施例的流程。其中，所述的存储介质可为磁碟、光盘、只读存储记忆体(Read-Only Memory，ROM)或随机存储记忆体(Random Access Memory，RAM)等。
以上所述仅为本申请的较佳实施例而已，并不用以限制本申请，凡在本申请的精神和原则之内所作的任何修改、等同替换和改进等，均应包含在本申请的保护范围之内。

Claims (18)

  1. 一种显示面板的驱动装置，所述显示面板包括像素阵列，所述驱动装置包括：
    至少一个第一栅极驱动模块，设置在所述像素阵列的一侧，与所述像素阵列的奇数行像素连接，用于对所述像素阵列的奇数行像素进行逐行驱动；以及
    至少一个第二栅极驱动模块，设置在所述像素阵列的另一侧，与所述像素阵列的偶数行像素连接，用于对所述像素阵列的偶数行像素进行逐行驱动。
  2. 如权利要求1所述的显示面板的驱动装置，其中所述第一栅极驱动模块和所述第二栅极驱动模块包括：
    输入缓冲单元，用于输入移位控制信号、第一控制信号和第二控制信号，在输入所述第一控制信号时，若所述驱动装置开始对所述像素阵列进行逐行驱动，则在所述移位控制信号的上升沿输出第一电平信号，在所述移位控制信号的下降沿输出第二电平信号；在输入所述第二控制信号时，若所述驱动装置开始对所述像素阵列进行逐行驱动，则在所述移位控制信号的上升沿输出第二电平信号，在所述移位控制信号的下降沿输出第一电平信号；
    移位寄存器单元，与所述输入缓冲单元连接，用于将接收到的所述第一电平信号和所述第二电平信号依次逐位移动后输出；
    电平转换单元，与所述移位寄存器单元连接，用于对所述移位寄存器单元输出的第一电平信号和第二电平信号进行电平转换，以改变所述第一电平信号和所述第二电平信号的电压大小；以及
    输出缓冲单元，分别与所述像素阵列的行像素和所述电平转换单元连接，用于对电平转换后的所述第一电平信号和所述第二电平信号进行缓冲后输出至所述像素阵列的行像素，以在所述输入缓冲单元输入所述第一控制信号时，对所述像素阵列的奇数行像素进行逐行驱动；在所述输入缓冲单元输入所述第二控制信号时，对所述像素阵列的偶数行像素进行逐行驱动。
  3. 如权利要求2所述的显示面板的驱动装置，其中所述移位寄存器单元为双向移位寄存器；
    所述输入缓冲单元还用于输入第一方向设置信号和第二方向设置信号，并在输入所述第一方向设置信号时，将所述双向移位寄存器的信号移动方向 设置为第一方向；在输入所述第二方向设置信号时，将所述双向移位寄存器的信号移动方向设置为第二方向。
  4. 如权利要求3所述的显示面板的驱动装置，其中所述第一方向设置信号和所述第二方向设置信号为电平信号。
  5. 如权利要求2所述的显示面板的驱动装置，其中所述第一控制信号和所述第二控制信号为电平信号。
  6. 如权利要求2所述的显示面板的驱动装置，其中所述移位控制信号为脉冲信号。
  7. 一种显示面板的驱动装置，所述显示面板包括像素阵列，所述驱动装置包括：
    至少两个第一栅极驱动模块，设置在所述像素阵列的一侧，其中一个所述第一栅极驱动模块与所述像素阵列的奇数行像素的前i行连接，剩余所述第一栅极驱动模块与所述像素阵列的剩余奇数行像素连接，用于对所述像素阵列的奇数行像素进行逐行驱动；其中，i≥1且为正整数；以及
    至少两个第二栅极驱动模块，设置在所述像素阵列的另一侧，其中一个所述第二栅极驱动模块与所述像素阵列的偶数行像素的前j行连接，剩余所述第二栅极驱动模块与所述像素阵列的剩余偶数行像素连接，用于对所述像素阵列的偶数行像素进行逐行驱动；其中，j≥1且为正整数。
  8. 如权利要求7所述的显示面板的驱动装置，其中所述第一栅极驱动模块和所述第二栅极驱动模块包括：
    输入缓冲单元，用于输入移位控制信号、第一控制信号和第二控制信号，在输入所述第一控制信号时，若所述驱动装置开始对所述像素阵列进行逐行驱动，则在所述移位控制信号的上升沿输出第一电平信号，在所述移位控制信号的下降沿输出第二电平信号；在输入所述第二控制信号时，若所述驱动装置开始对所述像素阵列进行逐行驱动，则在所述移位控制信号的上升沿输出第二电平信号，在所述移位控制信号的下降沿输出第一电平信号；
    移位寄存器单元，与所述输入缓冲单元连接，用于将接收到的所述第一电平信号和所述第二电平信号依次逐位移动后输出；
    电平转换单元，与所述移位寄存器单元连接，用于对所述移位寄存器单元输出的第一电平信号和第二电平信号进行电平转换，以改变所述第一电平 信号和所述第二电平信号的电压大小；以及
    输出缓冲单元，分别与所述像素阵列的行像素和所述电平转换单元连接，用于对电平转换后的所述第一电平信号和所述第二电平信号进行缓冲后输出至所述像素阵列的行像素，以在所述输入缓冲单元输入所述第一控制信号时，对所述像素阵列的奇数行像素进行逐行驱动；在所述输入缓冲单元输入所述第二控制信号时，对所述像素阵列的偶数行像素进行逐行驱动。
  9. 如权利要求8所述的显示面板的驱动装置，其中所述移位寄存器单元为双向移位寄存器；
    所述输入缓冲单元还用于输入第一方向设置信号和第二方向设置信号，并在输入所述第一方向设置信号时，将所述双向移位寄存器的信号移动方向设置为第一方向；在输入所述第二方向设置信号时，将所述双向移位寄存器的信号移动方向设置为第二方向。
  10. 如权利要求9所述的显示面板的驱动装置，其中所述第一方向设置信号和所述第二方向设置信号为电平信号。
  11. 如权利要求8所述的显示面板的驱动装置，其中所述第一控制信号和所述第二控制信号为电平信号。
  12. 如权利要求8所述的显示面板的驱动装置，其中所述移位控制信号为脉冲信号。
  13. 一种显示面板的驱动方法，所述显示面板包括像素阵列，所述驱动方法包括：
    在所述像素阵列的一侧设置至少一个第一栅极驱动模块，使所述第一栅极驱动模块与所述像素阵列的奇数行像素连接，控制所述第一栅极驱动模块对所述像素阵列的奇数行像素进行逐行驱动；以及
    在所述像素阵列的另一侧设置至少一个第二栅极驱动模块，使所述第二栅极驱动模块与所述像素阵列的偶数行像素连接，控制所述第二栅极驱动模块对所述像素阵列的偶数行像素进行逐行驱动。
  14. 如权利要求13所述的显示面板的驱动方法，其中所述第一栅极驱动模块和所述第二栅极驱动模块包括：
    输入缓冲单元，用于输入移位控制信号、第一控制信号和第二控制信号，在输入所述第一控制信号时，若所述驱动装置开始对所述像素阵列进行逐行 驱动，则在所述移位控制信号的上升沿输出第一电平信号，在所述移位控制信号的下降沿输出第二电平信号；在输入所述第二控制信号时，若所述驱动装置开始对所述像素阵列进行逐行驱动，则在所述移位控制信号的上升沿输出第二电平信号，在所述移位控制信号的下降沿输出第一电平信号；
    移位寄存器单元，与所述输入缓冲单元连接，用于将接收到的所述第一电平信号和所述第二电平信号依次逐位移动后输出；
    电平转换单元，与所述移位寄存器单元连接，用于对所述移位寄存器单元输出的第一电平信号和第二电平信号进行电平转换，以改变所述第一电平信号和所述第二电平信号的电压大小；以及
    输出缓冲单元，分别与所述像素阵列的行像素和所述电平转换单元连接，用于对电平转换后的所述第一电平信号和所述第二电平信号进行缓冲后输出至所述像素阵列的行像素，以在所述输入缓冲单元输入所述第一控制信号时，对所述像素阵列的奇数行像素进行逐行驱动；在所述输入缓冲单元输入所述第二控制信号时，对所述像素阵列的偶数行像素进行逐行驱动。
  15. 如权利要求14所述的显示面板的驱动方法，其中所述移位寄存器单元为双向移位寄存器；
    所述输入缓冲单元还用于输入第一方向设置信号和第二方向设置信号，并在输入所述第一方向设置信号时，将所述双向移位寄存器的信号移动方向设置为第一方向；在输入所述第二方向设置信号时，将所述双向移位寄存器的信号移动方向设置为第二方向。
  16. 如权利要求15所述的显示面板的驱动方法，其中所述第一方向设置信号和所述第二方向设置信号为电平信号。
  17. 如权利要求14所述的显示面板的驱动方法，其中所述第一控制信号和所述第二控制信号为电平信号。
  18. 如权利要求14所述的显示面板的驱动方法，其中所述移位控制信号为脉冲信号。
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