WO2019056350A1 - 一种mems同轴滤波器和制作方法 - Google Patents

一种mems同轴滤波器和制作方法 Download PDF

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WO2019056350A1
WO2019056350A1 PCT/CN2017/103120 CN2017103120W WO2019056350A1 WO 2019056350 A1 WO2019056350 A1 WO 2019056350A1 CN 2017103120 W CN2017103120 W CN 2017103120W WO 2019056350 A1 WO2019056350 A1 WO 2019056350A1
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mems
wafer
coaxial filter
soi
coaxial
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PCT/CN2017/103120
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English (en)
French (fr)
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梅迪
朱其玉
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上海诺基亚贝尔股份有限公司
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Priority to CN201780095197.3A priority Critical patent/CN111133628B/zh
Priority to PCT/CN2017/103120 priority patent/WO2019056350A1/zh
Publication of WO2019056350A1 publication Critical patent/WO2019056350A1/zh

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01PWAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
    • H01P1/00Auxiliary devices
    • H01P1/20Frequency-selective devices, e.g. filters
    • H01P1/207Hollow waveguide filters

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  • the present invention relates to the field of communications technologies, and in particular, to a MEMS coaxial filter and a manufacturing method thereof.
  • Micro Electro Mechanical System is based on semiconductor manufacturing technology and has high processing accuracy, which can fully meet the processing accuracy requirements of millimeter wave filters.
  • MEMS filters due to the high cost of MEMS filters, it has hindered its promotion. Since the cost of a wafer is constant, the smaller the filter, the more filters can be produced in one wafer and the lower the cost of the filter. This means that miniaturization is very important for the commercial and practical application of millimeter wave MEMS filters.
  • the Substrate Integrated Waveguide is the most promising millimeter wave filter for many years. But one of its fatal flaws is that the first harmonic is very close to the operating frequency, which is about 1.58 times the operating frequency. And this harmonic can hardly be suppressed. At the same time, the size of the SIW filter is still too large for a wafer, which is contrary to the miniaturization of the MEMS filter.
  • the existing millimeter wave filters are mainly the following three types:
  • millimeter wave filters are metal waveguide filters, which are bulky and heavy. It is estimated that the volume of the metal waveguide filter at 28 Ghz is approximately 280 times larger than that of the SIW filter. In addition, its processing accuracy does not meet the requirements of millimeter wave filters. Therefore, it can basically be said that the metal waveguide filter is far from being the best choice for millimeter wave and MIMO RF systems.
  • SIW is the most promising millimeter wave filter for many years. It has the advantages of strong power handling capability, easy manufacture, and small size. SIW filters can be fabricated on most mainstream RF planar substrates, such as PCBs and silicon, even on paper. But a fatal disadvantage of the SIW filter is that its first harmonic is very close to the operating frequency, about 1.58 times the operating frequency, and the harmonic It is difficult to be suppressed. Therefore, when the operating frequency can reach millimeter waves, strict processing accuracy becomes a major obstacle to the millimeter wave filter including the SIW filter.
  • Ceramics and LTCC are based on ceramics. It can greatly reduce the size of the filter. However, its volume changes greatly during the sintering process. Ceramic filters can solve this problem by adjusting the size after sintering. Of course, this is a time consuming process and performance is also affected. The Q value and processing accuracy of the LTCC cannot meet the requirements of the millimeter wave filter.
  • a MEMS coaxial filter characterized in that the MEMS coaxial filter comprises:
  • a silicon dielectric cavity of the electrical wall realized by a metal wall or a metallized through hole
  • the MEMS coaxial filter adopts a SIW resonator structure, and a blind hole is etched in the center of the SIW resonator structure, and the structural layer wafer is an SOI sheet.
  • the structural layer wafer is a high resistance silicon wafer
  • the MEMS coaxial filter further includes a carrier sheet, and the high resistance silicon wafer and the carrier sheet are bonded in a wafer level manner. combine together.
  • the structural layer wafer is an SOI sheet
  • the MEMS coaxial filter further comprises a carrier sheet, and the SOI sheet and the carrier sheet are bonded together in a wafer level bonding manner.
  • a metal pattern of a dumbbell shape is formed on a front surface of the structural layer wafer, the metal pattern being located between two resonant cavities for generating electrical coupling;
  • the back side of the structural layer wafer simultaneously etches holes or trenches in the metallization blind via etching step to suppress magnetic coupling between the two resonant cavities.
  • the resonant frequency of the MEMS coaxial filter according to the present invention is adjusted based on any of the following:
  • a method for fabricating a MEMS coaxial filter using a SIW structure wherein a structural layer wafer of the MEMS coaxial filter is an SOI wafer, the method comprising the following steps :
  • a method for fabricating a MEMS coaxial filter comprising the steps of:
  • a method for fabricating a MEMS coaxial filter comprising the steps of:
  • the present invention has the following advantages: by using MEMS technology to fabricate a coaxial filter on a silicon wafer, combining the advantages of MEMS technology, coaxial resonator structure and SIW technology, compared with existing metals A waveguide filter or a SIW filter, the MEMS coaxial filter according to an embodiment of the present invention greatly reduces the size and cost of the millimeter wave filter, and has high processing precision, simplifying the millimeter wave filter Production time and cost.
  • FIG. 1a shows a top view of a resonator structure of an exemplary MEMS coaxial filter in accordance with the present invention
  • Figure 1b shows a top view of a resonator structure of an exemplary MEMS coaxial filter in accordance with the present invention
  • FIG. 2 is a block diagram showing the structure of a MEMS coaxial filter employing a SIW resonator structure in accordance with one embodiment of the present invention
  • FIG. 3 shows a flow chart of a method for fabricating a MEMS coaxial filter employing a SIW structure in accordance with one embodiment of the present invention
  • FIG. 4 shows a process flow diagram for fabricating a MEMS coaxial filter employing a SIW structure in accordance with one example of the present invention
  • Figure 5 illustrates a flow chart of a method for fabricating a MEMS coaxial filter in accordance with one embodiment of the present invention
  • FIG. 6 shows a process flow diagram for fabricating a MEMS coaxial filter using a high resistance silicon wafer in accordance with one example of the present invention
  • FIG. 7 shows a flow chart of a method for fabricating the MEMS coaxial filter of the present embodiment
  • FIG. 8 illustrates a fabrication of a MEMS using an SOI wafer in accordance with one example of the present invention. Process flow diagram of the coaxial filter
  • Figure 9 is a block diagram showing the structure of a MEMS coaxial filter having an electrical coupling structure in accordance with one embodiment of the present invention.
  • Figure 10 illustrates a process flow diagram for fabricating a MEMS coaxial filter having an electrically coupled structure in accordance with one example of the present invention.
  • a MEMS coaxial filter includes: a double-sided polished structural layer wafer; a silicon dielectric cavity in which an electric wall is realized by a metal wall or a metallized through hole; and an internal coaxial by a metallized blind hole structure.
  • the structural layer wafer comprises various wafers which can be used for fabricating MEMS filters, including silicon wafers, high resistance silicon wafers, SOI wafers, glass wafers or quartz wafers.
  • the structural layer wafer is an SOI sheet.
  • the resonator structure shown in FIG. 1a has a blind hole in the center, and a plurality of metallized through holes are formed around the blind hole, and the plurality of metalized through holes are used to realize an electric wall, and the metallized blind hole is used for realizing MEMS
  • the internal coaxial structure of the coaxial filter has a blind hole in the center, and the metallized blind hole is used to realize the internal coaxial structure of the MEMS coaxial filter.
  • ICP inductively coupled plasma
  • the resonant frequency of the MEMS coaxial filter is adjusted based on any of the following:
  • the MEMS coaxial filter employs a SIW resonator structure.
  • the MEMS coaxial filter comprises a double-sided polished structural layer wafer, a silicon dielectric cavity of the electric wall by the metallized through hole, an internal coaxial structure and a carrier sheet.
  • the structural layer wafer is an SOI sheet.
  • the SIW is a periodic structure based on integration of a waveguide structure, and the electromagnetic wave is radiated outward through the array metal through hole, thereby constructing a waveguide structure similar to the waveguide to replace the traditional metal waveguide.
  • the MEMS coaxial filter etches a blind via at the center of the SIW resonator structure for forming an internal coaxial structure based on the SIW structure.
  • the structural layer wafer is provided with a plurality of metallized through holes, and the spacing and arrangement of the plurality of metalized through holes satisfy the requirements of the SIW structure.
  • FIG. 3 shows a flow chart of a method for fabricating a MEMS coaxial filter using the SIW structure of the present embodiment.
  • the structural layer wafer of the MEMS coaxial filter is an SOI slice, and the method includes steps S301, S302, S303, and S304.
  • step S301 ICP etching is performed on the back surface of the SOI wafer, and etching is stopped in the silicon dioxide layer.
  • step S302 the exposed silicon dioxide layer is removed.
  • step S303 ICP etching is performed on the front surface of the SOI wafer.
  • step S304 the SOI sheet is double-sided metallized, and a port structure and an electrical coupling structure are fabricated.
  • the process flow includes processes (a) through (e).
  • a two-side polished SOI sheet was selected as the structural layer wafer as shown in (a).
  • the back side of the SOI sheet is subjected to ICP etching, and etching is stopped in the silicon dioxide layer as shown in (b).
  • the exposed silicon dioxide layer is removed as shown in (c).
  • the front side of the SOI sheet is subjected to ICP etching as shown in (d).
  • the SOI sheet is double-sided metallized, and a port structure and an electrical coupling structure are produced as shown in (e).
  • the MEMS coaxial filter comprises a double-sided polished high-resistance silicon wafer, a silicon dielectric chamber of an electrical wall realized by a metal wall, an internal coaxial structure and a carrier sheet.
  • the carrier sheet can adopt any material capable of carrying a load.
  • the carrier sheet is a low resistance silicon, glass or other organic material.
  • the high resistance silicon wafer and the carrier sheet are bonded together in a wafer level bonding manner.
  • the wafer level bonding is performed by a low temperature bonding process such as BCB bonding, gold tin solder bonding, or the like.
  • a low temperature bonding process such as BCB bonding, gold tin solder bonding, or the like.
  • Those skilled in the art can also select other bonding methods based on actual needs, such as, for example, gold-gold thermocompression bonding, glassfrit bonding, and the like.
  • FIG. 5 illustrates a method for fabricating a MEMS coaxial filter, wherein the structural layer wafer of the MEMS coaxial filter is a high resistance silicon wafer, and the method includes steps S501, S502, S503, and S504. And S505.
  • step S501 ICP etching is performed on the back surface of the high resistance silicon wafer
  • step S502 the back surface of the ICP-etched high resistance silicon wafer is metallized
  • step S503 the metallized high resistance silicon wafer and the carrier sheet are bonded together in a wafer level bonding manner;
  • step S504 ICP etching is performed on the front surface of the high resistance silicon wafer
  • step S505 the ICP-etched high resistance silicon wafer is metallized on the front side, and a port structure and an electrical coupling structure are fabricated.
  • the process flow includes the processes (a) to (f).
  • a high-resistance silicon wafer polished on both sides is selected as the structural layer wafer as shown in (a).
  • the back side of the high resistance silicon wafer is subjected to ICP etching as shown in (b).
  • the back side of the ICP-etched high resistance silicon wafer is metallized as shown in (c).
  • the metallized high resistance silicon wafer and the carrier sheet are bonded together in a wafer level bonding as shown in (d).
  • the front side of the high resistance silicon wafer is subjected to ICP etching (e).
  • the ICP-etched high-resistance silicon wafer is metallized on the front side, and a port structure and an electrical coupling structure are fabricated as shown in (f).
  • the MEMS coaxial filter comprises a double-sided throw The SOI sheet of light, the silicon dielectric cavity of the electric wall by the metal wall, the internal coaxial structure and the carrier sheet.
  • the high resistance silicon wafer and the carrier sheet are bonded together in a wafer level bonding manner.
  • the silicon dioxide layer of the SOI sheet is used to ensure the precision of the ICP etching depth.
  • FIG. 7 shows a flow chart of a method for fabricating the MEMS coaxial filter of the present embodiment.
  • the structural layer wafer of the MEMS coaxial filter is an SOI slice, and the method includes steps S701, S702, S703, S704, S705 and S706.
  • step S701 ICP etching is performed on the back surface of the SOI sheet, and etching is stopped in the silicon dioxide layer;
  • step S702 the exposed silicon dioxide layer is removed.
  • step S703 the back surface of the ICP-etched SOI sheet is metallized.
  • step S704 the metallized SOI sheet and the carrier sheet are bonded together in a wafer level bonding manner.
  • step S705 the front side of the SOI wafer is subjected to ICP etching, and etching is stopped in the metal layer.
  • step S706 the front surface of the ICP-etched SOI wafer is metallized, and a port structure and an electrical coupling structure are fabricated.
  • the process flow includes the processes (a) to (g).
  • a two-side polished SOI sheet was selected as the structural layer wafer as shown in (a).
  • the back side of the SOI sheet is subjected to ICP etching, and etching is stopped in the silicon dioxide layer as shown in (b).
  • the exposed silicon dioxide layer is removed as shown in (c).
  • the back side of the ICP-etched SOI sheet is metallized as shown in (d).
  • the metallized SOI sheet and the carrier sheet are bonded together in a wafer-level bonding as shown in (e).
  • the front side of the SOI wafer is subjected to ICP etching, and etching is stopped in the metal layer as shown in (f).
  • the front side of the ICP-etched SOI wafer is metallized, and a port structure and an electrical coupling structure are fabricated as shown in (g).
  • the MEMS coaxial filter has a dumbbell-shaped metal pattern on the front surface of the structural layer wafer, the metal pattern being located in two resonant cavities Between, used to generate electrical coupling.
  • the back side of the structural layer wafer simultaneously etches holes or trenches in the metallization blind via etching step to suppress magnetic coupling between the two resonant cavities.
  • the MEMS coaxial filter has six resonant cavities, and has a dumbbell-shaped metal pattern on the front surface of the structural layer wafer, and two in the lower row. Between the resonators to create an electrical coupling.
  • a process flow diagram for fabricating the MEMS coaxial filter having an electrically coupled structure is shown in FIG.
  • the process flow includes process (a) to process (c).
  • the metallized blind via etching is etched on the back side of the structural layer wafer, and the holes or trenches are simultaneously etched to suppress magnetic coupling between the two resonant cavities, and the corresponding etching pattern is as shown in (a).
  • the front side of the structural layer wafer is subjected to ICP etching as shown in (b).
  • a metal pattern having a dumbbell shape is formed on the front surface of the structural layer wafer so as to be located between the two resonant cavities in the lower row, and metallizing the region other than the dumbbell-shaped metal pattern, and corresponding metallization
  • the pattern is as shown in (c).
  • the electrical coupling is adjusted by changing the gap of the shape metal of the dumbbell-shaped metal pattern.
  • the advantages of MEMS technology, coaxial resonator structure and SIW technology are combined, compared to existing metal waveguide filters or SIW filters.
  • the MEMS coaxial filter according to the embodiment of the present invention greatly reduces the size and cost of the millimeter wave filter, and has high processing precision, which simplifies the production time and cost of the millimeter wave filter.

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Abstract

本发明的目的是提供一种MEMS同轴滤波器和制作方法。根据本发明的一个方面,提供了一种MEMS同轴滤波器,其特征在于,所述MEMS同轴滤波器包括:两面抛光的结构层圆片;由金属壁或金属化通孔实现电壁的硅介质腔体;由金属化盲孔实现的内部同轴结构。本发明具有以下优点:通过利用MEMS技术在硅片上制作同轴滤波器,结合了MEMS技术、同轴谐振器结构和SIW技术的优势,相较于现有的金属波导滤波器或SIW滤波器,根据本发明的实施例的MEMS同轴滤波器极大地减小了毫米波滤波器的尺寸并降低了成本,并且具有较高的加工精度,简化了毫米波滤波器的生产时间和成本。

Description

一种MEMS同轴滤波器和制作方法 技术领域
本发明涉及通信技术领域,尤其涉及一种MEMS同轴滤波器和制作方法。
背景技术
微机电***(Micro Electro Mechanical System,MEMS)以半导体制造技术为基础,具有较高的加工精度,能够完全满足毫米波滤波器的加工精度要求。但由于MEMS滤波器成本高,阻碍了其推广。由于一个晶片的成本是一定的,因此滤波器越小,可以在一个晶片中生产的滤波器越多,且滤波器的成本越低。这意味着微型化对毫米波MEMS滤波器的商业和实际应用非常重要。
基片集成波导(Substrate Integrated Waveguide,SIW)是多年来最有前景的毫米波滤波器。但其一个致命的缺点是,第一谐波非常接近工作频率,大约是工作频率的1.58倍。并且该谐波这几乎不能被抑制。同时,SIW滤波器的尺寸对于一个晶片来说仍然太大,这违背了MEMS滤波器的微型化。
现有的毫米波滤波器主要为以下三种:
1)金属波导滤波器;
现有的毫米波滤波器大多是金属波导滤波器,体积大,重量重。据估算,金属波导滤波器的在28Ghz的体积大约比SIW滤波器大280倍。此外,它的加工精度不能满足毫米波滤波器的要求。因此,基本上可以说金属波导滤波器远不是毫米波和MIMO射频***的最佳选择。
2)SIW滤波器;
SIW是多年来最有前景的毫米波滤波器。它具有功率处理能力强、易于制造、体积小等优点。SIW滤波器可以在多数主流射频平面衬底上制作,如PCB和硅,甚至在纸。但SIW滤波器的一个致命缺点是,它的第一谐波与工作频率非常接近,大约是工作频率的1.58倍,且该谐波 很难被抑制。因此,当工作频率可达毫米波,严格的加工精度成为包括SIW滤波器在内的毫米波滤波器的主要障碍。
3)陶瓷滤波器/低温共烧陶瓷(Low Temperature Co-Fired Ceramic,LTCC);
陶瓷和LTCC是以陶瓷为基础的。它可以极大地减少滤波器的尺寸。但在烧结过程中其体积会发生很大变化。陶瓷过滤器可以通过调整烧结后的尺寸来解决这个问题,当然这是一个耗时的过程,性能也会受到影响。而LTCC的Q值和加工精度也无法满足毫米波滤波器的要求。
发明内容
本发明的目的是提供一种MEMS同轴滤波器和制作方法。
根据本发明的一个方面,提供了一种MEMS同轴滤波器,其特征在于,所述MEMS同轴滤波器包括:
两面抛光的结构层圆片;
由金属壁或金属化通孔实现电壁的硅介质腔体;
由金属化盲孔实现的内部同轴结构。
根据本发明的一个实施例,所述MEMS同轴滤波器采用SIW谐振器结构,在SIW谐振器结构中心刻蚀盲孔,所述结构层圆片为SOI片。
根据本发明的一个实施例,所述结构层圆片为高阻硅片,所述MEMS同轴滤波器还包括承载片,所述高阻硅片和承载片以圆片级键合的方式键合在一起。
根据本发明的一个实施例,所述结构层圆片为SOI片,所述MEMS同轴滤波器还包括承载片,所述SOI片和承载片以圆片级键合的方式键合在一起。
根据本发明的一个实施例,在所述结构层圆片的正面具有哑铃形状的金属图案,所述金属图案位于两个谐振腔之间,用于产生电耦合;
其中,在电耦合金属图案下方,所述结构层圆片的背面,在金属化盲孔刻蚀步骤同时刻蚀孔或槽,以抑制两个谐振腔之间的磁耦合。
优选地,根据本发明的MEMS同轴滤波器的谐振频率基于以下任一种方式进行调节:
-改变硅介质腔体的大小;
-改变金属化盲孔的直径大小。
根据本发明的一个方面,提供了一种用于制作采用SIW结构的MEMS同轴滤波器的方法,其中,所述MEMS同轴滤波器的结构层圆片为SOI片,所述方法包括以下步骤:
-对所述SOI片的背面进行ICP刻蚀,在二氧化硅层停止刻蚀;
-将暴露的二氧化硅层移除;
-对SOI片的正面进行ICP刻蚀;
-将SOI片双面金属化,并制作端口结构和电耦合结构。
根据本发明的一个方面,提供了一种用于制作MEMS同轴滤波器的方法,其中,所述MEMS同轴滤波器的结构层圆片为高阻硅片,所述方法包括以下步骤:
-对所述高阻硅片的背面进行ICP刻蚀;
-将经过ICP刻蚀的高阻硅片的背面金属化;
-将经过金属化的高阻硅片和承载片以圆片级键合的方式键合在一起;
-对高阻硅片的正面进行ICP刻蚀;
-将经过ICP刻蚀的高阻硅片正面金属化,并制作端口结构和电耦合结构。
根据本发明的一个方面,提供了一种用于制作MEMS同轴滤波器的方法,其中,所述MEMS同轴滤波器的结构层圆片为SOI片,所述方法包括以下步骤:
-对所述SOI片的背面进行ICP刻蚀,并在二氧化硅层停止刻蚀;
-将暴露的二氧化硅层移除;
-将经过ICP刻蚀的SOI片的背面金属化;
-将经过金属化的SOI片和承载片以圆片级键合的方式键合在一起;
-对SOI片的正面进行ICP刻蚀,并在金属层停止刻蚀;
-将经过ICP刻蚀的SOI片的正面金属化,并制作端口结构和电耦合结构。
与现有技术相比,本发明具有以下优点:通过利用MEMS技术在硅片上制作同轴滤波器,结合了MEMS技术、同轴谐振器结构和SIW技术的优势,相较于现有的金属波导滤波器或SIW滤波器,根据本发明的实施例的MEMS同轴滤波器极大地减小了毫米波滤波器的尺寸并降低了成本,并且具有较高的加工精度,简化了毫米波滤波器的生产时间和成本。
附图说明
通过阅读参照以下附图所作的对非限制性实施例所作的详细描述,本发明的其它特征、目的和优点将会变得更明显:
图1a示出了根据本发明的一个示例性的MEMS同轴滤波器的谐振器结构的俯视图;
图1b示出了根据本发明的一个示例性的MEMS同轴滤波器的谐振器结构的俯视图;
图2示出了根据本发明的一个实施例的采用SIW谐振器结构的MEMS同轴滤波器的结构示意图;
图3示出了根据本发明的一个实施例的用于制作采用SIW结构的MEMS同轴滤波器的方法流程图;
图4示出了根据本发明的一个示例的用于制作采用SIW结构的MEMS同轴滤波器的工艺流程图;
图5示出了根据本发明的一个实施例的用于制作MEMS同轴滤波器的方法流程图;
图6示出了根据本发明的一个示例的用于制作采用高阻硅片的MEMS同轴滤波器的工艺流程图;
图7示出了一种用于制作本实施例的MEMS同轴滤波器的方法流程图;
图8示出了根据本发明的一个示例的用于制作采用SOI片的MEMS 同轴滤波器的工艺流程图;
图9示出了根据本发明的一个实施例的具有电耦合结构的MEMS同轴滤波器的结构示意图。
图10示出了根据本发明的一个示例的用于制作具有电耦合结构的MEMS同轴滤波器的工艺流程图。
附图中相同或相似的附图标记代表相同或相似的部件。
具体实施方式
下面结合附图对本发明作进一步详细描述。
根据本发明的实施例的MEMS同轴滤波器,包括:两面抛光的结构层圆片;由金属壁或金属化通孔实现电壁的硅介质腔体;由金属化盲孔实现的内部同轴结构。
其中,所述结构层圆片包括各种可用于制作MEMS滤波器的圆片,包括硅片、高阻硅片、SOI片,玻璃片或石英片等。
优选地,所述结构层圆片为SOI片。
例如,参照图1a和图1b所示的两个谐振器结构。其中,图1a所示的谐振器结构中心有盲孔,在该盲孔周围有多个金属化通孔,该多个金属化通孔用于实现电壁,该金属化盲孔用于实现MEMS同轴滤波器的内部同轴结构。图1b所示的谐振器结构中心有盲孔,该金属化盲孔用于实现MEMS同轴滤波器的内部同轴结构。
其中,在SOI结构层圆片上制备MEMS同轴滤波器的关键工艺是感应耦合等离子(ICP)刻蚀工艺。ICP刻蚀深度决定同轴滤波器内腔长度。需要说明的是,本领域技术人员应熟悉,对于不是硅材料的结构层圆片,可采用其他刻蚀工艺来对其进行刻蚀,本领域技术人员可基于实际需求选择合适的刻蚀工艺来制备MEMS同轴滤波器。
优选地,所述MEMS同轴滤波器的谐振频率基于以下任一种方式进行调节:
-改变硅介质腔体的大小;
-改变金属化盲孔的直径大小。
根据本发明的一个优选实施例,所述MEMS同轴滤波器采用SIW谐振器结构。所述MEMS同轴滤波器包括两面抛光的结构层圆片,由金属化通孔实现电壁的硅介质腔体,内部同轴结构和承载片。优选地,所述结构层圆片为SOI片。
其中,所述SIW是一种基于波导结构集成化的周期性结构,通过阵列金属通孔限制电磁波向外辐射,从而构造类似波导的波导结构,以替代传统的金属波导。
参照图2,所述MEMS同轴滤波器在SIW谐振器结构中心刻蚀盲孔,用于构成基于SIW结构的内部同轴结构。
其中,所述结构层圆片设有多个金属化通孔,该多个金属化通孔的间距和排列方式满足SIW结构的要求。
图3示出了用于制作本实施例的采用SIW结构的MEMS同轴滤波器的方法流程图。其中,所述MEMS同轴滤波器的结构层圆片为SOI片,所述方法包括步骤S301、S302、S303和S304。
参照图3,在步骤S301中,对所述SOI片的背面进行ICP刻蚀,在二氧化硅层停止刻蚀。
在步骤S302中,将暴露的二氧化硅层移除。
在步骤S303中,对SOI片的正面进行ICP刻蚀。
在步骤S304中,将SOI片双面金属化,并制作端口结构和电耦合结构。
例如,参照图4所示的制作采用SIW结构的MEMS同轴滤波器的工艺流程图,该工艺流程包括流程(a)至流程(e)。选择两面抛光的SOI片作为结构层圆片,如(a)所示。对所述SOI片的背面进行ICP刻蚀,并在二氧化硅层停止刻蚀,如(b)所示。接着,将暴露的二氧化硅层移除,如(c)所示。接着,对SOI片的正面进行ICP刻蚀,如(d)所示。接着,将SOI片双面金属化,并制作端口结构和电耦合结构,如(e)所示。
根据本发明的一个实施例,所述MEMS同轴滤波器包括两面抛光的高阻硅片,由金属壁实现电壁的硅介质腔体,内部同轴结构和承载片。
其中,所述承载片可采用任何能够起承载作用的材料。优选地,所述承载片为低阻硅、玻璃或其他有机材料。
其中,所述高阻硅片和承载片以圆片级键合的方式键合在一起。
优选地,所述圆片级键合的方式为低温键合工艺,如BCB键合,金锡焊料键合等。本领域技术人员也可基于实际需求选择其他键合方式,例如,例如金-金热压键合、glassfrit键合等等。
图5示出了一种用于制作MEMS同轴滤波器的方法,其中,所述MEMS同轴滤波器的结构层圆片为高阻硅片,所述方法包括步骤S501、S502、S503、S504和S505。
参照图5,在步骤S501中,对所述高阻硅片的背面进行ICP刻蚀;
接着,在步骤S502中,将经过ICP刻蚀的高阻硅片的背面金属化;
接着,在步骤S503中,将经过金属化的高阻硅片和承载片以圆片级键合的方式键合在一起;
接着,在步骤S504中,对高阻硅片的正面进行ICP刻蚀;
接着,在步骤S505中,将经过ICP刻蚀的高阻硅片正面金属化,并制作端口结构和电耦合结构。
例如,参照图6所示的制作本实施例的MEMS同轴滤波器的工艺图流程图,该工艺流程包括流程(a)至流程(f)。选择两面抛光的高阻硅片作为结构层圆片,如(a)所示。对所述高阻硅片的背面进行ICP刻蚀,如(b)所示。接着,将经过ICP刻蚀的高阻硅片的背面金属化,如(c)所示。接着,将经过金属化的高阻硅片和承载片以圆片级键合的方式键合在一起,如(d)所示。接着,对高阻硅片的正面进行ICP刻蚀(e)所示。接着,将经过ICP刻蚀的高阻硅片正面金属化,并制作端口结构和电耦合结构,如(f)所示。
根据本发明的一个优选实施例,所述MEMS同轴滤波器包括两面抛 光的SOI片,由金属壁实现电壁的硅介质腔体,内部同轴结构和承载片。
其中,所述高阻硅片和承载片以圆片级键合的方式键合在一起。
其中,所述SOI片的二氧化硅层用于保证ICP蚀刻深度的精度。
图7示出了一种用于制作本实施例的MEMS同轴滤波器的方法流程图。其中,所述MEMS同轴滤波器的结构层圆片为SOI片,所述方法包括步骤S701、S702、S703、S704、S705和S706。
参照图7,在步骤S701中,对所述SOI片的背面进行ICP刻蚀,并在二氧化硅层停止刻蚀;
接着,在步骤S702中,将暴露的二氧化硅层移除。
接着,在步骤S703中,将经过ICP刻蚀的SOI片的背面金属化。
接着,在步骤S704中,将经过金属化的SOI片和承载片以圆片级键合的方式键合在一起。
其中,所述圆片级键合的方式与上述采用高阻硅片的实施例中所描述的键合方式相同,此处不再赘述。
接着,在步骤S705中,对SOI片的正面进行ICP刻蚀,并在金属层停止刻蚀。
接着,在步骤S706中,将经过ICP刻蚀的SOI片的正面金属化,并制作端口结构和电耦合结构。
例如,参照图8所示的制作本实施例的MEMS同轴滤波器的工艺图流程图,该工艺流程包括流程(a)至流程(g)。选择两面抛光的SOI片作为结构层圆片,如(a)所示。对所述SOI片的背面进行ICP刻蚀,并在二氧化硅层停止刻蚀,如(b)所示。接着,将暴露的二氧化硅层移除,如(c)所示。接着,将经过ICP刻蚀的SOI片的背面金属化,如(d)所示。接着,将经过金属化的SOI片和承载片以圆片级键合的方式键合在一起,如(e)所示。接着,对SOI片的正面进行ICP刻蚀,并在金属层停止刻蚀,如(f)所示。接着,将经过ICP刻蚀的SOI片的正面金属化,并制作端口结构和电耦合结构,如(g)所示。
根据本发明的一个优选实施例,所述MEMS同轴滤波器在所述结构层圆片的正面具有哑铃形状的金属图案,所述金属图案位于两个谐振腔 之间,用于产生电耦合。
其中,在电耦合金属图案下方,所述结构层圆片的背面,在金属化盲孔刻蚀步骤同时刻蚀孔或槽,以抑制两个谐振腔之间的磁耦合。
例如,参照图9所示的具有电耦合结构的MEMS同轴滤波器,该MEMS同轴滤波器有6个谐振腔,在结构层圆片的正面具有哑铃形状的金属图案,位于下排中间两个谐振腔之间,以产生电耦合。
制作该具有电耦合结构的MEMS同轴滤波器的工艺流程图如图10所示。该工艺流程包括流程(a)至流程(c)。对结构层圆片的背面刻蚀金属化盲孔刻蚀,并同时刻蚀孔或槽,以抑制两个谐振腔之间的磁耦合,相应的刻蚀图案如(a)所示。接着,对结构层圆片的正面进行ICP刻蚀,如(b)所示。接着,在结构层圆片的正面形成具有哑铃形状的金属图案,使其位于下排中间两个谐振腔之间,并对该哑铃形状的金属图案之外的区域进行金属化,相应的金属化图案如(c)所示。
优选地,通过改变哑铃形金属图案的形状金属的间隙来调节电耦合。
根据本发明的方案,通过利用MEMS技术在硅片上制作同轴滤波器,结合了MEMS技术、同轴谐振器结构和SIW技术的优势,相较于现有的金属波导滤波器或SIW滤波器,根据本发明的实施例的MEMS同轴滤波器极大地减小了毫米波滤波器的尺寸并降低了成本,并且具有较高的加工精度,简化了毫米波滤波器的生产时间和成本。
对于本领域技术人员而言,显然本发明不限于上述示范性实施例的细节,而且在不背离本发明的精神或基本特征的情况下,能够以其他的具体形式实现本发明。因此,无论从哪一点来看,均应将实施例看作是示范性的,而且是非限制性的,本发明的范围由所附权利要求而不是上述说明限定,因此旨在将落在权利要求的等同要件的含义和范围内的所有变化涵括在本发明内。不应将权利要求中的任何附图标记视为限制所涉及的权利要求。此外,显然“包括”一词不排除其他单元或步骤,单数不排除复数。***权利要求中陈述的多个单元或装置也可以由一个单元或装置通过软件或者硬件来实现。第一,第二等词语用来表示名称,而并不表示任何特定的顺序。

Claims (9)

  1. 一种MEMS同轴滤波器,其特征在于,所述MEMS同轴滤波器包括:
    两面抛光的结构层圆片;
    由金属壁或金属化通孔实现电壁的硅介质腔体;
    由金属化盲孔实现的内部同轴结构。
  2. 根据权利要求1所述的MEMS同轴滤波器,其特征在于:所述MEMS同轴滤波器采用SIW谐振器结构,在SIW谐振器结构中心刻蚀盲孔,所述结构层圆片为SOI片。
  3. 根据权利要求1所述的MEMS同轴滤波器,其特征在于:所述结构层圆片为高阻硅片,所述MEMS同轴滤波器还包括承载片,所述高阻硅片和承载片以圆片级键合的方式键合在一起。
  4. 根据权利要求1所述的MEMS同轴滤波器,其特征在于,所述结构层圆片为SOI片,所述MEMS同轴滤波器还包括承载片,所述SOI片和承载片以圆片级键合的方式键合在一起。
  5. 根据权利要求1至4中任一项所述的MEMS同轴滤波器,其特征在于,在所述结构层圆片的正面具有哑铃形状的金属图案,所述金属图案位于两个谐振腔之间,用于产生电耦合;
    其中,在电耦合金属图案下方,所述结构层圆片的背面,在金属化盲孔刻蚀步骤同时刻蚀孔或槽,以抑制两个谐振腔之间的磁耦合。
  6. 根据权利要求1至5中任一项所述的MEMS同轴滤波器,其特征在于,所述MEMS同轴滤波器的谐振频率基于以下任一种方式进行调节:
    -改变硅介质腔体的大小;
    -改变金属化盲孔的直径大小。
  7. 一种用于制作采用SIW结构的MEMS同轴滤波器的方法,其中,所述MEMS同轴滤波器的结构层圆片为SOI片,所述方法包括以下步骤:
    -对所述SOI片的背面进行ICP刻蚀,在二氧化硅层停止刻蚀;
    -将暴露的二氧化硅层移除;
    -对SOI片的正面进行ICP刻蚀;
    -将SOI片双面金属化,并制作端口结构和电耦合结构。
  8. 一种用于制作MEMS同轴滤波器的方法,其中,所述MEMS同轴滤波器的结构层圆片为高阻硅片,所述方法包括以下步骤:
    -对所述高阻硅片的背面进行ICP刻蚀;
    -将经过ICP刻蚀的高阻硅片的背面金属化;
    -将经过金属化的高阻硅片和承载片以圆片级键合的方式键合在一起;
    -对高阻硅片的正面进行ICP刻蚀;
    -将经过ICP刻蚀的高阻硅片正面金属化,并制作端口结构和电耦合结构。
  9. 一种用于制作MEMS同轴滤波器的方法,其中,所述MEMS同轴滤波器的结构层圆片为SOI片,所述方法包括以下步骤:
    -对所述SOI片的背面进行ICP刻蚀,并在二氧化硅层停止刻蚀;
    -将暴露的二氧化硅层移除;
    -将经过ICP刻蚀的SOI片的背面金属化;
    -将经过金属化的SOI片和承载片以圆片级键合的方式键合在一起;
    -对SOI片的正面进行ICP刻蚀,并在金属层停止刻蚀;
    -将经过ICP刻蚀的SOI片的正面金属化,并制作端口结构和电耦合结构。
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