WO2018210051A1 - 像素驱动电路及像素驱动方法、显示装置 - Google Patents

像素驱动电路及像素驱动方法、显示装置 Download PDF

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Publication number
WO2018210051A1
WO2018210051A1 PCT/CN2018/079681 CN2018079681W WO2018210051A1 WO 2018210051 A1 WO2018210051 A1 WO 2018210051A1 CN 2018079681 W CN2018079681 W CN 2018079681W WO 2018210051 A1 WO2018210051 A1 WO 2018210051A1
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Prior art keywords
switching element
signal
receives
pixel driving
control
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PCT/CN2018/079681
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English (en)
French (fr)
Inventor
朱健超
皇甫鲁江
李云飞
郑灿
刘利宾
陈义鹏
Original Assignee
京东方科技集团股份有限公司
鄂尔多斯市源盛光电有限责任公司
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Application filed by 京东方科技集团股份有限公司, 鄂尔多斯市源盛光电有限责任公司 filed Critical 京东方科技集团股份有限公司
Priority to JP2019556898A priority Critical patent/JP7094300B2/ja
Priority to EP18803198.3A priority patent/EP3627485B1/en
Priority to US16/309,203 priority patent/US10909920B2/en
Publication of WO2018210051A1 publication Critical patent/WO2018210051A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3266—Details of drivers for scan electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0421—Structural details of the set of electrodes
    • G09G2300/0426—Layout of electrodes and connections
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0819—Several active elements per pixel in active matrix panels used for counteracting undesired variations, e.g. feedback or autozeroing
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G09G2300/0852—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor being a dynamic memory with more than one capacitor
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G09G2300/0861—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0219—Reducing feedthrough effects in active matrix panels, i.e. voltage changes on the scan electrode influencing the pixel voltage due to capacitive coupling
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0223—Compensation for problems related to R-C delay and attenuation in electrodes of matrix panels, e.g. in gate electrodes or on-substrate video signal electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0233—Improving the luminance or brightness uniformity across the screen
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0238—Improving the black level
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/04—Maintaining the quality of display appearance
    • G09G2320/043—Preventing or counteracting the effects of ageing
    • G09G2320/045—Compensation of drifts in the characteristics of light emitting or modulating elements

Definitions

  • the present disclosure relates to the field of display technologies, and in particular, to a pixel driving circuit, a pixel driving method, and a display device.
  • OLED Organic Light Emitting Diode
  • PMOLED Passive Matrix Driving OLED
  • AMOLED Active Matrix Driving OLED
  • An object of the present disclosure is to provide a pixel driving circuit, a pixel driving method, and a display device, and at least to some extent overcome one or more problems due to limitations and disadvantages of the related art.
  • a pixel driving circuit for driving an electroluminescent element includes:
  • control end receives the first scan signal, and the first end receives the initialization signal
  • control end receives the first scan signal, and the first end receives the initialization signal
  • control end receives the second scan signal, the first end receives the data signal, and the second end is connected to the second end of the second switching element;
  • control end receives the second scan signal, and the first end is connected to the second end of the first switching element
  • control end receives the third scan signal, the first end receives the initialization signal, and the second end is connected to the second end of the second switching element;
  • control end is connected to the second end of the first switching element, the first end receives the first power signal, and the second end is connected to the second end of the fourth switching element;
  • control terminal receives the control signal, the first end is connected to the second end of the driving transistor, and the second end is connected to the first pole of the electroluminescent element;
  • first end is connected to the second end of the third switching element, and the second end is connected to the control end of the driving transistor;
  • the first end is connected to the control end of the driving transistor, and the second end is connected to the first end of the driving transistor.
  • the first switching element and the second switching element are turned on by the first scan signal, so that the initialization signal is transmitted to the first switching element and the second switching element, respectively.
  • the third switching element and the fourth switching element are turned on by the second scan signal to transmit the data signal to the first storage capacitor through the third switching element One end, and writing the first power signal and the threshold voltage of the driving transistor to the control end of the driving transistor;
  • the fifth switching element is turned on by the third scan signal, so that the initialization signal is transmitted to the first end of the first storage capacitor through the fifth switching element;
  • the sixth switching element is turned on by the control signal, so that the driving transistor is turned on under the voltage control of the second storage capacitor and outputted and driven by the first power signal. And flowing through the sixth switching element to drive the electroluminescent element to emit light.
  • a display device comprising the pixel driving circuit of any of the above.
  • FIG. 1 is a schematic diagram 1 of a pixel driving circuit provided in an exemplary embodiment of the present disclosure
  • FIG. 2 is a schematic diagram 2 of a pixel driving circuit provided in an exemplary embodiment of the present disclosure
  • FIG. 3 is a schematic diagram 3 of a pixel driving circuit provided in an exemplary embodiment of the present disclosure
  • FIG. 4 is an operational timing diagram of a pixel driving circuit provided in an exemplary embodiment of the present disclosure.
  • FIG. 5 is an equivalent circuit diagram 1 of a pixel driving circuit provided in an initialization stage according to an exemplary embodiment of the present disclosure
  • FIG. 6 is an equivalent circuit diagram of a pixel driving circuit provided in a compensation stage according to an exemplary embodiment of the present disclosure
  • FIG. 7 is an equivalent circuit diagram of a pixel driving circuit provided in a data voltage writing phase according to an exemplary embodiment of the present disclosure
  • FIG. 8 is an equivalent circuit diagram 1 of a pixel driving circuit provided in a driving stage according to an exemplary embodiment of the present disclosure
  • FIG. 9 is an equivalent circuit diagram 2 of a pixel driving circuit provided in a driving stage according to an exemplary embodiment of the present disclosure.
  • FIG. 10 is an equivalent circuit diagram 2 of the pixel driving circuit provided in an initialization stage according to an exemplary embodiment of the present disclosure.
  • each OLED relies on a driving circuit composed of a plurality of TFT (Thin Film Transistor) switches in one pixel unit on the array substrate to drive light for display.
  • TFT Thin Film Transistor
  • a pixel driving circuit for driving an electroluminescent element may include: a first switching element T1, a second switching element T2, and a third switching element. T3, fourth switching element T4, fifth switching element T5, driving transistor DT, sixth switching element T6, first storage capacitor C1 and second storage capacitor C2, wherein:
  • the control end of the first switching element T1 receives the first scan signal Sn, the first end of the first switching element T1 receives the initialization signal Vinit;
  • the control end of the second switching element T2 receives the first scan signal Sn, the first end of the second switching element T2 receives the initialization signal Vinit;
  • the control end of the third switching element T3 receives the second scan signal Sn+1, the first end of the third switching element T3 receives the data signal Data, and the second end of the third switching element T3 is connected to the second switching element T2 Two ends
  • the control end of the fourth switching element T4 receives the second scan signal Sn+1, and the first end of the fourth switching element T4 is connected to the second end of the first switching element T1;
  • the control end of the fifth switching element T5 receives the third scan signal Sn+2, the first end of the fifth switching element T5 receives the initialization signal Vinit, and the second end of the fifth switching element T5 is connected to the second switching element T2 Second end
  • a control terminal of the driving transistor DT is connected to the second end of the first switching element T1
  • a first end of the driving transistor DT receives the first power signal VDD
  • a second end of the driving transistor DT is connected to the fourth switching element T4
  • the control terminal of the sixth switching element T6 receives the control signal Em, the first end of the sixth switching element T6 is connected to the second end of the driving transistor DT, and the second end of the sixth switching element T6 is connected to the electroluminescent element. a first pole, the second pole of the electroluminescent element receives a second power signal VSS;
  • the first end of the first storage capacitor C1 is connected to the second end of the third switching element T3, and the second end of the first storage capacitor C1 is connected to the control end of the driving transistor DT;
  • the first end of the second storage capacitor C2 is connected to the control end of the driving transistor DT, and the second end of the second storage capacitor C2 is connected to the first end of the driving transistor DT.
  • the electroluminescent element is a current-driven electroluminescent element that is controlled to emit light by a current flowing through the driving transistor DT, for example, an OLED, but the electroluminescent element in the present exemplary embodiment does not Limited to this.
  • a pixel driving circuit provided in an exemplary embodiment of the present disclosure includes first to sixth switching elements T1 to T6, a driving transistor DT, a first storage capacitor C1, and a second storage capacitor C2; working in the pixel driving circuit
  • the first storage capacitor C1 The first end is floating, and the abrupt change of the first power signal VDD is mirrored to the first end of the second storage capacitor C2, so that the voltage difference between the control terminal and the first end of the driving transistor DT remains unchanged to ensure the output current is consistent.
  • the component T2 is configured to respectively transmit an initialization signal Vinit to the control terminal of the driving transistor DT and the first terminal of the first storage capacitor C1, to the first storage capacitor C1 and the second storage capacitor C2 and the control terminal of the drive transistor DT are initialized to eliminate the influence of the residual signal of the previous frame.
  • the pixel driving circuit may further include a seventh switching element T7, wherein
  • the control terminal of the seventh switching element T7 receives the control signal Em, and the first end of the seventh switching element T7 and the second end of the seventh switching element T7 are both connected to the second end of the first storage capacitor C1, so that The seventh switching element T7 compensates for the offset of the threshold voltage of the driving transistor DT generated by the charge transfer when the fourth switching element T4 is hopped in the driving phase.
  • the pixel driving circuit may further include an eighth switching element T8, wherein:
  • the control end of the eighth switching element T8 receives the first scan signal Sn, the first end of the eighth switching element T8 receives the initialization signal Vinit, and the second end of the eighth switching element T8 is connected to the electroluminescent element.
  • the eighth switching element T8 is turned on by the first scan signal Sn, so that the initialization signal Vinit is transmitted to the first electrode of the electroluminescent element through the eighth switching element T8 to lower the first pole of the electroluminescent element and The voltage difference between the second poles reduces the brightness of the electroluminescent element at low gray levels and improves the contrast of the pixels.
  • the first to eighth switching elements T1 to T8 may correspond to the first to eighth transistors, respectively, each of which has a control end, a first end, and a second end.
  • the control end of each transistor may be a gate, the first end may be a source, and the second end may be a drain; or, the control end of each transistor may be a gate, and the first end may be a drain, The two ends can be the source.
  • each transistor may be an enhancement transistor or a depletion transistor, which is not specifically limited in this exemplary embodiment.
  • all of the switching elements may be N-type thin film transistors, in which case the driving voltages of all the switching elements are high, and the first power signal VDD may be high level.
  • the second pole of the electroluminescent element can receive a low level signal, ie the second power signal VSS can be at a low level, the first anode of the electroluminescent element, the second pole of the electroluminescent element .
  • all of the switching elements may also be P-type thin film transistors.
  • the driving voltages of all the switching elements are low level
  • the first power source VDD may be low level
  • the second pole of the component can receive a high level signal, ie the second power signal VSS can be high.
  • the first extreme cathode of the electroluminescent element and the second pole of the electroluminescent element are substantially anode.
  • a pixel circuit driving method for driving a pixel driving circuit as shown in FIG. 1 there is also provided a pixel circuit driving method for driving a pixel driving circuit as shown in FIG. 1.
  • the operation of the pixel driving circuit of FIG. 1 will be described in detail in conjunction with the operation timing chart of the pixel driving circuit shown in FIG. 4, taking all switching elements as P-type thin film transistors as an example. Since all of the switching elements are P-type thin film transistors, the on-signal of all of the switching elements is low.
  • the first power signal VDD is at a low level
  • the second power signal VSS is at a high level.
  • the drive timing chart shows the first scan signal Sn, the second scan signal Sn+1, the third scan signal Sn+2, the control signal Em, and the data signal Data.
  • the first switching element T1 and the second switching element T2 are turned on by the first scan signal Sn, so that the initialization signal Vinit passes through the first A switching element T1 and the second switching element T2 are transmitted to a control terminal of the driving transistor DT and a first terminal of the first storage capacitor C1.
  • the first scan signal Sn is at a low level
  • the second scan line Sn+1 is at a high level
  • the third scan line Sn+2 is at a high level
  • the control signal Em is at a high level.
  • the first switching element T1 and the second switching element T2 are turned on, and the third to sixth switching elements T3 to T6 are turned off; the initialization signal Vinit passes through the first switching element T1 and the second switching element T2, respectively.
  • Transmitting to the control terminal of the driving transistor DT (ie, the first end of the second storage capacitor C2) and the first end of the first storage capacitor C1, controlling the first storage capacitor C1, the second storage capacitor C2, and the driving transistor DT The terminal is initialized to eliminate the influence of the residual signal of the previous frame.
  • the third switching element T3 and the fourth switching element T4 are turned on by the second scan signal Sn+1 to pass the data signal Data through the
  • the third switching element T3 is transmitted to the first end of the first storage capacitor C1, and the threshold voltages of the first power supply signal VDD and the driving transistor DT are written to the control terminal of the driving transistor DT.
  • the first scan signal Sn is at a high level
  • the second scan line Sn+1 is at a low level
  • the third scan line Sn+2 is at a high level
  • the control signal Em is at a high level. As shown in FIG.
  • the third switching element T3 and the fourth switching element T4 are turned on, the first to second switching elements T1 to T2 and the fifth to sixth switching elements T5 to T6 are turned off; the data signal Data is at a high level.
  • the voltage of the first end of the first storage capacitor C1 becomes Data; since the fourth switching element T4 is turned on, the driving transistor DT
  • the control terminal is connected to the second terminal of the driving transistor DT, so the potential of the control terminal of the driving transistor DT (ie, the potential of the second terminal of the first storage capacitor C1 and the potential of the first terminal of the second storage capacitor C2) becomes VDD+Vth.
  • Vth is the threshold voltage of the drive transistor DT.
  • the fifth switching element T5 is turned on by the third scan signal Sn+2, so that the initialization signal Vinit passes through the fifth switching element T5. Transmitted to the first end of the first storage capacitor C1.
  • the first scan signal Sn is at a high level
  • the second scan line Sn+1 is at a high level
  • the third scan line Sn+2 is at a low level
  • the control signal Em is at a high level.
  • the fifth switching element T5 is turned on, the first to fourth switching elements T1 to T4 and the sixth switching element T6 are turned off; the initialization signal Vinit is transmitted to the first storage capacitor C1 through the five switching elements T5.
  • the voltage of the first end of the first storage capacitor C1 is changed from Data to Vinit.
  • the second end of the first storage capacitor C1 ie, the control terminal of the driving transistor DT and the first terminal of the second storage capacitor C2 is floating, and the voltage is divided by the first storage capacitor C1 and the second storage capacitor C2. Therefore, the potential of the second end of the first storage capacitor C1 (ie, the potential of the control terminal of the driving transistor DT and the potential of the first terminal of the second storage capacitor C2) jumps to VDD+Vth+(C1/(C1+C2)) (Vinit-Data).
  • the sixth switching element T6 is turned on by the control signal Em, so that the driving transistor DT is turned on under the voltage control of the second storage capacitor C2.
  • a driving current is outputted by the first power supply signal VDD, and flows through the sixth switching element T6 to drive the electroluminescent element to emit light.
  • the first scan signal Sn is at a high level
  • the second scan line Sn+1 is at a high level
  • the third scan line Sn+2 is at a high level
  • the control signal Em is at a low level. As shown in FIG.
  • the sixth switching element is turned on T6, and the first to fifth switching elements T1 to T5 are turned off; at this time, the first end of the sixth switching element T6 is in communication with the second end of the sixth switching element T6,
  • the potential of the first terminal of the driving transistor DT is VDD
  • the voltage of the control terminal of the driving transistor DT is the potential VDD+Vth+(C1/(C1+C2))(Vinit-Data) of the second terminal of the first storage capacitor C1.
  • Vgs is the voltage difference between the gate and the source of the drive transistor DT
  • Vg is the gate voltage of the drive transistor DT
  • Vs is the source voltage of the drive transistor.
  • the drive current of the drive transistor DT is independent of the threshold voltage Vth of the drive transistor DT and the first power supply signal VDD voltage. Since the third scan signal Sn+2 is added and the two ends of the second storage capacitor C2 are respectively connected to the control terminal and the first end of the driving transistor DT, the first end of the first storage capacitor C1 is floating during the driving phase.
  • the first power supply signal VDD is abruptly mirrored by the first end of the second storage capacitor C2, so that the voltage difference between the control terminal and the first terminal of the driving transistor DT remains unchanged, ensuring that the output current is uniform, thereby eliminating the power line
  • the effect of IR voltage drop on display brightness ensures uniformity of brightness of each pixel display.
  • a full P-type thin film transistor has the following advantages: for example, strong noise suppression; for example, low level conduction, and low level in charge management is easy to implement; for example, a P-type thin film transistor is simple in process and relatively low in price; for example; P-type thin film transistors have better stability and the like.
  • the pixel driving circuit may further include: a seventh switching element T7, the control end of the seventh switching element T7 receives the control signal Em, and the first end and the seventh switch of the seventh switching element T7
  • the second end of the component T7 is connected to the second end of the first storage capacitor C1 (as shown in FIG. 2);
  • the pixel driving method may further include: in the driving phase (ie, the first time period t4), As shown in FIG. 9, the seventh switching element T7 is turned on by the control signal Em to cause a voltage shift caused by charge transfer when the seventh switching element T7 jumps to the fourth switching element T4. Make compensation.
  • the pixel driving circuit further includes: an eighth switching element T8, the control end of the eighth switching element T8 receives the first scan signal Sn, and the first end of the eighth switching element T8 receives the The initialization signal Vinit, the second end of the eighth switching element T8 is connected to the first pole of the electroluminescent element (as shown in FIG. 3); the pixel driving method further comprises: in the initialization phase (ie, the first time) a segment t1), as shown in FIG.
  • the eighth switching element T8 is turned on by the first scan signal Sn, so that the initialization signal Vinit is transmitted to the electroluminescence through the eighth switching element T8 a first pole of the element such that the initialization signal Vinit is transmitted to the first pole of the electroluminescent element through the eighth switching element T8 to reduce the first pole and the second pole between the electroluminescent element
  • the voltage difference reduces the brightness of the electroluminescent element at low gray levels and improves the contrast of the pixel.
  • all the switching elements are P-type thin film transistors; however, those skilled in the art can easily obtain pixels in which all switching elements are N-type thin film transistors according to the pixel driving circuit provided by the present disclosure. Drive circuit.
  • all of the switching elements may be N-type thin film transistors, and since all of the switching elements are N-type thin film transistors, the on signals of all of the switching elements are high. .
  • the first power signal VDD is at a high level
  • the second power signal VSS is at a low level.
  • CMOS Complementary Metal Oxide Semiconductor
  • the example embodiment also provides a display device including the above-described pixel driving circuit.
  • the display device includes: a plurality of scan lines for providing scan signals; a plurality of data lines for providing data signals; and a plurality of pixel drive circuits electrically connected to the scan lines and the data lines; at least one of the pixels
  • the driving circuit includes any of the above-described pixel driving circuits in the present exemplary embodiment. Since the pixel driving circuit mirrors the abrupt change of the first power signal VDD to the first end of the second storage capacitor C2, the voltage difference between the control terminal and the first terminal of the driving transistor DT remains unchanged, and the output current is ensured to be consistent.
  • the display device may include any product or component having a display function, such as a mobile phone, a tablet computer, a television, a notebook computer, a digital photo frame, a navigator, and the like.
  • modules or units of equipment for action execution are mentioned in the detailed description above, such division is not mandatory. Indeed, in accordance with embodiments of the present disclosure, the features and functions of two or more modules or units described above may be embodied in one module or unit. Conversely, the features and functions of a module or unit described above may be further divided into multiple modules or units.

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Abstract

一种像素驱动电路及驱动方法、显示装置。像素驱动电路包括：第一开关元件（T1）、第二开关元件（T2）、第三开关元件（T3）、第四开关元件（T4）、第五开关元件（T5）、驱动晶体管（DT）、第六开关元件（T6）、第一存储电容（C1）以及第二存储电容（C2），可以确保输出电流的一致，从而可以消除电源线IR压降对显示亮度造成的影响，保证各个像素显示亮度的均一性。

Description

像素驱动电路及像素驱动方法、显示装置 技术领域
本公开涉及显示技术领域，尤其涉及一种像素驱动电路及像素驱动方法、显示装置。
背景技术
有机发光二极管(Organic Light Emitting Diode，OLED)作为一种电流型发光器件，因其所具有的自发光、快速响应、宽视角和可制作在柔性衬底上等特点而越来越多地被应用于高性能显示领域当中。OLED显示装置按照驱动方式的不同可分为PMOLED(Passive Matrix Driving OLED，无源矩阵驱动有机发光二极管)和AMOLED(Active Matrix Driving OLED，有源矩阵驱动有机发光二极管)两种。由于AMOLED显示器具有低制造成本、高应答速度、省电、可用于便携式设备的直流驱动、工作温度范围大等优点，AMOLED得到了显示技术开发商日益广泛的关注。
在现有的部分AMOLED显示面板中，存在显示亮度不均匀的问题。
需要说明的是，在上述背景技术部分公开的信息仅用于加强对本公开的背景的理解，因此可以包括不构成对本领域普通技术人员已知的现有技术的信息。
发明内容
本公开的目的在于提供一种像素驱动电路及像素驱动方法、显示装置，进而至少在一定程度上克服由于相关技术的限制和缺陷而导致的一个或者多个问题。
根据本公开的一个方面，提供一种像素驱动电路，用于驱动电致发光元件，包括：
第一开关元件，控制端接收第一扫描信号、第一端接收初始化信号；
第二开关元件，控制端接收所述第一扫描信号、第一端接收所述初始化信号；
第三开关元件，控制端接收第二扫描信号、第一端接收数据信号、第二端连接所述第二开关元件的第二端；
第四开关元件，控制端接收所述第二扫描信号、第一端连接所述第一开关元件的第二端；
第五开关元件，控制端接收第三扫描信号、第一端接收所述初始化信号、第二端连接所述第二开关元件的第二端；
驱动晶体管，控制端连接所述第一开关元件的第二端，第一端接收第一电源信号，第二端连接所述第四开关元件的第二端；
第六开关元件，控制端接收控制信号、第一端连接所述驱动晶体管的第二端、第二端连接所述电致发光元件的第一极；
第一存储电容，第一端连接所述第三开关元件的第二端，第二端连接所述驱动晶体管的控制端；
第二存储电容，第一端连接所述驱动晶体管的控制端，第二端连接所述驱动晶体管的第一端。
根据本公开的另一个方面，提供一种像素驱动方法，用于驱动上述任意一项所述的像素驱动电路，所述像素驱动方法包括：
在初始化阶段，利用所述第一扫描信号导通所述第一开关元件和所述第二开关元件，以使所述初始化信号分别经过所述第一开关元件和所述第二开关元件传输至所述驱动晶体管的控制端和所述第一存储电容的第一端；
在补偿阶段，利用所述第二扫描信号导通所述第三开关元件和所述第四开关元件，以使所述数据信号经过所述第三开关元件传输至所述第一存储电容的第一端，并将所述第一电源信号和所述驱动晶体管的阈值电压写入所述驱动晶体管的控制端；
在数据电压写入阶段，利用所述第三扫描信号导通所述第五开关元件，以使所述初始化信号通过所述第五开关元件传输至所述第一存储电容的第一端；
在驱动阶段，利用所述控制信号导通所述第六开关元件，以使所述驱动晶体管在所述第二存储电容的电压控制下导通并在所述第一电源信号的作用下输出驱动电流，并流经所述第六开关元件以驱动所述电致发光元件进行发光。
根据本公开的再一个方面，提供一种显示装置，包括上述任意一项所述的像素驱动电路。
附图说明
通过参照附图来详细描述其示例性实施例，本公开的上述和其它特征及优点将变得更加明显。显而易见地，下面描述中的附图仅仅是本公开的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。在附图中：
图1为本公开一示例性实施例中提供的像素驱动电路的示意图一；
图2为本公开一示例性实施例中提供的像素驱动电路的示意图二；
图3为本公开一示例性实施例中提供的像素驱动电路的示意图三；
图4为本公开一示例性实施例中提供的像素驱动电路的工作时序图；
图5为本公开一示例性实施例中提供的像素驱动电路在初始化阶段的等效电路图 一；
图6为本公开一示例性实施例中提供的像素驱动电路在补偿阶段的等效电路图；
图7为本公开一示例性实施例中提供的像素驱动电路在数据电压写入阶段的等效电路图；
图8为本公开一示例性实施例中提供的像素驱动电路在驱动阶段的等效电路图一；
图9为本公开一示例性实施例中提供的像素驱动电路在驱动阶段的等效电路图二；
图10为本公开一示例性实施例中提供的像素驱动电路在初始化阶段的等效电路图二。
具体实施方式
现在将参考附图更全面地描述示例实施例。然而，示例实施例能够以多种形式实施，且不应被理解为限于在此阐述的实施例；相反，提供这些实施例使得本公开将全面和完整，并将示例实施例的构思全面地传达给本领域的技术人员。所描述的特征、结构或特性可以以任何合适的方式结合在一个或更多实施例中。在下面的描述中，提供许多具体细节从而给出对本公开的实施例的充分理解。然而，本领域技术人员将意识到，可以实践本公开的技术方案而没有所述特定细节中的一个或更多，或者可以采用其它的方法、组元、材料、装置、步骤等。在其它情况下，不详细示出或描述公知技术方案以避免模糊本公开的各方面。
此外，附图仅为本公开的示意性图解，并非一定是按照比例绘制。图中相同的附图标记标识相同或相似的部分，因而将省略对它们的重复描述。
在多数AMOLED显示面板中，每个OLED均依靠阵列基板上一个像素单元内的多个TFT(Thin Film Transistor，薄膜晶体管)开关所组成的驱动电路驱动发光实现显示。
然而，随着AMOLED显示面板向高分辨率或更大尺寸发展，需要较多数量的像素和较长的导线，导线方阻和总电阻也越来越大。导线的电阻的不同使每一个像素电路获得的电源电压不同，从而使在相同的数据信号电压输入下，不同的像素有不同的电流、亮度输出，导致面板的显示亮度不均匀。
本示例实施方式中提供了一种像素驱动电路，用于驱动电致发光元件，参照图1所示，该像素驱动电路可以包括：第一开关元件T1、第二开关元件T2、第三开关元件T3、第四开关元件T4、第五开关元件T5、驱动晶体管DT、第六开关元件T6、第一存储电容C1以及第二存储电容C2，其中：
第一开关元件T1的控制端接收第一扫描信号Sn、第一开关元件T1的第一端接收初始化信号Vinit；
第二开关元件T2的控制端接收所述第一扫描信号Sn、第二开关元件T2的第一端接收所述初始化信号Vinit；
第三开关元件T3的控制端接收第二扫描信号Sn+1、第三开关元件T3的第一端接收数据信号Data、第三开关元件T3的第二端连接所述第二开关元件T2的第二端；
第四开关元件T4的控制端接收所述第二扫描信号Sn+1、第四开关元件T4的第一端连接所述第一开关元件T1的第二端；
第五开关元件T5的控制端接收第三扫描信号Sn+2、第五开关元件T5的第一端接收所述初始化信号Vinit、第五开关元件T5的第二端连接所述第二开关元件T2的第二端；
驱动晶体管DT的控制端连接所述第一开关元件T1的第二端，驱动晶体管DT的第一端接收第一电源信号VDD，驱动晶体管DT的第二端连接所述第四开关元件T4的第二端；
第六开关元件T6的控制端接收控制信号Em、第六开关元件T6的第一端连接所述驱动晶体管DT的第二端、第六开关元件T6的第二端连接所述电致发光元件的第一极，所述电致发光元件的第二极接收第二电源信号VSS；
第一存储电容C1的第一端连接所述第三开关元件T3的第二端，第一存储电容C1的第二端连接所述驱动晶体管DT的控制端；
第二存储电容C2的第一端连接所述驱动晶体管DT的控制端，第二存储电容C2的第二端连接所述驱动晶体管DT的第一端。
在本示例实施方式中，电致发光元件为电流驱动型电致发光元件，由流经驱动晶体管DT的电流控制其进行发光，例如，OLED，但本示例性实施例中的电致发光元件不限于此。
本公开示例性实施例中所提供的像素驱动电路，包括第一开关元件T1至第六开关元件T6、驱动晶体管DT、第一存储电容C1以及第二存储电容C2；在该像素驱动电路的工作过程中，一方面，由于加入了第三扫描信号Sn+2且第二存储电容C2的两端分别与驱动晶体管DT的控制端以及第一端连接，因此在驱动阶段，第一存储电容C1的第一端浮空，第一电源信号VDD的突变被镜像到第二存储电容C2的第一端，使得驱动晶体管DT的控制端和第一端之间的电压差保持不变，确保输出电流一致，从而消除了电源线IR压降对显示亮度造成的影响，保证各个像素显示亮度的均一性；另一方面，利用第一扫描信号Sn导通所述第一开关元件T1和所述第二开关元件T2，以使初始化信号Vinit分别传输至所述驱动晶体管DT的控制端和所述第一存储电容C1的第一端，对第一存储电容C1、第二存储电容C2以及驱动晶体管DT的控制端进行初始化，从而消除前一帧残留信号的影响。
在此基础上，参考图2所示，该像素驱动电路还可以包括第七开关元件T7，其中
第七开关元件T7的控制端接收所述控制信号Em，第七开关元件T7的第一端以及第七开关元件T7的第二端均连接所述第一存储电容C1的第二端，以使所述第七开关元件T7在驱动阶段补偿第四开关元件T4跳变时由电荷转移产生的驱动晶体管DT的阈值电压的偏移量。
在此基础上，参考图3所示，该像素驱动电路还可以包括第八开关元件T8，其中：
第八开关元件T8的控制端接收所述第一扫描信号Sn，第八开关元件T8的第一端接收所述初始化信号Vinit、第八开关元件T8的第二端连接所述电致发光元件的第一极。在初始化阶段，利用第一扫描信号Sn导通第八开关元件T8，以使初始化信号Vinit经过第八开关元件T8传输至电致发光元件的第一极，以降低电致发光元件第一极以及第二极之间的电压差，在低灰阶时可降低电致发光元件的亮度，提高像素的对比度。
在本示例性实施例中，所述第一开关元件T1至第八开关元件T8可以分别对应第一晶体管至第八晶体管，每一个晶体管均具有控制端、第一端以及第二端。具体的，各个晶体管的控制端可以为栅极、第一端可以为源极、第二端可以为漏极；或者，各个晶体管的控制端可以为栅极、第一端可以为漏极、第二端可以为源极。此外，各个晶体管可以为增强型晶体管或者耗尽型晶体管，本示例性实施例对此不作特殊限定。
在此基础上，所有所述开关元件可以均为N型薄膜晶体管，在此情况下，所有开关元件的驱动电压均为高电平，所述第一电源信号VDD可以为高电平，所述电致发光元件的第二极可以接收低电平信号，即第二电源信号VSS可以为低电平，所述电致发光元件的第一极为阳极，所述电致发光元件的第二极为阴极。
或者，所有所述开关元件也可以均为P型薄膜晶体管，在此情况下，所有开关元件的驱动电压均为低电平，所述第一电源VDD可以为低电平，所述电致发光元件的第二极可以接收高电平信号，即第二电源信号VSS可以为高电平。所述电致发光元件的第一极为阴极，所述电致发光元件的第二极为阳极。
在本公开的示例性实施例中，还提供了一种像素电路驱动方法，用于驱动如图1所示的像素驱动电路。
下面，结合图4所示的像素驱动电路的工作时序图对图1中的像素驱动电路的工作过程加以详细的说明，以所有开关元件均为P型薄膜晶体管为例。由于所有开关元件均为P型薄膜晶体管，因此，所有所述开关元件的导通信号均为低电平。第一电源信号VDD为低电平，第二电源信号VSS为高电平。该驱动时序图示出了第一扫描信号Sn，第二扫描信号Sn+1，第三扫描信号Sn+2，控制信号Em，数据信号Data。
在初始化阶段(即第一时间段t1)，利用所述第一扫描信号Sn导通所述第一开关元 件T1和所述第二开关元件T2，以使所述初始化信号Vinit分别经过所述第一开关元件T1和所述第二开关元件T2传输至所述驱动晶体管DT的控制端和所述第一存储电容C1的第一端。在本示例性实施例中，第一扫描信号Sn处于低电平，第二扫描线Sn+1处于高电平，第三扫描线Sn+2处于高电平，控制信号Em处于高电平，如图5所示，第一开关元件T1和所述第二开关元件T2导通，第三至第六开关元件T3～T6关闭；初始化信号Vinit通过分别第一开关元件T1和第二开关元件T2传输至所述驱动晶体管DT的控制端(即第二存储电容C2的第一端)和第一存储电容C1的第一端，对第一存储电容C1、第二存储电容C2以及驱动晶体管DT控制端进行初始化，从而消除前一帧残留信号的影响。
在补偿阶段(即第一时间段t2)，利用所述第二扫描信号Sn+1导通所述第三开关元件T3和所述第四开关元件T4，以使所述数据信号Data经过所述第三开关元件T3传输至所述第一存储电容C1的第一端，并将所述第一电源信号VDD和所述驱动晶体管DT的阈值电压写入所述驱动晶体管DT的控制端。在本示例性实施例中，第一扫描信号Sn处于高电平，第二扫描线Sn+1处于低电平，第三扫描线Sn+2处于高电平，控制信号Em处于高电平，如图6所示，第三开关元件T3、第四开关元件T4导通，第一至第二开关元件T1～T2以及第五至第六开关元件T5～T6关闭；数据信号Data处于高电平，并通过第三开关元件T3写入第一存储电容C1的第一端，因此，第一存储电容C1的第一端的电压变为Data；由于第四开关元件T4导通，使得驱动晶体管DT的控制端和驱动晶体管DT的第二端连接，因此驱动晶体管DT的控制端的电位(即第一存储电容C1的第二端电位，第二存储电容C2的第一端电位)变为VDD+Vth，其中，Vth为驱动晶体管DT的阈值电压。
在数据电压写入阶段(即第一时间段t3)，利用所述第三扫描信号Sn+2导通所述第五开关元件T5，以使所述初始化信号Vinit通过所述第五开关元件T5传输至所述第一存储电容C1的第一端。在本示例性实施例中，第一扫描信号Sn处于高电平，第二扫描线Sn+1处于高电平，第三扫描线Sn+2处于低电平，控制信号Em处于高电平，如图7所示，第五开关元件T5导通，第一开关元件T1至第四开关元件T4以及第六开关元件T6关闭；初始化信号Vinit通过五开关元件T5传输至第一存储电容C1的第一端，使得第一存储电容C1的第一端的电压由Data变为Vinit。由于第一存储电容C1的第二端(即驱动晶体管DT的控制端、第二存储电容C2的第一端)浮空，且由于第一存储电容C1与第二存储电容C2有分压的作用，因此，第一存储电容C1的第二端的电位(即驱动晶体管DT的控制端的电位、第二存储电容C2的第一端的电位)跳变为VDD+Vth+(C1/(C1+C2))(Vinit-Data)。
在驱动阶段(即第一时间段t4)，利用所述控制信号Em导通所述第六开关元件T6，以使所述驱动晶体管DT在所述第二存储电容C2的电压控制下导通并在所述第一电源信号VDD的作用下输出驱动电流，并流经所述第六开关元件T6以驱动所述电致发光元件进行发光。在本示例性实施例中，第一扫描信号Sn处于高电平，第二扫描线Sn+1处于高电平，第三扫描线Sn+2处于高电平，控制信号Em处于低电平，如图8所示，第六开关元件导通T6，第一至第五开关元件T1～T5关闭；此时，第六开关元件T6的第一端与第六开关元件T6的第二端联通，驱动晶体管DT的第一端电位为VDD，且驱动晶体管DT的控制端的电压为第一存储电容C1的第二端的电位VDD+Vth+(C1/(C1+C2))(Vinit-Data)。
在此基础上，根据驱动晶体管DT的驱动电流的计算公式：
Ion＝K×(Vgs-Vth)2＝K×(Vg-Vs-Vth)2
＝K×(VDD+Vth+(C1/(C1+C2))(Vinit-Data)-VDD-Vth)2
＝K×(C1/(C1+C2))(Vinit-Data)2
其中，Vgs为驱动晶体管DT的栅极和源极之间的电压差、Vg为驱动晶体管DT的栅极电压、Vs为驱动晶体管的源极电压。
由此可知，驱动晶体管DT的驱动电流与驱动晶体管DT的阈值电压Vth，第一电源信号VDD电压均无关。由于加入了第三扫描信号Sn+2且第二存储电容C2的两端分别与驱动晶体管DT的控制端以及第一端连接，因此在驱动阶段，第一存储电容C1的第一端浮空，第一电源信号VDD的突变被镜像的第二存储电容C2的第一端，使得驱动晶体管DT的控制端和第一端之间的电压差保持不变，确保输出电流一致，从而消除了电源线IR压降对显示亮度造成的影响，保证各个像素显示亮度的均一性。
采用全P型薄膜晶体管具有以下优点：例如对噪声抑制力强；例如由于是低电平导通，而充电管理中低电平容易实现；例如P型薄膜晶体管制程简单，相对价格较低；例如P型薄膜晶体管的稳定性更好等等。
在不同的信号同时跳变时，不同的信号之间可能会相互影响，为了避免上述现象，如图4所示，在初始化阶段(即第一时间段t1)与补偿阶段(即第一时间段t2)之间可以有一保持阶段，以使不同的信号在不同的时间跳变，进而避免上述现象。同理，在补偿阶段(即第一时间段t2)与数据电压写入阶段(即第一时间段t3)之间也可以有以保持阶段，以使不同的信号在不同的时间跳变。
在图1的基础上，所述像素驱动电路还可以包括：第七开关元件T7，第七开关元件T7的控制端接收所述控制信号Em，第七开关元件T7的第一端以及第七开关元件T7的第二端均连接所述第一存储电容C1的第二端(如图2所示)；所述像素驱动方法还可以 包括：在所述驱动阶段(即第一时间段t4)，如图9所示，利用所述控制信号Em导通所述第七开关元件T7，以使所述第七开关元件T7对所述第四开关元件T4跳变时由电荷转移产生的电压偏移进行补偿。
在图1的基础上，所述像素驱动电路还包括：第八开关元件T8，第八开关元件T8的控制端接收所述第一扫描信号Sn，第八开关元件T8的第一端接收所述初始化信号Vinit、第八开关元件T8的第二端连接所述电致发光元件的第一极(如图3所示)；所述像素驱动方法还包括：在所述初始化阶段(即第一时间段t1)，如图10所示，利用所述第一扫描信号Sn导通所述第八开关元件T8，以使所述初始化信号Vinit经过所述第八开关元件T8传输至所述电致发光元件的第一极，以使所述初始化信号Vinit经过所述第八开关元件T8传输至所述电致发光元件的第一极，以降低电致发光元件第一极以及第二极之间的电压差，在低灰阶时可降低电致发光元件的亮度，提高像素的对比度。
需要说明的是，在上述具体的实施例中，所有开关元件均为P型薄膜晶体管；但本领域技术人员容易根据本公开所提供的像素驱动电路得到所有开关元件均为N型薄膜晶体管的像素驱动电路。在本公开的一种示例性实施方式中，所有开关元件可以均为N型薄膜晶体管，由于所有开关元件均为N型薄膜晶体管，因此，所有所述开关元件的导通信号均为高电平。第一电源信号VDD为高电平，第二电源信号VSS为低电平。当然，本公开所提供的像素驱动电路也可以改为CMOS(Complementary Metal Oxide Semiconductor，互补金属氧化物半导体)电路等，并不局限于本实施例中所提供的像素驱动电路，这里不再赘述。
本示例实施方式还提供一种显示装置，包括上述的像素驱动电路。该显示装置包括：多条扫描线，用于提供扫描信号；多条数据线，用于提供数据信号；多个像素驱动电路，电连接于上述的扫描线和数据线；其中至少之一的像素驱动电路包括为本示例实施方式中的上述任一像素驱动电路。由于该像素驱动电路将第一电源信号VDD的突变镜像到第二存储电容C2的第一端，使得驱动晶体管DT的控制端和第一端之间的电压差保持不变，确保输出电流一致，也消除了电源线IR压降对显示亮度造成的影响，保证各个像素显示亮度的均一性，从而极大的提升显示品质。其中，所述显示装置例如可以包括手机、平板电脑、电视机、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。
需要说明的是，所述显示装置中各模块单元的具体细节已经在对应的像素驱动电路中进行了详细的描述，因此这里不再赘述。
应当注意，尽管在上文详细描述中提及了用于动作执行的设备的若干模块或者单元，但是这种划分并非强制性的。实际上，根据本公开的实施方式，上文描述的两个或更多模块或者单元的特征和功能可以在一个模块或者单元中具体化。反之，上文描述的一个 模块或者单元的特征和功能可以进一步划分为由多个模块或者单元来具体化。
此外，尽管在附图中以特定顺序描述了本公开中方法的各个步骤，但是，这并非要求或者暗示必须按照该特定顺序来执行这些步骤，或是必须执行全部所示的步骤才能实现期望的结果。附加的或备选的，可以省略某些步骤，将多个步骤合并为一个步骤执行，以及/或者将一个步骤分解为多个步骤执行等。
本领域技术人员在考虑说明书及实践这里公开的发明后，将容易想到本公开的其它实施方案。本申请旨在涵盖本公开的任何变型、用途或者适应性变化，这些变型、用途或者适应性变化遵循本公开的一般性原理并包括本公开未公开的本技术领域中的公知常识或惯用技术手段。说明书和实施例仅被视为示例性的，本公开的真正范围和精神由所附的权利要求指出。

Claims (10)

  1. 一种像素驱动电路，用于驱动电致发光元件，其中，包括：
    第一开关元件，控制端接收第一扫描信号、第一端接收初始化信号；
    第二开关元件，控制端接收所述第一扫描信号、第一端接收所述初始化信号；
    第三开关元件，控制端接收第二扫描信号、第一端接收数据信号、第二端连接所述第二开关元件的第二端；
    第四开关元件，控制端接收所述第二扫描信号、第一端连接所述第一开关元件的第二端；
    第五开关元件，控制端接收第三扫描信号、第一端接收所述初始化信号、第二端连接所述第二开关元件的第二端；
    驱动晶体管，控制端连接所述第一开关元件的第二端，第一端接收第一电源信号，第二端连接所述第四开关元件的第二端；
    第六开关元件，控制端接收控制信号、第一端连接所述驱动晶体管的第二端、第二端连接所述电致发光元件的第一极；
    第一存储电容，第一端连接所述第三开关元件的第二端，第二端连接所述驱动晶体管的控制端；
    第二存储电容，第一端连接所述驱动晶体管的控制端，第二端连接所述驱动晶体管的第一端。
  2. 根据权利要求1所述的像素驱动电路，其中，还包括：
    第七开关元件，控制端接收所述控制信号，第一端以及第二端均连接所述第一存储电容的第二端。
  3. 根据权利要求1所述的像素驱动电路，其中，还包括：
    第八开关元件，控制端接收所述第一扫描信号，第一端接收所述初始化信号、第二端连接所述电致发光元件的第一极。
  4. 根据权利要求1所述的像素驱动电路，其中，所有所述开关元件均为N型薄膜晶体管，所述第一电源信号为高电平，所述电致发光元件的第二极接收低电平信号。
  5. 根据权利要求1所述的像素驱动电路，其中，所有所述开关元件均为P型薄膜晶体管；所述第一电源信号为低电平，所述电致发光元件的第二极接收高电平信号。
  6. 一种像素驱动方法，用于驱动权利要求1所述的像素驱动电路，其中，所述像素驱动方法包括：
    在初始化阶段，利用所述第一扫描信号导通所述第一开关元件和所述第二开关元件，以使所述初始化信号分别经过所述第一开关元件和所述第二开关元件传输至所述驱动晶体管的控制端和所述第一存储电容的第一端；
    在补偿阶段，利用所述第二扫描信号导通所述第三开关元件和所述第四开关元件，以使所述数据信号经过所述第三开关元件传输至所述第一存储电容的第一端，并将所述第一电源信号和所述驱动晶体管的阈值电压写入所述驱动晶体管的控制端；
    在数据电压写入阶段，利用所述第三扫描信号导通所述第五开关元件，以使所述初始化信号通过所述第五开关元件传输至所述第一存储电容的第一端；
    在驱动阶段，利用所述控制信号导通所述第六开关元件，以使所述驱动晶体管在所述第二存储电容的电压控制下导通并在所述第一电源信号的作用下输出驱动电流，并流经所述第六开关元件以驱动所述电致发光元件进行发光。
  7. 根据权利要求6所述的像素驱动方法，其中，所述像素驱动电路还包括：第七开关元件，控制端接收所述控制信号，第一端以及第二端均连接所述第一存储电容的第二端；所述像素驱动方法还包括：
    在所述驱动阶段，利用所述控制信号导通所述第七开关元件，以使所述第七开关元件对所述第四开关元件跳变时由电荷转移产生的电压偏移进行补偿。
  8. 根据权利要求6所述的像素驱动方法，其中，所述像素驱动电路还包括：第八开关元件，控制端接收所述第一扫描信号，第一端接收所述初始化信号、第二端连接所述电致发光元件的第一极；所述像素驱动方法还包括：
    在所述初始化阶段，利用所述第一扫描信号导通所述第八开关元件，以使所述初始化信号经过所述第八开关元件传输至所述电致发光元件的第一极。
  9. 根据权利要求7所述的像素驱动方法，其中，所有所述开关元件的导通信号均为低电平或者均为高电平。
  10. 一种显示装置，其中，包括权利要求1～5中任意一项所述的像素驱动电路。
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