WO2018113922A1 - Light emitting element with an optoelectronic semiconductor chip - Google Patents

Light emitting element with an optoelectronic semiconductor chip Download PDF

Info

Publication number
WO2018113922A1
WO2018113922A1 PCT/EP2016/081927 EP2016081927W WO2018113922A1 WO 2018113922 A1 WO2018113922 A1 WO 2018113922A1 EP 2016081927 W EP2016081927 W EP 2016081927W WO 2018113922 A1 WO2018113922 A1 WO 2018113922A1
Authority
WO
WIPO (PCT)
Prior art keywords
semiconductor structure
substrate
light emitting
emitting element
carrier
Prior art date
Application number
PCT/EP2016/081927
Other languages
French (fr)
Inventor
Choon Kim LIM
Original Assignee
Osram Opto Semiconductors Gmbh
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Osram Opto Semiconductors Gmbh filed Critical Osram Opto Semiconductors Gmbh
Priority to PCT/EP2016/081927 priority Critical patent/WO2018113922A1/en
Publication of WO2018113922A1 publication Critical patent/WO2018113922A1/en

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/52—Encapsulations
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate

Definitions

  • the invention refers to a light emitting element with an op ⁇ toelectronic semiconductor chip and a method for producing a light emitting element with an optoelectronic semiconductor chip .
  • a light emit ⁇ ting element with an optoelectronic semiconductor chip, wherein the semiconductor chip is arranged on a carrier.
  • the semiconductor chip is covered by a plastic plate, a sapphire plate or a glass plate, wherein the epitaxial layer of the semiconductor chip is protected against environmental influ ⁇ ences.
  • a glass or a sapphire plate is used to protect the epitaxial layer since plastic could not withstand the ul ⁇ traviolet radiation.
  • the object of the invention is to provide an improved light emitting element with an optoelectronic semiconductor chip and to provide an improved method to produce a light emitting element with an optoelectronic semiconductor chip.
  • a basic advantage is to provide a light emitting element with a simple structure that provides a protection of the epitaxi ⁇ al layer of the semiconductor structure with simple means.
  • a light emitting element with an optoelectronic semiconductor chip has a substrate and a semiconductor structure.
  • the semiconductor structure is arranged with a mounting surface on a mounting surface of the substrate.
  • the semiconductor structure has a smaller mounting surface than the substrate.
  • a border area of the mounting face of the substrate circumvents the semiconductor struc ⁇ ture.
  • the semiconductor structure is embodied to generate electromagnetic radiation.
  • On an upper side of the semiconductor structure electrical contacts are arranged.
  • the sub ⁇ strate is transparent for the radiation of the semiconductor structure.
  • An upper side of the semiconductor structure is arranged on a mounting side of a carrier.
  • the carrier comprises further electrical contacts on the mounting side, wherein the contacts of the semiconductor structure and the contacts of the carrier are connected.
  • Between the mounting side of the carrier and the border area of the substrate a sealing member is arranged. The sealing member seals a sealing area between the substrate and the carrier, wherein the semiconductor structure is arranged in the sealing area.
  • the sealing member is dust-tight and/or fluid-tight and/or gas-tight.
  • the sealing area is hermetically closed.
  • the electromagnetic ra ⁇ diation may comprise visible light, infrared light or ultra ⁇ violet light.
  • the further contact elements may be guided through the carrier to a second contact side.
  • the sealing member comprises a ring, wherein the ring surrounds the semiconductor structure, wherein the ring is connected with the substrate and with the carrier.
  • the ring is a simple and reliably geometry for providing a sealing member. Furthermore the ring geometry can easily be formed.
  • the ring comprises metal.
  • the ring comprises a first metal layer that is arranged on the substrate, wherein the ring comprises a second metal layer that is arranged on the carri ⁇ er, wherein the first and the second metal layer are connect ⁇ ed.
  • This embodiment can easily be produced and provides a re ⁇ liable sealing member.
  • a third metal layer is arranged between the first and second metal layer, wherein the third met ⁇ al layer is connected with the first and the second metal layer.
  • This embodiment provides a long time hermetic sealing member.
  • the third metal layer is solder. This simplifies the process and provides a sufficient hermetic seal.
  • the sealing member comprises a sealing layer that fills up the sealing area.
  • the sealing layer is a further appropriate sealing member that provides a sufficient sealing and a simple process.
  • the sealing layer can be applied with a sealing ring. This increases the seal ⁇ ing stability and robustness.
  • the sealing layer is made of sili ⁇ cone. Silicone can easily processed and provides sufficient sealing properties.
  • the substrate is at least partially covered with a protective layer. This improves a long time stability of the substrate.
  • the substrate comprises at least partially an anti-reflective coating. This improves the emit ⁇ ting of the radiation.
  • the substrate comprises at least a self-cleaning coating. This feature maintains a long time clean surface of the substrate. Therefore, the emitting of the radiation is not blocked or reduced by a dirt layer.
  • the self-cleaning coating is embodied to be activated by radiation of the semiconductor chip, especially by an ultraviolet light. This feature improves a simple structure and an efficient cleaning.
  • the carrier comprises electronic circuit for controlling the semiconductor chip. This feature assists a compact and small light emitting element. Further ⁇ more wiring work is reduced.
  • the carrier is made of thinned sili ⁇ con.
  • the thinned silicon provides a thin carrier with a sufficient mechanical stability. Therefore the light emitting element can be produced with a small height.
  • the semiconductor chip is embodied to generate ultraviolet radiation.
  • the proposed sealing is for this type of semiconductor chip advantageous because the proposed sealing is long time robust and provides an hermetic sealing.
  • a semiconduc ⁇ tor chip with a substrate and a semiconductor structure is provided.
  • the upper side of the semiconductor structure is laid on a mounting side of a carrier, wherein the carrier comprises further electrical contacts on the mounting side, wherein the contacts of the semiconductor structure and the contacts of the carrier are connected.
  • Between the mounting side of the carrier and the border area of the substrate a sealing member is formed.
  • the sealing member seals a sealing area between the substrate and the carrier.
  • the semiconductor structure is arranged in the sealing area.
  • Fig. 1 shows a view on a semiconductor chip.
  • Fig. 2 shows a schematic side view of the semiconductor chip .
  • Fig. 3 shows a top view on a carrier.
  • Fig. 4 shows a cross-sectional view of a light emitting element with a semiconductor chip and a carrier.
  • Fig. 5 shows a cross-sectional view of a light emitting element with a sealing layer.
  • Fig. 6 shows a cross-sectional view of a light emitting element with a protective layer.
  • Fig. 7 shows a cross-sectional view of a light emitting element with a rough surface.
  • Fig. 8 shows a cross-sectional view of a further light
  • Fig. 9 shows a cross-sectional view of a light emitting element with electronic circuit.
  • Fig. 1 shows a schematic view on a semiconductor chip 15 with a substrate 2 in a y-x-plane.
  • a semiconductor structure 3 On a mounting surface 1 of the substrate 2 a semiconductor structure 3 is arranged.
  • the sem ⁇ iconductor structure 3 has a smaller size than the substrate 2.
  • a circumferential border area 4 of the mounting face of the substrate 2 is free from the semiconductor structure 3.
  • a first metal layer 5 On the border area 4 a first metal layer 5 is arranged.
  • the first metal layer 5 surrounds the semiconductor structure 3.
  • the first metal layer 5 is arranged with a given distance to the semiconductor structure 3.
  • the semiconductor structure 3 comprises a first and a second electrical contact 6, 7 that is arranged on a mounting sur ⁇ face 8 of the semiconductor structure 3.
  • the semiconductor structure 3 is embodied to generate electromagnetic radiation for example ultraviolet light, visible light or infrared light.
  • the semiconductor structure comprises layers of semiconductor material that form a p/n layer interface that is embodied to generate the electromagnetic radiation.
  • the semiconductor structure 3 is embodied as a light emitting diode structure.
  • the semiconductor structure 3 may comprise a material system with gallium nitride or indium gallium nitride.
  • the mounting surface 1 on the sub ⁇ strate 2 has a rectangular shape.
  • the mounting surface 8 of the semiconductor structure 3 has also a rectan ⁇ gular shape.
  • the substrate 2 and/or the semiconductor structure 3 may have a different shape for example a quadratic or a circular shape.
  • the mounting surface 8 of the semiconductor structure 3 is smaller than the mounting surface 1 of the substrate 2. This is necessary to provide an area for the first metal layer 5 that surrounds the semiconductor structure 3 with a given distance to the semiconductor structure 3.
  • the substrate 2 is made of material that is transparent for the electromagnetic radiation that is generated by the semi ⁇ conductor structure 3.
  • the substrate 2 is made of sapphire, silicon carbide, aluminium nitride, gallium ni ⁇ tride.
  • the first metal layer 5 is embodied with a shape of four connected straight stripes. Depending on the used embod ⁇ iment, the first metal layer 5 may also be embodied with the shape of a circular ring that surrounds the semiconductor structure 3.
  • Fig. 2 shows a side view of the semiconductor chip 15 with the substrate 2 and the semiconductor structure 3 in a z-x- plane.
  • the z axis and the y axis and the x axis constitute a rectangular coordinate system.
  • a thickness of the substrate 2 along the z axis is much larg- er than a thickness of the semiconductor structure 3 along the z axis.
  • the first metal layer 5 has a thick ⁇ ness that is along the z axis smaller than a width along the x axis.
  • the first metal layer 5 may have a smaller thickness along the z-axis compared to the thickness of the semiconductor structure along the z-axis.
  • Fig. 3 shows a view on a mounting surface 9 of a carrier 10 in a y-x-plane.
  • the carrier 10 comprises on the mounting sur ⁇ face 9 two further electrical contacts 11, 12. Furthermore, a second metal layer 13 is guided along a border area on the mounting surface 9 of the carrier 10 surrounding the two further electrical contacts.
  • the second metal layer 13 surrounds the further first and second electrical contacts 11, 12.
  • the second metal layer 13 may have the same shape as the first metal layer 5 of the substrate 2.
  • the second metal layer 13 may be made of the same material as the first metal layer 5 of the substrate 2.
  • the further first and second electrical contacts 11, 12 may have the same size area as the first and second electrical contacts 6, 7 of the semiconduc- tor structure 3.
  • the carrier 10 may be embodied as a ceramic plate or a printed circuit board or a semiconductor plate.
  • Fig. 4 shows a cross sectional view in a z-x-plane of a light emitting element 14 that comprises the semiconductor chip 15 of Fig. 1 that is mounted on the carrier 10 of Fig. 3.
  • the first and the second metal layer 5, 13 are connected by a third metal layer 16.
  • the third metal layer 16 may comprise solder material for example AuSn or SnAgCu.
  • the first and the second metal layer 5, 13 may be made of solder material for example AuSn or SnAgCu.
  • the elec ⁇ trical contacts 6, 7 are connected with the further first and second electrical contacts 11, 12 by contact layers 17, 18.
  • the first and second contact layers 17, 18 may comprise sol ⁇ der for example AuSn or may be made of AuSn.
  • the further first and second electrical contacts 11, 12 are guided by via contacts 19, 20 to bottom contacts 21, 22 that are arranged at a bottom side 23 of the carrier 10.
  • the first metal layer 5, the third metal layer 16 and the second metal layer 13 constitute a sealing member 24 that seals a sealing area 25 between the substrate and the carrier.
  • the semicon- ductor structure 3 is arranged in the sealing area 25.
  • the sealing member 24 constitutes a sealing ring, wherein the sealing ring surrounds the semiconductor structure 3.
  • the sealing ring 24 seals the sealing area 25 from the environment.
  • the sealing ring 24 is embodied to hermetically seal the sealing area 25 from the environment. Therefore, the semiconductor structure 3 that may comprise epitaxial deposited semiconductor layers is pro ⁇ tected against the environment.
  • the electromagnetic radiation that is generated by the semiconductor structure 3 is emitted through the substrate 2.
  • the sealing ring 24 provides an hermetic seal of the sealing area 25.
  • the third metal layer 16 is omitted and the first and the second metal layer 5, 13 are connected directly for example hermetically.
  • the connection between the first and the second metal layer 5, 13 may be formed by a metal bonding process.
  • the light emitting element 14 provides a robust package with hermetic requirements for the semiconductor structure 3. Es ⁇ pecially by using sapphire as a substrate 2, the light emit ⁇ ting element 14 is extremely robust against environment.
  • a protective layer 26 may be arranged on the surface of the substrate 2, especially if aluminium nitride or gallium ni- tride is used as substrate 2.
  • the protective layer 26 may for example be made of silicon oxide.
  • the protective layer 26 may also be embodied as an anti-reflective layer 36.
  • only the anti-reflective layer 36 may be ar- ranged on the surface of the substrate. However, depending on the used embodiment, the protective layer 26 can be omitted.
  • Fig. 5 shows a cross sectional view in an z-x-plane of a fur- ther embodiment of a light emitting element 14 that basically has the same structure as the embodiment of Fig. 4 comprising a semiconductor chip 15 with a substrate 2 and a semiconduc ⁇ tor structure 3 and a carrier 10 with further electrical con ⁇ tacts 11, 12, via contacts 19, 20 and bottom contacts 21, 22.
  • a sealing layer 27 is arranged between the mounting surface 1 of the substrate 2 and the mounting surface of the carrier 10 in the sealing area 25.
  • the sealing layer 27 seals the whole semiconductor structure 3.
  • the semiconductor structure 3 is for example hermetically encapsulated in the sealing layer 27.
  • the seal ⁇ ing layer 27 may be made of silicone, epoxy or polymer or a hybrid material comprising silicone and epoxy material.
  • a sealing ring 24 may be arranged as shown in Fig. 4 surrounding the sealing layer 27.
  • the sealing ring 24 can be omitted.
  • Fig. 6 shows a further embodiment of a light emitting element 14 that is embodied as explained with regard to Fig. 4. How ⁇ ever, additional to the embodiment of Fig. 4, the light emit ⁇ ting element 14 the substrate 2 is covered by a self-cleaning coating 28.
  • the self-cleaning coating 28 may cover a top face 33 and all side faces 34,35 of the substrate 2.
  • the self- cleaning coating 28 may for example comprise or be made of nano-layers of titanium oxide Ti02.
  • the self-cleaning coating 28 may be embodied to be actuated by radiation of the semi- conductor structure 3 for example by ultraviolet light that is emitted by the semiconductor structure 3.
  • the self- cleaning coating 28 improves a robustness of the light emit ⁇ ting element 14, wherein an organic deposition could be de- composed with ultraviolet radiation using a photocatalytic cleaning process.
  • This light emitting element 14 could be a part of a sensor inside an exhaust pipe of a combustion en ⁇ gine as the organic decomposition on the substrate 2 caused by incomplete combustion could be reduced significantly.
  • the light emitting element 14 may be arranged in an exhaust pipe of a car.
  • the self-cleaning coating 28 can also be applied at a light emitting element 14 as shown in Fig. 5 that has a sealing layer 27.
  • Fig. 7 shows a cross sectional view in a z-x-plane of a fur ⁇ ther embodiment of a light emitting element 14, wherein the top face 33 of the substrate 2 comprises a rough surface 29 with a rough structure that increases light extraction from the substrate 2.
  • the rough surface 29 may be embodied by re ⁇ Des or projections with a shape of a pyramid or an in- versed pyramid. Also other shapes for the recesses or projec ⁇ tions are possible.
  • the rough surface 29 may comprise cylinder holes or rectangular holes to increase the light extraction from the substrate 2.
  • the rough surface 29 may comprise micro pits or nano pits or micro structures or nano structures to enhance the light extraction.
  • FIG. 8 shows a schematic cross-sectional view in an z-x-plane of a further embodiment of a light emitting element 14 that is embodied as explained with regard to fig. 4.
  • the carrier 10 is embodied as a thin carrier 10, that is for example made of silicon.
  • this embodiment may be processed by using a wafer bonding technol ⁇ ogy.
  • the carrier 10 is embodied as an interposer with a thickness below 1 mm for example.
  • Fig. 9 shows a further cross-sectional view of a light emit- ting element 14 in an z-x-plane, wherein the light emitting element 14 is embodied as explained with regard to Fig. 4.
  • the carrier 10 comprises an electronic circuit 30 for example controlling circuits or current sources for the semiconductor chip 15.
  • the electronic circuit is electrically connected with the first and second bottom electrical contacts 21, 22.
  • the elec ⁇ tronic circuit 30 may comprise driver circuits and/or elec- trie interface circuits.
  • an electrical connector 31 is arranged for connecting a cable to the light emitting element 14.
  • the semiconductor structure 3 may comprise an epitaxial semi- conductor layer structure.
  • the proposed light emitting ele ⁇ ment 14 provides a low-loss package especially for ultravio ⁇ let light emitting semiconductor diodes. A small and thin package can be achieved. Furthermore, a robust package with hermetic requirements is provided. Additionally, anti- reflective coating may be arranged on external surfaces of the substrate 2. This improves an overall package perfor ⁇ mance .
  • the protective layer 26 and/or the sealing layer 27 and/or the self-cleaning coating 28 and/or the rough surface 29 may be combined in any shown embodiments of the light emitting element 14.

Abstract

A light emitting element with an optoelectronic semiconductor chip is provided, wherein the semiconductor chip has a substrate and a semiconductor structure, wherein the semiconductor structure is arranged with a mounting surface on a mounting surface of the substrate, wherein the semiconductor structure has a smaller mounting surface than the substrate, wherein a border area of the mounting face of the substrate circumvents the semiconductor structure, wherein the semiconductor structure is embodied to generate electromagnetic radiation, wherein on an upper side of the semiconductor structure electrical contacts are arranged, wherein the substrate is transparent for the radiation of the semiconductor structure, wherein the upper side of the semiconductor structure is arranged on a mounting side of a carrier, wherein the carrier comprises further electrical contacts on the mounting side, wherein the contacts of the semiconductor structure and the contacts of the carrier are connected, wherein between the mounting side of the carrier and the border area of the substrate a sealing member is arranged, wherein the sealing member seals a sealing area between the substrate and the carrier, wherein the semiconductor structure is arranged in the sealing area.

Description

LIGHT EMITTING ELEMENT WITH AN OPTOELECTRONIC SEMICONDUCTOR
CHIP
DESCRIPTION
The invention refers to a light emitting element with an op¬ toelectronic semiconductor chip and a method for producing a light emitting element with an optoelectronic semiconductor chip .
In the state of the art it is known to provide a light emit¬ ting element with an optoelectronic semiconductor chip, wherein the semiconductor chip is arranged on a carrier. The semiconductor chip is covered by a plastic plate, a sapphire plate or a glass plate, wherein the epitaxial layer of the semiconductor chip is protected against environmental influ¬ ences. Especially for semiconductor chips that emit ultravio¬ let radiation, a glass or a sapphire plate is used to protect the epitaxial layer since plastic could not withstand the ul¬ traviolet radiation.
The object of the invention is to provide an improved light emitting element with an optoelectronic semiconductor chip and to provide an improved method to produce a light emitting element with an optoelectronic semiconductor chip.
The objects of the invention are solved by the independent claims .
Further embodiments of the invention are disclosed m the pendent claims.
A basic advantage is to provide a light emitting element with a simple structure that provides a protection of the epitaxi¬ al layer of the semiconductor structure with simple means.
A light emitting element with an optoelectronic semiconductor chip is provided. The semiconductor chip has a substrate and a semiconductor structure. The semiconductor structure is arranged with a mounting surface on a mounting surface of the substrate. The semiconductor structure has a smaller mounting surface than the substrate. A border area of the mounting face of the substrate circumvents the semiconductor struc¬ ture. The semiconductor structure is embodied to generate electromagnetic radiation. On an upper side of the semiconductor structure electrical contacts are arranged. The sub¬ strate is transparent for the radiation of the semiconductor structure. An upper side of the semiconductor structure is arranged on a mounting side of a carrier. The carrier comprises further electrical contacts on the mounting side, wherein the contacts of the semiconductor structure and the contacts of the carrier are connected. Between the mounting side of the carrier and the border area of the substrate a sealing member is arranged. The sealing member seals a sealing area between the substrate and the carrier, wherein the semiconductor structure is arranged in the sealing area.
Therefore the semiconductor structure is protected against environment. For example, the sealing member is dust-tight and/or fluid-tight and/or gas-tight. In an embodiment, the sealing area is hermetically closed. The electromagnetic ra¬ diation may comprise visible light, infrared light or ultra¬ violet light. Furthermore, the further contact elements may be guided through the carrier to a second contact side.
In a further embodiment, the sealing member comprises a ring, wherein the ring surrounds the semiconductor structure, wherein the ring is connected with the substrate and with the carrier. The ring is a simple and reliably geometry for providing a sealing member. Furthermore the ring geometry can easily be formed.
In a further embodiment, the ring comprises metal. Metal pro- vides suitable properties to form a robust sealing member.
In a further embodiment, the ring comprises a first metal layer that is arranged on the substrate, wherein the ring comprises a second metal layer that is arranged on the carri¬ er, wherein the first and the second metal layer are connect¬ ed. This embodiment can easily be produced and provides a re¬ liable sealing member.
In a further embodiment, between the first and second metal layer a third metal layer is arranged, wherein the third met¬ al layer is connected with the first and the second metal layer. This embodiment provides a long time hermetic sealing member. In a further embodiment, the third metal layer is solder. This simplifies the process and provides a sufficient hermetic seal.
In a further embodiment, the sealing member comprises a sealing layer that fills up the sealing area. The sealing layer is a further appropriate sealing member that provides a sufficient sealing and a simple process. The sealing layer can be applied with a sealing ring. This increases the seal¬ ing stability and robustness.
In a further embodiment, the sealing layer is made of sili¬ cone. Silicone can easily processed and provides sufficient sealing properties. In a further embodiment, the substrate is at least partially covered with a protective layer. This improves a long time stability of the substrate.
In a further embodiment, the substrate comprises at least partially an anti-reflective coating. This improves the emit¬ ting of the radiation.
In a further embodiment, the substrate comprises at least a self-cleaning coating. This feature maintains a long time clean surface of the substrate. Therefore, the emitting of the radiation is not blocked or reduced by a dirt layer. In a further embodiment, the self-cleaning coating is embodied to be activated by radiation of the semiconductor chip, especially by an ultraviolet light. This feature improves a simple structure and an efficient cleaning.
In a further embodiment, the carrier comprises electronic circuit for controlling the semiconductor chip. This feature assists a compact and small light emitting element. Further¬ more wiring work is reduced.
In a further embodiment, the carrier is made of thinned sili¬ con. The thinned silicon provides a thin carrier with a sufficient mechanical stability. Therefore the light emitting element can be produced with a small height.
In a further embodiment, the semiconductor chip is embodied to generate ultraviolet radiation. The proposed sealing is for this type of semiconductor chip advantageous because the proposed sealing is long time robust and provides an hermetic sealing.
It is a method proposed for producing a light emitting ele¬ ment with an optoelectronic semiconductor chip. A semiconduc¬ tor chip with a substrate and a semiconductor structure is provided. The upper side of the semiconductor structure is laid on a mounting side of a carrier, wherein the carrier comprises further electrical contacts on the mounting side, wherein the contacts of the semiconductor structure and the contacts of the carrier are connected. Between the mounting side of the carrier and the border area of the substrate a sealing member is formed. The sealing member seals a sealing area between the substrate and the carrier. The semiconductor structure is arranged in the sealing area. The above-described properties, features and advantages of this invention and the way in which they are achieved will become clearer and more clearly understood in association with the following description of the exemplary embodiments which are explained in greater detail in association with the drawings. Here in schematic illustration in each case:
Fig. 1 shows a view on a semiconductor chip.
Fig. 2 shows a schematic side view of the semiconductor chip .
Fig. 3 shows a top view on a carrier.
Fig. 4 shows a cross-sectional view of a light emitting element with a semiconductor chip and a carrier.
Fig. 5 shows a cross-sectional view of a light emitting element with a sealing layer.
Fig. 6 shows a cross-sectional view of a light emitting element with a protective layer. Fig. 7 shows a cross-sectional view of a light emitting element with a rough surface.
Fig. 8 shows a cross-sectional view of a further light
emitting element.
Fig. 9 shows a cross-sectional view of a light emitting element with electronic circuit.
Fig. 1 shows a schematic view on a semiconductor chip 15 with a substrate 2 in a y-x-plane. On a mounting surface 1 of the substrate 2 a semiconductor structure 3 is arranged. The sem¬ iconductor structure 3 has a smaller size than the substrate 2. A circumferential border area 4 of the mounting face of the substrate 2 is free from the semiconductor structure 3. On the border area 4 a first metal layer 5 is arranged. The first metal layer 5 surrounds the semiconductor structure 3. The first metal layer 5 is arranged with a given distance to the semiconductor structure 3. The semiconductor structure 3 comprises a first and a second electrical contact 6, 7 that is arranged on a mounting sur¬ face 8 of the semiconductor structure 3. The semiconductor structure 3 is embodied to generate electromagnetic radiation for example ultraviolet light, visible light or infrared light. Depending on the used embodiment, the semiconductor structure comprises layers of semiconductor material that form a p/n layer interface that is embodied to generate the electromagnetic radiation. For example the semiconductor structure 3 is embodied as a light emitting diode structure. The semiconductor structure 3 may comprise a material system with gallium nitride or indium gallium nitride. In the shown embodiment, the mounting surface 1 on the sub¬ strate 2 has a rectangular shape. Furthermore the mounting surface 8 of the semiconductor structure 3 has also a rectan¬ gular shape. Depending on the used embodiment, the substrate 2 and/or the semiconductor structure 3 may have a different shape for example a quadratic or a circular shape. However the mounting surface 8 of the semiconductor structure 3 is smaller than the mounting surface 1 of the substrate 2. This is necessary to provide an area for the first metal layer 5 that surrounds the semiconductor structure 3 with a given distance to the semiconductor structure 3.
The substrate 2 is made of material that is transparent for the electromagnetic radiation that is generated by the semi¬ conductor structure 3. For example the substrate 2 is made of sapphire, silicon carbide, aluminium nitride, gallium ni¬ tride. The first metal layer 5 is embodied with a shape of four connected straight stripes. Depending on the used embod¬ iment, the first metal layer 5 may also be embodied with the shape of a circular ring that surrounds the semiconductor structure 3.
Fig. 2 shows a side view of the semiconductor chip 15 with the substrate 2 and the semiconductor structure 3 in a z-x- plane. The z axis and the y axis and the x axis constitute a rectangular coordinate system.
A thickness of the substrate 2 along the z axis is much larg- er than a thickness of the semiconductor structure 3 along the z axis. Furthermore, the first metal layer 5 has a thick¬ ness that is along the z axis smaller than a width along the x axis. Furthermore, the first metal layer 5 may have a smaller thickness along the z-axis compared to the thickness of the semiconductor structure along the z-axis.
Fig. 3 shows a view on a mounting surface 9 of a carrier 10 in a y-x-plane. The carrier 10 comprises on the mounting sur¬ face 9 two further electrical contacts 11, 12. Furthermore, a second metal layer 13 is guided along a border area on the mounting surface 9 of the carrier 10 surrounding the two further electrical contacts. The second metal layer 13 surrounds the further first and second electrical contacts 11, 12. The second metal layer 13 may have the same shape as the first metal layer 5 of the substrate 2. The second metal layer 13 may be made of the same material as the first metal layer 5 of the substrate 2. Furthermore, the further first and second electrical contacts 11, 12 may have the same size area as the first and second electrical contacts 6, 7 of the semiconduc- tor structure 3. The carrier 10 may be embodied as a ceramic plate or a printed circuit board or a semiconductor plate.
Fig. 4 shows a cross sectional view in a z-x-plane of a light emitting element 14 that comprises the semiconductor chip 15 of Fig. 1 that is mounted on the carrier 10 of Fig. 3. The first and the second metal layer 5, 13 are connected by a third metal layer 16. The third metal layer 16 may comprise solder material for example AuSn or SnAgCu. Furthermore, the first and the second metal layer 5, 13 may be made of solder material for example AuSn or SnAgCu. Furthermore, the elec¬ trical contacts 6, 7 are connected with the further first and second electrical contacts 11, 12 by contact layers 17, 18. The first and second contact layers 17, 18 may comprise sol¬ der for example AuSn or may be made of AuSn.
The further first and second electrical contacts 11, 12 are guided by via contacts 19, 20 to bottom contacts 21, 22 that are arranged at a bottom side 23 of the carrier 10. The first metal layer 5, the third metal layer 16 and the second metal layer 13 constitute a sealing member 24 that seals a sealing area 25 between the substrate and the carrier. The semicon- ductor structure 3 is arranged in the sealing area 25. The sealing member 24 constitutes a sealing ring, wherein the sealing ring surrounds the semiconductor structure 3. The sealing ring 24 seals the sealing area 25 from the environment. Depending on the used embodiment, the sealing ring 24 is embodied to hermetically seal the sealing area 25 from the environment. Therefore, the semiconductor structure 3 that may comprise epitaxial deposited semiconductor layers is pro¬ tected against the environment. The electromagnetic radiation that is generated by the semiconductor structure 3 is emitted through the substrate 2. The sealing ring 24 provides an hermetic seal of the sealing area 25.
Depending on the used embodiment, the third metal layer 16 is omitted and the first and the second metal layer 5, 13 are connected directly for example hermetically. The connection between the first and the second metal layer 5, 13 may be formed by a metal bonding process.
The light emitting element 14 provides a robust package with hermetic requirements for the semiconductor structure 3. Es¬ pecially by using sapphire as a substrate 2, the light emit¬ ting element 14 is extremely robust against environment. A protective layer 26 may be arranged on the surface of the substrate 2, especially if aluminium nitride or gallium ni- tride is used as substrate 2. The protective layer 26 may for example be made of silicon oxide. Furthermore, the protective layer 26 may also be embodied as an anti-reflective layer 36. Furthermore, only the anti-reflective layer 36 may be ar- ranged on the surface of the substrate. However, depending on the used embodiment, the protective layer 26 can be omitted.
Fig. 5 shows a cross sectional view in an z-x-plane of a fur- ther embodiment of a light emitting element 14 that basically has the same structure as the embodiment of Fig. 4 comprising a semiconductor chip 15 with a substrate 2 and a semiconduc¬ tor structure 3 and a carrier 10 with further electrical con¬ tacts 11, 12, via contacts 19, 20 and bottom contacts 21, 22. In contrast to the embodiment of Fig. 4, a sealing layer 27 is arranged between the mounting surface 1 of the substrate 2 and the mounting surface of the carrier 10 in the sealing area 25. The sealing layer 27 seals the whole semiconductor structure 3. The semiconductor structure 3 is for example hermetically encapsulated in the sealing layer 27. The seal¬ ing layer 27 may be made of silicone, epoxy or polymer or a hybrid material comprising silicone and epoxy material.
Depending on the used embodiment, additionally to the sealing layer 27 also a sealing ring 24 may be arranged as shown in Fig. 4 surrounding the sealing layer 27. In this embodiment, there is a double protection for the semiconductor structure 3 with a sealing layer 27 and a sealing ring 24. However the sealing ring 24 can be omitted.
Fig. 6 shows a further embodiment of a light emitting element 14 that is embodied as explained with regard to Fig. 4. How¬ ever, additional to the embodiment of Fig. 4, the light emit¬ ting element 14 the substrate 2 is covered by a self-cleaning coating 28. The self-cleaning coating 28 may cover a top face 33 and all side faces 34,35 of the substrate 2. The self- cleaning coating 28 may for example comprise or be made of nano-layers of titanium oxide Ti02. The self-cleaning coating 28 may be embodied to be actuated by radiation of the semi- conductor structure 3 for example by ultraviolet light that is emitted by the semiconductor structure 3. The self- cleaning coating 28 improves a robustness of the light emit¬ ting element 14, wherein an organic deposition could be de- composed with ultraviolet radiation using a photocatalytic cleaning process. This light emitting element 14 could be a part of a sensor inside an exhaust pipe of a combustion en¬ gine as the organic decomposition on the substrate 2 caused by incomplete combustion could be reduced significantly.
For example the light emitting element 14 may be arranged in an exhaust pipe of a car. The self-cleaning coating 28 can also be applied at a light emitting element 14 as shown in Fig. 5 that has a sealing layer 27.
Fig. 7 shows a cross sectional view in a z-x-plane of a fur¬ ther embodiment of a light emitting element 14, wherein the top face 33 of the substrate 2 comprises a rough surface 29 with a rough structure that increases light extraction from the substrate 2. The rough surface 29 may be embodied by re¬ cesses or projections with a shape of a pyramid or an in- versed pyramid. Also other shapes for the recesses or projec¬ tions are possible. For example, the rough surface 29 may comprise cylinder holes or rectangular holes to increase the light extraction from the substrate 2. The rough surface 29 may comprise micro pits or nano pits or micro structures or nano structures to enhance the light extraction. Fig. 8 shows a schematic cross-sectional view in an z-x-plane of a further embodiment of a light emitting element 14 that is embodied as explained with regard to fig. 4. However in this embodiment the carrier 10 is embodied as a thin carrier 10, that is for example made of silicon. Furthermore, this embodiment may be processed by using a wafer bonding technol¬ ogy. The carrier 10 is embodied as an interposer with a thickness below 1 mm for example.
Fig. 9 shows a further cross-sectional view of a light emit- ting element 14 in an z-x-plane, wherein the light emitting element 14 is embodied as explained with regard to Fig. 4. In contrast to the light emitting element of Fig. 4 the carrier 10 comprises an electronic circuit 30 for example controlling circuits or current sources for the semiconductor chip 15. The electronic circuit is electrically connected with the first and second bottom electrical contacts 21, 22. The elec¬ tronic circuit 30 may comprise driver circuits and/or elec- trie interface circuits. Furthermore, at the bottom side 23 of the carrier 10 an electrical connector 31 is arranged for connecting a cable to the light emitting element 14.
The semiconductor structure 3 may comprise an epitaxial semi- conductor layer structure. The proposed light emitting ele¬ ment 14 provides a low-loss package especially for ultravio¬ let light emitting semiconductor diodes. A small and thin package can be achieved. Furthermore, a robust package with hermetic requirements is provided. Additionally, anti- reflective coating may be arranged on external surfaces of the substrate 2. This improves an overall package perfor¬ mance .
The protective layer 26 and/or the sealing layer 27 and/or the self-cleaning coating 28 and/or the rough surface 29 may be combined in any shown embodiments of the light emitting element 14.
The invention has been illustrated and described in detail with the aid of the preferred exemplary embodiments. Never¬ theless, the invention is not restricted to the examples dis¬ closed. Rather, other variants may be derived therefrom by a person skilled in the art without departing from the protec¬ tive scope of the invention. REFERENCE SYMBOLS
1 mounting surface substrate
2 substrate
3 semiconductor structure
4 border area
5 first metal layer
6 first electrical contact
7 second electrical contact
8 mounting surface semiconductor structure
9 mounting surface carrier
10 carrier
11 further first electrical contact
12 further second electrical contact
13 second metal layer
14 light emitting element
15 semiconductor chip
16 third metal layer
17 first contact layer
18 second contact layer
19 first via contact
20 second via contact
21 first bottom electrical contact
22 second bottom electrical contact
23 bottom side
24 sealing ring
25 sealing area
26 protective layer
27 sealing layer
28 self-cleaning coating
29 rough surface
30 electronic circuit
31 connector
32 cable
33 top face
34 first side face
35 second side face
36 anti-reflective layer

Claims

Light emitting element (14) with an optoelectronic semi¬ conductor chip (15), wherein the semiconductor chip (15) has a substrate (2) and a semiconductor structure (3), wherein the semiconductor structure (3) is arranged with a mounting surface on a mounting surface (19) of the sub¬ strate (2), wherein the semiconductor structure (3) has a smaller mounting surface (8) than the substrate (2), wherein a border area (4) of the mounting face (1) of the substrate (2) circumvents the semiconductor structure
(3) , wherein the semiconductor structure (3) is embodied to generate electromagnetic radiation, wherein on an up¬ per side of the semiconductor structure electrical con¬ tacts (6, 7) are arranged, wherein the substrate (2) is transparent for the radiation of the semiconductor struc¬ ture (3) , wherein the upper side of the semiconductor structure is arranged on a mounting side (9) of a carrier
(10), wherein the carrier (10) comprises further electrical contacts (11, 12) on the mounting side (9), wherein the contacts (6, 7) of the semiconductor structure (3) and the contacts (11, 12) of the carrier (10) are con¬ nected, wherein between the mounting side (9) of the carrier (10) and the border area of the substrate a sealing member (5, 13, 16, 24, 27) is arranged, wherein the seal¬ ing member (5, 13, 16, 24, 27) seals a sealing area (25) between the substrate (2) and the carrier (10), wherein the semiconductor structure (3) is arranged in the seal¬ ing area (25) .
Light emitting element of claim 1, wherein the sealing member comprises a ring (24), wherein the ring (24) surrounds the semiconductor structure (3) , wherein the ring (24) is connected with the substrate
(2) and with the carrier (10).
3. Light emitting element of claim 1 or 2, wherein the ring (24) comprises metal.
4. Light emitting element of claim 3, wherein the ring (24) comprises a first metal layer (5) that is arranged on the substrate (2), wherein the ring (24) comprises a second metal layer (13) that is arranged on the carrier (10), wherein the first and the second metal layer (5, 13) are connected .
5. Light emitting element of claim 4, wherein between the first and second metal layer (5, 13) a third metal layer
(16) is arranged, wherein the third metal layer (16) is connected with the first and the second metal layer (5, 13) .
6. The light emitting element of claim 5, wherein the third metal layer (16) is solder.
7. The light emitting element of any one of the preceding claims, wherein the sealing member comprises a sealing layer (27) that fills up the sealing area (25) .
8. The light emitting element of claim 7, wherein the seal¬ ing layer (27) is made of silicone.
9. The light emitting element of any one of the preceding claims, wherein the substrate (2) is at least partially covered with a protective layer (28) .
10. The light emitting element of any one of the preceding claims, wherein the substrate (2) comprises at least par¬ tially an anti-reflective coating (28).
11. The light emitting element of any one of the preceding claims, wherein the substrate (2) comprises at least a self-cleaning coating (28).
12. The light emitting element of claim 11, wherein the self- cleaning coating (28) is embodied to be activated by ra- diation of the semiconductor chip (15), especially by ul¬ traviolet light.
13. he light emitting element, wherein the carrier (10) com¬ prises electronic circuit (30) for controlling the semi¬ conductor chip (15) .
14. he light emitting element of any one of the preceding claims, wherein the carrier (10) is made of thinned sili¬ con .
15. The light emitting element of any one of the preceding claims, wherein the semiconductor chip (15) is embodied to generate ultraviolet radiation.
16. Method for producing a light emitting element with an optoelectronic semiconductor chip, wherein a semiconductor chip with a substrate and a semiconductor structure is provided, wherein the semiconductor structure is arranged with a mounting surface on a mounting surface of the sub¬ strate, wherein the semiconductor structure has a smaller mounting surface than the substrate, wherein a border area of the mounting face of the substrate that circumvents the semiconductor structure, wherein the semiconductor structure is embodied to generate electromagnetic radia¬ tion, wherein on an upper side of the semiconductor structure electrical contacts are arranged, wherein the substrate is transparent for the radiation of the semi¬ conductor structure, wherein the upper side of the semiconductor structure is laid on a mounting side of a car¬ rier, wherein the carrier comprises further electrical contacts on the mounting side, wherein the contacts of the semiconductor structure and the contacts of the car¬ rier are connected, wherein between the mounting side of the carrier and the border area of the substrate a seal¬ ing member is formed, wherein the sealing member seals a sealing area between the substrate and the carrier, wherein the semiconductor structure is arranged in the sealing area.
PCT/EP2016/081927 2016-12-20 2016-12-20 Light emitting element with an optoelectronic semiconductor chip WO2018113922A1 (en)

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