WO2018032453A1 - 一种滤波器 - Google Patents

一种滤波器 Download PDF

Info

Publication number
WO2018032453A1
WO2018032453A1 PCT/CN2016/095834 CN2016095834W WO2018032453A1 WO 2018032453 A1 WO2018032453 A1 WO 2018032453A1 CN 2016095834 W CN2016095834 W CN 2016095834W WO 2018032453 A1 WO2018032453 A1 WO 2018032453A1
Authority
WO
WIPO (PCT)
Prior art keywords
filter
capacitor
low
circuit
signal
Prior art date
Application number
PCT/CN2016/095834
Other languages
English (en)
French (fr)
Inventor
刘荣江
Original Assignee
华为技术有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 华为技术有限公司 filed Critical 华为技术有限公司
Priority to PCT/CN2016/095834 priority Critical patent/WO2018032453A1/zh
Priority to CN201680087937.4A priority patent/CN109565098B/zh
Publication of WO2018032453A1 publication Critical patent/WO2018032453A1/zh

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01PWAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
    • H01P1/00Auxiliary devices
    • H01P1/20Frequency-selective devices, e.g. filters

Definitions

  • the present invention relates to the field of electronic communications, and more particularly to a filter.
  • the transmission and reception of signals are implemented by a transmitting device and a receiving device.
  • the receiving device receives the wireless signal through the antenna or before the signal is transmitted from the power amplifier to the antenna, the signal is usually RF filtered to eliminate various interferences and noises outside the communication channel.
  • an RF filter of the corresponding frequency needs to be installed behind the antenna in the receiving device.
  • an RF filter of the corresponding frequency needs to be installed between the power amplifier and the antenna.
  • the difference in the frequency of the communication signal requires that the passband filtering frequency of the RF filter is also different.
  • each wireless communication has its own characteristics, such as carrier frequency, signal to noise ratio, dynamic range, and linearity.
  • a communication device is compatible with different communication standards and can transmit and receive different wireless communication signals.
  • the filter of the transceiver end has not been greatly broken. The main reason is that RF filtering cannot achieve a flexible filtering frequency range while still maintaining good filtering performance.
  • a bandpass filter based on a switched capacitor circuit has been developed in which the capacitance is controlled by a multi-channel phase non-overlapping clock switch. Continuously turning on and off the dynamic switch changes the frequency domain transfer function of the circuit from a low-pass characteristic to a band-pass characteristic.
  • the center frequency of the band-pass is related to the switching frequency of the dynamic switch, and the resonant mode and surface acoustic wave of the existing inductor-capacitor
  • the filter's filter center frequency range is much more flexible and saves area.
  • the out-of-band rejection capability of the filter is poor, and the attenuation of the out-of-band signal is not large enough.
  • the embodiment of the invention provides a filter for improving the performance of the signal in the frequency range outside the passband of the filter under the premise of ensuring the performance of the original switched capacitor filter, and filtering out Conditional output signals, which in turn improve the filtering capabilities of the filter.
  • the filter provided by the embodiment of the present invention mainly connects a suppression module to the existing switched capacitor filter, which may be referred to as an out-of-band suppression module, and the suppression module may further filter the signal in the circuit, mainly For the signal outside the filtering range of the switched capacitor filter, that is, the switched capacitor filter cannot perform the signal of the filter, the filtering module performs filtering, thereby improving the filtering capability. Due to the difference in the connection order of the switched capacitor filter and the suppression module, the technical solution of the present invention has different filter configurations, which can be separately described below.
  • a first aspect of the present invention provides a filter, which may include: a suppression module and a switched capacitor filter; the suppression module is connected to the switched capacitor filter, where the connection manner of the suppression module and the switched capacitor filter may be A different way, as follows:
  • the specific connection mode is that the first end of the suppression module is connected to the input signal, the second end of the suppression module is connected to the output signal, and the first end of the switched capacitor filter is connected to the output signal, and the switched capacitor filter is The second end is connected to the ground; the input signal passes through the suppression module, and the signal in the frequency range outside the passband of the switched capacitor filter can be suppressed, thereby filtering out the target signal; and the target signal is filtered by the switched capacitor filter The output signal is obtained, which can be used for communication by the circuit.
  • a feasible structure of the filter is provided.
  • the suppression module first filters the input signal, suppresses the signal in the frequency range outside the passband of the switched capacitor filter, and filters out the target signal;
  • the switched capacitor filter then filters the target signal to obtain an output signal that is used by the circuit for communication.
  • the structure can improve the suppression ability of the signal in the frequency range outside the passband of the filter under the premise of ensuring the performance of the original switched capacitor filter, and filter out the output signal satisfying the condition, thereby improving the filtering of the filter. ability.
  • the specific connection mode is that the first end of the suppression module is connected to the input signal, and the second end of the suppression module is connected to the output signal, and the first end of the switched capacitor filter is connected to the input signal, and the switched capacitor filter is The second end is connected to the ground; the input signal is first filtered by the switched capacitor filter to obtain a target signal; and the target signal can suppress the signal in the frequency range outside the passband of the switched capacitor filter through the suppression module, thereby The output signal is filtered out and used to communicate with the circuit.
  • another feasible structure of the filter is provided, the switched capacitor filter First, the input signal is filtered to obtain a target signal; and the suppression module filters the target signal to suppress signals in the frequency range outside the passband of the switched capacitor filter, thereby filtering out the output signal, and the output signal is used for The circuit communicates.
  • the structure can improve the suppression ability of the signal in the frequency range outside the passband of the filter under the premise of ensuring the performance of the original switched capacitor filter, and filter out the output signal satisfying the condition, thereby improving the filtering of the filter. ability.
  • the suppression modules provided in the embodiments of the present invention can be mainly divided into two categories, one is composed of high/low-pass circuits, and the other is composed of high/low sideband band-stop circuits. Description:
  • the suppression module includes: at least one of a low-pass circuit and a high-pass circuit;
  • the first target signal having a frequency less than the low pass frequency point is filtered out of the signal whose suppression frequency is greater than the low pass frequency point, and the low pass frequency point is greater than the center frequency point of the filter of the switched capacitor;
  • the high pass circuit is specifically configured to suppress The signal having a frequency less than the high-pass frequency point filters out a second target signal having a frequency greater than the high-pass frequency point, and the high-pass frequency point is smaller than a center frequency point of the filter of the switched capacitor.
  • the low pass frequency point and the high pass frequency point mentioned herein are both fixed values, but this fixed value can be flexibly adjusted according to actual needs in practical applications to further control the filtering capability.
  • the suppression module may include at least one of a low-pass circuit and a high-pass circuit, and the low-pass circuit and the high-pass circuit filter capability, that is, The role played by the low-pass circuit and the high-pass circuit is further explained, making the solution more clear.
  • the suppression module includes: at least one of a low sideband band rejection circuit and a high sideband band resistance circuit.
  • the low sideband bandstop circuit is specifically configured to suppress signals in the first high and low sideband frequency range, and filter out a third target signal having a frequency greater than an upper limit value of the first high and low sideband frequency ranges, the first high and low sidebands
  • the frequency range is the frequency range of the low sideband band-stop circuit, the center frequency of the first high and low sideband frequency range is smaller than the center frequency point of the switched capacitor filter;
  • the high sideband bandstop circuit is specifically for suppressing the second high and low side a signal having a frequency range, filtering a fourth target signal having a frequency lower than a lower limit of the second high and low sideband frequency range, the second high and low sideband frequency range being a frequency range of the high sideband bandstop circuit, Second high and low The center frequency of the sideband frequency range is greater
  • the frequency range of the high and low sideband band-stop circuit mentioned herein can also be flexibly adjusted according to actual needs, thereby further controlling the filtering capability.
  • the suppression module may include at least one of a low sideband band resistance circuit and a high sideband band resistance circuit, and the low sideband band.
  • the feasibility of the suppression module simultaneously including the low-pass circuit and the high-pass circuit is Description: If the suppression module includes the low-pass circuit and the high-pass circuit, the low-pass circuit includes a first inductor, the high-pass circuit includes a second inductor; wherein a first end of the first inductor is coupled to the input signal, The second end of the first inductor is connected to the output signal, and the first end of the second inductor is connected to the input signal or the output signal, and the second end of the second inductor is connected to the ground.
  • the low-pass circuit and the high-pass circuit are provided.
  • the number of the inductors herein is not specifically limited.
  • the effects of the low-pass circuit and the high-pass circuit are realized by different connections of the inductors.
  • the feasibility of the technical solution of the present invention is provided, and the technical solution of the present invention can be specifically illustrated.
  • the suppression module including the low-pass circuit and the high-pass circuit at the same time.
  • the suppression module includes the low-pass circuit and the high-pass circuit
  • the high-pass circuit includes a first capacitor
  • the low-pass circuit includes a second capacitor; wherein the first end of the first capacitor is connected to the input signal The second end of the first capacitor is connected to the output signal, and the first end of the second capacitor is connected to the input signal or the output signal, and the second end of the second capacitor is connected to ground.
  • the suppression module includes a low sideband band rejection circuit and the high sideband A feasible description of the strip resistor circuit: if the suppression module includes the low sideband band stop circuit and the high sideband band stop circuit, the high sideband band stop circuit and the low sideband band stop circuit include a second inductor, a third capacitor, a third inductor, and a third capacitor; the second inductor and the second capacitor are connected in parallel, the third capacitor and the third inductor are connected in series; wherein the first end of the second inductor and the second inductor The first end of the second capacitor is connected to the input signal, and the second end of the second inductor is connected to the second end of the second capacitor; the first end of the third inductor is connected to the input signal or the output signal The second end of the third inductor is connected to the first end of the third capacitor, and the second end of the third capacitor
  • the low sideband bandstop circuit and the high sideband bandstop circuit are provided.
  • the number of capacitors and inductors herein is not specifically limited.
  • the low sideband bandstop circuit and the high sideband bandstop circuit are realized by different connections of the capacitor and the inductor. The feasibility of the technical solution of the present invention is provided, and the technical solution of the present invention can be specifically illustrated.
  • the first end of the third capacitor is connected to the input signal or the output signal
  • the second end of the third capacitor is connected to the first end of the third inductor
  • the second end of the third inductor is connected to the ground.
  • the third capacitor and the third inductor are connected differently, thereby implementing low sideband resistance.
  • the effect of the circuit and the high sideband bandstop circuit is provided for the technical solution of the present invention.
  • any one of the first implementation manner of the first aspect of the embodiment of the present invention to the seventh implementation manner of the first aspect of the embodiment of the present invention is the first embodiment of the present invention.
  • the signal source of the input signal carries an internal resistance
  • the first end of the internal resistance is connected to the signal source
  • the second end of the internal resistance is connected to the first end of the suppression module
  • the suppression module The second end of the connection is connected to the output signal.
  • an input signal of the technical solution of the present invention is described, that is, the input signal carries an internal resistance, and the connection relationship of the internal resistance is also mentioned, so that the whole scheme is more specific.
  • the suppression module can include a low-pass circuit, a high-pass circuit, and a low sideband. At least one of a band-stop circuit and a high-side band-stop circuit, if the suppression module includes one of them, for example, the suppression module includes a high-pass circuit, then it may be called a high-pass suppression module, and the like, This is not to be described, then, there are a variety of options.
  • the structure of the filter can be, if connected from left to right: (1) high-pass suppression module, switched-capacitor filter and low-pass suppression module; (2) low-pass suppression module, switched-capacitor filter and high-pass suppression module; 3) high sideband with resistance suppression module, switched capacitor filter and low sideband band rejection suppression module; (4) low sideband band rejection suppression module, switched capacitor filter and high sideband band rejection suppression module; (5) Qualcomm suppression module, switched capacitor filter and high sideband with resistance suppression module; (6) high sideband with resistance suppression module, switched capacitor filter and high pass suppression module; (7) low pass suppression module, switched capacitor filter and High sideband with rejection suppression module; (8) high sideband with resistance suppression module, switched capacitor filter and low pass suppression module; (9) high pass suppression module, switched capacitor filter and low sideband band rejection module; 10) Low sideband band rejection suppression module, switched capacitor filter and high pass suppression module; (11) low pass suppression module, switched capacitor filter and low sideband band rejection suppression module; (12) low sideband band rejection suppression module , switched capacitor filter and low pass suppression module;
  • the second aspect of the present invention further provides an embodiment of the filtering method, which is specifically used in conjunction with the filter of the first aspect, and is not described herein.
  • the third aspect of the embodiments of the present invention further provides a storage medium, and the technical solution of the present invention, or the part that contributes to the prior art, or all or part of the technical solution, may be embodied in the form of a software production port.
  • the computer software product is stored in a storage medium for storing computer software instructions for use in the electronic device, including programs for performing the first and second aspects described above.
  • the computer software product is stored in a storage medium and includes instructions for causing a computer device (which may be a personal computer, server, or network device, etc.) to perform all or part of the steps of the methods described in various embodiments of the present invention.
  • the foregoing storage medium includes: a U disk, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk, and the like. .
  • an out-of-band rejection filter including: a suppression module and a switched capacitor filter; a first end of the suppression module is connected to an input signal, and a second end of the suppression module is connected to an output signal, and the switching capacitor is The first end of the filter is connected to the output signal, and the second end of the switched capacitor filter is connected to the ground; the input signal is passed through the suppression module to suppress the signal in the frequency range outside the passband of the switched capacitor filter No., filtering out the target signal; the target signal is filtered by the switched capacitor filter to obtain an output signal, and the output signal is used for circuit communication.
  • the structure can improve the suppression ability of the signal in the frequency range outside the passband of the filter under the premise of ensuring the performance of the original switched capacitor filter, and filter out the output signal satisfying the condition, thereby improving the filtering of the filter. ability.
  • FIG. 1(a) is a schematic diagram of an embodiment of a switched capacitor filter according to an embodiment of the present invention
  • FIG. 1(b) is a schematic diagram of a switch control signal in a switched capacitor filter according to an embodiment of the present invention
  • 1(c) is a schematic diagram showing a frequency domain transfer function of a switched capacitor filter circuit according to an embodiment of the present invention
  • 1(d) is a schematic diagram showing the on-resistance of a switched capacitor filter according to an embodiment of the present invention
  • 1(e) is a schematic diagram showing the relationship between the on-resistance of a switched capacitor filter and a frequency domain transfer function in an embodiment of the present invention
  • FIG. 2(a) is a schematic diagram of an embodiment of a filter provided in an embodiment of the present invention.
  • FIG. 2(b) is a schematic diagram of another embodiment of a filter provided in an embodiment of the present invention.
  • FIG. 2(c) is a schematic diagram of a switch control signal in a switched capacitor filter according to an embodiment of the present invention
  • 3(a) is a schematic diagram of an embodiment of a high-pass and low-pass based suppression module according to an embodiment of the present invention
  • 3(b) is a schematic diagram showing the suppression principle of the high-pass circuit and the low-pass circuit provided in the embodiment of the present invention
  • FIG. 3(c) is a schematic diagram of an embodiment of a suppression module provided in an embodiment of the present invention.
  • FIG. 3(d) is a schematic diagram of another embodiment of a suppression module provided in an embodiment of the present invention.
  • FIG. 3(e) is a schematic diagram of another embodiment of a suppression module provided in an embodiment of the present invention.
  • FIG. 3(f) is a schematic diagram of another embodiment of a suppression module provided in an embodiment of the present invention.
  • 3(g) is a schematic diagram of an embodiment of a low pass suppression module of different low pass frequencies provided in an embodiment of the present invention
  • FIG. 3(h) is a schematic diagram of an embodiment of a high-pass suppression module of different high-pass frequencies provided in an embodiment of the present invention
  • FIG. 4(a) is a schematic diagram of another embodiment of a filter provided in an embodiment of the present invention.
  • FIG. 4(b) is a schematic diagram of another embodiment of a filter provided in an embodiment of the present invention.
  • FIG. 4(c) is a schematic diagram of another embodiment of a filter provided in an embodiment of the present invention.
  • FIG. 4(d) is a schematic diagram of another embodiment of a filter provided in an embodiment of the present invention.
  • FIG. 4(e) is a schematic diagram of another embodiment of a filter provided in an embodiment of the present invention.
  • FIG. 4(f) is a schematic diagram of another embodiment of a filter provided in an embodiment of the present invention.
  • FIG. 5(a) is a schematic diagram of an embodiment of a suppression module based on a high sideband band stop and a low sideband band stop according to an embodiment of the present invention
  • FIG. 5(b) is a schematic diagram showing the suppression principle of the high sideband band stop and the low sideband band stop provided in the embodiment of the present invention.
  • FIG. 5(c) is a schematic diagram of another embodiment of a suppression module provided in an embodiment of the present invention.
  • FIG. 5(d) is a schematic diagram of another embodiment of a suppression module provided in an embodiment of the present invention.
  • FIG. 5(e) is a schematic diagram of another embodiment of a suppression module provided in an embodiment of the present invention.
  • FIG. 5(f) is a schematic diagram of another embodiment of a suppression module provided in an embodiment of the present invention.
  • FIG. 5(g) is a schematic diagram of an embodiment of a low sideband band rejection suppression module with different center frequency points according to an embodiment of the present invention
  • FIG. 5(h) is a schematic diagram of an embodiment of a high sideband band rejection suppression module with different center frequency points according to an embodiment of the present invention
  • FIG. 6(a) is a schematic diagram of another embodiment of a filter provided in an embodiment of the present invention.
  • FIG. 6(b) is a schematic diagram of another embodiment of a filter provided in an embodiment of the present invention.
  • FIG. 6(c) is a schematic diagram of another embodiment of a filter provided in an embodiment of the present invention.
  • FIG. 6(d) is a schematic diagram of another embodiment of a filter provided in an embodiment of the present invention.
  • FIG. 6(e) is a schematic diagram of another embodiment of a filter provided in an embodiment of the present invention.
  • FIG. 6(f) is a schematic diagram of another embodiment of a filter provided in an embodiment of the present invention.
  • FIG. 7(a) is a schematic diagram of another embodiment of a filter provided in an embodiment of the present invention.
  • FIG. 7(b) is a schematic diagram of another embodiment of a filter provided in an embodiment of the present invention.
  • FIG. 7(c) is a schematic diagram of another embodiment of a filter provided in an embodiment of the present invention.
  • FIG. 7(d) is a schematic diagram of another embodiment of a filter provided in an embodiment of the present invention.
  • FIG. 7(e) is a schematic diagram of another embodiment of a filter provided in an embodiment of the present invention.
  • FIG. 7(f) is a schematic diagram of another embodiment of a filter provided in an embodiment of the present invention.
  • FIG. 7(g) is a schematic diagram of another embodiment of a filter provided in an embodiment of the present invention.
  • FIG. 7(h) is a schematic diagram of another embodiment of a filter provided in an embodiment of the present invention.
  • the filter is usually based on a filter structure of a switched capacitor, as shown in FIG. 1(a), which is a schematic structural diagram of a switched capacitor filter. It mainly includes switches CLK1-1, CLK1-2, ... CLK1-N, where the switch is represented by the abbreviation CLK of the switch signal clock; the capacitors C1-1, C1-2, ..., C1-N, where N is an integer greater than zero. N switches and N capacitors are connected to form N parallel structures. Specifically, the first end of the switch CLK1-1, the first end of the switch CLK1-2, and so on, until the first end of the switch CLK1-N is connected together and connected to the output signal S1(OUT).
  • switches CLK1-1, CLK1-2, ... CLK1-N where the switch is represented by the abbreviation CLK of the switch signal clock
  • the capacitors C1-1, C1-2, ..., C1-N where N is an integer greater than zero.
  • N switches and N capacitors are connected to form N
  • the second end of the switch CLK1-1 is connected to the first end of the capacitor C1-1; the second end of the switch CLK1-2 is connected to the first end of the capacitor C1-2; and so on, until the second end of the switch CLK1-N and the capacitor C1- N is connected at the first end.
  • the second end of the capacitor C1-1, the second end of the capacitor C1-2, and so on, until the second ends of the capacitors C1-N are connected together, and the common terminal is connected to the ground GND.
  • S1 (IN) is the signal source of the circuit
  • Rs1 is the internal resistance of the signal source.
  • S1(IN) is the output signal of the pre-stage circuit
  • Rs1 is the output internal resistance of the pre-stage circuit.
  • Figure 1(b) shows the control signals for each switch in the circuit configuration of the polyphase switching filter.
  • the control signal of the switch in the circuit structure is N clocks that do not overlap each other. In any one clock cycle Ts, each switch is effectively closed only once, and the effective closing time is one-N of the period Ts. Since each clock does not overlap, only one switch is in an active closed state at any one time.
  • Figure 1(c) shows the frequency domain transfer function
  • the value of N is inversely proportional to the 3dB bandwidth of
  • the circuit shown in Fig. 1(a) is an ideal result, and various non-ideal factors exist in practical applications.
  • the on-resistance of the switch is one of several serious non-ideal factors, such as the on-resistances Rsw1-1, Rsw1-2, ..., Rsw1-N shown in Fig. 1(d).
  • the transfer function outside the bandpass frequency range of the filter is no longer zero, but is related to the on-resistance of the switch, as shown in Figure 1(e), which is the on-resistance and filter center of the switch.
  • a schematic diagram of a filter structure provided by an embodiment of the present invention which may also be referred to as a filter structure of an out-of-band rejection, includes a suppression module 2-1 and a switched capacitor filter 2-2. .
  • the suppression module 2-1 is connected to the switched capacitor filter 2-2. Specifically, the first end of the suppression module is connected to the input signal, and the second end of the suppression module is connected to the output signal, and the first end of the switched capacitor filter is connected to the output signal.
  • the second end of the switched capacitor filter is connected to the ground; the input signal passes through the suppression module to suppress the signal in the frequency range outside the passband of the switched capacitor filter, and the target signal is filtered; the target signal is filtered by the switched capacitor filter to obtain an output. Signal, output signal is used for circuit communication.
  • S2(IN) is the signal source of the circuit and Rs2 is the internal resistance of the signal source.
  • S2(IN) is the output signal of the pre-stage circuit
  • Rs2 is the output internal resistance of the pre-stage circuit.
  • the first end of Rs2 is connected to the signal source S2 (IN)
  • the second end of Rs2 is connected to the first end S2 (IN) of the out-of-band suppression module 2-1.
  • the second end of the out-of-band suppression module 2-1 is connected to an output signal S2(OUT), wherein IN2 is an input signal of the signal source S2(IN) passing through the internal resistance Rs2.
  • the switched capacitor filter 2-2 can also be used to control the frequency and bandwidth of the filtering center.
  • the schematic diagram of the filter structure of the outband suppression includes but is not limited to the above shown in FIG. 2(a), as shown in FIG. 2(b).
  • a schematic diagram of another out-of-band rejection filter structure provided by an embodiment of the present invention includes a suppression module 2-1 and a switched capacitor filter 2-2.
  • the suppression module 2-1 is connected to the switched capacitor filter 2-2. Specifically, the first end of the suppression module is connected to the input signal, the second end of the suppression module is connected to the output signal, and the first end of the switched capacitor filter is connected to the input signal.
  • the second end of the switched capacitor filter is connected to the ground; the input signal is filtered by the switched capacitor filter to obtain a target signal; the target signal is passed through the suppression module to suppress signals in the frequency range outside the passband of the switched capacitor filter, and the output is filtered out. Signal, output signal is used for circuit communication.
  • FIG. 2(b) only the positions of the suppression module 2-1 and the switched capacitor filter 2-2 are exchanged. For details, please refer to FIG. 2(b), and details are not described herein again.
  • the circuit structure of the specific switched capacitor filter 2-2 may include: N identical switches, CLK2-1, CLK2-2, ..., CLK2-N; N identical capacitors, C2-1, C2-2, ..., C2 -N; N is an integer greater than zero, usually 2 n , n is a positive integer, and the preferred N is usually 4, 8, 16...; it should be understood that the value of N can also be a power of 2 Other integers greater than zero, but in practical applications, even values are more convenient to calculate.
  • N identical switches CLK2-1, CLK2-2, ..., CLK2-N
  • N identical capacitors C2-1, C2-2, ..., C2 -N
  • N is an integer greater than zero, usually 2 n
  • n is a positive integer
  • the preferred N is usually 4, 8, 16...
  • the value of N can also be a power of 2
  • FIG. 1(a) For the connection relationship between the N identical switches and the N identical capacitors in the switched capacitor filter 2-2, reference may be made to the above-mentione
  • the switching signals (i.e., clock control signals) of the switches CLK2-1, CLK2-2, ..., CLK2-N are as shown in Fig. 2(c), which is substantially the same as that shown in Fig. 1(b) above.
  • the control signal of the switch is N clocks that do not overlap each other. Specifically, in any one clock cycle Ts, each switch is effectively closed only once, and the effective closing time is one-N of the period Ts. Since each clock does not overlap, only one switch is in an active closed state at any one time.
  • the suppression module 2-1 will be specifically described below, usually in two forms, one based on a high pass and/or low pass suppression module; the other based on a high sideband band stop and/or a low sideband band Resistance suppression module.
  • At least one of a high-pass circuit and a low-pass circuit may be included;
  • the low-pass circuit is specifically configured to suppress a signal whose frequency is greater than a low-pass frequency point, filter out a first target signal whose frequency is lower than a low-pass frequency point, and a low-pass frequency point is greater than a center frequency point of the filter of the switched capacitor;
  • the Qualcomm circuit is specifically configured to suppress a signal whose frequency is lower than a high-pass frequency point, and filter a second target signal whose frequency is greater than a high-pass frequency point, and the high-pass frequency point is smaller than a center frequency point of the filter of the switched capacitor.
  • FIG. 3(a) it is a schematic diagram of one embodiment of a high-pass and low-pass based suppression module.
  • the sign "+" in Fig. 3(a) means the relationship of the sum, that is to say, the suppression module has the effects of the high-pass circuit and the low-pass circuit, and the first high-pass circuit is low.
  • the circuit or the high-low-pass circuit is performed at the same time, depending on the design of the circuit.
  • FIG. 3(b) it is a schematic diagram of the suppression principle of the high-pass circuit and the low-pass circuit.
  • the suppression module 2-1 will be described below in a specific implementation manner:
  • the suppression module includes a low sideband bandstop circuit and a high sideband bandstop circuit
  • the low pass circuit includes a first inductor
  • the high pass circuit includes a second inductor; wherein the first end of the first inductor is connected to the input signal, The second end of the first inductor is connected to the output signal, the first end of the second inductor is connected to the input signal or the output signal, and the second end of the second inductor is connected to the ground.
  • 3(c) and 3(d) are schematic diagrams of two embodiments of a suppression module according to an embodiment of the present invention.
  • the first end of the inductor L2-1-1 is connected to the input signal IN2, and the second end of the inductor L2-1-1 is connected to the output signal S2 (OUT), the inductor L2-1-2 The first end is connected to the output signal S2 (OUT), and the second end of the inductor L2-1-2 is connected to the ground GND.
  • the first end of the inductor L2-1-1 is connected to the input signal IN2, and the second end of the inductor L2-1-1 is connected to the output signal S2 (OUT), and the first of the inductor L2-1-2
  • the terminal is connected to the input signal IN2, and the second end of the inductor L2-1-2 is connected to the ground GND.
  • Fig. 3(c) and Fig. 3(d) are symmetrical L-shaped structures, and the series inductance L2-1-1 in Fig. 3(c) and Fig. 3(d) is a low-pass effect, and the suppression frequency is greater than the low-pass point.
  • the signal filters out the first target signal whose frequency is lower than the low pass frequency point, that is, correspondingly suppresses the high sideband signal of the switched capacitor filter 2-2; the parallel inductor L2-1-2 is a high pass effect, and the suppression frequency is lower than the high pass
  • the signal of the frequency point filters out the second target signal whose frequency is greater than the high-pass frequency point, that is, correspondingly suppresses the low sideband signal of the switched capacitor filter 2-2.
  • the suppression module includes a low sideband bandstop circuit and a high sideband bandstop circuit
  • the high pass circuit package The first capacitor, the low-pass circuit includes a second capacitor; wherein the first end of the first capacitor is connected to the input signal, the second end of the first capacitor is connected to the output signal, and the first end of the second capacitor is connected to the input signal or the output signal The second end of the second capacitor is connected to the ground.
  • 3(e) and 3(f) are schematic diagrams showing two embodiments of a suppression module according to an embodiment of the present invention.
  • the first end of the capacitor C2-1-1 is connected to the input signal IN2, and the second end of the capacitor C2-1-1 is connected to the output signal S2 (OUT), and the capacitor C2-1-2 The first end is connected to the output signal S2 (OUT), and the second end of the capacitor C2-1-2 is connected to the ground GND.
  • the first end of the capacitor C2-1-1 is connected to the input signal IN2, and the second end of the capacitor C2-1-1 is connected to the output signal S2 (OUT), and the first of the capacitor C2-1-2
  • the terminal is connected to the input signal IN2, and the second end of the capacitor C2-1-2 is connected to the ground GND.
  • Fig. 3(e) and Fig. 3(f) are also symmetrical L-shaped structures, and the series capacitor C2-1-1 in Fig. 3(e) and Fig. 3(f) is a high-pass effect, and the signal whose suppression frequency is lower than the high-pass frequency point is suppressed.
  • the parallel capacitor C2-1-2 is a low-pass effect, and the suppression frequency is greater than the low-pass frequency
  • the signal of the point filters out the first target signal whose frequency is lower than the low pass frequency point, that is, the high sideband signal of the switched capacitor filter 2-2 is correspondingly suppressed.
  • the 3dB bandwidth frequency of the inductor L2-1-1, the 3dB bandwidth frequency of the inductor L2-1-2, the 3dB bandwidth frequency of the capacitor C2-1-1, and the 3dB bandwidth of the capacitor C2-1-2 The frequency points are not within the 3dB bandwidth frequency range of the switched capacitor filter 2-2.
  • the high-pass frequency point and the low-pass frequency point mentioned above are a fixed value, in practical applications, the values of the high-pass frequency point and the low-pass frequency point can be flexibly adjusted according to actual needs, then further The suppression capability of the suppression module is also adjusted accordingly.
  • FIG. 3(g) a schematic diagram of the first target signal obtained after the input signal passes through the low-pass suppression module of different low-pass frequencies; as shown in FIG. 3(h), the input signal passes through different high-pass frequencies.
  • the embodiment of the present invention can also provide the following schematic diagrams of the filter structure of the out-of-band rejection, as shown in FIG. 4(a) and FIG. 4(b). ), 4(c), 4(d), 4(e) and 4(f), wherein the suppression module including the low-pass circuit may be simply referred to as a low-pass suppression module, and the suppression module including the high-pass circuit may be simply referred to as a high-pass suppression module.
  • a suppression module based on high sideband band rejection and/or low sideband band rejection correspondingly, at least one of a high sideband band stop circuit and a low sideband band stop circuit may be included;
  • the low sideband band rejection circuit is specifically configured to suppress signals in the first high and low sideband frequency ranges, and filter out a third target signal having a frequency greater than an upper limit of the first high and low sideband frequency ranges, and the first high and low sideband frequency ranges are The frequency range of the low sideband band-stop circuit, the center frequency of the first high and low sideband frequency range is smaller than the center frequency of the switched capacitor filter;
  • the high sideband blocking circuit is specifically configured to suppress signals in the second high and low sideband frequency range, and filter out a fourth target signal whose frequency is lower than a lower limit value of the second high and low sideband frequency ranges, and the second high and low sideband frequency ranges are The frequency range of the high sideband resistor circuit, the center frequency of the second high and low sideband frequency range is greater than the center frequency of the filter of the switched capacitor.
  • FIG. 5(a) it is a schematic diagram of an embodiment of a suppression module based on a high sideband band stop and a low sideband band stop.
  • the sign "+" in Fig. 5(a) means the relationship of the sum, that is to say, the suppression module has the effects of the high sideband bandstop circuit and the low sideband bandstop circuit.
  • Fig. 5(b) it is a schematic diagram of the suppression principle of the high sideband band resistance and the low sideband band resistance.
  • the suppression module 2-1 will be described below in a specific implementation manner:
  • the suppression module includes a low sideband bandstop circuit and a high sideband bandstop circuit
  • the high sideband bandstop circuit and the low sideband bandstop circuit include a second inductor, a second capacitor, a third inductor, and a a three capacitor; the second inductor and the second capacitor are connected in parallel, and the third capacitor and the third inductor are connected in series;
  • the first end of the second inductor and the first end of the second capacitor are connected to the input signal, and the second end of the second inductor and the second end of the second capacitor are connected to the output signal; the first end of the third inductor is connected to the input signal Or outputting a signal, the second end of the third inductor is connected to the first end of the third capacitor, and the second end of the third capacitor is connected to the ground.
  • 5(c) and 5(d) are schematic diagrams of two embodiments of a suppression module according to an embodiment of the present invention.
  • the first end of the inductor L2-1-3 is connected to the input signal IN2, and the inductor
  • the second end of L2-1-1 is connected to the output signal S2 (OUT)
  • the first end of the capacitor C2-1-3 is connected to the input signal IN2
  • the second end of the capacitor C2-1-3 is connected to the output signal S2 (OUT)
  • the first end of the inductor L2-1-4 is connected to the output signal S2(OUT)
  • the second end of the inductor L4-1-4 is connected to the first end of the capacitor C2-1-4
  • the second end of the capacitor C2-1-4 Connect to ground GND.
  • the first end of the inductor L2-1-3 is connected to the input signal IN2, the second end of the inductor L2-1-1 is connected to the output signal S2(OUT), and the first end of the capacitor C2-1-3
  • the input signal IN2 is connected
  • the second end of the capacitor C2-1-3 is connected to the output signal S2 (OUT)
  • the first end of the inductor L2-1-4 is connected to the input signal IN2
  • the second end of the inductor L2-1-4 is connected to the capacitor At the first end of C2-1-4, the second end of the capacitor C2-1-4 is connected to the ground GND.
  • Figure 5(c) and Figure 5(d) are symmetrical L-shaped structures.
  • the overall effect of the inductor L2-1-3 capacitor C2-1-3 in Figure 5(c) and Figure 5(d) is the high and low sidebands.
  • the band-stop effect, the center frequency of the band-stop is the self-resonant frequency f0 of the inductor L2-1-3 and the capacitor C2-1-3.
  • the overall effect of the inductor L2-1-4 and the capacitor C2-1-4 is the high and low sideband band-stop effect.
  • the band-stop center frequency is the self-resonant frequency f1 of the inductor L2-1-4 and the capacitor C2-1-4.
  • the self-resonant frequency f0 of the inductor L2-1-3 and the capacitor C2-1-3 is different from the self-resonant frequency f1 of the inductor L2-1-4 and the capacitor C2-1-4, and the magnitudes of f0 and f1 are: one is lower than
  • the bandpass frequency of the switched capacitor filter 2-2 may also be referred to as the center frequency of the switched capacitor filter 2-2, and the other is higher than the bandpass frequency of the switched capacitor filter 2-2, which may also be referred to as a switched capacitor.
  • the center frequency of filter 2-2 It should be ensured that the frequency at the edge of the 3dB bandwidth of the inductor L2-1-3 and the capacitor C2-1-3 and the band edge of the inductor L2-1-4 and the capacitor C2-1-4 are not.
  • the switched capacitor filter 2-2 has a 3dB bandwidth frequency range.
  • the suppression module includes the low sideband bandstop circuit and the high sideband bandstop circuit
  • the high sideband bandstop circuit and the low sideband bandstop circuit include a second inductor and a second capacitor a third inductor and a third capacitor; the second inductor and the second capacitor are connected in parallel, and the third capacitor and the third inductor are connected in series;
  • the first end of the second inductor and the first end of the second capacitor are connected to the input signal, and the second end of the second inductor and the second end of the second capacitor are connected to the output signal; the first end of the third capacitor is connected The input signal or the output signal, the second end of the third capacitor is connected to the first end of the third inductor, and the second end of the third inductor is connected to ground.
  • 5(e) and 5(f) are schematic diagrams showing two embodiments of a suppression module according to an embodiment of the present invention.
  • Figure 5(e) is compared with Figure 5(c) except that the positions of the capacitors C2-1-4 and the inductors L4-1-4 are interchanged.
  • Figure 5(f) is compared with Figure 5(d). Just swap the positions of the capacitors C2-1-4 and the inductors L4-1-4. The rest of the contents are the same, and will not be described here.
  • the center frequency of the low sideband band-stop circuit is f c1 , f c2 or f c3 , if the first high and low sideband frequency range is [f c1 L, f C1 H], f c1 belongs to [f c1 L, f c1 H], and the low sideband band rejection circuit suppresses the signal whose frequency is less than f c1 H, and filters out the third target signal whose frequency is greater than f c1 H, if the low sideband
  • the center frequency of the band-stop circuit is f c2 or f c3 , which is the same principle, and will not be described here; as shown in Figure 5(h), the center frequency of the high sideband band-stop circuit is f c4 , f c5 Or f c6 , if the second high and low sideband frequency range is [f c4 L, f c4 H], f c4 belongs
  • first high and low sideband frequency ranges and the upper and lower limits of the second high and low sideband frequency ranges may be adjusted according to actual needs, then corresponding, the center frequency of the high and low sideband frequency ranges It will also be adjusted accordingly.
  • the embodiment of the present invention can also provide the following schematic diagrams of the filter structure of the outband suppression, as shown in FIG. 6 ( a), FIG. 6(b), 6(c), FIG. 6(d), 6(e) and FIG. 6(f), wherein the suppression module including the low sideband band-stop circuit may be simply referred to as a low side
  • the band rejection suppression module, the suppression module including the high sideband band rejection circuit can be referred to as a high sideband band rejection suppression module.
  • the implementation manners of the suppression module 2-2 shown in FIG. 3 and the suppression module 2-2 shown in FIG. 5 include, but are not limited to, the description provided above, There are many structures for achieving high-pass, low-pass, low-sideband resistance and high-sideband rejection, so any possible frequency transfer function is equivalent to Figure 3(b), 3(g), 3(h), 5
  • the structures of (b), 5(g) and 5(h), and combinations thereof, are all within the scope of protection of the suppression module provided in the technical solution of the present invention.
  • Figure 7 (a) to 7(h) are schematic diagrams showing an embodiment of a filter for combining out-of-band rejection of a high-low-pass circuit and a high-low-side band-stop circuit according to an embodiment of the present invention. It will be apparent to those skilled in the art that various modifications of the embodiments may be practiced in other embodiments without departing from the spirit or scope of the invention. All are within the scope of protection of the present invention.
  • CMOS Complementary Metal Oxide Semiconductor
  • NMOS N-Channel Metal Oxide Semiconductors MOS
  • PMOS P-channel MOS
  • BJT Bipolar Junction Transistor
  • BiCMOS Bipolar CMOS
  • SiGe Silicon germanium
  • GaAs Gallium Arsenide
  • the suppression module in the embodiment of the present invention has been described above.
  • the present invention further provides an embodiment of the filtering method, which is specifically used in conjunction with the foregoing filter, and is not described herein.
  • the embodiment of the invention further provides a computer storage medium for storing computer software used for the suppression module described in the above FIG. 3(c) - FIG. 3(f) or FIG. 5(c) - FIG. 5(f).
  • the instruction by executing the stored program, can filter the passed signal, thereby improving the suppression capability of the suppression module on the switched capacitor filter.
  • the program is implemented in the form of a software functional unit and sold or used as a standalone product, it can be stored in a computer readable storage medium.
  • the technical solution of the present invention which is essential or contributes to the prior art, or all or part of the technical solution, may be embodied in the form of a software product stored in a storage medium.
  • a number of instructions are included to cause a computer device (which may be a personal computer, server, or network device, etc.) to perform all or part of the steps of the methods described in various embodiments of the present invention.
  • the foregoing storage medium includes: a U disk, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk, and the like. .

Landscapes

  • Filters And Equalizers (AREA)

Abstract

本发明实施例公开了一种滤波器,用于提高滤波器通带外两侧频率范围内信号的抑制能力,过滤出满足条件的输出信号,进而提高了滤波器的滤波能力,包括:抑制模块和开关电容滤波器;所述抑制模块的第一端连接输入信号,所述抑制模块的第二端连接输出信号,所述开关电容滤波器的第一端连接所述输出信号,所述开关电容滤波器的第二端连接地;所述输入信号通过所述抑制模块,抑制所述开关电容滤波器通带外两侧频率范围内的信号,过滤出目标信号;所述目标信号通过所述开关电容滤波器进行过滤,得到所述输出信号,所述输出信号用于电路进行通信。

Description

一种滤波器 技术领域
本发明涉及电子通信领域,尤其涉及一种滤波器。
背景技术
在无线通信过程中,信号的发射与接收是用发射装置和接收装置来实现的。接收设备通过天线将无线信号接收之后或者信号由功率放大器发射到天线之前,通常要对信号进行射频滤波,以消除通信信道之外的各种干扰和噪声等。接收时为了能准确接收相应的无线信号,接收设备中天线的后面需要安装相应频率的射频滤波器。发射时为了保证发射信号的质量,功率放大器与天线之间需要安装相应频率的射频滤波器。通信信号频率不同要求射频滤波器的通带滤波频率也不同。
但是无线通信标准多种多样,每种无线通信都有自身的特征,如载波频率、信噪比、动态范围和线性度等。特别是在移动通信的需求下,为了简化收发设备,便于移动,通常希望一套通信设备兼容不同的通信标准,能收发不同的无线通信信号。在简化设备的各种方法中,尽管已经实现了部分电路的共用,但收发端的滤波器始终没有很大突破。其中的主要原因在于射频滤波无法做到灵活的滤波频率范围的同时依然保持较好的滤波性能。
近些年出现了以开关电容电路为基础的带通滤波器,该滤波器中电容由多路相位不交叠时钟开关控制。不断导通与闭合的动态开关将电路的频率域传输函数从低通特性变成带通特性,带通的中心频率与动态开关的开关频率有关,比现有的电感电容谐振方式和声表面波滤波器的滤波中心频率范围灵活很多,而且大大节省了面积。但受开关的导通寄生电阻的限制,该滤波器的带外抑制能力较差,对带外信号的衰减不够大。
发明内容
本发明实施例提供了一种滤波器,用于保证原有开关电容滤波器的性能不变的前提下,提高滤波器通带外两侧频率范围内信号的抑制能力,过滤出满足 条件的输出信号,进而提高滤波器的滤波能力。
本发明实施例所提供的滤波器主要是给现有的开关电容滤波器又连接了一个抑制模块,可称为带外抑制模块,该抑制模块可以进一步的对电路中的信号进行滤波,主要是针对开关电容滤波器的滤波范围外的信号,即开关电容滤波器没法进行滤波器的信号,由抑制模块来进行滤波,从而,提高滤波能力。由于开关电容滤波器和抑制模块连接顺序的不同,使得本发明技术方案存在不同的滤波器的结构,下面可分别进行说明。
本发明实施例的第一方面提供一种滤波器,可包括:抑制模块和开关电容滤波器;该抑制模块和该开关电容滤波器连接,这里抑制模块和开关电容滤波器的连接方式可以有几种不同的方式,如下所示:
(1)具体的连接方式为该抑制模块的第一端连接输入信号,该抑制模块的第二端连接输出信号,该开关电容滤波器的第一端连接该输出信号,该开关电容滤波器的第二端连接地;该输入信号通过该抑制模块,可以抑制该开关电容滤波器通带外两侧频率范围内的信号,从而过滤出目标信号;该目标信号再通过该开关电容滤波器进行过滤,得到该输出信号,该输出信号可以用于电路进行通信。
在本发明实施例中,提供了滤波器的一种可行的结构,抑制模块先对输入信号进行滤波,抑制该开关电容滤波器通带外两侧频率范围内的信号,过滤出目标信号;而开关电容滤波器再对目标信号进行过滤,得到输出信号,该输出信号用于电路进行通信。该结构能够在保证原有开关电容滤波器的性能不变的前提下,提高滤波器通带外两侧频率范围内信号的抑制能力,过滤出满足条件的输出信号,进而提高了滤波器的滤波能力。
(2)具体的连接方式为该抑制模块的第一端连接输入信号,该抑制模块的第二端连接输出信号,该开关电容滤波器的第一端连接该输入信号,该开关电容滤波器的第二端连接地;该输入信号先通过该开关电容滤波器进行过滤,得到目标信号;该目标信号通过该抑制模块,可以抑制该开关电容滤波器通带外两侧频率范围内的信号,从而过滤出输出信号,该输出信号用于电路进行通信。
在本发明实施例中,提供了滤波器的另一种可行的结构,开关电容滤波器 先对输入信号进行滤波,得到目标信号;而抑制模块再对目标信号进行过滤,可以抑制该开关电容滤波器通带外两侧频率范围内的信号,从而过滤出输出信号,该输出信号用于电路进行通信。该结构能够在保证原有开关电容滤波器的性能不变的前提下,提高滤波器通带外两侧频率范围内信号的抑制能力,过滤出满足条件的输出信号,进而提高了滤波器的滤波能力。
需要说明的是,上述提供的滤波器的结构,对下述的内容并不会造成实质性的影响。本发明实施例中所提供的抑制模块主要可以分为两大类,一类是由高/低通电路构成的,另一类是由高/低边带带阻电路构成的,下面进行具体的说明:
结合本发明实施例的第一方面,在本发明实施例的第一方面的第一种实现方式中,该抑制模块包括:低通电路和高通电路中的至少一种;该低通电路具体用于抑制频率大于低通频点的信号,过滤出频率小于该低通频点的第一目标信号,该低通频点大于该开关电容的滤波器的中心频点;该高通电路具体用于抑制频率小于高通频点的信号,过滤出频率大于该高通频点的第二目标信号,该高通频点小于该开关电容的滤波器的中心频点。
应理解,这里所说的低通频点和高通频点都是一个定值,但这个定值在实际应用中可以根据实际需要而灵活调整,进一步的控制滤波能力。在本发明实施例中,对抑制模块的实现提供了一个可行性的方案,即抑制模块可包括低通电路和高通电路中的至少一种,而低通电路和高通电路滤波的能力,也就是低通电路和高通电路起到的作用也进一步的做了说明,使得该方案更加清晰明了。
结合本发明实施例的第一方面,在本发明实施例的第一方面的第二种实现方式中,该抑制模块包括:低边带带阻电路和高边带带阻电路中的至少一种;低边带带阻电路具体用于抑制第一高低边带频率范围内的信号,过滤出频率大于该第一高低边带频率范围的上限值的第三目标信号,该第一高低边带频率范围为该低边带带阻电路的频率范围,该第一高低边带频率范围的中心频点小于开关电容滤波器的中心频点;高边带带阻电路具体用于抑制第二高低边带频率范围内的信号,过滤出频率小于该第二高低边带频率范围的下限值的第四目标信号,该第二高低边带频率范围为该高边带带阻电路的频率范围,该第二高低 边带频率范围的中心频点大于开关电容的滤波器的中心频点。
应理解,这里所说的高低边带带阻电路的频率范围也可以根据实际需要而灵活调整,从而进一步的控制滤波能力。在本发明实施例中,对抑制模块的实现提供了另一个可行性的方案,即抑制模块可以包括低边带带阻电路和高边带带阻电路中的至少一种,而低边带带阻电路和高边带带阻电路滤波的能力,也就是低边带带阻电路和高边带带阻电路起到的作用也进一步的做了说明,使得该方案更加具体。
结合本发明实施例的第一方面的第一种实现方式,在本发明实施例的第一方面的第四种实现方式中,是对抑制模块同时包括低通电路和高通电路的一种可行性的说明:若该抑制模块包括该低通电路和该高通电路,则该低通电路包括第一电感,该高通电路包括第二电感;其中,该第一电感的第一端连接该输入信号,该第一电感的第二端连接该输出信号,该第二电感的第一端连接该输入信号或该输出信号,该第二电感的第二端连接地。
在本发明实施例中,提供的是低通电路和高通电路的具体实现方式,当然,这里的电感的数量不做具体限定。该方案中,是通过电感的不同连接实现低通电路和高通电路的效果。为本发明技术方案提供了可行性,可具体的说明本发明技术方案。
结合本发明实施例的第一方面的第一种实现方式,在本发明实施例的第一方面的第五种实现方式中,是对抑制模块同时包括低通电路和高通电路的另一种可行性的说明:若该抑制模块包括该低通电路和该高通电路,则该高通电路包括第一电容,该低通电路包括第二电容;其中,该第一电容的第一端连接该输入信号,该第一电容的第二端连接该输出信号,该第二电容的第一端连接该输入信号或该输出信号,该第二电容的第二端连接地。
在本发明实施例中,提供的是低通电路和高通电路的具体实现方式,当然,这里的电容的数量也不做具体限定。该方案中,是通过电容的不同连接实现低通电路和高通电路的效果。为本发明技术方案提供了可行性,可具体的说明本发明技术方案。
结合本发明实施例的第一方面的第二种实现方式,在本发明实施例的第一方面的第六种实现方式中,是对抑制模块同时包括低边带带阻电路和该高边带 带阻电路的一种可行性的说明:若该抑制模块包括该低边带带阻电路和该高边带带阻电路,则该高边带带阻电路和该低边带带阻电路,包括第二电感、第二电容、第三电感和第三电容;该第二电感和该第二电容并联,该第三电容和该第三电感串联;其中,该第二电感的第一端和该第二电容的第一端连接该输入信号,该第二电感的第二端和该第二电容的第二端连接该输出信号;该第三电感的第一端连接该输入信号或该输出信号,该第三电感的第二端连接该第三电容的第一端,该第三电容的第二端连接地。
在本发明实施例中,提供的是低边带带阻电路和该高边带带阻电路的具体实现方式,当然,这里的电容和电感的数量不做具体限定。该方案中,是通过电容和电感的不同连接实现低边带带阻电路和该高边带带阻电路的效果。为本发明技术方案提供了可行性,可具体的说明本发明技术方案。
结合本发明实施例的第一方面的第六种实现方式,本发明实施例的第一方面的第七种实现方式中,该第三电容的第一端连接该输入信号或该输出信号,该第三电容的第二端连接该第三电感的第一端,该第三电感的第二端连接地。
在本发明实施例中,主要是在本发明实施例的第一方面的第六种实现方式的基础上,对第三电容和第三电感的做了不同的连接,进而实现低边带带阻电路和该高边带带阻电路的效果。为本发明技术方案又提供了一个可选的方案。
结合本发明实施例的第一方面,本发明实施例第一方面的第一种实现方式至本发明实施例第一方面的第七种实现方式的任意一种,在本发明实施例的第一方面的第八种实现方式中,该输入信号的信号源携带内阻,该内阻的第一端连接该信号源,该内阻的第二端连接该抑制模块的第一端,该抑制模块的第二端连接该输出信号。
在本发明实施例中,对本发明技术方案的输入信号做了一个说明,即输入信号携带了内阻,而内阻的连接关系也提及了,使得整个方案更加具体。
在基于在上述所提供的本发明实施例的基础上,还有一些扩充的方案,如下所示:从上述的描述中,可以得出,抑制模块可包括低通电路、高通电路、低边带带阻电路和高边带带阻电路中的至少一种,那么,若抑制模块里面包括其中的一种,例如,抑制模块包括高通电路,那么就可称为高通抑制模块,其他的类似,在此不做赘述,那么,就有多种可选的方案。
即滤波器的结构可以为,若从左到右连接:(1)高通抑制模块,开关电容滤波器和低通抑制模块;(2)低通抑制模块,开关电容滤波器和高通抑制模块;(3)高边带带阻抑制模块,开关电容滤波器和低边带带阻抑制模块;(4)低边带带阻抑制模块,开关电容滤波器和高边带带阻抑制模块;(5)高通抑制模块,开关电容滤波器和高边带带阻抑制模块;(6)高边带带阻抑制模块,开关电容滤波器和高通抑制模块;(7)低通抑制模块,开关电容滤波器和高边带带阻抑制模块;(8)高边带带阻抑制模块,开关电容滤波器和低通抑制模块;(9)高通抑制模块,开关电容滤波器和低边带带阻抑制模块;(10)低边带带阻抑制模块,开关电容滤波器和高通抑制模块;(11)低通抑制模块,开关电容滤波器和低边带带阻抑制模块;(12)低边带带阻抑制模块,开关电容滤波器和低通抑制模块。需要说明的是,本发明实施例所提供的滤波器的结构包括但不限于上述的说明。
本发明第二方面还提供了滤波方法的实施例,具体结合第一方面的滤波器进行理解应用,此处不作赘述。
本发明实施例第三方面还提供一种存储介质,本发的技术方案本质上或者说对现有技术做出贡献的部分或者该技术方案的全部或部分可以以软件产口的形式体现出来,该计算机软件产品存储在一个存储介质中,用于储存为上述电子设备所用的计算机软件指令,其包含用于执行上述第一方面以及第二方面所设计的程序。该计算机软件产品存储在一个存储介质中,包括若干指令用以使得一台计算机设备(可以是个人计算机,服务器,或者网络设备等)执行本发明各个实施例所述方法的全部或部分步骤。而前述的存储介质包括:U盘、移动硬盘、只读存储器(ROM,Read-Only Memory)、随机存取存储器(RAM,Random Access Memory)、磁碟或者光盘等各种可以存储程序代码的介质。
本发明实施例提供的技术方案中,具有以下优点:
在本发明实施例中,提供了一种带外抑制的滤波器,包括:抑制模块和开关电容滤波器;抑制模块的第一端连接输入信号,抑制模块的第二端连接输出信号,开关电容滤波器的第一端连接输出信号,开关电容滤波器的第二端连接地;输入信号通过抑制模块,抑制开关电容滤波器通带外两侧频率范围内的信 号,过滤出目标信号;目标信号通过开关电容滤波器进行过滤,得到输出信号,输出信号用于电路进行通信。该结构能够在保证原有开关电容滤波器的性能不变的前提下,提高滤波器通带外两侧频率范围内信号的抑制能力,过滤出满足条件的输出信号,进而提高了滤波器的滤波能力。
附图说明
图1(a)为本发明实施例中开关电容滤波器的一个实施例示意图;
图1(b)为本发明实施例中开关电容滤波器中的开关控制信号示意图;
图1(c)为本发明实施例中开关电容滤波器电路的频率域传输函数的示意图;
图1(d)为本发明实施例中开关电容滤波器的导通电阻的示意图;
图1(e)为本发明实施例中开关电容滤波器的导通电阻与频率域传输函数的关系示意图;
图2(a)为本发明实施例中提供的滤波器的一个实施例示意图;
图2(b)为本发明实施例中提供的滤波器的另一个实施例示意图;
图2(c)为本发明实施例中开关电容滤波器中的开关控制信号示意图;
图3(a)为本发明实施例中基于高通和低通的抑制模块的一个实施例示意图;
图3(b)为本发明实施例中提供的高通电路和低通电路的抑制原理示意图;
图3(c)为本发明实施例中提供的抑制模块的一个实施例示意图;
图3(d)为本发明实施例中提供的抑制模块的另一个实施例示意图;
图3(e)为本发明实施例中提供的抑制模块的另一个实施例示意图;
图3(f)为本发明实施例中提供的抑制模块的另一个实施例示意图;
图3(g)为本发明实施例中提供的不同低通频点的低通抑制模块的实施例示意图;
图3(h)为本发明实施例中提供的不同高通频点的高通抑制模块的实施例示意图;
图4(a)为本发明实施例中提供的滤波器的另一个实施例示意图;
图4(b)为本发明实施例中提供的滤波器的另一个实施例示意图;
图4(c)为本发明实施例中提供的滤波器的另一个实施例示意图;
图4(d)为本发明实施例中提供的滤波器的另一个实施例示意图;
图4(e)为本发明实施例中提供的滤波器的另一个实施例示意图;
图4(f)为本发明实施例中提供的滤波器的另一个实施例示意图;
图5(a)为本发明实施例中基于高边带带阻和低边带带阻的抑制模块的一个实施例示意图;
图5(b)为本发明实施例中提供的高边带带阻和低边带带阻的抑制原理示意图;
图5(c)为本发明实施例中提供的抑制模块的另一个实施例示意图;
图5(d)为本发明实施例中提供的抑制模块的另一个实施例示意图;
图5(e)为本发明实施例中提供的抑制模块的另一个实施例示意图;
图5(f)为本发明实施例中提供的抑制模块的另一个实施例示意图;
图5(g)为本发明实施例中提供的不同中心频点的低边带带阻抑制模块的实施例示意图;
图5(h)为本发明实施例中提供的不同中心频点的高边带带阻抑制模块的实施例示意图;
图6(a)为本发明实施例中提供的滤波器的另一个实施例示意图;
图6(b)为本发明实施例中提供的滤波器的另一个实施例示意图;
图6(c)为本发明实施例中提供的滤波器的另一个实施例示意图;
图6(d)为本发明实施例中提供的滤波器的另一个实施例示意图;
图6(e)为本发明实施例中提供的滤波器的另一个实施例示意图;
图6(f)为本发明实施例中提供的滤波器的另一个实施例示意图;
图7(a)为本发明实施例中提供的滤波器的另一个实施例示意图;
图7(b)为本发明实施例中提供的滤波器的另一个实施例示意图;
图7(c)为本发明实施例中提供的滤波器的另一个实施例示意图;
图7(d)为本发明实施例中提供的滤波器的另一个实施例示意图;
图7(e)为本发明实施例中提供的滤波器的另一个实施例示意图;
图7(f)为本发明实施例中提供的滤波器的另一个实施例示意图;
图7(g)为本发明实施例中提供的滤波器的另一个实施例示意图;
图7(h)为本发明实施例中提供的滤波器的另一个实施例示意图。
具体实施方式
下面将结合本发明实施例中的附图,对本发明实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例仅仅是本发明一部分实施例,而不是全部的实施例。基于本发明中的实施例,本领域技术人员在没有作出创造性劳动前提下所获得的所有其他实施例,都属于本发明保护的范围。
在现有技术中,滤波器通常是基于开关电容的滤波结构,如图1(a)所示,为开关电容滤波器的一个结构示意图。主要包括开关CLK1-1、CLK1-2……CLK1-N,这里用开关信号clock的简称CLK来表示开关;电容C1-1、C1-2……C1-N,其中N为大于零的整数。N个开关和N个电容通过连接组成N个并联的结构。具体的,开关CLK1-1的第一端,开关CLK1-2的第一端,以此类推,直至开关CLK1-N的第一端,连接在一起,连接到输出信号S1(OUT)。开关CLK1-1第二端与电容C1-1第一端连接;开关CLK1-2第二端与电容C1-2第一端连接;以此类推,直至开关CLK1-N第二端与电容C1-N第一端连接。电容C1-1的第二端,电容C1-2的第二端,以此类推,直至电容C1-N的第二端连接在一起,并且该公共端与地GND连接。
其中,S1(IN)是电路的信号源,Rs1是该信号源的内阻。当该开关电容滤波器的前级存在电路时,S1(IN)是该前级电路的输出信号,Rs1是该前级电路的输出内阻。
图1(b)表示了多相开关滤波器的电路结构中每个开关的控制信号。电路结构中开关的控制信号为N个相互不交叠的时钟,在任何一个时钟周期Ts内,每个开关有效闭合仅一次,且有效闭合时间为周期Ts的N分之一。由于每个时钟不交叠,所以在任何同一时间内仅有一个开关处于有效闭合状态。
图1(c)表示了在一定的信号源、内阻以及负载的情况下,多相开关电容滤波器电路的频率域传输函数|S1(OUT)/S1(IN)|。|S1(OUT)/S1(IN)|的滤波中心频率fs=1/Ts,只要改变Ts的大小就能改变滤波中心频率,具有较 宽且灵活的滤波中心频率范围。N值与|S1(OUT)/S1(IN)|的3dB带宽成反比,改变N值即可以调节滤波带宽。
但是,图1(a)所示的电路是理想情况下的结果,实际应用中存在各种非理想因素。其中开关导通电阻是几个比较严重的非理想因素之一,如图1(d)中所示的开关导通电阻Rsw1-1、Rsw1-2……Rsw1-N。受开关导通电阻的影响,滤波器带通频率范围之外的传输函数不再是零,而是与开关导通电阻有关,如图1(e)所示,是开关导通电阻与滤波中心频率的关系示意图,开关导通电阻使带外的信号抑制能力降低。需要说明的是,通常情况下,N个开关的参数是相同的,那么这N个开关的导通电阻Rsw1-1、Rsw1-2……Rsw1-N的值也对应相同,为Rsw。在下述的图示中或者文字中如无特别说明,可认为每个开关的导通电阻相同,都为Rsw。
在本发明技术方案中,针对开关电容滤波电路中受开关导通电阻影响导致的带外信号抑制受限问题,提出了一种提高带外抑制的滤波器结构,该结构能够在保证原有开关电容滤波器的性能不变的前提下,提高滤波器通带外两侧频率范围内信号的抑制能力。
如图2(a)所示,为本发明实施例提供的一个滤波器结构示意图,也可称为带外抑制的滤波器结构的示意图,包括抑制模块2-1和开关电容滤波器2-2。
抑制模块2-1和开关电容滤波器2-2连接;具体的,抑制模块的第一端连接输入信号,抑制模块的第二端连接输出信号,开关电容滤波器的第一端连接输出信号,开关电容滤波器的第二端连接地;输入信号通过抑制模块,抑制开关电容滤波器通带外两侧频率范围内的信号,过滤出目标信号;目标信号通过开关电容滤波器进行过滤,得到输出信号,输出信号用于电路进行通信。
在图2(a)中,S2(IN)是电路的信号源,Rs2是该信号源的内阻。当开关电容滤波器的前级存在电路时,S2(IN)是该前级电路的输出信号,Rs2是该前级电路的输出内阻。Rs2的第一端连接信号源S2(IN),Rs2的第二端连接带外抑制模块2-1的第一端S2(IN)。带外抑制模块2-1的第二端连接输出信号S2(OUT),其中,IN2为信号源S2(IN)经过内阻Rs2的输入信号。
需要说明的是,开关电容滤波器2-2还可用于控制滤波中心的频率和带宽,带外抑制的滤波器结构的示意图包括但不限于上述图2(a)所示,如图2(b)所示,为本发明实施例提供的另一个带外抑制的滤波器结构的示意图,包括抑制模块2-1和开关电容滤波器2-2。
抑制模块2-1和开关电容滤波器2-2连接,具体的,抑制模块的第一端连接输入信号,抑制模块的第二端连接输出信号,开关电容滤波器的第一端连接输入信号,开关电容滤波器的第二端连接地;输入信号通过开关电容滤波器进行过滤,得到目标信号;目标信号通过抑制模块,抑制开关电容滤波器通带外两侧频率范围内的信号,过滤出输出信号,输出信号用于电路进行通信。
在图2(b)中,只是抑制模块2-1和开关电容滤波器2-2的位置作了调换,具体请参阅图2(b)所示,此处不再赘述。
具体的开关电容滤波器2-2的电路结构可包括:N个相同开关,CLK2-1、CLK2-2,…,CLK2-N;N个相同电容,C2-1,C2-2,…,C2-N;N是大于零的整数,通常为2n,n为正整数,优选的N常取值为4、8、16…;应理解,这里N的取值也可以取非2的幂次的其他大于零的整数,只是在实际应用中,偶数的取值更加方便计算而已。其中,在开关电容滤波器2-2中,关于这N个相同开关和N个相同电容的连接关系可以参考上述图1(a)中所示,此处不再详细赘述。
开关CLK2-1、CLK2-2,…,CLK2-N的开关信号(即时钟控制信号)如图2(c)所示,其实质上与上述图1(b)所示相同。开关的控制信号为N个相互不交叠的时钟。具体的,在任何一个时钟周期Ts内,每个开关有效闭合仅一次,且有效闭合时间为周期Ts的N分之一。由于每个时钟不交叠,所以在任何同一时间内仅有一个开关处于有效闭合状态。
下面对抑制模块2-1进行具体的说明,通常有两种形式,一种是基于高通和/或低通的抑制模块;另一种是基于高边带带阻和/或低边带带阻的抑制模块。
一、基于高通和/或低通的抑制模块
在基于高通和/或低通的抑制模块中,对应的,可包括高通电路和低通电路中的至少一种;
低通电路具体用于抑制频率大于低通频点的信号,过滤出频率小于低通频点的第一目标信号,低通频点大于开关电容的滤波器的中心频点;
高通电路具体用于抑制频率小于高通频点的信号,过滤出频率大于高通频点的第二目标信号,高通频点小于开关电容的滤波器的中心频点。
如图3(a)所示,为基于高通和低通的抑制模块的一个实施例示意图。应理解,在图3(a)中的加号“+”所表示的意思是和的关系,也就是说该抑制模块中有高通电路和低通电路的效果,至于是先高通电路、再低通电路或者高低通电路同时进行,具体要看电路的设计。如图3(b)所示,为高通电路和低通电路的抑制原理示意图。
下面以具体的实现方式对抑制模块2-1进行说明:
(1)若抑制模块包括低边带带阻电路和高边带带阻电路,则低通电路包括第一电感,高通电路包括第二电感;其中,第一电感的第一端连接输入信号,第一电感的第二端连接输出信号,第二电感的第一端连接输入信号或输出信号,第二电感的第二端连接地。
应理解,这里低通电路和高通电路包括的电感的数量不做限定。如图3(c)和3(d)所示,为本发明实施例中抑制模块的其中两个实施例示意图;
具体的,在图3(c)中,电感L2-1-1的第一端连接输入信号IN2,电感L2-1-1的第二端连接输出信号S2(OUT),电感L2-1-2的第一端连接输出信号S2(OUT),电感L2-1-2的第二端连接地GND。
在图3(d)中,电感L2-1-1的第一端连接输入信号IN2,电感L2-1-1的第二端连接输出信号S2(OUT),电感L2-1-2的第一端连接输入信号IN2,电感L2-1-2的第二端连接地GND。
图3(c)和图3(d)是对称的L型结构,图3(c)和图3(d)中的串联电感L2-1-1是低通效果,抑制频率大于低通频点的信号,过滤出频率小于低通频点的第一目标信号,即相应的抑制了开关电容滤波器2-2的高边带信号;并联电感L2-1-2是高通效果,抑制频率小于高通频点的信号,过滤出频率大于高通频点的第二目标信号,即相应的抑制了开关电容滤波器2-2的低边带信号。
(2)若抑制模块包括低边带带阻电路和高边带带阻电路,则高通电路包 括第一电容,低通电路包括第二电容;其中,第一电容的第一端连接输入信号,第一电容的第二端连接输出信号,第二电容的第一端连接输入信号或输出信号,第二电容的第二端连接地。
应理解,这里低通电路和高通电路包括的电容的数量不做限定。如图3(e)和3(f)所示,为本发明实施例中抑制模块的其中两个实施例示意图;
具体的,在图3(e)中,电容C2-1-1的第一端连接输入信号IN2,电容C2-1-1的第二端连接输出信号S2(OUT),电容C2-1-2的第一端连接输出信号S2(OUT),电容C2-1-2的第二端连接地GND。
在图3(f)中,电容C2-1-1的第一端连接输入信号IN2,电容C2-1-1的第二端连接输出信号S2(OUT),电容C2-1-2的第一端连接输入信号IN2,电容C2-1-2的第二端连接地GND。
图3(e)和图3(f)也是对称的L型结构,图3(e)和图3(f)中的串联电容C2-1-1是高通效果,抑制频率小于高通频点的信号,过滤出频率大于高通频点的第二目标信号,即相应的抑制了开关电容滤波器2-2的低边带信号;并联电容C2-1-2是低通效果,抑制频率大于低通频点的信号,过滤出频率小于低通频点的第一目标信号,即相应的抑制了开关电容滤波器2-2的高边带信号。
一般情况下,电感L2-1-1的3dB带宽频点、电感L2-1-2的3dB带宽频点、电容C2-1-1的3dB带宽频点、电容C2-1-2的3dB带宽处的频点均不在开关电容滤波器2-2通带3dB带宽频率范围内。
应理解,上述所说的高通频点和低通频点虽然是一个定值,但在实际应用中,可根据实际需要对高通频点和低通频点的值做灵活调整,那么,进一步的也对应调整了抑制模块的抑制能力。如图3(g)所示,输入信号通过不同低通频点的低通抑制模块后得到的第一目标信号的一个示意图;如图3(h)所示,输入信号通过不同高通频点的高通抑制模块后得到的第二目标信号的一个示意图。
综上所述,在基于高通和/或低通的抑制模块的情况下,本发明实施例还可提供以下几个带外抑制的滤波器结构示意图,如图4(a)、图4(b)、4(c)、 图4(d)、4(e)和图4(f)所示,其中,包含低通电路的抑制模块可以简称为低通抑制模块,包含高通电路的抑制模块可以简称为高通抑制模块。
二、基于高边带带阻和/或低边带带阻的抑制模块
在基于高边带带阻和/或低边带带阻抑制的抑制模块中,对应的,可包括高边带带阻电路和低边带带阻电路中的至少一种;
低边带带阻电路具体用于抑制第一高低边带频率范围内的信号,过滤出频率大于第一高低边带频率范围的上限值的第三目标信号,第一高低边带频率范围为低边带带阻电路的频率范围,第一高低边带频率范围的中心频点小于开关电容滤波器的中心频点;
高边带带阻电路具体用于抑制第二高低边带频率范围内的信号,过滤出频率小于第二高低边带频率范围的下限值的第四目标信号,第二高低边带频率范围为高边带带阻电路的频率范围,第二高低边带频率范围的中心频点大于开关电容的滤波器的中心频点。
如图5(a)所示,为基于高边带带阻和低边带带阻的抑制模块的一个实施例示意图。在图5(a)中的加号“+”所表示的意思是和的关系,也就是说该抑制模块中有高边带带阻电路和低边带带阻电路的效果,至于是先低边带带阻电路,再低边带带阻电路、或者高低边带带阻电路同时进行,具体要看电路的设计。如图5(b)所示,为高边带带阻和低边带带阻的抑制原理示意图。
下面以具体的实现方式对抑制模块2-1进行说明:
(1)若抑制模块包括低边带带阻电路和高边带带阻电路,则高边带带阻电路和低边带带阻电路,包括第二电感、第二电容、第三电感和第三电容;第二电感和第二电容并联,第三电容和第三电感串联;
其中,第二电感的第一端和第二电容的第一端连接输入信号,第二电感的第二端和第二电容的第二端连接输出信号;第三电感的第一端连接输入信号或输出信号,第三电感的第二端连接第三电容的第一端,第三电容的第二端连接地。
如图5(c)和5(d)所示,为本发明实施例中抑制模块的其中两个实施例示意图;
具体的,在图5(c)中,电感L2-1-3的第一端连接输入信号IN2,电感 L2-1-1的第二端连接输出信号S2(OUT),电容C2-1-3的第一端连接输入信号IN2,电容C2-1-3的第二端连接输出信号S2(OUT),电感L2-1-4的第一端连接输出信号S2(OUT),电感L4-1-4的第二端连接电容C2-1-4的第一端,电容C2-1-4的第二端连接地GND。
图5(d)中,电感L2-1-3的第一端连接输入信号IN2,电感L2-1-1的第二端连接输出信号S2(OUT),电容C2-1-3的第一端连接输入信号IN2,电容C2-1-3的第二端连接输出信号S2(OUT),电感L2-1-4的第一端连接输入信号IN2,电感L2-1-4的第二端连接电容C2-1-4的第一端,电容C2-1-4的第二端连接地GND。
图5(c)和图5(d)是对称的L型结构,图5(c)和图5(d)中的电感L2-1-3电容C2-1-3的整体效果是高低边带带阻效果,带阻中心频率是电感L2-1-3和电容C2-1-3的自谐振频率f0。电感L2-1-4和电容C2-1-4的整体效果是高低边带带阻效果,带阻中心频率是电感L2-1-4和电容C2-1-4的自谐振频率f1。电感L2-1-3和电容C2-1-3的自谐振频率f0与电感L2-1-4和电容C2-1-4的自谐振频率f1不相同,f0和f1的大小为:一个低于开关电容滤波器2-2的带通频率,也可称为开关电容滤波器2-2的中心频点,另一个高于开关电容滤波器2-2的带通频率,也可称为开关电容滤波器2-2的中心频点。且应保证电感L2-1-3和电容C2-1-3的带阻3dB带宽边缘处频点以及电感L2-1-4和电容C2-1-4的带阻3dB带宽边缘处频点均不在开关电容滤波器2-2通带3dB带宽频率范围内。
(2)若所述抑制模块包括所述低边带带阻电路和所述高边带带阻电路,则高边带带阻电路和低边带带阻电路,包括第二电感、第二电容、第三电感和第三电容;第二电感和第二电容并联,第三电容和第三电感串联;
其中,第二电感的第一端和第二电容的第一端连接输入信号,第二电感的第二端和第二电容的第二端连接输出信号;所述第三电容的第一端连接所述输入信号或所述输出信号,所述第三电容的第二端连接所述第三电感的第一端,所述第三电感的第二端连接地。
如图5(e)和5(f)所示,为本发明实施例中抑制模块的其中两个实施例示意图;
图5(e)和图5(c)相比,只是把电容C2-1-4和电感L4-1-4的位置互换了一下,图5(f)和图5(d)相比,也只是把电容C2-1-4和电感L4-1-4的位置互换了一下,其他的内容都想同,此处不再赘述。
示例性的,假设,如图5(g)所示,低边带带阻电路的中心频点为fc1、fc2或fc3,若第一高低边带频率范围为【fc1L,fc1H】,fc1属于【fc1L,fc1H】,则低边带带阻电路抑制频率小于fc1H的信号,过滤出频率大于fc1H的第三目标信号,若低边带带阻电路的中心频点为fc2或fc3,也是同样的原理,此处不再赘述;如图5(h)所示,高边带带阻电路的中心频点为fc4、fc5或fc6,若第二高低边带频率范围为【fc4L,fc4H】,fc4属于【fc4L,fc4H】,则高边带带阻电路抑制频率大于fc4L的信号,过滤出频率小于fc4L的第四目标信号,若高边带带阻电路的中心频点为fc5或fc6,也是同样的原理,此处不再赘述。
应理解,这里的第一高低边带频率范围和第二高低边带频率范围的上限值和下限值可以根据实际需要而作调整,那么,对应的,高低边带频率范围的中心频点也相应会调整。
综上所述,在基于高边带带阻和/或低边带带阻的抑制模块的情况下,本发明实施例还可提供以下几个带外抑制的滤波器结构示意图,如图6(a)、图6(b)、6(c)、图6(d)、6(e)和图6(f)所示,其中,包含低边带带阻电路的抑制模块可以简称为低边带带阻抑制模块,包含高边带带阻电路的抑制模块可以简称为高边带带阻抑制模块。
需要说明的是,在上述的本发明实施例中,图3所示的抑制模块2-2和图5所示的抑制模块2-2的实现方式,包括但不限于上述所提供的说明,由于实现高通、低通、低边带带阻和高边带带阻的结构有很多种,那么任何可能的频率传输函数等效于图3(b)、3(g)、3(h)、5(b)、5(g)和5(h)的结构以及其组合均在本发明技术方案中提供的抑制模块的保护范围。任何可能的如图3(c)、图3(d)、图3(e)和/或图3(f)所组成的级联结构;或者;图5(c)、图5(d)、图5(e)和/或图5(f)所组成的级联结构;或者;图3(c)、图3(d)、图3(e)、图3(f)以及图5(c)、图5(d)所组成的结构均满足本发明所陈述的带外抑制概念,与本发明所描述的权利要求不相冲突。如图7 (a)至7(h)所示,为本发明实施例提供的结合高低通电路与高低边带带阻电路的带外抑制的滤波器的实施例示意图。因此对这些实施例的多种修改对本领域的专业技术人员来说将是显而易见的,本文中所定义的一般原理可以在不脱离本发明的精神或范围的情况下,在其它实施例中的实现,都在本发明所保护的范围内。
本文的权利要求适用于射频前端的电路滤波领域,包括但不限于射频集成电路、印刷电路板电路;可以用诸如互补金属氧化物半导体(Complementary Metal Oxide Semiconductor,CMOS)、N沟道金属氧化物半导体MOS(NMOS)、P沟道MOS(PMOS)、双极型晶体管(Bipolar Junction Transistor,BJT)、双极型CMOS(Bipolar CMOS,BiCMOS)、硅锗(SiGe)、砷化镓(GaAs)等各种集成电路工艺制造或者采用分立电子元器件实现。
上面对本发明实施例中的抑制模块进行了描述,本发明还提供了滤波方法的实施例,具体结合前述的滤波器进行理解应用,此处不作赘述。
本发明实施例还提供了一种计算机存储介质,用于储存为上述图3(c)-图3(f)或者图5(c)-图5(f)所述的抑制模块所用的计算机软件指令,通过执行存储的程序,可以过滤通过的信号,从而提高抑制模块对开关电容滤波器的抑制能力。如果该程序以软件功能单元的形式实现并作为独立的产品销售或使用时,可以存储在一个计算机可读取存储介质中。基于这样的理解,本发明的技术方案本质上或者说对现有技术做出贡献的部分或者该技术方案的全部或部分可以以软件产品的形式体现出来,该计算机软件产品存储在一个存储介质中,包括若干指令用以使得一台计算机设备(可以是个人计算机,服务器,或者网络设备等)执行本发明各个实施例所述方法的全部或部分步骤。而前述的存储介质包括:U盘、移动硬盘、只读存储器(ROM,Read-Only Memory)、随机存取存储器(RAM,Random Access Memory)、磁碟或者光盘等各种可以存储程序代码的介质。
本发明的说明书和权利要求书及上述附图中的术语“第一”、“第二”、“第三”、“第四”等(如果存在)是用于区别类似的对象,而不必用于描述特定的顺序或先后次序。应该理解这样使用的数据在适当情况下可以互换,以便这里 描述的实施例能够以除了在这里图示或描述的内容以外的顺序实施。此外,术语“包括”和“具有”以及他们的任何变形,意图在于覆盖不排他的包含,例如,包含了一系列步骤或单元的过程、方法、***、产品或设备不必限于清楚地列出的那些步骤或单元,而是可包括没有清楚地列出的或对于这些过程、方法、产品或设备固有的其它步骤或单元。

Claims (16)

  1. 一种滤波器,其特征在于,包括:
    抑制模块和开关电容滤波器;
    所述抑制模块的第一端连接输入信号,所述抑制模块的第二端连接输出信号,所述开关电容滤波器的第一端连接所述输出信号,所述开关电容滤波器的第二端连接地;
    所述输入信号通过所述抑制模块,抑制所述开关电容滤波器通带外两侧频率范围内的信号,过滤出目标信号;
    所述目标信号通过所述开关电容滤波器进行过滤,得到所述输出信号,所述输出信号用于电路进行通信。
  2. 根据权利要求1所述的滤波器,其特征在于,所述抑制模块包括:低通电路和高通电路中的至少一种;
    所述低通电路具体用于抑制频率大于低通频点的信号,过滤出频率小于所述低通频点的第一目标信号,所述低通频点大于所述开关电容的滤波器的中心频点;
    所述高通电路具体用于抑制频率小于高通频点的信号,过滤出频率大于所述高通频点的第二目标信号,所述高通频点小于所述开关电容的滤波器的中心频点。
  3. 根据权利要求1所述的滤波器,其特征在于,所述抑制模块包括:低边带带阻电路和高边带带阻电路中的至少一种;
    所述低边带带阻电路具体用于抑制第一高低边带频率范围内的信号,过滤出频率大于所述第一高低边带频率范围的上限值的第三目标信号,所述第一高低边带频率范围为所述低边带带阻电路的频率范围,所述第一高低边带频率范围的中心频点小于开关电容滤波器的中心频点;
    所述高边带带阻电路具体用于抑制第二高低边带频率范围内的信号,过滤出频率小于所述第二高低边带频率范围的下限值的第四目标信号,所述第二高低边带频率范围为所述高边带带阻电路的频率范围,所述第二高低边带频率范围的中心频点大于开关电容的滤波器的中心频点。
  4. 根据权利要求2所述的滤波器,其特征在于,若所述抑制模块包括所 述低通电路和所述高通电路,则所述低通电路包括第一电感,所述高通电路包括第二电感;
    其中,所述第一电感的第一端连接所述输入信号,所述第一电感的第二端连接所述输出信号,所述第二电感的第一端连接所述输入信号或所述输出信号,所述第二电感的第二端连接地。
  5. 根据权利要求2所述的滤波器,其特征在于,若所述抑制模块包括所述低通电路和所述高通电路,则所述高通电路包括第一电容,所述低通电路包括第二电容;
    其中,所述第一电容的第一端连接所述输入信号,所述第一电容的第二端连接所述输出信号,所述第二电容的第一端连接所述输入信号或所述输出信号,所述第二电容的第二端连接地。
  6. 根据权利要求3所述的滤波器,其特征在于,若所述抑制模块包括所述低边带带阻电路和所述高边带带阻电路,则所述高边带带阻电路和所述低边带带阻电路,包括第二电感、第二电容、第三电感和第三电容;所述第二电感和所述第二电容并联,所述第三电容和所述第三电感串联;
    其中,所述第二电感的第一端和所述第二电容的第一端连接所述输入信号,所述第二电感的第二端和所述第二电容的第二端连接所述输出信号;所述第三电感的第一端连接所述输入信号或所述输出信号,所述第三电感的第二端连接所述第三电容的第一端,所述第三电容的第二端连接地。
  7. 根据权利要求6所述的滤波器,其特征在于,所述第三电容的第一端连接所述输入信号或所述输出信号,所述第三电容的第二端连接所述第三电感的第一端,所述第三电感的第二端连接地。
  8. 根据权利要求1-7任一所述的滤波器,其特征在于,所述输入信号的信号源携带内阻,所述内阻的第一端连接所述信号源,所述内阻的第二端连接所述抑制模块的第一端,所述抑制模块的第二端连接所述输出信号。
  9. 一种滤波器,其特征在于,包括:
    抑制模块和开关电容滤波器;
    所述抑制模块的第一端连接输入信号,所述抑制模块的第二端连接输出信号,所述开关电容滤波器的第一端连接所述输入信号,所述开关电容滤波器的 第二端连接地;
    所述输入信号通过所述开关电容滤波器进行过滤,得到目标信号;
    所述目标信号通过所述抑制模块,抑制所述开关电容滤波器通带外两侧频率范围内的信号,过滤出输出信号,所述输出信号用于电路进行通信。
  10. 根据权利要求9所述的滤波器,其特征在于,所述抑制模块包括:低通电路和高通电路中的至少一种;
    所述低通电路具体用于抑制频率大于低通频点的信号,过滤出频率小于所述低通频点的第一目标信号,所述低通频点大于所述开关电容的滤波器的中心频点;
    所述高通电路具体用于抑制频率小于高通频点的信号,过滤出频率大于所述高通频点的第二目标信号,所述高通频点小于所述开关电容的滤波器的中心频点。
  11. 根据权利要求9所述的滤波器,其特征在于,所述抑制模块包括:低边带带阻电路和高边带带阻电路中的至少一种;
    所述低边带带阻电路具体用于抑制第一高低边带频率范围内的信号,过滤出频率大于所述第一高低边带频率范围的上限值的第三目标信号,所述第一高低边带频率范围为所述低边带带阻电路的频率范围,所述第一高低边带频率范围的中心频点小于开关电容滤波器的中心频点;
    所述高边带带阻电路具体用于抑制第二高低边带频率范围内的信号,过滤出频率小于所述第二高低边带频率范围的下限值的第四目标信号,所述第二高低边带频率范围为所述高边带带阻电路的频率范围,所述第二高低边带频率范围的中心频点大于开关电容的滤波器的中心频点。
  12. 根据权利要求10所述的滤波器,其特征在于,若所述抑制模块包括所述低通电路和所述高通电路,所述低通电路包括第一电感,所述高通电路包括第二电感;
    其中,所述第一电感的第一端连接所述输入信号,所述第一电感的第二端连接所述输出信号,所述第二电感的第一端连接所述输入信号或所述输出信号,所述第二电感的第二端连接地。
  13. 根据权利要求10所述的滤波器,其特征在于,若所述抑制模块包括 所述低通电路和所述高通电路,所述高通电路包括第一电容,所述低通电路包括第二电容;
    其中,所述第一电容的第一端连接所述输入信号,所述第一电容的第二端连接所述输出信号,所述第二电容的第一端连接所述输入信号或所述输出信号,所述第二电容的第二端连接地。
  14. 根据权利要求11所述的滤波器,其特征在于,若所述抑制模块包括所述低边带带阻电路和所述高边带带阻电路,则所述高边带带阻电路和所述低边带带阻电路,包括第二电感、第二电容、第三电感和第三电容;所述第二电感和所述第二电容并联,所述第三电容和所述第三电感串联;
    其中,所述第二电感的第一端和所述第二电容的第一端连接所述输入信号,所述第二电感的第二端和所述第二电容的第二端连接所述输出信号;所述第三电感的第一端连接所述输入信号或所述输出信号,所述第三电感的第二端连接所述第三电容的第一端,所述第三电容的第二端连接地。
  15. 根据权利要求14所述的滤波器,其特征在于,所述第三电容的第一端连接所述输入信号或所述输出信号,所述第三电容的第二端连接所述第三电感的第一端,所述第三电感的第二端连接地。
  16. 根据权利要求9-15任一所述的滤波器,其特征在于,所述输入信号的信号源携带内阻,所述内阻的第一端连接所述信号源,所述内阻的第二端连接所述抑制模块的第一端,所述抑制模块的第二端连接所述输出信号。
PCT/CN2016/095834 2016-08-18 2016-08-18 一种滤波器 WO2018032453A1 (zh)

Priority Applications (2)

Application Number Priority Date Filing Date Title
PCT/CN2016/095834 WO2018032453A1 (zh) 2016-08-18 2016-08-18 一种滤波器
CN201680087937.4A CN109565098B (zh) 2016-08-18 2016-08-18 一种滤波器

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/CN2016/095834 WO2018032453A1 (zh) 2016-08-18 2016-08-18 一种滤波器

Publications (1)

Publication Number Publication Date
WO2018032453A1 true WO2018032453A1 (zh) 2018-02-22

Family

ID=61197264

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2016/095834 WO2018032453A1 (zh) 2016-08-18 2016-08-18 一种滤波器

Country Status (2)

Country Link
CN (1) CN109565098B (zh)
WO (1) WO2018032453A1 (zh)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112217212A (zh) * 2020-10-21 2021-01-12 国网青海省电力公司电力科学研究院 一种用于抑制非特征谐波谐振的高通阻尼滤波器及方法
CN112491367A (zh) * 2020-12-10 2021-03-12 富满微电子集团股份有限公司 低噪声放大电路、其控制方法与电子设备
CN112994685A (zh) * 2019-12-12 2021-06-18 上海交通大学 数字相位转换器提高输出线性度的方法
CN114070221A (zh) * 2021-11-17 2022-02-18 安徽安努奇科技有限公司 一种滤波器电路及电子设备

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114469019B (zh) * 2022-04-14 2022-06-21 剑博微电子(深圳)有限公司 脉搏波信号的滤波方法、装置和计算机设备
CN116260417B (zh) * 2023-05-16 2023-07-11 成都频岢微电子有限公司 一种单谐振器滤波器、多谐振器滤波器和射频前端模组

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5440270A (en) * 1992-07-14 1995-08-08 Linear Technology Corporation Linear-phase filter having high gain selectivity
CN2297806Y (zh) * 1997-03-04 1998-11-18 武汉市凡谷电子技术研究所 提高带通滤波抑制度的带通带阻滤波器
US6351506B1 (en) * 1999-04-19 2002-02-26 National Semiconductor Corporation Switched capacitor filter circuit having reduced offsets and providing offset compensation when used in a closed feedback loop
CN102624356A (zh) * 2012-04-13 2012-08-01 上海交通大学 窄带带通滤波器

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61121514A (ja) * 1984-11-16 1986-06-09 Hitachi Ltd 電力系統用保護リレ−の入力フイルタ
JPH1146102A (ja) * 1997-05-30 1999-02-16 Murata Mfg Co Ltd 誘電体フィルタ、誘電体デュプレクサ及び通信機装置
KR100679079B1 (ko) * 2005-09-22 2007-02-05 삼성전자주식회사 이동통신 시스템에서 다중 대역 수신장치
TW200835043A (en) * 2007-01-19 2008-08-16 Murata Manufacturing Co High-frequency part
JP5490512B2 (ja) * 2009-02-09 2014-05-14 ローム株式会社 入力セレクタ

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5440270A (en) * 1992-07-14 1995-08-08 Linear Technology Corporation Linear-phase filter having high gain selectivity
CN2297806Y (zh) * 1997-03-04 1998-11-18 武汉市凡谷电子技术研究所 提高带通滤波抑制度的带通带阻滤波器
US6351506B1 (en) * 1999-04-19 2002-02-26 National Semiconductor Corporation Switched capacitor filter circuit having reduced offsets and providing offset compensation when used in a closed feedback loop
CN102624356A (zh) * 2012-04-13 2012-08-01 上海交通大学 窄带带通滤波器

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112994685A (zh) * 2019-12-12 2021-06-18 上海交通大学 数字相位转换器提高输出线性度的方法
CN112994685B (zh) * 2019-12-12 2022-08-16 上海交通大学 数字相位转换器提高输出线性度的方法
CN112217212A (zh) * 2020-10-21 2021-01-12 国网青海省电力公司电力科学研究院 一种用于抑制非特征谐波谐振的高通阻尼滤波器及方法
CN112491367A (zh) * 2020-12-10 2021-03-12 富满微电子集团股份有限公司 低噪声放大电路、其控制方法与电子设备
CN112491367B (zh) * 2020-12-10 2024-06-07 富满微电子集团股份有限公司 低噪声放大电路、其控制方法与电子设备
CN114070221A (zh) * 2021-11-17 2022-02-18 安徽安努奇科技有限公司 一种滤波器电路及电子设备

Also Published As

Publication number Publication date
CN109565098B (zh) 2021-01-15
CN109565098A (zh) 2019-04-02

Similar Documents

Publication Publication Date Title
TWI834692B (zh) 具有諧波抑制的混合式聲音諧振(lc)濾波器
WO2018032453A1 (zh) 一种滤波器
US9287847B2 (en) Module
US20220255524A1 (en) Band pass filter
TW202013888A (zh) 包括與電路元件並聯之聲波諧振器的濾波器
US20190081612A1 (en) Signal Filtering Using Magnetic Coupling
CN110999132A (zh) 通过切换进行可选择滤波
US20040169566A1 (en) Frequency-selective balun transformer
US20140132357A1 (en) Broadband Distributed Transmission Line N-Path Filter
Nagulu et al. A Third-Order Quasi-Elliptic N-Path Filter With Enhanced Linearity Through Clock Boosting
JP5278519B2 (ja) 弾性表面波フィルタ及びそれを用いた通信機器
US9419582B2 (en) Filter device and duplexer
CN220139531U (zh) 一种滤波电路、滤波器及电子设备
JPWO2018123555A1 (ja) フィルタ装置およびフィルタモジュール
TW202423048A (zh) 具有諧波抑制的混合式聲音諧振(lc)濾波器
CN116527012A (zh) 一种滤波电路、滤波器及电子设备

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 16913210

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 16913210

Country of ref document: EP

Kind code of ref document: A1