WO2017197759A1 - 设备、差分信号线处理方法、差分信号线处理装置 - Google Patents

设备、差分信号线处理方法、差分信号线处理装置 Download PDF

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Publication number
WO2017197759A1
WO2017197759A1 PCT/CN2016/092082 CN2016092082W WO2017197759A1 WO 2017197759 A1 WO2017197759 A1 WO 2017197759A1 CN 2016092082 W CN2016092082 W CN 2016092082W WO 2017197759 A1 WO2017197759 A1 WO 2017197759A1
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Prior art keywords
differential signal
common mode
signal lines
component
mode filter
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PCT/CN2016/092082
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English (en)
French (fr)
Inventor
侯方西
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中兴通讯股份有限公司
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Priority to US16/301,470 priority Critical patent/US10680575B2/en
Publication of WO2017197759A1 publication Critical patent/WO2017197759A1/zh

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H7/00—Multiple-port networks comprising only passive electrical elements as network components
    • H03H7/42—Networks for transforming balanced signals into unbalanced signals and vice versa, e.g. baluns
    • H03H7/425—Balance-balance networks
    • H03H7/427—Common-mode filters
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H1/00—Constructional details of impedance networks whose electrical mode of operation is not specified or applicable to more than one type of network
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H7/00—Multiple-port networks comprising only passive electrical elements as network components
    • H03H7/42—Networks for transforming balanced signals into unbalanced signals and vice versa, e.g. baluns
    • H03H7/422—Networks for transforming balanced signals into unbalanced signals and vice versa, e.g. baluns comprising distributed impedance elements together with lumped impedance elements
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N23/00—Cameras or camera modules comprising electronic image sensors; Control thereof
    • H04N23/50—Constructional details
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H1/00—Constructional details of impedance networks whose electrical mode of operation is not specified or applicable to more than one type of network
    • H03H2001/0021—Constructional details
    • H03H2001/005—Wound, ring or feed-through type inductor
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H1/00—Constructional details of impedance networks whose electrical mode of operation is not specified or applicable to more than one type of network
    • H03H2001/0092—Inductor filters, i.e. inductors whose parasitic capacitance is of relevance to consider it as filter

Definitions

  • This application relates to, but is not limited to, the field of communication technology.
  • the lengths of different high-speed differential signal lines between the camera module and the mobile application processor are not equal, resulting in unequal delays of different signal lines, and unequal delays may cause timing problems.
  • an abnormal display will appear on the screen of the mobile phone when the photo is previewed.
  • Method 1 Use the wire to go around and take the serpentine line to meet the requirements of the same length of physical routing.
  • Mode 3 For one of the short lines of a set of differential lines, a phase delay circuit in the form of an amplifier is added to achieve the same length requirement in the group.
  • the above three methods have drawbacks.
  • the first method requires a larger printed circuit board (PCB) wiring space, which is time-consuming and labor-intensive for extremely dense wiring of the terminal product.
  • Mode 2 requires the same PCB to use different media in different areas, which is very difficult to implement in the PCB board factory.
  • the delay circuit in the form of an operational amplifier is serially connected on a short line, which is costly and occupies a considerable layout area, and is less feasible to implement in the PCB of the terminal product.
  • This paper provides a device, a differential signal line processing method, and a differential signal line processing device to solve the problem of large delay difference due to unequal length of differential signal lines in the related art.
  • An apparatus includes: a first component and a second component, wherein the first component and the second component transmit signals through a plurality of sets of differential signal lines, the device further comprising:
  • each of the common mode filters being connected in series between the first component and the second component by a set of differential signal lines, each group delay of the common mode filter The delay used to adjust the signal transmission on the differential signal line to which the common mode filter is connected.
  • the length of each of the differential signal lines has a negative correlation with the group delay of the common mode filter connected in series on the differential signal lines.
  • the number of the common mode filters is the same as the number of sets of the differential signal lines, and each of the differential signal lines connected between the first component and the second component is connected in series. Common mode filter.
  • the common mode filter comprises: an inductive common mode filter.
  • the first component comprises a camera module and the second component comprises a processor.
  • the first component and the second component are located in a device, and the device includes: a user device.
  • a differential signal line processing method includes:
  • each of the common mode filters is connected in series to the first component through a set of differential signal lines Between the second components, the group delay of each of the common mode filters is used to adjust the delay of signal transmission on the differential signal line connected to the common mode filter.
  • the selecting at least one common mode filter that meets a predetermined condition according to a length of the plurality of sets of differential signal lines includes:
  • a common mode filter having the same number of groups as the plurality of sets of differential signal lines including:
  • the common mode filter comprises: an inductive common mode filter.
  • the first component comprises a camera module and the second component comprises a processor.
  • the first component and the second component are located in a device, and the device includes: a user device.
  • a differential signal line processing device includes:
  • Obtaining a module configured to: obtain a length of the plurality of sets of differential signal lines connected between the first component and the second component;
  • a selection module configured to: select at least one common mode filter whose group delay meets a predetermined condition according to the lengths of the plurality of sets of differential signal lines acquired by the obtaining module, wherein each of the common mode filters passes through one a group differential signal line is connected in series between the first component and the second component, and the group delay of the common mode filter is used to adjust signal transmission on a differential signal line connected to the common mode filter Delay.
  • the selecting module is configured to: select, according to the lengths of the plurality of sets of differential signal lines, a common mode filter having the same group delay as the group of the plurality of sets of differential signal lines according to a predetermined condition.
  • the device, the differential signal line processing method, and the differential signal line processing apparatus provided by the embodiments of the present invention connect a common mode filter with different group delays by using a plurality of sets of differential signal lines between the first component and the second component.
  • a short differential signal line selects a common-mode filter with a long group delay
  • a differential signal line with a long length selects a common-mode filter with a short group delay, that is, a common-mode filter with a different group delay is used to compensate for
  • the problem that the delays of the delays are large has reached the technical effect of adjusting the delays of the differential signal lines of unequal lengths to be substantially equal.
  • FIG. 1 is a schematic structural diagram of a device according to an embodiment of the present disclosure
  • FIG. 2 is a schematic structural diagram of another device according to an embodiment of the present invention.
  • FIG. 3 is a schematic diagram of a group delay of two different common mode filters in a device according to an embodiment of the present invention
  • FIG. 4 is a waveform timing diagram obtained by using three identical common mode filters of a unequal length differential signal line of a device according to an embodiment of the present invention
  • FIG. 5 is a timing diagram of waveforms obtained by using different common mode filters for unequal length differential signal lines of a device according to an embodiment of the present invention
  • FIG. 6 is a flowchart of a method for processing a differential signal line according to an embodiment of the present invention.
  • FIG. 7 is a schematic diagram of a differential signal line processing apparatus according to an embodiment of the present invention.
  • FIG. 1 is a schematic structural diagram of a device according to an embodiment of the present invention.
  • the device provided in this embodiment includes a first component 11 and a second component 12 .
  • the first component 11 and the second component 12 perform signal transmission through a plurality of sets of differential signal lines, and the apparatus further includes at least one common mode filter 13.
  • Each common mode filter 13 is connected in series between the first component 11 and the second component 12 through a set of differential signal lines, and the group delay of each common mode filter is used to adjust the differential signal of the common mode filter connection. The delay of signal transmission on the line.
  • a long-distance common-mode filter can be connected in series with a short-length differential signal line, and a short-range common-mode filter can be connected in a long-length differential signal line, that is, through different common-mode filtering.
  • the different group delays of the device compensate for the different delays caused by the different lengths of the differential signal lines, such that the delay of the signals transmitted from the first component to the second component is substantially equal across each set of differential signal lines.
  • a common mode filter with different group delays is connected through a plurality of sets of differential signal lines between the first component and the second component, and a differential signal line with a short length selects a common mode with a long group delay.
  • the filter, the long differential signal line selects the common mode filter with short group delay, that is, the common mode filter with different group delays is used to compensate for the different delays due to the different lengths of the differential signal lines.
  • the problem is that the delays of each set of differential signal lines connecting the two components are substantially equal; the embodiment of the present invention solves the problem that the delays of the differential signal lines are not equal to each other in the related art, and the adjustment is unequal. Long differential signal line delays are roughly equal in technical effect.
  • the length of each set of differential signal lines has a negative correlation with the group delay of the common mode filters connected in series on the set of differential signal lines. That is, a short-distance differential signal line has a series-group delay-long common-mode filter, and a long-length differential signal line has a series-group short-delay common-mode filter.
  • the number of common mode filters is the same as the number of sets of differential signal lines, and a common mode filter is connected in series on each differential signal line connected between the first component and the second component. Device.
  • a common mode filter is connected in series on each of the differential signal lines, that is, in the first component and the second component.
  • a total of N common mode filters are used. Among them, the group delay of the common mode filter used on the differential signal line having a shorter length is larger, and the group delay of the common mode filter used on the differential signal line having a longer length is smaller.
  • each set of differential signal lines except the set of differential signal lines having the longest length there is a common mode filter connected in series, that is, a total of N-1 common mode filters are used between the first component and the second component.
  • the common mode filter may include: an inductor common mode filter.
  • the common mode filter in the embodiment of the present invention may be an inductive common mode filter.
  • an inductive common mode filter in order to suppress the common mode noise, is serially connected on the PCB trace.
  • an inductor common mode filter having a different group delay is used for the differential signal lines having different lengths.
  • the group delay of the common mode filter used on the differential signal line with shorter length is larger, and the group delay of the common mode filter used on the differential signal line having a longer length is smaller, so that the differential signal line is Different delay lengths caused by different lengths can be compensated by different group delays of different common mode filters, which solves the problem that the delays of the differential signal lines are large due to the unequal length of the differential signal lines in the related art, and the adjustment is achieved.
  • the technical effect of the unequal differential signal line delays are approximately equal.
  • no new device is added, no additional PCB trace space is occupied, the cost is low, and the implementation is easy.
  • the first component includes a camera module
  • the second component includes a processor
  • the first component can be a camera module in a mobile phone
  • the second component can be a processor in a mobile phone.
  • a common mode filter is connected in series on each differential signal line connecting the camera module and the processor in the mobile phone, and the group delay of the common mode filter connected in series on the differential signal line having a shorter length is larger, and the length is longer.
  • the smaller the group delay of the common mode filter connected in series on the long differential signal line the different delays due to the different lengths of the differential signal lines are compensated by the different group delays of different common mode filters.
  • the phone screen will not display an abnormality.
  • the foregoing device may include: a user equipment.
  • FIG. 2 is a schematic structural diagram of another device according to an embodiment of the present invention.
  • a common mode filter is connected in series on the differential signal line.
  • a total of the camera module 21 (ie, the first component) and the image processor 22 (ie, the second component) are connected.
  • the common mode filter 301 is connected between the camera module 21 and the image processor 22 through the differential signal line 31a and the differential signal line 31b.
  • the common mode filter 302 is connected to the camera module 21 through the differential signal line 32a and the differential signal line 32b.
  • the common mode filter 303 is connected between the camera module 21 and the image processor 22 via a differential signal line 33a and a differential signal line 33b.
  • A is used to indicate the sum of the lengths of the differential signal line 31a and the differential signal line 31b
  • B is used to indicate the sum of the lengths of the differential signal line 32a and the differential signal line 32b
  • C is used to indicate the sum of the lengths of the differential signal line 33a and the differential signal line 33b.
  • a and B are substantially equal, C is greater than A, and C is greater than B.
  • Channel 1 (Channel1) is used to represent channels 21-31a-301-31b-22
  • channel 2 (Channel2) is channel 21-32a-302-32b-22
  • channel 3 (Channel3) is channel 21-33a-303-33b- twenty two.
  • channel 4 which is a waveform timing diagram obtained by using three identical common mode filters for the unequal length differential signal lines of the device provided by the embodiment of the present invention, wherein channel 3 (ie, The 21-33a-303-33b-22 channel) signal is delayed by more than 50 ps than the other two channels (ie, 21-31a-301-31b-22 channels, 21-32a-302-32b-22 channels).
  • the group delay parameter of the CMFL-2 common mode filter in Figure 3 is 100 ps.
  • channel 3 ie, 21-33a-303-33b-22 channel
  • the remaining two channels ie 21-31a-301-31b-22 channel, 21-32a-302-32b-22 channel
  • FIG. 5 The waveform timings of the three sets of differential signal lines at the input port of the image processor are as shown in FIG. 5, which are waveform timings obtained by using different common mode filters for the unequal length differential signal lines of the device according to the embodiment of the present invention.
  • the delay difference between the channel 3 (ie 21-33a-303-33b-22 channel) signal and the other two channel signals is within 10 ps.
  • the above method solves the problem in the related art due to the differential signal line.
  • the problem that the delay caused by the equal length is large has reached the technical effect of adjusting the delay of the differential signal lines of unequal lengths to be substantially equal, and the high-speed signal synchronization requirement is ensured.
  • FIG. 6 is a flowchart of a differential signal line processing method according to an embodiment of the present invention. As shown in FIG. 6, the differential signal line processing provided in this embodiment is provided.
  • the method may include the following steps, that is, steps 110 to 120:
  • Step 110 Acquire a length of the plurality of sets of differential signal lines connected between the first component and the second component.
  • Step 120 Select at least one common mode filter whose group delay meets a predetermined condition according to the length of the plurality of sets of differential signal lines, wherein each common mode filter is connected in series to the first component and the second component through a set of differential signal lines Between, the group delay of each common mode filter is used to adjust the delay of signal transmission on the connected differential signal line of the common mode filter.
  • a long-length differential signal line series group delay short common mode filter that is, different through different common mode filters
  • the group delay is different to compensate for the difference in length of the differential signal lines, so that the delays of signals transmitted from the first component to the second component are substantially equal across the differential signal lines.
  • a common mode filter with a short group delay is selected, a differential signal line with a short length selects a common mode filter with a long delay group, and a differential signal line with a long length selects a common mode with a short group delay.
  • the filter that is, the common delay filter with different group delays is used to compensate for the different delays caused by the different lengths of the differential signal lines, so that the delays of the differential signal lines connecting the two components are substantially equal, solving the related art.
  • the problem that the delays caused by the unequal lengths of the medium differential signal lines are large, and the technical effects of adjusting the delays of the differential signal lines of unequal lengths are substantially equal.
  • step 110 may include: selecting a group according to the length of the plurality of sets of differential signal lines A common mode filter having the same number of sets of differential signal lines as the predetermined condition.
  • the group delay symbol is selected according to the lengths of the plurality of sets of differential signal lines.
  • the implementation of the common mode filter having the same number of sets of differential signal lines as the predetermined condition may include: selecting, for each of the plurality of sets of differential signal lines, a common mode corresponding to each set of differential signal lines The filter is such that the delay of any one of the differential signal lines is equal to the delay of the other group of differential signal lines, wherein the other group of differential signal lines are differential signal lines of the plurality of sets of differential signal lines except for any one of the differential signal lines.
  • the two delays may be equal or equal, or the difference between the two delays may be within a preset time range, for example, when the difference between the two delays is 10 ps (other values may be taken) When you are inside, you can think that these two delays are equal.
  • the common mode filter includes: an inductor common mode filter.
  • the first component includes a camera module
  • the second component includes a processor
  • the first component and the second component are located in the device, and the device may include: a user device.
  • the embodiment of the invention further provides a differential signal line processing device, and the differential signal line processing device
  • the embodiments and the optional embodiments are used to implement the above embodiments, and are not described again.
  • FIG. 7 is a schematic structural diagram of a differential signal line processing apparatus according to an embodiment of the present invention.
  • the differential signal line processing apparatus provided in this embodiment may include: an obtaining module 41 and a selecting module 42.
  • the obtaining module 41 is configured to: acquire lengths of the plurality of sets of differential signal lines connected between the first component and the second component.
  • the selecting module 42 is configured to: select at least one common mode filter whose group delay meets a predetermined condition according to the lengths of the plurality of sets of differential signal lines acquired by the obtaining module 41, wherein each common mode filter passes through a set of differential signal lines respectively Connected in series between the first component and the second component, the group delay of each common mode filter is used to adjust the delay of signal transmission on the differential signal line connected to the common mode filter.
  • the selecting module 42 is configured to: select a common mode filter having the same group number of groups of differential signal lines as the group delay meets a predetermined condition according to the length of the plurality of sets of differential signal lines .
  • each of the foregoing modules may be implemented by software or hardware.
  • the foregoing may be implemented by, but not limited to, the above modules are all located in the same processor; or, the above modules are in any combination.
  • the forms are located in different processors.
  • Embodiments of the present invention also provide a storage medium.
  • the storage medium may be arranged to store program code for performing the following steps:
  • each common mode filter selecting at least one common mode filter whose group delay meets a predetermined condition according to the length of the plurality of sets of differential signal lines, wherein each common mode filter is connected in series to the first component and the second component through a set of differential signal lines
  • the group delay of each common mode filter is used to adjust the delay of signal transmission on the differential signal line to which the common mode filter is connected.
  • the foregoing storage medium may include, but is not limited to, a USB flash drive, a read-only memory (ROM), and a random access memory (Random Access Memory, referred to as:
  • a USB flash drive a read-only memory
  • ROM read-only memory
  • Random Access Memory Random Access Memory
  • the processor is configured according to the stored program code in the storage medium. Execution: Select a common mode filter having the same group number of groups of differential signal lines as the group delay according to the length of the plurality of sets of differential signal lines.
  • all or part of the steps of the above embodiments may also be implemented by using an integrated circuit. These steps may be separately fabricated into individual integrated circuit modules, or multiple modules or steps may be fabricated into a single integrated circuit module. achieve.
  • the devices/function modules/functional units in the above embodiments may be implemented by a general-purpose computing device, which may be centralized on a single computing device or distributed over a network of multiple computing devices.
  • the device/function module/functional unit in the above embodiment When the device/function module/functional unit in the above embodiment is implemented in the form of a software function module and sold or used as a stand-alone product, it can be stored in a computer readable storage medium.
  • the above mentioned computer readable storage medium may be a read only memory, a magnetic disk or an optical disk or the like.
  • a common mode filter with different group delays is connected to multiple sets of differential signal lines between the first component and the second component, and a differential signal line with a short length selects a common mode filter with a long delay of the group.
  • a long-length differential signal line selects a common-mode filter with a short group delay, that is, a common-mode filter with different group delays is used to compensate for the problem of different delays due to different lengths of differential signal lines,
  • the time delay of each of the differential signal lines connecting the two components is substantially equal; the embodiment of the present invention solves the problem that the delays of the differential signal lines are not equal to each other in the related art, and the difference of the unequal lengths is adjusted.
  • the technical effect of signal line delays being approximately equal.

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Abstract

一种设备、差分信号线处理方法、差分信号线处理装置，其中，该设备包括：第一部件和第二部件，第一部件和第二部件通过多组差分信号线进行信号传输，该设备还包括：至少一个共模滤波器，每个共模滤波器分别通过一组差分信号线串联在第一部件和第二部件之间，每个共模滤波器的群延时用于调整本共模滤波器连接的差分信号线上的信号传输的时延。

Description

设备、差分信号线处理方法、差分信号线处理装置 技术领域
本申请涉及但不限于通信技术领域。
背景技术
由于器件布局的因素，摄像头模组与手机应用处理器之间的不同的高速差分信号线的长度不相等，导致不同信号线的时延不相等，时延不相等会导致时序出现问题，在使用手机进行拍照时，拍照预览时手机屏幕上会出现显示异常的现象。
相关技术中解决以上问题的方式有以下三种：
方式一：采用走线绕长，走蛇形线，来达到物理上走线等长的要求。
方式二：在传输线物理上长度不变的情况下，根据延迟时间与介电常数关联关系，通过调整相对介电常数来达到延时调节，间接达到等长匹配目的。
方式三：针对一组差分线其中一根短的走线，加入放大器形式的相位延迟电路，达到组内等长的要求。
以上三种方式均有弊端。方式一需要更大的印制电路板(Printed Circuit Board，简称为：PCB)布线空间，对于终端产品极其密集的布线来说，是费时费力的。方式二需要同一个PCB板在不同区域采用不同的介质，这在PCB板厂实现起来难度非常大。方式三在短的线上串入运算放大器形式的延迟电路，成本高并且占用可观的布局面积，在终端产品的PCB板中实施的可行性低。
发明内容
以下是对本文详细描述的主题的概述。本概述并非是为了限制权利要求的保护范围。
针对上述不同差分信号线的时延不相等的问题，相关技术中尚未提出有效的解决方案。
本文提供了一种设备、差分信号线处理方法、差分信号线处理装置，以解决相关技术中由于差分信号线不等长而造成的时延相差大的问题。
一种设备，包括：第一部件和第二部件，所述第一部件和所述第二部件通过多组差分信号线进行信号传输，所述设备还包括：
至少一个共模滤波器，每个所述共模滤波器分别通过一组差分信号线串联在所述第一部件和所述第二部件之间，每个所述共模滤波器的群延时用于调整本共模滤波器连接的差分信号线上的信号传输的时延。
可选地，每组所述差分信号线的长度与串联在本组差分信号线上的共模滤波器的群延时具有负相关关系。
可选地，所述共模滤波器的数量与所述差分信号线的组数相同，连接在所述第一部件和所述第二部件之间的每组所述差分信号线上均串联一个共模滤波器。
可选地，所述共模滤波器包括：电感共模滤波器。
可选地，所述第一部件包括摄像头模组，所述第二部件包括处理器。
可选地，所述第一部件与所述第二部件位于设备中，所述设备包括：用户设备。
一种差分信号线处理方法，包括：
获取第一部件和第二部件之间连接的多组差分信号线的长度；
根据所述多组差分信号线的长度选择群延时符合预定条件的至少一个共模滤波器，其中，每个所述共模滤波器分别通过一组差分信号线串联在所述第一部件和所述第二部件之间，每个所述共模滤波器的群延时用于调整本共模滤波器连接的差分信号线上的信号传输的时延。
可选地，所述根据所述多组差分信号线的长度选择群延时符合预定条件的至少一个共模滤波器，包括：
根据所述多组差分信号线的长度选择群延时符合预定条件的与所述多组差分信号线的组数相同的共模滤波器。
可选地，所述根据所述多组差分信号线的长度选择群延时符合预定条件 的与所述多组差分信号线的组数相同的共模滤波器，包括：
对于所述多组差分信号线中的所述每组差分信号线，选择与所述每组差分信号线对应的所述共模滤波器，使得任意一组差分信号线与其它组差分信号线的时延相等，其中，所述其它组差分信号线为所述多组差分信号线中除所述任意一组差分信号线之外的差分信号线。
可选地，所述共模滤波器包括：电感共模滤波器。
可选地，所述第一部件包括摄像头模组，所述第二部件包括处理器。
可选地，所述第一部件与所述第二部件位于设备中，所述设备包括：用户设备。
一种差分信号线处理装置，包括：
获取模块，设置为：获取第一部件和第二部件之间连接的多组差分信号线的长度；
选择模块，设置为：根据所述获取模块获取的所述多组差分信号线的长度选择群延时符合预定条件的至少一个共模滤波器，其中，每个所述共模滤波器分别通过一组差分信号线串联在所述第一部件和所述第二部件之间，所述所述共模滤波器的群延时用于调整本共模滤波器连接的差分信号线上的信号传输的时延。
可选地，所述选择模块，是设置为：根据所述多组差分信号线的长度选择群延时符合预定条件的与所述多组差分信号线的组数相同的共模滤波器。
本发明实施例提供的设备、差分信号线处理方法、差分信号线处理装置，通过在第一部件和第二部件之间的多组差分信号线上连接群延时不同的共模滤波器，长度短的差分信号线选择群延时长的共模滤波器，长度长的差分信号线选择群延时短的共模滤波器，也就是说，使用群延时不同的共模滤波器来弥补由于差分信号线的长度不同而导致的时延不同的问题，使得连接两个部件的每组差分信号线的时延大致相等；本发明实施例解决了相关技术中由于差分信号线不等长而造成的时延相差大的问题，达到了调节不等长的差分信号线时延大致相等的技术效果。
在阅读并理解了附图和详细描述后，可以明白其他方面。
附图概述
图1为本发明实施例提供的一种设备的结构示意图；
图2为本发明实施例提供的另一种设备的结构示意图；
图3为本发明实施例提供的设备中两个不同的共模滤波器的群延时的曲线示意图；
图4为本发明实施例提供的设备的不等长差分信号线采用三个相同的共模滤波器得到的波形时序图；
图5为本发明实施例提供的设备的不等长差分信号线采用不同的共模滤波器得到的波形时序图；
图6为本发明实施例提供的一种差分信号线处理方法的流程图；
图7为本发明实施例提供的一种差分信号线处理装置的示意图。
本发明的实施方式
下文中将结合附图对本发明的实施方式进行详细说明。需要说明的是，在不冲突的情况下，本文中的实施例及实施例中的特征可以相互任意组合。
在附图的流程图示出的步骤可以在诸根据一组计算机可执行指令的计算机***中执行。并且，虽然在流程图中示出了逻辑顺序，但是在某些情况下，可以以不同于此处的顺序执行所示出或描述的步骤。
本文的说明书和权利要求书及说明书附图中的术语“第一”、“第二”等是用于区别类似的对象，而不必用于描述特定的顺序或先后次序。
本发明实施例中提供了一种设备，图1为本发明实施例提供的一种设备的结构示意图，如图1所示，本实施例提供的设备包括第一部件11和第二部件12，第一部件11和第二部件12通过多组差分信号线进行信号传输，该设备还包括至少一个共模滤波器13。每个共模滤波器13分别通过一组差分信号线串联在第一部件11和第二部件12之间，每个共模滤波器的群延时用于调整本共模滤波器连接的差分信号线上的信号传输的时延。
举例来说，可以在长度短的差分信号线串联群延时较长的共模滤波器，在长度长的差分信号线串联群延时较短的共模滤波器，即，通过不同共模滤波器的不同群延时来弥补差分信号线的长度不同导致的时延不同，使得在每组差分信号线上，信号从第一部件传输至第二部件的延时大致相等。
在本发明实施例中，通过在第一部件和第二部件之间的多组差分信号线上连接群延时不同的共模滤波器，长度短的差分信号线选择群延时长的共模滤波器，长度长的差分信号线选择群延时短的共模滤波器，也就是说，使用群延时不同的共模滤波器来弥补由于差分信号线的长度不同而导致的时延不同的问题，使得连接两个部件的每组差分信号线的时延大致相等；本发明实施例解决了相关技术中由于差分信号线不等长而造成的时延相差大的问题，达到了调节不等长的差分信号线时延大致相等的技术效果。
可选地，在本发明实施例中，每组差分信号线的长度与串联在该组差分信号线上的共模滤波器的群延时具有负相关关系。即，长度短的差分信号线上串联群延时长的共模滤波器，长度长的差分信号线上串联群延时短的共模滤波器。
在本发明实施例中，假设第一部件与第二部件之间存在m组差分信号线，并存在以下公式：
第1组差分信号线的物理长度导致的时延+第1组差分信号线上的共模滤波器的群延时＝第2组差分信号线的物理长度导致的时延+第2组差分信号线上的共模滤波器的群延时＝第i组差分信号线的物理长度导致的时延+第i组差分信号线上的共模滤波器的群延时，其中，1≤i≤m。
可选地，在本发明实施例中，共模滤波器的数量与差分信号线的组数相同，连接在第一部件和第二部件之间的每组差分信号线上均串联一个共模滤波器。
举例来说，当第一部件与第二部件之间有N组差分信号线时，在每一组差分信号线上均串联有一个共模滤波器，即，在第一部件与第二部件之间共使用N个共模滤波器。其中，长度越短的差分信号线上所使用的共模滤波器的群延时越大，长度越长的差分信号线上所使用的共模滤波器的群延时越小。
在本发明的一种可选地实施例中，当第一部件与第二部件之间有N组差分信号线时，在除了长度最长的一组差分信号线以外的每一组差分信号线上均串联有一个共模滤波器，即，在第一部件与第二部件之间共使用N-1个共模滤波器。
可选地，在本发明实施例中，共模滤波器可以包括：电感共模滤波器。
本发明实施例中的共模滤波器可以是电感共模滤波器。在相关技术中，为了抑制共模噪声，在PCB走线上串有电感共模滤波器，在本发明实施例中，对于长度不同的差分信号线上采用群延时不同的电感共模滤波器，长度越短的差分信号线上所采用的共模滤波器的群延时越大，长度越长的差分信号线上所采用的共模滤波器的群延时越小，使得由于差分信号线的长度不同而导致的时延不同可以通过不同共模滤波器具有的不同群延时来弥补，解决了相关技术中由于差分信号线不等长而造成的时延相差大的问题，达到了调节不等长的差分信号线时延大致相等的技术效果。而且，本发明实施例中，没有增加新的器件，不占用额外的PCB走线空间，成本低，容易实施。
可选地，在本发明实施例中，上述第一部件包括摄像头模组，第二部件包括处理器。
第一部件可以是手机中的摄像头模组，第二部件可以是手机中的处理器。在连接摄像头模组和手机中的处理器的各组差分信号线上均串联一个共模滤波器，长度越短的差分信号线上所串联的共模滤波器的群延时越大，长度越长的差分信号线上所串联的共模滤波器的群延时越小，使得由于差分信号线的长度不同而导致的时延不同通过不同共模滤波器具有的不同群延时来弥补，从而拍照预览时，手机屏幕不会显示异常。
可选地，在本发明实施例中，上述设备可以包括：用户设备。
图2为本发明实施例提供的另一种设备的结构示意图。本实施例的设备中，差分信号线上串联有共模滤波器，如图2所示，摄像头模组21(即上述第一部件)和图像处理器22(即上述第二部件)之间一共有3组差分信号线，其中，差分信号线31a、差分信号线31b为一组，差分信号线32a、差分信号线32b为另一组，差分信号线33a、差分信号线33b为又一组。
共模滤波器301通过差分信号线31a、差分信号线31b串在摄像头模组21和图像处理器22之间；共模滤波器302通过差分信号线32a、差分信号线32b串在摄像头模组21和图像处理器22之间；共模滤波器303通过差分信号线33a、差分信号线33b串在摄像头模组21和图像处理器22之间。
使用A表示差分信号线31a与差分信号线31b的长度的和，使用B表示差分信号线32a与差分信号线32b的长度的和，使用C表示差分信号线33a与差分信号线33b的长度的和。
按照差分走线的要求，每一组差分信号线的长度应该相等，即A＝B＝C。
然而由于器件布局的因素，在实际应用中，A与B基本相等，C大于A，C大于B。
使用通道1(Channel1)表示通道21-31a-301-31b-22，通道2(Channel2)表示通道21-32a-302-32b-22，通道3(Channel3)表示通道21-33a-303-33b-22。
当A与B相等，C与A之差为8毫米时，如果三组差分信号线使用相同的共模滤波器，例如，如图3所示，为本发明实施例提供的设备中两个不同的共模滤波器的群延时的曲线示意图，若上述三组差分信号线(A、B和C)都使用图3中所示的CMFL-1共模滤波器，在图像处理器输入端口处三组差分信号线的波形时序如图4所示，为本发明实施例提供的设备的不等长差分信号线采用三个相同的共模滤波器得到的波形时序图，其中，通道3(即21-33a-303-33b-22通道)信号比另外两个通道(即21-31a-301-31b-22通道、21-32a-302-32b-22通道)延迟大于50ps。
图3中的CMFL-1共模滤波器的群延迟参数为160ps(ps：皮秒，英文全称为picosecond，1皮秒等于一万亿分之一秒，即，1ps＝10-12s)。
图3中的CMFL-2共模滤波器的群延迟参数为100ps。
在本实施例中，当A与B相等，C与A之差为8毫米时，通道3(即21-33a-303-33b-22通道)使用CMFL-2共模滤波器，其余两个通道(即21-31a-301-31b-22通道、21-32a-302-32b-22通道)使用CMFL-1共模滤波器。在图像处理器输入端口处三组差分信号线的波形时序如图5所示，为本发明实施例提供的设备的不等长差分信号线采用不同的共模滤波器得到的波形时序 图，通道3(即21-33a-303-33b-22通道)信号与另外两个通道信号的时延差距在10ps以内，显然地，该通过上述方式，解决了相关技术中由于差分信号线不等长而造成的时延相差大的问题，达到了调节不等长的差分信号线时延大致相等的技术效果，保证了高速信号同步要求。
本发明实施例还提供了一种差分信号线处理方法，图6为本发明实施例提供的一种差分信号线处理方法的流程图，如图6所示，本实施例提供的差分信号线处理方法可以包括如下步骤，即步骤110～步骤120：
步骤110，获取第一部件和第二部件之间连接的多组差分信号线的长度。
步骤120，根据多组差分信号线的长度选择群延时符合预定条件的至少一个共模滤波器，其中，每个共模滤波器分别通过一组差分信号线串联在第一部件和第二部件之间，每个共模滤波器的群延时用于调整本共模滤波器的连接的差分信号线上的信号传输的时延。
例如，在长度短的差分信号线串联群延时较长的共模滤波器，在长度长的差分信号线串联群延时较短的共模滤波器，即，通过不同共模滤波器不同的群延时来弥补差分信号线的长度不同导致的时延不同，使得在各组差分信号线上，信号从第一部件传输至第二部件的延时大致相等。
在本发明实施例中，通过选择群延时不同的共模滤波器，长度短的差分信号线选择群延时长的共模滤波器，长度长的差分信号线选择群延时短的共模滤波器，即，使用群延时不同的共模滤波器来弥补差分信号线的长度不同导致的时延不同，使得连接两个部件的各组差分信号线的时延大致相等，解决了相关技术中差分信号线不等长造成的时延相差大的问题，达到了调节不等长的差分信号线时延大致相等的技术效果。
可选地，在本发明实施例中，根据多组差分信号线的长度选择群延时符合预定条件的至少一个共模滤波器，即步骤110可以包括：根据多组差分信号线的长度选择群延时符合预定条件的与多组差分信号线的组数相同的共模滤波器。
可选地，在本发明实施例中，根据多组差分信号线的长度选择群延时符 合预定条件的与多组差分信号线的组数相同的共模滤波器的实现方式可以包括：对于多组差分信号线中的每组差分信号线，选择与每组差分信号线对应的共模滤波器，使得任意一组差分信号线与其它组差分信号线的时延相等，其中，其它组差分信号线为多组差分信号线中除任意一组差分信号线之外的差分信号线。
在实际应用中，两个时延相等可以是精确相等，也可以是两个时延的差在预设时间范围之内，例如，当两个时延的差在10ps(还可以取其他值)以内时，可以认为这两个时延相等。
在本发明实施例中，假设第一部件与第二部件之间存在m组差分信号线，并存在以下公式：
第1组差分信号线的物理长度导致的时延+第1组差分信号线上的共模滤波器的群延时＝第2组差分信号线的物理长度导致的时延+第2组差分信号线上的共模滤波器的群延时＝第i组差分信号线的物理长度导致的时延+第i组差分信号线上的共模滤波器的群延时，其中，1≤i≤m。
可选地，在本发明实施例中，共模滤波器包括：电感共模滤波器。
可选地，在本发明实施例中，上述第一部件包括摄像头模组，第二部件包括处理器。
可选地，在本发明实施例中，上述第一部件与第二部件位于设备中，该设备可以包括：用户设备。
通过以上的实施例和可选实施方式的描述，本领域的技术人员可以清楚地了解到根据上述实施例的方法可借助软件加必需的通用硬件平台的方式来实现，当然也可以通过硬件。基于这样的理解，本发明的技术方案本质上或者说对相关技术做出贡献的部分可以以软件产品的形式体现出来，该计算机软件产品存储在一个存储介质(如ROM/RAM、磁碟、光盘)中，包括若干指令用以使得一台终端设备(可以是手机，计算机，服务器，或者网络设备等)执行本发明各个实施例所述的方法。
本发明实施例还提供了一种差分信号线处理装置，该差分信号线处理装 置用于实现上述实施例及可选地实施方式，已经进行过说明的不再赘述。
图7为本发明实施例提供的一种差分信号线处理装置的结构示意图，如图7所示，本实施例提供的差分信号线处理装置可以包括：获取模块41和选择模块42。
获取模块41，设置为：获取第一部件和第二部件之间连接的多组差分信号线的长度。
选择模块42，设置为：根据获取模块41获取的多组差分信号线的长度选择群延时符合预定条件的至少一个共模滤波器，其中，每个共模滤波器分别通过一组差分信号线串联在第一部件和第二部件之间，每个共模滤波器的群延时用于调整本共模滤波器连接的差分信号线上的信号传输的时延。
可选地，在本发明实施例中，选择模块42，是设置为：根据多组差分信号线的长度选择群延时符合预定条件的与多组差分信号线的组数相同的共模滤波器。
在实际应用中，上述各个模块是可以通过软件或硬件来实现的，对于后者，可以通过以下方式实现，但不限于此：上述模块均位于同一处理器中；或者，上述各个模块以任意组合的形式分别位于不同的处理器中。
本发明的实施例还提供了一种存储介质。在本发明实施例中，上述存储介质可以被设置为存储用于执行以下步骤的程序代码：
S1，获取第一部件和第二部件之间连接的多组差分信号线的长度。
S2，根据多组差分信号线的长度选择群延时符合预定条件的至少一个共模滤波器，其中，每个共模滤波器分别通过一组差分信号线串联在第一部件和第二部件之间，每个共模滤波器的群延时用于调整本共模滤波器连接的差分信号线上的信号传输的时延。
可选地，在本发明实施例中，上述存储介质可以包括但不限于：U盘、只读存储器(Read-Only Memory，简称为：ROM)、随机存取存储器(Random Access Memory，简称为：RAM)、移动硬盘、磁碟或者光盘等各种可以存储程序代码的介质。
可选地，在本发明实施例中，处理器根据存储介质中已存储的程序代码 执行：根据多组差分信号线的长度选择群延时符合预定条件的与多组差分信号线的组数相同的共模滤波器。
可选地，本发明实施例中的示例可以参考上述实施例及可选实施方式中所描述的示例，本实施例在此不再赘述。
本领域普通技术人员可以理解上述实施例的全部或部分步骤可以使用计算机程序流程来实现，所述计算机程序可以存储于一计算机可读存储介质中，所述计算机程序在相应的硬件平台上(根据***、设备、装置、器件等)执行，在执行时，包括方法实施例的步骤之一或其组合。
可选地，上述实施例的全部或部分步骤也可以使用集成电路来实现，这些步骤可以被分别制作成一个个集成电路模块，或者将它们中的多个模块或步骤制作成单个集成电路模块来实现。
上述实施例中的装置/功能模块/功能单元可以采用通用的计算装置来实现，它们可以集中在单个的计算装置上，也可以分布在多个计算装置所组成的网络上。
上述实施例中的装置/功能模块/功能单元以软件功能模块的形式实现并作为独立的产品销售或使用时，可以存储在一个计算机可读取存储介质中。上述提到的计算机可读取存储介质可以是只读存储器，磁盘或光盘等。
工业实用性
本发明实施例通过在第一部件和第二部件之间的多组差分信号线上连接群延时不同的共模滤波器，长度短的差分信号线选择群延时长的共模滤波器，长度长的差分信号线选择群延时短的共模滤波器，也就是说，使用群延时不同的共模滤波器来弥补由于差分信号线的长度不同而导致的时延不同的问题，使得连接两个部件的每组差分信号线的时延大致相等；本发明实施例解决了相关技术中由于差分信号线不等长而造成的时延相差大的问题，达到了调节不等长的差分信号线时延大致相等的技术效果。

Claims (14)

  1. 一种设备，包括：第一部件和第二部件，所述第一部件和所述第二部件通过多组差分信号线进行信号传输，所述设备还包括：
    至少一个共模滤波器，每个所述共模滤波器分别通过一组差分信号线串联在所述第一部件和所述第二部件之间，每个所述共模滤波器的群延时用于调整本共模滤波器连接的差分信号线上的信号传输的时延。
  2. 根据权利要求1所述的设备，其中，每组所述差分信号线的长度与串联在本组差分信号线上的共模滤波器的群延时具有负相关关系。
  3. 根据权利要求1所述的设备，其中，所述共模滤波器的数量与所述差分信号线的组数相同，连接在所述第一部件和所述第二部件之间的每组所述差分信号线上均串联一个共模滤波器。
  4. 根据权利要求1至3中任一项所述的设备，其中，所述共模滤波器包括：电感共模滤波器。
  5. 根据权利要求1至3中任一项所述的设备，其中，所述第一部件包括摄像头模组，所述第二部件包括处理器。
  6. 根据权利要求1至3中任一项所述的设备，其中，所述第一部件与所述第二部件位于设备中，所述设备包括：用户设备。
  7. 一种差分信号线处理方法，包括：
    获取第一部件和第二部件之间连接的多组差分信号线的长度；
    根据所述多组差分信号线的长度选择群延时符合预定条件的至少一个共模滤波器，其中，每个所述共模滤波器分别通过一组差分信号线串联在所述第一部件和所述第二部件之间，每个所述共模滤波器的群延时用于调整本共模滤波器连接的差分信号线上的信号传输的时延。
  8. 根据权利要求7所述的方法，其中，所述根据所述多组差分信号线的长度选择群延时符合预定条件的至少一个共模滤波器，包括：
    根据所述多组差分信号线的长度选择群延时符合预定条件的与所述多组差分信号线的组数相同的共模滤波器。
  9. 根据权利要求8所述的方法，其中，所述根据所述多组差分信号线的长度选择群延时符合预定条件的与所述多组差分信号线的组数相同的共模滤波器，包括：
    对于所述多组差分信号线中的所述每组差分信号线，选择与所述每组差分信号线对应的所述共模滤波器，使得任意一组差分信号线与其它组差分信号线的时延相等，其中，所述其它组差分信号线为所述多组差分信号线中除所述任意一组差分信号线之外的差分信号线。
  10. 根据权利要求7至9任一项所述的方法，其中，所述共模滤波器包括：电感共模滤波器。
  11. 根据权利要求7至9任一项所述的方法，其中，所述第一部件包括摄像头模组，所述第二部件包括处理器。
  12. 根据权利要求7至9任一项所述的方法，其中，所述第一部件与所述第二部件位于设备中，所述设备包括：用户设备。
  13. 一种差分信号线处理装置，包括：
    获取模块，设置为：获取第一部件和第二部件之间连接的多组差分信号线的长度；
    选择模块，设置为：根据所述获取模块获取的所述多组差分信号线的长度选择群延时符合预定条件的至少一个共模滤波器，其中，每个所述共模滤波器分别通过一组差分信号线串联在所述第一部件和所述第二部件之间，每个所述共模滤波器的群延时用于调整本共模滤波器连接的差分信号线上的信号传输的时延。
  14. 根据权利要求13所述的装置，其中，
    所述选择模块，是设置为：根据所述多组差分信号线的长度选择群延时符合预定条件的与所述多组差分信号线的组数相同的共模滤波器。
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