WO2017145285A1 - Circuit de compensation de distorsion - Google Patents

Circuit de compensation de distorsion Download PDF

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Publication number
WO2017145285A1
WO2017145285A1 PCT/JP2016/055440 JP2016055440W WO2017145285A1 WO 2017145285 A1 WO2017145285 A1 WO 2017145285A1 JP 2016055440 W JP2016055440 W JP 2016055440W WO 2017145285 A1 WO2017145285 A1 WO 2017145285A1
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Prior art keywords
signal
filter
envelope
unit
calculation unit
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PCT/JP2016/055440
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English (en)
Japanese (ja)
Inventor
安藤　暢彦
檜枝　護重
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三菱電機株式会社
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Priority to PCT/JP2016/055440 priority Critical patent/WO2017145285A1/fr
Publication of WO2017145285A1 publication Critical patent/WO2017145285A1/fr

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/32—Modifications of amplifiers to reduce non-linear distortion
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F3/24—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers of transmitter output stages
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/02—Transmitters
    • H04B1/04—Circuits
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems

Definitions

  • the present invention relates to a distortion compensation circuit that compensates for nonlinear distortion generated in a power amplifier.
  • a power amplifier In a wireless communication device, a power amplifier is used to amplify a transmission signal.
  • a conventional distortion compensation circuit the distortion compensation circuit of Non-Patent Document 1 is known.
  • a conventional distortion compensation circuit stores a compensation table that compensates for nonlinear characteristics of a power amplifier in a memory, reads a compensation value corresponding to the instantaneous power of the transmission signal from the compensation table, and multiplies the transmission signal by the readout compensation value. Then, a transmission signal including a distortion compensation component is generated. The multiplied signal is input to the power amplifier, and the power is amplified.
  • the compensation table is created using an I / Q (In-phase / Quadrature) signal of the transmission signal and an I / Q signal of the output signal of the power amplifier.
  • An adaptive algorithm such as an LMS (Least Mean Square) algorithm is used to create the compensation table and updated as needed.
  • a conventional distortion compensation circuit estimates a nonlinear characteristic of a power amplifier by directly comparing a transmission signal and an output signal of the power amplifier, and performs distortion compensation. For this reason, in order to perform distortion compensation, it is necessary to observe at least the signal bandwidth of fifth-order distortion. This means that the operation speed of an A / D (Analog to Digital) converter (analog / digital converter) is required to be at least five times the bandwidth of the transmission signal.
  • a / D Analog to Digital
  • the compensation table is updated by digital signal processing, it is necessary to convert the output signal of the power amplifier into a digital signal by an A / D converter. Therefore, as the signal bandwidth of the transmission signal becomes wider, the operation speed of the A / D converter needs to be increased. However, when the operating speed of the A / D converter is increased, there is a problem that power consumption increases. In addition, increasing the operating speed of the A / D converter means using a high-speed A / D converter, leading to an increase in cost.
  • the present invention has been made in view of the above problems, and is a distortion compensation circuit capable of compensating for distortion of a power amplifier while suppressing the operation speed of an A / D converter even when the bandwidth of a transmission signal is wide.
  • the purpose is to obtain.
  • the distortion compensation circuit of the present invention includes an amplifier that amplifies a transmission signal, a detector that detects an envelope of the transmission signal amplified by the amplifier, and outputs the detected envelope as an envelope signal, and a signal band of the envelope signal
  • a first filter that has the following cutoff frequency and band-limits the envelope signal, an analog-digital converter that digitizes the envelope signal band-limited by the first filter, and an analog-digital converter digitized
  • a first calculation unit that calculates a first distribution with respect to the amplitude of the envelope signal, an absolute value calculation unit that calculates an absolute value of a transmission signal input to the amplifier, and outputs the calculated absolute value as a reference signal;
  • a second filter having a cutoff frequency equal to or lower than the signal band of the reference signal and band-limiting the reference signal; and a second filter for the amplitude of the reference signal band-limited by the second filter.
  • a second calculation unit that calculates the error, a comparison unit that calculates an error between the first distribution and the second distribution, and a transmission signal input to the amplifier so as to reduce the error calculated by the comparison unit. And a compensator that outputs the predistorted transmission signal to the amplifier.
  • FIG. 1 is a block diagram showing a configuration example of a distortion compensation circuit according to Embodiment 1 of the present invention.
  • the distortion compensation circuit includes a signal generation unit 100, a complex multiplication unit 101 (an example of a compensation unit), an absolute value calculation unit 102 (an example of an absolute value calculation unit), an operating point adjustment unit 103, and a LUT (Look Up Table) reading unit.
  • D / A (Digital to Analog) converter 105 D / A (Digital to Analog) converter 105, frequency conversion circuit 106, power amplifier 107 (an example of an amplifier), output terminal 108, envelope detector 109 (an example of a detector), LPF (Low Pass Filter) 110 (an example of a first filter), an A / D converter 111, a CCDF (Complementary Cumulative Distribution Function) calculation unit 112 (an example of a first calculation unit), a comparison unit 113 (an example of a comparison unit), a CCDF calculation unit 114 (an example of the second calculation unit) and LPF 115 (second It comprises one example of a filter).
  • CCDF Computer Cumulative Distribution Function
  • the signal generation unit 100 is a signal generation unit that generates a transmission signal.
  • the signal generator 100 is connected to the complex multiplier 101 and the absolute value calculator 102.
  • the signal generation unit 100 outputs the generated transmission signal to the complex multiplication unit 101 and the absolute value calculation unit 102.
  • the signal generation unit 100 includes a modulation processing circuit and a waveform shaping filter.
  • the complex multiplication unit 101 is a complex multiplication unit that multiplies the transmission signal output from the signal generation unit 100 and the output signal from the LUT reading unit 104.
  • the output signal of the LUT reading unit 104 is a compensation signal that compensates for the nonlinear characteristic of the power amplifier 107, and the complex multiplication unit 101 multiplies the transmission signal by the compensation signal to suppress distortion of the output signal of the amplifier 107. Thus, the transmission signal is predistorted.
  • the complex multiplication unit 101 is connected to the signal generation unit 100, the absolute value calculation unit 102, the LUT reading unit 104, and the D / A converter 105.
  • Complex multiplication section 101 outputs the multiplied transmission signal to D / A converter 105.
  • the complex multiplication unit 101 (an example of a compensation unit) may be configured as the complex multiplication unit 101 by combining the complex multiplication unit 101, the operating point adjustment unit 103, and the LUT reading unit 104.
  • the absolute value calculation unit 102 is an absolute value calculation unit that calculates the absolute value of the instantaneous time of the transmission signal.
  • the absolute value calculation unit 102 is connected to the signal generation unit 100, the complex multiplication unit 101, the operating point adjustment unit 103, and the LPF 115.
  • the absolute value calculation unit 102 outputs the calculated absolute value to the operating point adjustment unit 103 and the first LPF 115 as a reference signal.
  • calculating the absolute value of the transmission signal means detecting the envelope of the transmission signal.
  • the signal output from the absolute value calculation unit 102 is referred to as a reference signal.
  • the operating point adjusting unit 103 is an operating point adjusting unit that performs processing to increase or decrease the magnitude of the output signal (reference signal) of the absolute value calculating unit 102 in accordance with the adjustment value output from the comparing unit 113.
  • the operating point adjustment unit 103 is connected to the absolute value calculation unit 102, the LUT reading unit 104, the comparison unit 113, and the LPF 115.
  • the operating point adjustment unit 103 outputs a reference signal whose size is increased or decreased according to the adjustment value to the LUT reading unit 104.
  • the LUT reading unit 104 is a LUT reading unit that reads a compensation value corresponding to the magnitude of the reference signal from a table stored in a memory and outputs the read compensation value to the complex multiplication unit 101.
  • the LUT reading unit 104 includes a memory in which a compensation table that compensates for nonlinear characteristics of the power amplifier 107 is stored.
  • the LUT reading unit 104 is connected to the operating point adjustment unit 103 and the complex multiplication unit 101.
  • the D / A converter 105 is a converter that converts an input digital signal into an analog signal and outputs the analog signal to the frequency conversion circuit 106.
  • the D / A converter 105 is connected to the complex multiplication unit 101 and the frequency conversion circuit 106.
  • the D / A converter 105 may be integrated with an FPGA (Field (Programmable Gate Array).
  • the frequency conversion circuit 106 is a frequency conversion circuit that converts the frequency of the transmission signal and outputs the frequency-converted transmission signal to the power amplifier 107.
  • the frequency conversion circuit 106 is connected to the D / A converter 105 and the power amplifier 107.
  • a mixer is used for the frequency conversion circuit 106.
  • the power amplifier 107 is a power amplifier that amplifies the power of the transmission signal and outputs the amplified transmission signal to the output terminal 108 and the envelope detector 109.
  • the power amplifier 107 is connected to the frequency conversion circuit 106, the output terminal 108, and the envelope detector 109.
  • the power amplifier 107 may be a GaAs (Gallium Narside) amplifier, a GaN (Gallium Nitride) amplifier, a Si MOSEFET (Metal Oxide Semiconductor Field Effect Transistor) amplifier, or the like.
  • the output terminal 108 is a terminal that outputs an output signal of the power amplifier 107.
  • the output terminal 108 is connected to the power amplifier 107 and the envelope detector 109.
  • the envelope detector 109 is a detector that detects an envelope component from the output signal of the power amplifier 107 and outputs the detected envelope component to the LPF 110 as an envelope signal.
  • the envelope detector 109 is connected to the power amplifier 107, the output terminal 108, and the LPF 110.
  • a diode detector is used for the envelope detector 109.
  • the LPF 110 is a low-pass filter that performs band limitation processing on the output signal of the power amplifier 107 and outputs the band-limited signal to the A / D converter 111.
  • the cut-off frequency Fc of the LPF 110 is smaller than the bandwidth BW of the envelope signal, and Fc ⁇ BW.
  • the LPF 110 is connected to the envelope detector 109 and the A / D converter 111.
  • a CR filter, an LC filter, or the like is used for the LPF 110.
  • the A / D converter 111 is a converter that converts an analog envelope signal into a digital signal and outputs the digital signal to the CCDF calculation unit 112.
  • the A / D converter 111 is connected to the LPF 110 and the CCDF calculation unit 112.
  • the A / D converter 111 may be integrated with the FPGA.
  • the CCDF calculation unit 112 is a CCDF calculation unit that calculates the CCDF of the band-limited envelope signal and outputs the calculated CCDF to the comparison unit 113.
  • the CCDF calculation unit 112 is connected to the A / D converter 111 and the comparison unit 113.
  • the comparison unit 113 compares the output signal of the CCDF calculation unit 112 (an example of the first distribution) with the output signal of the CCDF calculation unit 114 (an example of the second distribution), and an error corresponding to the difference between the two CCDFs. It is a comparison unit that obtains a value, performs a process of comparing the obtained error value with a preset threshold value, and outputs an adjustment value according to the comparison result to the operating point adjustment unit 103.
  • the comparison unit 113 is connected to the CCDF calculation unit 112, the CCDF calculation unit 114, and the operating point adjustment unit 103.
  • the CCDF calculation unit 114 is a CCDF calculation unit that calculates the CCDF of the band-limited reference signal and outputs the calculated CCDF to the comparison unit 113.
  • the CCDF calculation unit 114 is connected to the LPF 115 and the comparison unit 113.
  • the LPF 115 is a low-pass filter that performs band limitation processing on the reference signal output from the absolute value calculation unit 102 and outputs the band-limited reference signal to the CCDF calculation unit 114.
  • the LPF 115 preferably has the same filter characteristics as the LPF 110.
  • the LPF 115 is connected to the absolute value calculation unit 102, the operating point adjustment unit 103, and the CCDF calculation unit 114.
  • the signal generation unit 100, the complex multiplication unit 101, the absolute value calculation unit 102, the operating point adjustment unit 103, the LUT reading unit 104, the CCDF calculation unit 112, the comparison unit 113, the CCDF calculation unit 114, and the LPF 115 are FPGA logics.
  • a circuit, an ASIC (Application Specific Integrated Circuit), a microcomputer (microcomputer), and the like are included.
  • the functions of the above constituent elements may be executed by hardware such as an FPGA, or may be executed by software so that the processor reads and executes a program indicating the function of each constituent element stored in the memory. May be.
  • the signal generation unit 100 outputs a transmission signal (I (t) + jQ (t)) expressed as a complex number at time t to the complex multiplication unit 101 and the absolute value calculation unit 102.
  • the absolute value calculation unit 102 calculates the absolute value of the transmission signal. If the output signal of the absolute value calculation unit 102 at time t is Mag (t), Mag (t) is expressed by the following equation.
  • the absolute value calculation unit 102 outputs Mag (t) in two directions, the LPF 115 and the operating point adjustment unit 103.
  • the LPF 115 performs band limitation processing on the reference signal and outputs the band-limited reference signal to the CCDF calculation unit 114.
  • the cutoff frequency Fc of the LPF 115 is lower than the bandwidth BW of the envelope component in the transmission signal, the bandwidth of the band-limited reference signal becomes narrower than the bandwidth BW of the envelope component in the transmission signal.
  • the cutoff frequency of the LPF 115 is the same as the cutoff frequency of the LPF 110 described later, and the filter characteristics of the LPF 115 and the filter characteristics of the LPF 110 are desirably the same.
  • the CCDF calculation unit 114 calculates the CCDF using the output signal of the LPF 115 and outputs the calculation result Ref_CCDF (n) to the comparison unit 113.
  • n represents the data number of the calculated CCDF.
  • the operating point adjustment unit 103 performs an operation represented by the following expression on the Mag (t) using the adjustment value G (i) output from the comparison unit 113, and outputs the operation result to the LUT reading unit 104.
  • G (i) corresponds to the gain.
  • i represents the number of comparisons in the comparison unit 113, and is a natural number of 0 or more.
  • the initial value of G (i) is G (0).
  • the operating point adjustment unit 103 uses G (0) as the initial value of the adjustment value.
  • LUT Index (t) is a value obtained by shifting the operating point of Mag (t) by G (i). That is, the operating point adjustment unit 103 adjusts the operating point of Mag (t) by changing the gain with respect to Mag (t).
  • the LUT reading unit 104 reads a compensation coefficient corresponding to the LUT Index (t) from the compensation table stored in the memory, and outputs the compensation coefficient to the complex multiplication unit 101.
  • the compensation coefficients are CompI (t) and CompQ (t). Note that when reading the compensation coefficient from the compensation table, the value may be obtained by interpolation or function fitting of the table value, and the value may be read out.
  • FIG. 2 is a diagram showing an example of a compensation table according to Embodiment 1 of the present invention.
  • the first column is LUT Index
  • the second column is CompI
  • the third column is CompQ.
  • the value of the LUT Index is discontinuous because the data is displayed by thinning to display the entire compensation table.
  • the LUT Index value is a continuous compensation table.
  • the compensation coefficients (CompI and CompQ) are values that compensate for the nonlinear characteristic of the power amplifier 107.
  • the LUT Index corresponds to the true value of the input power. Since it is difficult to understand in the form of a table, a graph illustrating a compensation table in the form of amplitude characteristics and phase characteristics is shown below. The amplitude is ⁇ (CompI 2 + CompQ 2 ), and the phase is tan ⁇ 1 (CompQ / CompI).
  • FIG. 3 is a diagram showing the compensation table according to the first embodiment of the present invention in the form of amplitude characteristics and phase characteristics.
  • the solid line is the amplitude characteristic
  • the broken line is the phase characteristic.
  • the amplitude characteristics and phase characteristics shown in FIG. 3 are inverse characteristics of the amplitude characteristics and phase characteristics of the power amplifier 107.
  • the complex multiplication unit 101 multiplies the output signal I (t) + jQ (t) of the signal generation unit 100 and the output signal CompI (t) + jCompQ (t) of the LUT reading unit 104 as represented by the following expression, and the multiplication result (I ′ (t)) + jQ ′ (t)) is output to the D / A converter 105.
  • the complex multiplication unit 101 multiplying the transmission signal by the compensation coefficient of the power amplifier 107 is called predistortion.
  • the D / A converter 105 converts the transmission signal obtained by complex multiplication of the compensation coefficient into an analog signal and outputs the analog signal to the frequency conversion circuit 106.
  • the frequency conversion circuit 106 converts the frequency of the input transmission signal and inputs the frequency-converted transmission signal to the power amplifier 107.
  • the power amplifier 107 amplifies the power of the transmission signal and outputs the amplified transmission signal to the output terminal 108 and also to the envelope detector 109. At this time, due to the nonlinear characteristic of the power amplifier 107, the output signal of the power amplifier 107 includes a distortion component.
  • the envelope detector 109 detects an envelope component (envelope signal) from the output signal of the power amplifier 107 and outputs the detected envelope signal to the LPF 110.
  • the LPF 110 performs band limiting processing on the envelope signal, and outputs the processed envelope signal to the A / D converter 111. At this time, since the cutoff frequency Fc of the LPF 110 is lower than the bandwidth BW of the envelope signal detected from the transmission signal, the bandwidth of the band-limited envelope signal is narrower than BW.
  • the A / D converter 111 digitizes (digitizes) the band-limited envelope signal.
  • FIG. 4 is a diagram showing the relationship between the frequency characteristic of the LPF 110 according to Embodiment 1 of the present invention and the bandwidth of the envelope signal.
  • the envelope signal includes a and distortion components up to a frequency F D, which is outside the band of the signal component and the signal component to frequency BW, if there is no LPF 110, all of the components operate at high speed A / Digitized by the D converter 111.
  • the operation speed Fs of the A / D converter needs to satisfy the following conditions in order to digitize the signal component of the envelope signal and the distortion component of the envelope signal.
  • the LPF 110 that cuts off Fc which is a frequency lower than the signal bandwidth BW, removes components in the frequency range higher than the frequency Fc, and digitizes components in the frequency range from 0 to Fc.
  • the operation speed Fs of the A / D converter should satisfy at least the following equation.
  • the operation speed of the A / D converter 111 can be reduced and the power consumption can be reduced.
  • the A / D converter 111 outputs the digitized signal to the CCDF calculation unit 112.
  • FIG. 5 is a flowchart showing an example of the operation of the digital portion in the distortion compensation circuit according to Embodiment 1 of the present invention.
  • step S 101 the CCDF calculation unit 112 calculates CCDF using the output signal of the A / D converter 111 and outputs the calculation result Test_CCDF (n) to the comparison unit 113.
  • FIG. 6 is a signal waveform diagram showing waveforms of the envelope signal and the reference signal when there is no band limitation according to Embodiment 1 of the present invention.
  • F S_OLD is the sampling frequency of the A / D converter 111
  • N OLD is the number of data points when determining the CCDF.
  • ⁇ P is a peak difference between the reference signal and the envelope signal.
  • the A / D converter 111 operates at high speed, so that the peak value of the envelope signal can be digitized.
  • the envelope signal includes a distortion component generated by the power amplifier 107, and the peak value close interference particularly includes a distortion component.
  • the reference signal does not pass through the power amplifier 107, a distortion component is not included. Therefore, when the CCDF value of the reference signal and the CCDF value of the envelope signal are compared, there is an error between the two.
  • FIG. 7 is a diagram showing the CCDF of the envelope signal and the reference signal when there is no band limitation according to Embodiment 1 of the present invention.
  • the vertical axis is the occurrence probability
  • the horizontal axis is the amplitude.
  • the difference in CCDF between the reference signal and the envelope signal in the region where the occurrence probability is low corresponds to the difference in peak value in FIG. 6 and is ⁇ P.
  • FIG. 8 is a signal waveform diagram showing waveforms of the envelope signal and the reference signal when there is a band limitation according to Embodiment 1 of the present invention.
  • F S_NEW is the sampling frequency of the A / D converter
  • N NEW is the number of data points when CCDF is obtained.
  • ⁇ P NEW is the peak difference between the reference signal and the envelope signal.
  • the band is limited by the LPF 110 and the LPF 115, so that the speed of the amplitude change becomes slow, but the operation speed of the A / D converter is also slow, so that the peak value of the envelope signal can be digitized. .
  • the distortion component is included in the BW of the envelope signal is that the envelope signal in the region where the amplitude is large even if the band is limited in FIG. 8 is a signal in the nonlinear region of the power amplifier 107. It is understood from the difference between the signal and the signal. The reason why the distortion component is included in BW will be explained a little more.
  • a is a coefficient indicating a linear characteristic.
  • b is a coefficient indicating nonlinear characteristics, and is related to distortion.
  • A-3b ⁇ cos ( ⁇ t) corresponds to the signal component in the signal band (the BW), 4b ⁇ cos (3 ⁇ t ) corresponds to the distortion component in the distortion-band (in F D). Even if the distortion band component is removed, since the signal component includes b, the signal in the signal band is affected by the nonlinear characteristic. As described above, even if the LPF 110 performs band limitation, the envelope signal includes a distortion component.
  • FIG. 9 is a diagram showing the CCDF of the envelope signal and the reference signal when there is a band limitation according to the first embodiment of the present invention.
  • the vertical axis is the occurrence probability
  • the horizontal axis is the amplitude.
  • the difference in CCDF between the reference signal and the envelope signal in the region where the occurrence probability is low corresponds to the difference in peak value in FIG. 8, and is ⁇ P NEW .
  • the number N of data points necessary for calculating the CCDF needs to satisfy at least the following expression using the sampling frequency Fs of the A / D converter 111 and the cut-off frequency Fc of the LPF 110.
  • the larger the number of data points the larger the required number of data points.
  • Fs corresponds to the operation speed of the A / D converter 111.
  • FIG. 10 is a diagram showing the relationship between the number of normalized data points and the amount of distortion compensation deterioration according to Embodiment 1 of the present invention.
  • the horizontal axis represents the number of normalized data points (N / (Fs / Fc)), and the vertical axis represents the deterioration amount of the distortion compensation amount.
  • the normalized data score is a data score obtained by normalizing the data score N with Fs / Fc.
  • the deterioration amount of the distortion compensation amount indicates an amount of deterioration from when the distortion compensation is ideally applied, that is, when the signal distortion is zero. When distortion compensation is ideally applied, the degradation amount of the distortion compensation amount becomes zero.
  • the deterioration amount of the distortion compensation amount deviates from the linear relationship and increases exponentially. This is because, when the number of normalized data points is small, the number of times of sampling the value near the peak of the envelope signal is small, and the accuracy of distortion compensation deteriorates in a region where the distortion is large.
  • the CCDF calculation unit 112 and the CCDF calculation unit 114 determine the normalized data score so that the normalized data score is 8000 or more, multiply the normalized data score by Fc / Fs, and determine the data score N.
  • the normalized data point 8000 corresponds to the distortion compensation amount deterioration amount 0.2 dB
  • the normalized data point number is determined so that the distortion compensation amount deterioration amount is within 0.2 dB, and the data point number N May be determined.
  • the number N of data points may be determined based on the CCDF error.
  • step S102 the comparison unit 113 compares the CCDF of the envelope signal calculated by the CCDF calculation unit 112 with the CCDF of the reference signal calculated by the CCDF calculation unit 114, and calculates a difference (error) between the CCDFs. .
  • the calculation represented by the following equation is performed to obtain the error Err.
  • M is the total number of CCDF values.
  • the comparison unit 113 compares the value of Err with a preset threshold value VTH .
  • the comparison unit 113 updates the adjustment value (gain) for the operating point adjustment unit 103 and decreases it by ⁇ G in step S103. That is, if the number of updates is i, the adjustment value before update is G (i), and the adjustment value after update is G (i + 1), the update is performed as shown in the following equation.
  • i represents the number of comparisons in the comparison unit 113, and is a natural number of 0 or more.
  • the comparison unit 113 updates the adjustment value for the operating point adjustment unit 103 and increases it by ⁇ G in step S104. That is, the comparison unit 113 updates the adjustment value as in the following equation.
  • the operating point adjusting unit 103 adjusts the operating point of the reference signal by increasing or decreasing the power of the reference signal by updating the gain with respect to the reference signal.
  • step S102 if the the Err and V TH satisfy the above equation, the comparing unit 113 does not change the adjustment value for the operating point adjustment unit 103, the process ends. That is, the adjustment value in this case is as follows.
  • the comparison unit 113 performs case analysis in relation to the Err and V TH, and outputs an adjustment value G (i + 1) to the operating point adjustment unit 103.
  • ⁇ G may not be a constant value, but may be variable depending on the number of comparisons, or may be a value proportional to Err.
  • step S ⁇ b> 105 the operating point adjustment unit 103 calculates LUT Index (t) from the adjustment value G (i + 1) and Expression (2), and outputs the LUT Index (t) to the LUT reading unit 104. .
  • step S106 the LUT reading unit 104 reads a compensation coefficient corresponding to the LUT Index (t) from the compensation table stored in the memory, and outputs the compensation coefficient to the complex multiplication unit 101.
  • step S107 the complex multiplication unit 101 multiplies the output signal I (t) + jQ (t) of the signal generation unit 100 by the compensation coefficient output from the LUT reading unit 104, and the multiplication result is D / A. Output to the converter 105.
  • the distortion compensation circuit repeats the series of steps (S101 to S107) described above until Expression (12) is satisfied.
  • Expression (12) is satisfied, the process of the flowchart in FIG. 5 ends.
  • the distortion compensation circuit can update the adjustment value of the operating point adjustment unit 103 so that the difference (Err) of the CCDF between the reference signal and the envelope signal is minimized. Therefore, this distortion compensation circuit can reduce the distortion generated in the power amplifier 107.
  • the distortion compensation circuit of the first embodiment even when the signal bandwidth of the transmission signal is wide, the band is limited by the LPF 110 and the CCDF is used to compare the reference signal and the envelope signal.
  • the distortion of the power amplifier 107 can be compensated while suppressing the operation speed of the / D converter 111.
  • the CCDF is used for the distribution for comparing the reference signal and the envelope signal.
  • PDF Probability Density Function
  • CDF Cumulative Distribution Function
  • FIG. 11 is a configuration diagram showing a configuration example of a distortion compensation circuit according to the second embodiment of the present invention. 11, the same reference numerals as those in FIG. 1 denote the same or corresponding parts. For this reason, the description of the same or corresponding parts is omitted. 1 is different from FIG. 1 in that an LPF 200 (an example of a third filter) is provided between the A / D converter 111 and the CCDF calculation unit.
  • LPF 200 an example of a third filter
  • LPF 200 is a low-pass filter that is arranged downstream of A / D converter 111 and further band-limits the envelope signal band-limited by LPF 110.
  • the LPF 200 band-limits the envelope signal output from the A / D converter 111 and outputs the band-limited envelope signal to the CCDF calculation unit 112.
  • the envelope signal output from the A / D converter 111 is a digital signal
  • the LPF 200 is a digital filter.
  • the cut-off frequency of the LPF 200 is smaller than that of the LPF 110 and is the same as the cut-off frequency of the LPF 115.
  • the LPF 200 has the same filter characteristics as the LPF 115.
  • the LPF 200 includes an FPGA logic circuit, an ASIC, a microcomputer, and the like.
  • the operations up to the A / D converter 111 are the same as those in the first embodiment.
  • the A / D converter 111 digitizes the envelope signal band-limited by the LPF 110, and outputs the digitized envelope signal to the LPF 200.
  • the LPF 200 Since the LPF 200 has a cutoff frequency lower than the cutoff frequency of the LPF 110, it further limits the band of the envelope signal band-limited by the LPF 110. That is, the cutoff frequency Fc3 of the LPF 115 and the cutoff frequency Fc2 of the LPF 110 are in the following relationship.
  • LPF 200 outputs a band-limited envelope signal to CCDF calculation unit 112.
  • the band of the envelope signal output from the LPF 200 is the same as the band of the reference signal output from the LPF 115. If the signals input to the LPF 200 and the LPF 115 are the same, the signals output from the LPF 200 and the LPF 115 are the same.
  • Embodiment 2 since the LPF 115 and the LPF 200 are digital filters, the same filter characteristics can be realized. Thereby, when calculating the CCDF of the CCDF calculation unit 112 and the CCDF calculation unit 114, an error does not occur in the calculated CCDF due to the difference in filter characteristics. Accordingly, when the comparison unit 113 compares both CCDFs, there is no CCDF calculation error, so that it is possible to prevent the optimum value of the operation point of the operation point adjustment unit 103 from being shifted due to a difference in filter characteristics.
  • the filter characteristics of the LPF 115 and the LPF 200 are different, even if the same signal is input to the LPF 115 and the LPF 200, there is a difference between the signal that has passed through the LPF 115 and the signal that has passed through the LPF 200. There is a difference between each CCDF that is calculated.
  • the CCDFs calculated from the same signal should be the same, but an error occurs between the CCDFs, and an error occurs in the operating point adjustment in the operating point adjustment unit 103. Therefore, the operating point is not optimized, and optimal distortion compensation cannot be performed for the power amplifier 107. Therefore, if the filter characteristics of the LPF 115 and the LPF 200 are different, the accuracy of distortion compensation deteriorates.
  • FIG. 12 is a diagram showing the relationship between the CCDF error and the distortion compensation deterioration amount according to the second embodiment of the present invention.
  • FIG. 12 shows that when the CCDF error increases, the distortion compensation amount deteriorates and the distortion compensation is not performed.
  • the deterioration amount of the distortion compensation amount indicates an amount of deterioration from when the distortion compensation is ideally applied, that is, when the signal distortion is zero.
  • the degradation amount of the distortion compensation amount becomes zero.
  • the LPF 115 and the LPF 200 are configured by digital filters, and the filter characteristics are the same. Therefore, no error occurs in the CCDF value, and the optimum operating point adjustment is performed. It can be carried out.

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Amplifiers (AREA)

Abstract

Les circuits conventionnels de compensation de distorsion posent un problème d'augmentation de la consommation de puissance par le convertisseur A/N lorsque la largeur de bande du signal de transmission augmente. Le circuit de compensation de distorsion selon la présente invention comporte un détecteur qui détecte un signal d'enveloppe d'un signal de transmission qui a été amplifié par un amplificateur, un premier filtre qui limite la largeur de bande du signal d'enveloppe pour qu'elle ne soit pas supérieure à la bande de signal du signal d'enveloppe, un convertisseur A/N qui numérise le signal d'enveloppe qui a été soumis à la limitation de largeur de bande par le premier filtre, une première unité de calcul qui calcule une première distribution par rapport à l'amplitude du signal d'enveloppe numérisé, une unité de calcul de valeur absolue qui calcule la valeur absolue du signal de transmission entré dans l'amplificateur et qui émet la valeur absolue calculée en tant que signal de référence, un deuxième filtre qui limite la largeur de bande du signal de référence pour qu'elle ne soit pas supérieure à la bande de signal du signal de référence, une deuxième unité de calcul qui calcule une deuxième distribution par rapport à l'amplitude du signal de référence qui a été soumis à une limitation de largeur de bande par le deuxième filtre, une unité de comparaison qui calcule la différence entre la première distribution et la deuxième distribution, et une unité de compensation qui applique une prédistorsion au signal de transmission afin de minimiser la différence.
PCT/JP2016/055440 2016-02-24 2016-02-24 Circuit de compensation de distorsion WO2017145285A1 (fr)

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Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2008146355A1 (fr) * 2007-05-28 2008-12-04 Panasonic Corporation Compensateur de distorsion
JP2014146963A (ja) * 2013-01-29 2014-08-14 Mitsubishi Electric Corp 歪補償回路

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2008146355A1 (fr) * 2007-05-28 2008-12-04 Panasonic Corporation Compensateur de distorsion
JP2014146963A (ja) * 2013-01-29 2014-08-14 Mitsubishi Electric Corp 歪補償回路

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