WO2017128691A1 - 发射机、接收机和信号处理的方法 - Google Patents

发射机、接收机和信号处理的方法 Download PDF

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Publication number
WO2017128691A1
WO2017128691A1 PCT/CN2016/094133 CN2016094133W WO2017128691A1 WO 2017128691 A1 WO2017128691 A1 WO 2017128691A1 CN 2016094133 W CN2016094133 W CN 2016094133W WO 2017128691 A1 WO2017128691 A1 WO 2017128691A1
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Prior art keywords
signal
digital
constellation
analog
amplitude
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PCT/CN2016/094133
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English (en)
French (fr)
Inventor
黄浩
赵磊
段博
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华为技术有限公司
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Priority to EP16887569.8A priority Critical patent/EP3404883B1/en
Publication of WO2017128691A1 publication Critical patent/WO2017128691A1/zh
Priority to US16/045,725 priority patent/US10594538B2/en

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/32—Carrier systems characterised by combinations of two or more of the types covered by groups H04L27/02, H04L27/10, H04L27/18 or H04L27/26
    • H04L27/34—Amplitude- and phase-modulated carrier systems, e.g. quadrature-amplitude modulated carrier systems
    • H04L27/345—Modifications of the signal space to allow the transmission of additional information
    • H04L27/3461—Modifications of the signal space to allow the transmission of additional information in order to transmit a subchannel
    • H04L27/3472—Modifications of the signal space to allow the transmission of additional information in order to transmit a subchannel by switching between alternative constellations
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
    • H04B10/50—Transmitters
    • H04B10/516—Details of coding or modulation
    • H04B10/54—Intensity modulation
    • H04B10/541—Digital intensity or amplitude modulation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
    • H04B10/60—Receivers
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/32—Carrier systems characterised by combinations of two or more of the types covered by groups H04L27/02, H04L27/10, H04L27/18 or H04L27/26
    • H04L27/34—Amplitude- and phase-modulated carrier systems, e.g. quadrature-amplitude modulated carrier systems
    • H04L27/36—Modulator circuits; Transmitter circuits
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/32—Carrier systems characterised by combinations of two or more of the types covered by groups H04L27/02, H04L27/10, H04L27/18 or H04L27/26
    • H04L27/34—Amplitude- and phase-modulated carrier systems, e.g. quadrature-amplitude modulated carrier systems
    • H04L27/36—Modulator circuits; Transmitter circuits
    • H04L27/361—Modulation using a single or unspecified number of carriers, e.g. with separate stages of phase and amplitude modulation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/32—Carrier systems characterised by combinations of two or more of the types covered by groups H04L27/02, H04L27/10, H04L27/18 or H04L27/26
    • H04L27/34—Amplitude- and phase-modulated carrier systems, e.g. quadrature-amplitude modulated carrier systems
    • H04L27/38—Demodulator circuits; Receiver circuits
    • H04L27/389—Demodulator circuits; Receiver circuits with separate demodulation for the phase and amplitude components
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/18—Phase-modulated carrier systems, i.e. using phase-shift keying
    • H04L27/20—Modulator circuits; Transmitter circuits
    • H04L27/2096—Arrangements for directly or externally modulating an optical carrier
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/18—Phase-modulated carrier systems, i.e. using phase-shift keying
    • H04L27/22—Demodulator circuits; Receiver circuits
    • H04L27/223—Demodulation in the optical domain

Definitions

  • the present invention relates to the field of optical communications and, more particularly, to a transmitter, receiver and method of signal processing.
  • Quadrature Amplitude Modulation is a combination of orthogonal carrier modulation technology and multi-level amplitude keying. It has high frequency band utilization and is widely used in optical communication, broadband wireless communication and digital limited TV transmission. field.
  • the square 16-QAM modulation scheme adopted by the existing optical communication system is high in cost, large in power consumption, and high in system complexity, and is difficult to implement.
  • Embodiments of the present invention provide a transmitter, a receiver, and a signal processing method, which can reduce the complexity, power consumption, and cost of a communication system.
  • a transmitter comprising a constellation mapper 310, a signal conversion module 320, a digital signal processor 330, and a digital to analog converter 340; the constellation mapper 310 for determining a bit stream and a pole a mapping relationship of the constellation points in the coordinate, and generating a constellation symbol data stream according to the mapping relationship; the signal conversion module 320 is configured to convert the constellation symbol data stream into an amplitude signal and a phase signal, wherein the amplitude signal is 2 a flat analog signal, the phase signal is an 8-level digital signal; the digital signal processor 330 is configured to perform digital signal processing on the phase signal to generate a multi-level digital signal; the digital-to-analog converter 340 is configured to The multilevel digital signal is converted into a multilevel analog signal.
  • the star 16-QAM signal is split into two parts: an amplitude signal (ie, a 2-level analog signal) and a phase signal (ie, an 8-level digital signal) in a polar coordinate system.
  • the amplitude signal is directly input to the saturation driver for amplification.
  • the phase signal is processed by the digital signal processor, a multi-level digital signal is generated, and the DAC converts the multi-level digital signal into a continuous multi-level analog signal to complete signal processing, which reduces the digital signal processor compared to the prior art.
  • the computational complexity reduces the number and power consumption of digital to analog converters.
  • the transmitter of the embodiment of the present invention can reduce the computational complexity of the digital signal processor by mapping the bit stream into a constellation symbol data stream in polar coordinates and converting the constellation symbol data stream into an amplitude signal and a phase signal. Reduce the number and power consumption of digital-to-analog converters to achieve low-power, low-complexity, and low-cost communication.
  • the transmitter further includes: a saturation driver 350 for performing saturation amplification on the amplitude signal; and a linear driver 360 for the multi-level
  • the analog signal is linearly amplified; the optical transmitter front end module 370 is configured to convert the saturated amplified amplitude signal and the linearly amplified multilevel analog signal into an optical signal.
  • the multi-level analog signal is amplified by a linear driver, and the amplitude signal is amplified by a saturation driver, thereby driving the front end of the optical transmitter to convert the amplitude-amplified amplitude signal and the linearly amplified multi-level analog signal into Optical signal.
  • the present invention changes a linear driver to a saturated driver. Under the same swing condition, the saturated driver reduces power consumption by at least 30% compared with the linear driver. Therefore, the transmitter of the embodiment of the present invention can reduce communication. Power consumption.
  • the transmitter further includes: a radio frequency transmitter front end module 380, configured to convert the amplitude signal and the multi-level analog signal into a radio frequency signal.
  • the transmitter can be applied to the field of wireless communication, and the transmitter processes the bit stream to generate an amplitude signal and a multi-level analog signal, and the RF transmitter front end module converts the amplitude signal and the multi-level analog signal into a radio frequency signal.
  • the RF transmitter front end module converts the amplitude signal and the multi-level analog signal into a radio frequency signal.
  • Embodiments of the present invention are capable of reducing the computational complexity of digital signal processors and reducing the number and power consumption of analog to digital converters.
  • the constellation mapper 310 is specifically configured And: adjusting a mapping relationship between the bit stream and the constellation point, so that the constellation decider can expand the decision area.
  • Each symbol and period of the star 16-QAM transmits 4 bits, that is, the four bits b1, b2, b3, and b4 are mapped into one symbol, assuming that the highest bit b1 is used to select the amplitude R1, R2, using [b2, b3, b4
  • the eight combinations of three bits select eight phases 0, ⁇ /4, ⁇ /2, 3 ⁇ /4, ⁇ , 5 ⁇ /4, 3 ⁇ /2, 7 ⁇ /4.
  • the receiver can obtain the decision region according to the mapping position of the constellation point when receiving the signal.
  • the minimum decision phase difference of the constellation point mapping is ⁇ /4, and the minimum decision area of the corresponding receiving end is
  • the minimum decision phase difference of the constellation point may be ⁇ /2 by adjusting the mapping position of the constellation point, and the minimum decision area of the corresponding receiving end is Thereby, the bit error rate can be reduced and the communication performance can be improved.
  • a receiver comprising a signal determiner 410, an analog to digital converter 420, a digital signal processor 430, a signal conversion module 440, and a constellation determiner 450; Determining the received first amplitude signal to generate a 2-level analog signal; the analog-to-digital converter 420 is configured to convert the received first phase signal to generate a multi-level digital signal, wherein the first The phase signal is a multi-level analog signal; the digital signal processor 430 is configured to convert the multi-level digital signal into an 8-level digital signal; the signal conversion module 440 is configured to use the 2-level analog signal and the The 8-level digital signal is converted to a constellation symbol data stream in polar coordinates; the constellation determiner 450 is configured to convert the constellation symbol data stream into a bit stream.
  • the signal determiner 410 of the receiver can determine the received amplitude signal to restore the original 2-level amplitude signal; and the ADC can receive the signal.
  • the phase signal is converted into a multi-level digital signal, and then the multi-level digital signal is converted into an 8-level digital signal by an equalization operation of the digital signal processor, and then the 8-level digital signal and the signal conversion module
  • the level analog signal is converted into a constellation symbol data stream in polar coordinates, and finally the constellation decider converts the constellation symbol data stream into a bit stream.
  • the receiver reduces the computational complexity of the digital signal processor, reduces the number of analog to digital converters, and consumes power compared to the prior art.
  • the receiver of the embodiment of the invention can reduce the computational complexity of the digital signal processor, reduce the number of analog to digital converters and power consumption, thereby achieving the purpose of low power consumption, low complexity and low cost communication.
  • the receiver further includes: an optical receiver front end module 460, configured to convert the optical signal into the second amplitude signal and the second phase a signal; a saturated transimpedance amplifier 470 for saturating the second amplitude signal to generate the first amplitude signal; and a linear transimpedance amplifier 480 for linearly amplifying the second phase signal to generate the first phase signal.
  • an optical receiver front end module 460 configured to convert the optical signal into the second amplitude signal and the second phase a signal
  • a saturated transimpedance amplifier 470 for saturating the second amplitude signal to generate the first amplitude signal
  • a linear transimpedance amplifier 480 for linearly amplifying the second phase signal to generate the first phase signal.
  • the receiver can be applied to an optical communication system, and the front end of the receiver receives the optical signal and converts the optical signal into an electrical signal.
  • the electrical signal includes two paths, a second amplitude signal and a second phase signal.
  • the saturated transimpedance amplifier amplifies the second amplitude signal and determines a 2-level digital signal by the signal determiner.
  • the linear transimpedance amplifier amplifies the second phase signal and sends it to the analog to digital converter.
  • the present invention changes a linear transimpedance amplifier to a saturated transimpedance amplifier. Under the same swing condition, the saturated transimpedance amplifier reduces the power consumption by at least 30% compared with the linear transimpedance amplifier. Therefore, the present invention
  • the receiver of an embodiment can reduce the power consumption of communication.
  • the receiver further includes: a radio frequency receiver front end module 490, configured to convert the radio frequency signal into the first amplitude signal and the first phase signal .
  • the transmitter can be applied to the field of wireless communication, and the RF receiver front end module converts the received RF signal to generate an amplitude signal (ie, a first amplitude signal) and a phase signal (ie, a first phase signal). Transmitting the first amplitude signal and the first amplitude signal to the receiver can reduce the computational complexity of the digital signal processor and reduce the number and power consumption of the analog to digital converter.
  • a method of signal processing is provided, the method being performed by a module of the transmitter of the first aspect or any of the possible implementations of the first aspect.
  • the present application provides a method of signal processing, the method being performed by a module of a receiver of the second aspect or any of the possible implementations of the second aspect.
  • a transmitter including: a processor and a memory;
  • the memory stores a program, the processor executing the program for performing the signal processing method of the first aspect or any of the possible implementations of the first aspect.
  • a receiver comprising: a processor and a memory.
  • the memory stores a program, the processor executing the program for performing the signal processing method of any of the above-described second aspect or the second aspect of the second aspect.
  • the transmitter, the receiver, and the signal processing method of the embodiments of the present invention can reduce the computational complexity of the digital signal processor, reduce the number of digital-to-analog converters and analog-to-digital converters, thereby achieving low power
  • FIG. 1 is a schematic diagram of a prior art communication system
  • FIG. 2 is a schematic diagram of a specific embodiment of a prior art communication system
  • FIG. 3 is a schematic illustration of a transmitter in accordance with one embodiment of the present invention.
  • FIG. 4 is a schematic diagram of a receiver according to an embodiment of the present invention.
  • FIG. 5 is a schematic illustration of a communication system in accordance with one embodiment of the present invention.
  • Figure 6 is a schematic diagram of a constellation diagram of an embodiment of the present invention.
  • Figure 7 is a schematic diagram of a constellation diagram of another embodiment of the present invention.
  • Figure 8 is a schematic diagram of a constellation diagram of another embodiment of the present invention.
  • Figure 9 is a schematic illustration of a communication system in accordance with another embodiment of the present invention.
  • FIG. 10 is a schematic flowchart of a method of signal processing according to an embodiment of the present invention.
  • FIG. 11 is a schematic flowchart of a method of signal processing according to another embodiment of the present invention.
  • FIG. 12 is a schematic structural diagram of a transmitter according to an embodiment of the present invention.
  • Figure 13 is a block diagram showing the structure of a receiver in accordance with another embodiment of the present invention.
  • the communication system 100 shown in FIG. 1 includes: a constellation mapper, a Transmitter Digital Signal Processor (TxDSP), two digital to analog converters (DACs), and two linear drivers.
  • TxDSP Transmitter Digital Signal Processor
  • DACs digital to analog converters
  • linear drivers Linear Driver, Linear DRV
  • RxDSP Receiver Digital Signal Processor
  • ADC Analog to Digital Converter
  • RxDSP Receiveiver Digital Signal Processor
  • RxDSP Receiveiver Digital Signal Processor
  • the constellation mapper 110 is capable of performing serial-to-parallel conversion of the bit stream and mapping the bit stream to the constellation point to generate a constellation symbol data stream, for example, 16-QAM modulation, and 4 bits (0101) are mapped to 1 point on the constellation point. It can be expressed as a complex number 1+j*3.
  • the digital signal processor 120 performs digital signal processing on the I and Q signals (or I+jQ complex signals) to generate a multilevel signal;
  • DAC 130 converts the digital signal into an analog signal
  • a linear driver 140 linearly amplifies the analog signal to drive the front end of the optical transmitter
  • the optical transmitter front end module 150 performs the conversion of the electrical signal to the optical signal, and then transmits the optical signal through the transmission medium.
  • the transmission medium may be an optical fiber, or may be a free space or the like;
  • the optical receiver front end module 160 performs conversion of the optical signal to the electrical signal
  • a linear transimpedance amplifier 170 that linearly amplifies the received analog signal
  • ADC 180 converts the received analog signal into a digital signal
  • the digital signal processor 190 performs the receiving digital signal processing on the I channel and the Q channel receiving signal (or the I+jQ complex signal);
  • the constellation decider 200 performs a constellation point decision to complete the parallel conversion of the bit stream.
  • 16-QAM is a QAM modulation scheme that includes 16 symbols.
  • 16-QAM signal with 16 samples each sample represents a vector state
  • 16-QAM has 16 states
  • each 4-bit binary number specifies one state in 16 states
  • 16-QAM defines 16 states.
  • a combination of carrier and phase, each symbol and period of 16-QAM transmits 4 bits.
  • the constellation points of "constellation point mapping” and “constellation point decision” are as shown in Fig. 2.
  • the square 16-QAM signal is split into two parts, the real part (I-way signal) and the imaginary part (Q-channel signal), in Cartesian coordinates, which are 4-level signals.
  • a digital signal processor a digital signal processor at the transmitting end, which may also be referred to as a "transmitting digital signal processor”
  • both the I signal and the Q signal become multi-level signals, which are converted by the DAC to generate continuous
  • the multi-level analog signal is then amplified by a linear driver to drive the optical transmitter to emit an optical signal, thereby converting the bit stream into an optical signal, so that the transmission capacity is increased and the transmission distance is further.
  • the optical receiver receives the optical signal and converts the optical signal into a continuous analog signal, which is amplified by a linear transimpedance amplifier and then converted into a digital signal by the ADC module.
  • the I signal and the Q signal The road signals are all multi-level digital signals.
  • Digital signal processor may also be referred to as a "receiving end digital signal processor" to restore both the I and Q signals to a level of 4, and finally to convert the constellation point decision into a constellation symbol data stream, and then the constellation symbol data stream Convert to a bitstream.
  • the digital signal processor processes the I channel signal and the Q channel signal
  • the I+jQ complex signal may be digital signal processed, or the independent digital signal processing may be performed on the I channel signal and the Q channel signal respectively. (ie, digital signal processing can be performed on two independent real signals).
  • FIG. 3 shows a schematic diagram of a transmitter 300 in accordance with an embodiment of the present invention.
  • the transmitter 300 includes a constellation mapper 310, a signal conversion module 320, a digital signal processor 330, and a digital to analog converter 340;
  • the constellation mapper 310 is configured to determine a mapping relationship between the bit stream and the constellation points in the polar coordinates, and generate a constellation symbol data stream according to the mapping relationship;
  • the signal conversion module 320 is configured to convert the constellation symbol data stream into an amplitude signal and a phase signal, wherein the amplitude signal is a 2-level analog signal, and the phase signal is an 8-level digital signal;
  • the digital signal processor 330 is configured to perform digital signal processing on the phase signal to generate a multi-level digital signal
  • the digital to analog converter 340 is configured to convert the multilevel digital signal into a multilevel analog signal.
  • the star 16-QAM signal is split into two parts, an amplitude signal (2 levels) and a phase signal (8 levels), in a polar coordinate system.
  • a phase signal is processed by the digital signal processor, a multilevel signal is generated, and the DAC converts the multilevel signal into a continuous analog signal.
  • the processed signal is converted into an optical signal or a radio frequency signal, etc., thereby having the advantages of large transmission capacity and long transmission distance.
  • the transmitter of the embodiment of the present invention can reduce the computational complexity of the digital signal processor by mapping the bit stream into a constellation symbol data stream in polar coordinates and converting the constellation symbol data stream into an amplitude signal and a phase signal. And reduce the number and power consumption of digital-to-analog converters to achieve low-power, low-complexity, and low-cost communication.
  • the transmitter 300 further includes:
  • a saturation driver 350 configured to perform saturation amplification on the amplitude signal
  • a linear driver 360 for linearly amplifying the multilevel analog signal
  • the optical transmitter front end module 370 is configured to convert the saturated amplified amplitude signal and the linearly amplified multi-level analog signal into an optical signal.
  • a multi-level analog signal is amplified by a linear driver, and an amplitude signal is amplified by a saturation driver, thereby driving a saturation amplified amplitude signal and a linearly amplified multi-level simulation at the front end of the optical transmitter.
  • the signal is converted to an optical signal.
  • the present invention changes a linear driver to a saturated driver. Under the same swing condition, the saturated driver reduces power consumption by at least 30% compared with the linear driver. Therefore, the transmitter of the embodiment of the present invention can reduce communication. Power consumption.
  • the transmitter 300 further includes:
  • the RF transmitter front end module 380 is configured to convert the amplitude signal and the multilevel analog signal into a radio frequency signal.
  • the transmitter can be applied to the field of wireless communication, and the transmitter processes the signal to generate an amplitude signal and a multi-level analog signal, and the RF transmitter front-end module converts the amplitude signal and the multi-level analog signal into RF signals for large capacity and long distance transmission.
  • Embodiments of the present invention are capable of reducing the computational complexity of digital signal processors and reducing the number and power consumption of digital to analog converters.
  • the transmission medium of the radio frequency signal may be a free space, which is not limited by the present invention.
  • the constellation mapper 310 is specifically configured to: adjust a mapping relationship between the bit stream and the constellation point, so that the constellation decider can expand the decision region.
  • Each symbol and period of the star 16-QAM transmits 4 bits, that is, the four bits b1, b2, b3, and b4 are mapped into one symbol, assuming that the highest bit b1 is used to select the amplitude R1, R2, using [b2, b3, b4
  • the eight combinations of three bits select eight phases 0, ⁇ /4, ⁇ /2, 3 ⁇ /4, ⁇ , 5 ⁇ /4, 3 ⁇ /2, 7 ⁇ /4.
  • the receiver can obtain the decision region according to the mapping position of the constellation point when receiving the signal.
  • the minimum decision phase difference of the constellation point mapping is ⁇ /4, and the minimum decision area of the corresponding receiving end is
  • the minimum decision phase difference of the constellation point may be ⁇ /2 by adjusting the mapping position of the constellation point, and the minimum decision area of the corresponding receiving end is Thereby, the bit error rate can be reduced and the communication performance can be improved.
  • the transmitter of the embodiment of the present invention can reduce the number by mapping the bit stream into a constellation symbol data stream in polar coordinates and converting the constellation symbol data stream into an amplitude signal and a phase signal.
  • the computational complexity of the word signal processor reduces the number and power consumption of the digital to analog converters, thereby achieving low power consumption, low complexity, and low cost communication.
  • the size of the sequence numbers of the above processes does not mean the order of execution, and the order of execution of each process should be determined by its function and internal logic, and should not be directed to the embodiments of the present invention.
  • the implementation process constitutes any limitation.
  • FIG. 4 shows a schematic diagram of a receiver 400 in accordance with an embodiment of the present invention.
  • the receiver 500 includes a signal determiner 410, an analog to digital converter 420, a digital signal processor 430, a signal conversion module 440, and a constellation determiner 450;
  • the signal determiner 410 is configured to determine the received first amplitude signal to generate a 2-level analog signal
  • the analog-to-digital converter 420 is configured to convert the received first phase signal to generate a multi-level digital signal, wherein the first phase signal is a multi-level analog signal;
  • the digital signal processor 430 is configured to convert the multilevel digital signal into an 8-level digital signal
  • the signal conversion module 440 is configured to convert the 2-level analog signal and the 8-level digital signal into a constellation symbol data stream in polar coordinates;
  • the constellation determiner 450 is configured to convert the constellation symbol data stream into a bit stream.
  • the signal of the optical signal is deviated during transmission due to noise or other factors, and the signal determiner 410 of the receiver can determine the received amplitude signal to restore the original 2-level analog signal;
  • the ADC can convert the received phase signal into a multi-level digital signal, and then restore the multi-level digital signal to the original 8-level digital signal by the equalization operation of the digital signal processor, and then the signal conversion module will
  • the level digital signal and the 2-level analog signal are converted into a constellation symbol data stream in polar coordinates, and finally the constellation decider converts the constellation symbol data stream into a bit stream.
  • the receiver reduces the computational complexity of the digital signal processor and reduces the number and power consumption of the analog to digital converter compared to the prior art.
  • the receiver of the embodiment of the invention can reduce the computational complexity of the digital signal processor, reduce the number of analog to digital converters and power consumption, thereby achieving the purpose of low power consumption, low complexity and low cost communication.
  • the receiver 400 further includes:
  • An optical receiver front end module 460 configured to convert the optical signal into a second amplitude signal and a second phase signal
  • a saturated transimpedance amplifier 470 configured to saturate the second amplitude signal to generate the first amplitude signal
  • the linear transimpedance amplifier 480 is configured to linearly amplify the second phase signal to generate the first phase signal.
  • the receiver can be applied to an optical communication system, and the front end of the receiver receives the optical signal and converts the optical signal into an electrical signal.
  • the electrical signal includes two paths, a second amplitude signal and a second phase signal.
  • the saturated transimpedance amplifier amplifies the second amplitude signal to generate a first amplitude signal
  • the linear transimpedance amplifier amplifies the second phase signal to generate a first phase signal.
  • the present invention changes a linear transimpedance amplifier to a saturated transimpedance amplifier. Under the same swing condition, the saturated transimpedance amplifier reduces the power consumption by at least 30% compared with the linear transimpedance amplifier. Therefore, the present invention
  • the receiver of an embodiment can reduce the power consumption of communication.
  • the receiver 400 further includes:
  • the RF receiver front end module 490 is configured to convert the RF signal into the first amplitude signal and the first phase signal.
  • the transmitter can be applied to the field of wireless communication, and the RF receiver front end module converts the received RF signal to generate an amplitude signal (ie, a first amplitude signal) and a phase signal (ie, a first phase signal).
  • the RF receiver front end module converts the received RF signal to generate an amplitude signal (ie, a first amplitude signal) and a phase signal (ie, a first phase signal).
  • Transmitting the first amplitude signal and the first amplitude signal to the receiver can reduce the computational complexity of the digital signal processor and reduce the number and power consumption of the analog to digital converter.
  • the receiver of the embodiment of the invention can reduce the computational complexity of the digital signal processor, reduce the number of analog to digital converters and power consumption, thereby achieving the purpose of low power consumption, low complexity and low cost communication.
  • the size of the sequence numbers of the above processes does not mean the order of execution, and the order of execution of each process should be determined by its function and internal logic, and should not be directed to the embodiments of the present invention.
  • the implementation process constitutes any limitation.
  • FIG. 5 shows a schematic diagram of a communication system 500 in accordance with an embodiment of the present invention.
  • the communication system 500 includes a constellation mapper 310, a signal conversion module 320, a digital signal processor 330, a digital to analog converter 340, a saturation driver 350, a linear driver 360, an optical transmitter front end module 370, an optical receiver front end module 460, and saturation.
  • the transmitter and receiver of the present invention can be applied to the field of optical communications as well as to the field of wireless communications.
  • the following embodiments are described by taking the field of optical communication as an example, but the present invention is not limited thereto.
  • the meanings of the various terms in this embodiment are the same as those of the foregoing embodiments.
  • the constellation mapper 310 determines a mapping relationship between the bit stream and constellation points in polar coordinates, and generates a constellation symbol data stream according to the mapping relationship.
  • the constellation mapper maps the bit stream to a constellation point in a constellation diagram (shown in FIG. 6) in polar coordinates to obtain a complex form constellation symbol data stream.
  • the complex expression of the constellation symbol data stream is:
  • mapping a bitstream to a constellation point can be as shown in Figure 7a.
  • the rightmost point of the outer ring shown in Figure 7a is 0000 (binary), which is 0 in decimal; the rightmost point of the inner circle is 1000 (binary), which is 8 in decimal; the distribution of constellation points is counterclockwise.
  • the signal conversion module 320 is configured to convert the constellation symbol data stream into an amplitude signal (which may be referred to as an “A channel signal”) and a phase signal (which may be referred to as a “P channel signal”), wherein the amplitude signal It is a 2-level analog signal, which is an 8-level digital signal.
  • the signal conversion module represents the complex expression of the constellation symbol data stream as the form of amplitude (A) and phase (P):
  • the value of the A signal can be:
  • V 1-pp is the peak-to-peak value of the input signal of the saturated driver.
  • the value of the P channel signal can be:
  • V 2-pp is the peak-to-peak value of the input signal of the linear driver.
  • V 1-pp or V 2-pp is a reference value. If the transmitter is used in the field of wireless communication, the reference value may select a relevant parameter of the radio frequency transmitter, which is not limited by the present invention.
  • the constellation mapper 310 is specifically configured to:
  • mapping relationship between the bit stream and the constellation point is adjusted to enable the constellation decider to expand the decision region.
  • each symbol and period of the star 16-QAM transmits 4 bits, that is, four bits b1, b2, b3, and b4 are mapped into one symbol, and it is assumed that the highest bit b1 is used to select the amplitude (R1, R2). ), use eight combinations of three bits of [b2, b3, b4] to select eight phases (0, ⁇ /4, ⁇ /2, 3 ⁇ /4, ⁇ , 5 ⁇ /4, 3 ⁇ /2, 7 ⁇ /4 ).
  • the receiver can obtain the decision region according to the mapping position of the constellation point when receiving the signal, as shown in Figures 7(a), 7(b) and 7(c), the shaded part in the figure is For the judgment area.
  • the larger the decision area is the better the communication performance is. For example, there is a bit error rate in the communication process.
  • the decision of the first bit 'b1' is determined by the amplitude (R1, R2), and the second, third, and fourth bits [b2, b3, b4] are judged by different phase regions.
  • the difference is ⁇ /2;
  • the minimum decision phase difference of the constellation point is ⁇ /2 by adjusting the mapping relationship between the bit stream and the constellation point, and the minimum decision area of the corresponding receiving end is Thereby improving the performance of communication.
  • it is represented by a decimal number of 0-15, and is inversely represented as 0, 2, 3, 1, 5, 7 from 0. 6,6,8,10,11,9,13,15,14,12.
  • the minimum decision phase difference is ⁇ /2
  • the minimum decision area of the corresponding receiving end is
  • the constellation point mapping with a minimum decision phase difference of ⁇ /2 may also have the following scheme:
  • the embodiment of the present invention does not limit the resolution of the decision phase difference and the constellation point.
  • the digital signal processor 330 is configured to perform digital signal processing on the phase signal to generate a multi-level digital signal.
  • the input/output data of the digital signal processor of the transmitter is a real number, and the internal processing algorithm can be simplified to real number processing.
  • the prior art digital signal processor may perform digital signal processing on the I+jQ complex signal, or may perform independent digital signal processing on the I channel signal and the Q channel signal, respectively.
  • the digital signal processor of the embodiment of the present invention only operates on real numbers, which significantly reduces the computational complexity.
  • the real number calculation is performed on the I channel signal and the Q channel signal respectively.
  • the phase signal is subjected to the real number operation, and the computational complexity can still be reduced. Since the digital signal processor occupies more transistor resources, the chip area is large and the cost is high, and the reduction of one signal using the digital signal processor can reduce the power consumption by 50%.
  • x I , y I and x Q , y Q are the real and imaginary parts of the complex x, y, respectively; i is an imaginary unit.
  • the one-time complex multiplication includes four real multiplications and two real additions.
  • the one-time complex addition includes two real-number additions.
  • the complexity of the "digital signal processor 330” is less than the complexity of the "digital signal processor 120". half.
  • the digital signal processor may be device bandwidth pre-compensation, device/link nonlinear pre-compensation, and fiber dispersion pre-compensation, etc., which is not limited by the present invention.
  • the digital to analog converter 340 is configured to convert the multilevel digital signal into a multilevel analog signal.
  • the DAC converts the multilevel signal into a continuous analog signal, completes the processing of the signal, and prepares for the long-distance transmission of the signal.
  • the present invention uses only one signal to use a digital-to-analog converter, which reduces the number of digital-to-analog converters used, resulting in a 50% reduction in cost and power consumption.
  • the transmitter of the embodiment of the invention can reduce the computational complexity of the digital signal processor, reduce the number and power consumption of the digital-to-analog converter, thereby achieving the purpose of low power consumption, low complexity, and low-cost communication.
  • the saturation driver 350 is configured to perform saturation amplification on the amplitude signal, thereby driving the front end of the optical transmitter to convert the amplitude signal after saturation amplification into an optical signal.
  • a linear driver 360 is used to linearly amplify the multilevel analog signal.
  • the embodiment of the present invention changes a linear driver to a saturated driver. Under the same swing condition, the saturated driver reduces power consumption by at least 30% compared with the linear driver. Therefore, the transmitter of the embodiment of the present invention can Reduce the power consumption of communication.
  • the optical transmitter front end module 370 is configured to convert the saturated amplified amplitude signal and the linearly amplified multi-level analog signal into an optical signal. Converting a bit stream into an optical signal enables an increase in signal transmission capacity and a longer transmission distance.
  • the transmission medium of the optical signal may be an optical fiber, or may be through a free space or the like, which is not limited by the present invention.
  • the optical receiver front end module 460 is configured to convert the optical signal into the second amplitude signal and the second phase signal; the receiver can be applied to the optical communication system, and the front end of the receiver receives the optical signal, and converts the optical signal into electricity. signal.
  • the electrical signal includes two paths, a second amplitude signal and a second phase signal.
  • a saturated transimpedance amplifier 470 is configured to saturate the second amplitude signal to generate a first amplitude signal, and a linear transimpedance amplifier 480 for linearly linearizing the second phase signal Amplify to generate a first phase signal.
  • the saturated transimpedance amplifier amplifies the amplitude signal and sends it to the signal determiner.
  • the linear transimpedance amplifier amplifies the phase signal and sends it to the analog-to-digital converter.
  • the signal determiner 410 is configured to determine the first amplitude signal to generate a 2-level analog signal.
  • the signal determiner 410 of the receiver can determine the received amplitude signal to restore the original 2-level amplitude signal.
  • the output signal level of the signal determiner is set to V det1
  • the output of the signal determiner The signal level is set to V det2 .
  • V det1 , V det2 are determined according to the actual application of the circuit.
  • the analog-to-digital converter 420 is configured to convert the first phase signal to generate a multi-level digital signal, wherein the first phase signal is a multi-level analog signal.
  • the first phase signal only one signal (i.e., the first phase signal) uses an analog-to-digital converter, which reduces the number of analog-to-digital converters used, resulting in a 50% reduction in cost and power.
  • the digital signal processor 430 is configured to convert the multilevel digital signal into an 8-level digital signal.
  • the ADC can convert the received first phase signal into a multi-level digital signal, and then convert the multi-level digital signal into an 8-level digital signal by an equalization operation of the digital signal processor or the like.
  • only one channel signal ie, multi-level digital signal
  • real number operation which can reduce computational complexity.
  • the signal conversion module 440 is configured to convert the 2-level analog signal and the 8-level digital signal into a constellation symbol data stream in polar coordinates.
  • the algorithm of the signal conversion module at the receiving end and the algorithm of the signal conversion module at the transmitting end are inversely operated with each other. E.g,
  • the digital signal processor at the receiving end can restore the phase signal data to 8 levels:
  • V RxP is the maximum value of the digital signal processor output signal.
  • the terminating signal X Rx16QAM can be obtained from the equations (8) and (9).
  • the constellation determiner 450 is configured to convert the constellation symbol data stream into a bit stream.
  • the signal conversion module converts the 8-level digital signal and the 2-level analog signal into a constellation symbol data stream in polar coordinates, and finally the constellation decider converts the constellation symbol data stream into a bit stream.
  • the receiver of the embodiment of the invention can reduce the computational complexity of the digital signal processor, reduce the number of analog to digital converters and power consumption, thereby achieving the purpose of low power consumption, low complexity and low cost communication.
  • the size of the sequence numbers of the above processes does not mean the order of execution, and the order of execution of each process should be determined by its function and internal logic, and should not be directed to the embodiments of the present invention.
  • the implementation process constitutes any limitation.
  • FIG. 9 shows a schematic diagram of a communication system 700 in accordance with another embodiment of the present invention.
  • the communication system 700 includes a constellation mapper 310, a signal conversion module 320, a digital signal processor 330, a digital to analog converter 340, a radio frequency transmitter front end module 380, a radio frequency receiver front end module 490, a signal decision unit 410, and an analog to digital converter.
  • a digital signal processor 430, a signal conversion module 440, and a constellation determiner 450 are examples of signals.
  • the transmitter and receiver of the present invention can be applied to the field of wireless communications.
  • the following embodiments are described by taking the field of wireless communication as an example, but the present invention is not limited thereto.
  • the meanings of the various terms in this embodiment are the same as those of the foregoing embodiments.
  • the constellation mapper 310 determines a mapping relationship between the bit stream and the constellation points in polar coordinates, and generates a constellation symbol data stream according to the mapping relationship, and the signal conversion module 320 splits the constellation symbol data stream into an amplitude signal in a polar coordinate system (2) Level) and phase signal (8 level) are two parts. After the phase signal is processed by the digital signal processor 330, a multilevel digital signal is generated, and the digital to analog converter 340 converts the multilevel digital signal into a continuous multilevel analog signal.
  • the RF transmitter front end module 380 converts the amplitude signal and the multilevel analog signal into a radio frequency signal to achieve high capacity and long range transmission.
  • Embodiments of the present invention are capable of reducing the computational complexity of digital signal processors and reducing the number and power consumption of digital to analog converters.
  • the RF receiver front end module 490 converts the received RF signal into a first amplitude signal and a first phase signal.
  • the signal of the radio frequency signal is deviated due to noise or other factors during transmission, and the signal determiner 410 of the receiver can judge the received first amplitude signal to restore the original 2-level amplitude signal; and the analog digital
  • the converter 420 can convert the received first phase signal into a multi-level digital signal, and then convert the multi-level digital signal into an 8-level digital signal by a pre-compensation operation of the digital signal processor 430, and then the signal
  • the conversion module 440 converts the 8-level digital signal and the 2-level analog signal into a constellation symbol data stream in polar coordinates, and finally the star
  • the seat determiner 450 converts the constellation symbol data stream into a bit stream.
  • the embodiments of the present invention reduce the computational complexity of the digital signal processor, reduce the number of analog to digital converters, and reduce power consumption.
  • the size of the sequence numbers of the above processes does not mean the order of execution, and the order of execution of each process should be determined by its function and internal logic, and should not be directed to the embodiments of the present invention.
  • the implementation process constitutes any limitation.
  • a transmitter and a receiver according to an embodiment of the present invention are described in detail above with reference to FIG. 3, FIG. 4 to FIG. 9, and a method of signal processing according to an embodiment of the present invention will be described in detail below with reference to FIGS. 10 and 11.
  • FIG. 10 shows a schematic flow diagram of a method 900 of signal processing in accordance with an embodiment of the present invention.
  • the method 900 of signal processing is applied to a transmitter, the transmitter including a constellation mapper, a signal conversion module, A digital signal processor, a digital to analog converter, the method 900 of signal processing includes:
  • the constellation mapper determines a mapping relationship between a bit stream and a constellation point in polar coordinates
  • the constellation mapper generates a constellation symbol data stream according to the mapping relationship.
  • the signal conversion module converts the constellation symbol data stream into an amplitude signal and a phase signal, wherein the amplitude signal is a 2-level analog signal, and the phase signal is an 8-level digital signal;
  • the digital signal processor performs digital signal processing on the phase signal to generate a multi-level digital signal
  • the digital to analog converter converts the multilevel digital signal into a multilevel analog signal.
  • the signal processing method of the embodiment of the present invention can reduce the calculation of the digital signal processor by mapping the bit stream into a constellation symbol data stream in polar coordinates and converting the constellation symbol data stream into an amplitude signal and a phase signal.
  • the complexity, reduced number of digital-to-analog converters, and power consumption achieve low power consumption, low complexity, and low cost, thereby improving communication performance.
  • the method 900 further includes:
  • the saturation driver saturates the amplitude signal
  • the linear driver linearly amplifies the multilevel analog signal
  • the optical transmitter front end module converts the amplitude-amplified amplitude signal and the linearly amplified multi-level analog signal into an optical signal.
  • the method 900 further includes:
  • the RF transmitter front end module converts the amplitude signal and the multilevel analog signal into a radio frequency signal number.
  • the constellation mapper determines a mapping relationship between the bit stream and the constellation points in the polar coordinates, including:
  • the constellation mapper adjusts the mapping relationship between the bit stream and the constellation point to enable the constellation decider to expand the decision region.
  • the signal processing method of the embodiment of the present invention can reduce the calculation of the digital signal processor by mapping the bit stream into a constellation symbol data stream in polar coordinates and converting the constellation symbol data stream into an amplitude signal and a phase signal. Complexity reduces the number and power consumption of digital-to-analog converters, resulting in low-power, low-complexity, and low-cost communication.
  • the method 900 of signal processing in accordance with embodiments of the present invention may correspond to the executive body of the transmitter 300 of the embodiments of the present invention, and that the foregoing and other operations and/or functions of the various modules in the transmitter 300 are respectively implemented to achieve the above. The corresponding steps of each method are not repeated here for brevity.
  • FIG. 11 shows a schematic flow diagram of a method 1100 of signal processing in accordance with an example of the present invention, the method 1100 being applied to a receiver 400, the receiver including a signal determiner, an analog to digital converter, a digital signal processor, and a signal conversion Module and constellation decider, the method 1100 includes:
  • the signal determiner determines the first amplitude signal to generate a 2-level analog signal
  • the analog-to-digital converter converts the first phase signal to generate a multi-level digital signal, wherein the first phase signal is a multi-level analog signal;
  • the digital signal processor converts the multilevel digital signal into an 8-level digital signal
  • the signal conversion module converts the 2-level analog signal and the 8-level digital signal into a constellation symbol data stream in polar coordinates
  • the constellation decider converts the constellation symbol data stream into a bit stream.
  • the signal processing method of the embodiment of the present invention can reduce the computational complexity of the digital signal processor, reduce the number and power consumption of the analog to digital converter, thereby achieving the purpose of low power consumption, low complexity, and low cost communication. .
  • the method 1100 further includes:
  • the optical receiver front end module converts the optical signal into a second amplitude signal and a second phase signal
  • the saturated transimpedance amplifier saturates the second amplitude signal to generate the first amplitude signal
  • a linear transimpedance amplifier linearly amplifies the second phase signal to generate the first phase signal number.
  • the method 1100 further includes:
  • the RF receiver front end module converts the RF signal into the first amplitude signal and the first phase signal.
  • the signal processing method of the embodiment of the present invention can reduce the computational complexity of the digital signal processor, reduce the number and power consumption of the analog to digital converter, thereby achieving the purpose of low power consumption, low complexity, and low cost communication. .
  • the method 1100 of signal processing may correspond to the execution body of the receiver 400 of the embodiment of the present invention, and the foregoing and other operations and/or functions of the respective modules in the receiver 400 are respectively implemented to achieve the above.
  • the corresponding steps of each method are not repeated here for brevity.
  • FIG. 12 shows a structure of a transmitter provided by still another embodiment of the present invention, including at least one processor 1302 (eg, a CPU), at least one network interface 1305 or other communication interface, a memory 1306, and at least one communication bus 1303. Used to implement connection communication between these transmitters.
  • the processor 1302 is configured to execute executable modules, such as computer programs, stored in the memory 1306.
  • the memory 1306 may include a high speed random access memory (RAM) and may also include a non-volatile memory such as at least one disk memory.
  • a communication connection with at least one other network element is achieved by at least one network interface 1305 (which may be wired or wireless).
  • the memory 1306 stores a program 13061, and the processor 1302 executes the program 13061 for performing some operations:
  • the multilevel digital signal is converted to a multilevel analog signal.
  • processor 1302 is further configured to:
  • processor 1302 is further configured to:
  • the amplitude signal and the multilevel analog signal are converted into a radio frequency signal.
  • the processor 1302 is specifically configured to:
  • mapping relationship between the bit stream and the constellation point is adjusted to enable the constellation decider to expand the decision region.
  • the embodiment of the present invention can reduce the bit stream by using a constellation symbol data stream in polar coordinates and converting the constellation symbol data stream into an amplitude signal and a phase signal.
  • the computational complexity of the digital signal processor reduces the number and power consumption of the digital to analog converters, thereby achieving low power consumption, low complexity, and low cost communication.
  • FIG. 13 shows a structure of a receiver provided by still another embodiment of the present invention, including at least one processor 1502 (for example, a CPU), at least one network interface 1505 or other communication interface, a memory 1506, and at least one communication bus 1503. Used to implement connection communication between these transmitters.
  • the processor 1502 is configured to execute executable modules, such as computer programs, stored in the memory 1506.
  • the memory 1506 may include a high speed random access memory (RAM), and may also include a non-volatile memory such as at least one disk memory.
  • a communication connection with at least one other network element is achieved by at least one network interface 1505 (which may be wired or wireless).
  • the memory 1506 stores a program 15061, and the processor 1502 executes the program 15061 for performing the following operations:
  • processor 1502 is further configured to:
  • the second phase signal is linearly amplified to generate the first phase signal.
  • the processor 1502 is further configured to:
  • the embodiment of the present invention can reduce the computational complexity of the digital signal processor, reduce the number and power consumption of the analog to digital converter, thereby achieving low power consumption and low complexity. And the purpose of low-cost communication.
  • B corresponding to A means that B is associated with A, and B can be determined according to A.
  • determining B according to A does not mean that B is only determined based on A, and that B can also be determined based on A and/or other information.
  • the disclosed system, transmitter, and method may be implemented in other manners.
  • the transmitter embodiment described above is only illustrative.
  • the division of the unit is only a logical function division, and the actual implementation may have another division manner, for example, multiple units or components may be combined. Or it can be integrated into another system, or some features can be ignored or not executed.
  • the coupling or direct coupling or communication connection shown or discussed may be an indirect coupling or communication connection through some interface, transmitter or unit, and may be in electrical, mechanical or other form.
  • the units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, may be located in one place, or may be distributed to multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of the embodiment.
  • each functional unit in each embodiment of the present invention may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated in one unit. In the unit.
  • the functions may be stored in a computer readable storage medium if implemented in the form of a software functional unit and sold or used as a standalone product.
  • the technical solution of the present invention which is essential or contributes to the prior art, or a part of the technical solution, may be embodied in the form of a software product, which is stored in a storage medium, including
  • the instructions are used to cause a computer device (which may be a personal computer, server, or network device, etc.) to perform all or part of the steps of the methods described in various embodiments of the present invention.
  • the foregoing storage medium includes: a U disk, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk, and the like. .

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Abstract

本发明实施例提供了一种发射机、接收机和信号处理的方法。该发射机包括星座映射器(310)、信号转换模块(320)、数字信号处理器(330)和数字模拟转换器(340)；该星座映射器(310)，用于确定比特流与极坐标下的星座点的映射关系，并根据该映射关系生成星座符号数据流；该信号转换模块(320)，用于将该星座符号数据流转换为幅度信号和相位信号，其中，该幅度信号为2电平模拟信号，该相位信号为8电平数字信号；该数字信号处理器(330)，用于将该相位信号进行数字信号处理，生成多电平数字信号；该数字模拟转换器(340)，用于将该多电平数字信号转换为多电平模拟信号。本发明实施例能够降低通信***的复杂度、功耗和成本。

Description

发射机、接收机和信号处理的方法
本申请要求于2016年01月27日提交中国专利局、申请号为201610055594.5、发明名称为“发射机、接收机和信号处理的方法”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本发明涉及光通信领域，并且更具体地，涉及一种发射机、接收机和信号处理的方法。
背景技术
骨干网数据流量的剧增，对光纤通信***传输速率的要求显著提高。然而，光通信***的硬件带宽是有限的，需要在有限的带宽里传输大量的数据，提高频带利用率成为至关重要的途径。
采用高频带利用率的调制方案能良好的解决上述问题。正交振幅调制(Quadrature Amplitude Modulation，QAM)是正交载波调制技术与多电平振幅键控的结合，具有较高的频带利用率，广泛应用于光通信、宽带无线通信和数字有限电视传输等领域。现有的光通信***采用的方形16-QAM调制方案成本高、功耗大且***复杂度高，难以实现。
发明内容
本发明实施例提供一种发射机、接收机和信号处理的方法，能够降低通信***的复杂度、功耗和成本。
第一方面，提供了一种发射机，该发射机包括星座映射器310、信号转换模块320、数字信号处理器330、数字模拟转换器340；该星座映射器310，用于确定比特流与极坐标下的星座点的映射关系，并根据该映射关系生成星座符号数据流；该信号转换模块320，用于将该星座符号数据流转换为幅度信号和相位信号，其中，该幅度信号为2电平模拟信号，该相位信号为8电平数字信号；该数字信号处理器330，用于将该相位信号进行数字信号处理，生成多电平数字信号；该数字模拟转换器340，用于将该多电平数字信号转换为多电平模拟信号。
星型16-QAM信号在极坐标系下被拆分成幅度信号(即2电平模拟信号)和相位信号(即8电平数字信号)两部分。幅度信号直接输入到饱和驱动器进行放大。相位信号经过数字信号处理器处理之后，生成多电平数字信号，DAC将该多电平数字信号转换成连续的多电平模拟信号，完成信号处理，相比现有技术降低了数字信号处理器的计算复杂度，减少了数字模拟转换器数目和功耗。
因此，本发明实施例的发射机，通过将比特流映射为极坐标下的星座符号数据流，并将该星座符号数据流转换为幅度信号和相位信号，能够降低数字信号处理器的计算复杂度，减少数字模拟转换器的数目和功耗，从而达到了低功耗、低复杂度和低成本通信的目的。
结合第一方面，在第一方面的第一种可能的实现方式中，该发射机还包括：饱和驱动器350，用于对该幅度信号进行饱和放大；线性驱动器360，用于对该多电平模拟信号进行线性放大；光发射机前端模块370，用于将饱和放大后的该幅度信号和线性放大后的该多电平模拟信号转换为光信号。
在光通信领域中，多电平模拟信号通过线性驱动器放大，幅度信号通过饱和驱动器放大，进而可以驱动光发射机前端将饱和放大后的幅度信号和线性放大后的该多电平模拟信号转换为光信号。相比现有技术，本发明将一个线性驱动器改为饱和驱动器，在同样摆幅条件下，饱和驱动器相比线性驱动器至少降低30％的功耗，因此，本发明实施例的发射机能够减少通信的功耗。
结合第一方面，在第一方面的第一种可能的实现方式中，该发射机还包括：射频发射机前端模块380，用于将该幅度信号和该多电平模拟信号转换为射频信号。
该发射机可以应用于无线通信领域，发射机对比特流进行处理后生成一路幅度信号和一路多电平模拟信号，射频发射机前端模块将该幅度信号和多电平模拟信号转换为射频信号，从而实现大容量和远距离传输。本发明实施例能够降低数字信号处理器的计算复杂度，减少模拟数字转换器数目和功耗。
结合第一方面及第一方面的第一种可能的实现方式或第一方面的第二种可能的实现方式，在第一方面的第三种可能的实现方式中，该星座映射器310具体用于：调整该比特流与该星座点的映射关系，以使星座判决器能够扩大判决区域。
星型16-QAM的每个符号和周期传送4比特，即四个比特b1、b2、b3、b4映射为一个符号，假设用最高位b1来选择幅度R1，R2，用[b2，b3，b4]三个比特的八种组合去选择八个相位0，π/4，π/2，3π/4，π，5π/4，3π/2，7π/4。根据星座点的映射位置，接收机在接收到信号时可以根据星座点的映射位置得到判决区域。
星座点映射的最小判决相位差为π/4，对应的接收端的最小判决区域为
Figure PCTCN2016094133-appb-000001
本发明实施例，通过调整星座点的映射位置可以使得星座点的最小判决相位差为π/2，对应的接收端的最小判决区域为
Figure PCTCN2016094133-appb-000002
从而能够降低误码率，提升通信性能。
第二方面，提供了一种接收机，该接收机包括信号判决器410、模拟数字转换器420、数字信号处理器430、信号转换模块440和星座判决器450；该信号判决器410，用于对接收到的第一幅度信号进行判决，生成2电平模拟信号；该模拟数字转换器420，用于将接收到的第一相位信号进行转换，生成多电平数字信号，其中，该第一相位信号为多电平模拟信号；该数字信号处理器430，用于将该多电平数字信号转换为8电平数字信号；该信号转换模块440，用于将该2电平模拟信号和该8电平数字信号转换为极坐标下的星座符号数据流；该星座判决器450，用于将该星座符号数据流转换为比特流。
光信号在传输过程中由于噪声或其他因素导致信号发生偏差，接收机的信号判决器410能够将接收到的幅度信号进行判决，使其恢复为原来的2电平幅度信号；而ADC能够将接收到的相位信号转换为多电平数字信号，再由数字信号处理器的均衡等操作将该多电平数字信号转换为8电平数字信号，再由信号转换模块将8电平数字信号和2电平模拟信号转换为极坐标下的星座符号数据流，最后由星座判决器将星座符号数据流转换为比特流。该接收机相比现有技术减少了数字信号处理器的计算复杂度、减少了模拟数字转换器的数目和功耗。
因此，本发明实施例的接收机，能够降低数字信号处理器的计算复杂度，减少模拟数字转换器的数目和功耗，从而达到了低功耗、低复杂度和低成本通信的目的。
结合第二方面，在第二方面的第一种可能的实现方式中，该接收机还包括：光接收机前端模块460，用于将光信号转换为第二幅度信号和第二相位 信号；饱和跨阻放大器470，用于将该第二幅度信号进行饱和放大，生成该第一幅度信号；线性跨阻放大器480，用于将该第二相位信号进行线性放大，生成该第一相位信号。
具体而言，该接收机可以应用于光通信***，接收机前端接收光信号，将光信号转换为电信号。该电信号包括两路即第二幅度信号和第二相位信号。饱和跨阻放大器对第二幅度信号进行放大，经信号判决器判决为2电平数字信号。线性跨阻放大器对第二相位信号进行放大后，发送给模拟数字转换器。相比现有技术，本发明将一个线性跨阻放大器改为饱和跨阻放大器，在同样摆幅条件下，饱和跨阻放大器相比线性跨阻放大器至少降低30％的功耗，因此，本发明实施例的接收机能够减少通信的功耗。
结合第二方面，在第二方面的第二中可能的实现方式中，该接收机还包括：射频接收机前端模块490，用于将射频信号转换为该第一幅度信号和该第一相位信号。
该发射机可以应用于无线通信领域，射频接收机前端模块将接收到的射频信号进行转换，生成一路幅度信号(即第一幅度信号)和一路相位信号(即第一相位信号)。将该第一幅度信号和第一幅度信号发送给接收机，进而能够降低数字信号处理器的计算复杂度，减少模拟数字转换器数目和功耗。
第三方面，提供了一种信号处理的方法，所述方法由第一方面或第一方面的任一种可能的实现方式所述的发射机的模块执行。
第四方面，本申请提供了一种信号处理的方法，所述方法由第二方面或第二方面的任一种可能的实现方式所述的接收机的模块执行。
第五方面，提供了一种发射机，包括：处理器和存储器；
所述存储器存储了程序，所述处理器执行所述程序，用于执行上述第一方面或第一方面任一种可能的实现方式所述的信号处理的方法。
第六方面，提供了一种接收机，包括：处理器和存储器。
所述存储器存储了程序，所述处理器执行所述程序，用于执行上述第二方面或第二方面任一种可能的实现方式所述的信号处理的方法。
基于上述技术方案，本发明实施例的发射机、接收机和信号处理的方法，能够降低数字信号处理器的计算复杂度，减少数字模拟转换器和模拟数字转换器的数目，从而达到了低功耗、低复杂度和低成本通信的目的。
附图说明
为了更清楚地说明本发明实施例的技术方案，下面将对本发明实施例中所需要使用的附图作简单地介绍，显而易见地，下面所描述的附图仅仅是本发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1是现有技术的通信***的示意图；
图2是现有技术的通信***的一个具体实施例的示意图；
图3是本发明一个实施例的发射机的示意图；
图4是本发明一个实施例的接收机的示意图；
图5是本发明一个实施例的通信***的示意图；
图6是本发明一个实施例的星座图的示意图；
图7是本发明另一个实施例的星座图的示意图；
图8是本发明另一个实施例的星座图的示意图；
图9是本发明另一个实施例的通信***的示意图；
图10是本发明一个实施例的信号处理的方法的示意性流程图；。
图11是本发明另一个实施例的信号处理的方法的示意性流程图；
图12是本发明一个实施例的发射机的结构示意图；
图13是本发明另一个实施例的接收机的结构示意图。
具体实施方式
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
图1是现有技术通信***的示意图。图1所示的通信***100包括：一个星座映射器、一个发射端数字信号处理器(Transmitter Digital Signal Processor，TxDSP)、两个数字模拟转换器(Digital to Analog Converter，DAC)、两个线性驱动器(Linear Driver，Linear DRV)、一个光发射机前端模块、光纤链路、一个光接收机前端模块(Receiver Digital Signal Processor，RxDSP)、两个线性跨阻放大器、两个模拟数字转换器(Analog to Digital Converter，ADC)、一个接收端数字信号处理器(Receiver Digital Signal Processor， RxDSP)和一个星座判决器。
星座映射器110，能够完成比特流的串并转化，并将比特流映射到星座点生成星座符号数据流，例如，16-QAM调制，4个比特(0101)映射到星座点上的1个点，可以用复数表示为1+j*3。
数字信号处理器120，对I路和Q路信号(或者I+jQ复数信号)进行发端数字信号处理，生成多电平信号；
DAC 130，将数字信号转换成模拟信号；
线性驱动器140，将模拟信号线性放大，驱动光发射机前端；
光发射机前端模块150，完成电信号向光信号的转换，进而通过传输媒介进行光信号传输，例如，该传输媒介可以是光纤，或者也可以是自由空间等；
光接收机前端模块160，完成光信号向电信号的转换；
线性跨阻放大器170，将接收的模拟信号线性放大；
ADC 180，将接收的模拟信号转换成数字信号；
数字信号处理器190，对I路和Q路接收信号(或者I+jQ复数信号)进行收端数字信号处理；
星座判决器200，进行星座点判决，完成比特流的并串转化。
16-QAM是包含16种符号的QAM调制方式。具有16个样点的16-QAM信号，每个样点表示一种矢量状态，16-QAM有16态，每4位二进制数规定了16态中的一态，16-QAM中规定了16种载波和相位的组合，16-QAM的每个符号和周期传送4比特。
其中，“星座点映射”和“星座点判决”的星座点如图2所示。方形16-QAM信号在笛卡尔坐标(Cartesian coordinates)系下，被拆分成实部(I路信号)和虚部(Q路信号)两部分，均为4电平信号。经数字信号处理器(发送端的数字信号处理器也可以称为“发射端数字信号处理器”)处理之后，I路信号和Q路信号均变为多电平信号，经过DAC的转换生成连续的多电平模拟信号，再通过线性驱动器的放大，进而驱动光发射机前端发出光信号，从而将比特流转换为光信号，使得传输容量增大，传输距离更远。
相应的，在接收端，光接收机前端接收光信号，并将光信号转换为连续的模拟信号，经过线性跨阻放大器放大后，再经ADC模块转换成数字信号，此时I路信号和Q路信号均为多电平数字信号。数字信号处理器(接收端的 数字信号处理器也可以称为“接收端数字信号处理器”)将I路和Q路信号都还原成4电平，最后进行星座点判决转换为星座符号数据流，进而将该星座符号数据流转换为比特流。
应理解，数字信号处理器对I路信号和Q路信号进行处理时，可以是将I+jQ复数信号进行数字信号处理，还可以是分别对I路信号和Q路信号进行独立的数字信号处理(即可以是对2路独立的实数信号进行数字信号处理)。
现有技术的通信***中，存在成本高、功耗大和***复杂度高，难以实现等缺点。
图3示出了根据本发明实施例的一种发射机300的示意图。该发射机300包括星座映射器310、信号转换模块320、数字信号处理器330、数字模拟转换器340；
该星座映射器310，用于确定比特流与极坐标下的星座点的映射关系，并根据该映射关系生成星座符号数据流；
该信号转换模块320，用于将该星座符号数据流转换为幅度信号和相位信号，其中，该幅度信号为2电平模拟信号，该相位信号为8电平数字信号；
该数字信号处理器330，用于将该相位信号进行数字信号处理，生成多电平数字信号；
该数字模拟转换器340，用于将该多电平数字信号转换为多电平模拟信号。
具体而言，星型16-QAM信号在极坐标系下被拆分成幅度信号(2电平)和相位信号(8电平)两部分。相位信号经过数字信号处理器处理之后，生成多电平信号，DAC将该多电平信号转换成连续的模拟信号。这样，将处理完成的信号转换为光信号或射频信号等，从而具有传输容量大，传输距离远等优势。
因此，本发明实施例的发射机，通过将比特流映射为极坐标下的星座符号数据流，并将该星座符号数据流转换为幅度信号和相位信号，能够降低数字信号处理器的计算复杂度，以及减少数字模拟转换器的数目和功耗，从而达到了低功耗、低复杂度和低成本通信的目的。
可选地，该发射机300还包括：
饱和驱动器350，用于对该幅度信号进行饱和放大；
线性驱动器360，用于对该多电平模拟信号进行线性放大；
光发射机前端模块370，用于将饱和放大后的该幅度信号和线性放大后的该多电平模拟信号转换为光信号。
具体而言，在光通信领域中，多电平模拟信号通过线性驱动器放大，幅度信号通过饱和驱动器放大，进而可以驱动光发射机前端将饱和放大后的幅度信号和线性放大后的多电平模拟信号转换为光信号。相比现有技术，本发明将一个线性驱动器改为饱和驱动器，在同样摆幅条件下，饱和驱动器相比线性驱动器至少降低30％的功耗，因此，本发明实施例的发射机能够减少通信的功耗。
本发明实施例中，可选地，该发射机300还包括：
射频发射机前端模块380，用于将该幅度信号和该多电平模拟信号转换为射频信号。
具体而言，该发射机可以应用于无线通信领域，发射机对信号进行处理后生成一路幅度信号和一路多电平模拟信号，射频发射机前端模块将该幅度信号和多电平模拟信号转换为射频信号，从而实现大容量和远距离传输。本发明实施例能够降低数字信号处理器的计算复杂度，以及减少数字模拟转换器数目和功耗。
应理解，该射频信号的传输媒介可以是自由空间，本发明对此不进行限定。
该星座映射器310具体用于：调整该比特流与该星座点的映射关系，以使星座判决器能够扩大判决区域。
星型16-QAM的每个符号和周期传送4比特，即四个比特b1、b2、b3、b4映射为一个符号，假设用最高位b1来选择幅度R1，R2，用[b2，b3，b4]三个比特的八种组合去选择八个相位0，π/4，π/2，3π/4，π，5π/4，3π/2，7π/4。根据星座点的映射位置，接收机在接收到信号时可以根据星座点的映射位置得到判决区域。
星座点映射的最小判决相位差为π/4，对应的接收端的最小判决区域为
Figure PCTCN2016094133-appb-000003
本发明实施例，通过调整星座点的映射位置可以使得星座点的最小判决相位差为π/2，对应的接收端的最小判决区域为
Figure PCTCN2016094133-appb-000004
从而能够降低误码率，提升通信性能。
因此，本发明实施例的发射机，通过将比特流映射为极坐标下的星座符号数据流，并将该星座符号数据流转换为幅度信号和相位信号，能够降低数 字信号处理器的计算复杂度，减少数字模拟转换器的数目和功耗，从而达到了低功耗、低复杂度和低成本通信的目的。
应理解，在本发明的各种实施例中，上述各过程的序号的大小并不意味着执行顺序的先后，各过程的执行顺序应以其功能和内在逻辑确定，而不应对本发明实施例的实施过程构成任何限定。
图4示出了根据本发明实施例的一种接收机400的示意图。该接收机500包括信号判决器410、模拟数字转换器420、数字信号处理器430、信号转换模块440和星座判决器450；
该信号判决器410，用于对接收到的第一幅度信号进行判决，生成2电平模拟信号；
该模拟数字转换器420，用于将接收到的第一相位信号进行转换，生成多电平数字信号，其中，该第一相位信号为多电平模拟信号；
该数字信号处理器430，用于将该多电平数字信号转换为8电平数字信号；
该信号转换模块440，用于将该2电平模拟信号和该8电平数字信号转换为极坐标下的星座符号数据流；
该星座判决器450，用于将该星座符号数据流转换为比特流。
具体而言，光信号在传输过程中由于噪声或其他因素导致信号发生偏差，接收机的信号判决器410能够将接收到的幅度信号进行判决，使其恢复为原来的2电平模拟信号；而ADC能够将接收到的相位信号转换为多电平数字信号，再由数字信号处理器的均衡等操作将该多电平数字信号恢复为原来的8电平数字信号，再由信号转换模块将8电平数字信号和2电平模拟信号转换为极坐标下的星座符号数据流，最后由星座判决器将星座符号数据流转换为比特流。该接收机相比现有技术减少了数字信号处理器的计算复杂度、以及减少了模拟数字转换器的数目和功耗。
因此，本发明实施例的接收机，能够降低数字信号处理器的计算复杂度，减少模拟数字转换器的数目和功耗，从而达到了低功耗、低复杂度和低成本通信的目的。
可选地，该接收机400还包括：
光接收机前端模块460，用于将光信号转换为第二幅度信号和第二相位信号；
饱和跨阻放大器470，用于将该第二幅度信号进行饱和放大，生成该第一幅度信号；
线性跨阻放大器480，用于将该第二相位信号进行线性放大，生成该第一相位信号。
具体而言，该接收机可以应用于光通信***，接收机前端接收光信号，将光信号转换为电信号。该电信号包括两路即第二幅度信号和第二相位信号。饱和跨阻放大器对第二幅度信号进行放大，生成第一幅度信号，线性跨阻放大器对第二相位信号进行放大，生成第一相位信号。相比现有技术，本发明将一个线性跨阻放大器改为饱和跨阻放大器，在同样摆幅条件下，饱和跨阻放大器相比线性跨阻放大器至少降低30％的功耗，因此，本发明实施例的接收机能够减少通信的功耗。
在本发明实施例中，可选地，该接收机400还包括：
射频接收机前端模块490，用于将射频信号转换为该第一幅度信号和该第一相位信号。
具体而言，该发射机可以应用于无线通信领域，射频接收机前端模块将接收到的射频信号进行转换，生成一路幅度信号(即第一幅度信号)和一路相位信号(即第一相位信号)。将该第一幅度信号和第一幅度信号发送给接收机，进而能够降低数字信号处理器的计算复杂度，减少模拟数字转换器数目和功耗。
因此，本发明实施例的接收机，能够降低数字信号处理器的计算复杂度，减少模拟数字转换器的数目和功耗，从而达到了低功耗、低复杂度和低成本通信的目的。
应理解，在本发明的各种实施例中，上述各过程的序号的大小并不意味着执行顺序的先后，各过程的执行顺序应以其功能和内在逻辑确定，而不应对本发明实施例的实施过程构成任何限定。
图5示出了根据本发明实施例的一种通信***500的示意图。该通信***500包括星座映射器310、信号转换模块320、数字信号处理器330、数字模拟转换器340、饱和驱动器350、线性驱动器360，光发射机前端模块370、光接收机前端模块460、饱和跨阻放大器470、线性跨阻放大器480、信号判决器410、模拟数字转换器420、数字信号处理器430、信号转换模块440和星座判决器450。
应理解，本发明的发射机和接收机可以应用于光通信领域，也可以应用于无线通信领域。为了描述方便，下述实施例以光通信领域为例进行说明，但本发明对此并不限定。本实施例中的各种术语的含义与前述各实施例相同。
具体地，该星座映射器310确定比特流与极坐标下的星座点的映射关系，并根据该映射关系生成星座符号数据流。在本发明实施例中，星座映射器将比特流映射至极坐标下的星座图(如图6所示)中的星座点上，得到复数形式的星座符号数据流。该星座符号数据流的复数表达式为：
Figure PCTCN2016094133-appb-000005
应理解，比特流映射至极坐标下的星座图中的星座点上，可以有多种方式，本发明对此不进行限定。例如，比特流映射至星座点可以如图7a所示。
图7a所示的外圈最右边的点均为0000(二进制)，即十进制的0；内圈最右边的点均为1000(二进制)，即十进制的8；星座点的分布为逆时针关系。
0～15是十进制数，分别对应相应的二进制数。如表1所示：
表1
十进制 0 1 2 3 4 5 6 7
二进制 0000 0001 0010 0011 0100 0101 0110 0111
十进制 8 9 10 11 12 13 14 15
二进制 1000 1001 1010 1011 1100 1101 1110 1111
具体地，该信号转换模块320，用于将该星座符号数据流转换为幅度信号(可以称为“A路信号”)和相位信号(可以称为“P路信号”)，其中，该幅度信号为2电平模拟信号，该相位信号为8电平数字信号。信号转换模块将星座符号数据流的复数表达式表示为幅度(A)和相位(P)的形式：
Figure PCTCN2016094133-appb-000006
则A路信号的取值可以为：
Figure PCTCN2016094133-appb-000007
其中，V1＝V1-pp/2，V1-pp为饱和驱动器的输入信号峰峰值。
相应地，P路信号的取值可以是：
Figure PCTCN2016094133-appb-000008
其中，V2＝V2-pp/2，V2-pp为线性驱动器的输入信号峰峰值。
应理解，该V1-pp或V2-pp为一个参考值，若该发射机应用于无线通信领域时，该参考值可以选取射频发射机的相关参数，本发明对此不进行限定。
可选地，该星座映射器310具体用于：
调整该比特流与该星座点的映射关系，以使星座判决器能够扩大判决区域。
在本发明实施例中，星型16-QAM的每个符号和周期传送4比特，即四个比特b1、b2、b3、b4映射为一个符号，假设用最高位b1来选择幅度(R1，R2)，用[b2，b3，b4]三个比特的八种组合去选择八个相位(0，π/4，π/2，3π/4，π，5π/4，3π/2，7π/4)。根据星座点的映射位置，接收机在接收到信号时可以根据星座点的映射位置得到判决区域，如图7(a)、7(b)和7(c)所示，图中的阴影部分即为判决区域。最小的判决区域越大，通信性能越好，例如，在通信过程中存在误码率，最小的判决区域越大，信号处理的误码率越小。
第1个比特‘b1’的判决是由幅度(R1，R2)来判决，第2，3，4个比特[b2，b3，b4]，均由不同的相位区域来判决。如图7(a)，b2＝0的判决区域为阴影部分，此阴影部分所表示的相位差为π；图7(b)，b3＝0的判决区域为阴影部分，此阴影部分的最小相位差为π/2；图7(c)，b4＝0的判决区域为阴影部分，此阴影部分的最小相位差为π/4。因此，上述星座点映射的最小判决相位差为π/4，对应的接收端的最小判决区域为
Figure PCTCN2016094133-appb-000009
本发明实施例，通过调整比特流与星座点的映射关系可以使得星座点的最小判决相位差为π/2，对应的接收端的最小判决区域为
Figure PCTCN2016094133-appb-000010
从而能够提升通信的性能。例如，如图8(a)、8(b)和8(c)所示，用0-15的十进制数来表示，从0开始逆时依次表示为0，2，3，1，5，7，6，4，8，10，11，9，13，15，14，12。根据该方案的星座点映射，最小判决相位差为π/2，对 应的接收端的最小判决区域为
Figure PCTCN2016094133-appb-000011
可选地，最小判决相位差为π/2的星座点映射，还可以有以下方案：
(1)0，4，5，1，3，7，6，2，8，12，13，9，11，15，14，10；
(2)0，4，6，2，3，7，5，1，8，12，14，10，11，15，13，9；
(3)0，1，5，4，6，7，3，2，8，9，13，12，14，15，11，10；
(4)0，1，3，2，6，7，5，4，8，9，11，10，14，15，13，12；
(5)0，2，6，4，5，7，3，1，8，10，14，12，13，15，11，9。
应理解，本发明实施例对能够扩大的判决相位差以及星座点的映射方案并不进行限定。
具体地，该数字信号处理器330，用于将该相位信号进行数字信号处理，生成多电平数字信号。在本发明实施例中，发射机的数字信号处理器的输入/输出数据均为实数，其内部的处理算法可简化为实数处理。
由前述可知，现有技术数字信号处理器可以是将I+jQ复数信号进行数字信号处理，还可以是分别对I路信号和Q路信号进行独立的数字信号处理。相比复数计算，本发明实施例的数字信号处理器仅对实数进行运算，明显降低了计算复杂度。或者，相比现有技术的数字信号处理器对I路信号和Q路信号分别进行实数计算，本发明实施例仅对相位信号这一路进行实数运算，仍然能够降低计算复杂度。由于数字信号处理器占用晶体管资源较多，芯片面积较大且成本高昂，减少一路信号使用数字信号处理器处理能够较低50％的功耗。
相对复数计算，实数计算的计算复杂度显著降低，例如：
x＝xI+i*xQ,y＝yI+i*yQ
(5)
其中，xI,yI和xQ,yQ分别为复数x,y的实部和虚部；i为虚数单位。
在数字信号处理器中，两个复数的乘法可表示为：
x·y＝(xI+i*xQ)·(yI+i*yQ)
＝(xI·yI-xQ·yQ)+i*(xI·yQ+xQ·yI)
(6)
如式(6)所示，一次复数乘法包含4次实数乘法及2次实数加法。
两个复数的加法可表示为：
x+y＝(xI+yI)+i*(xQ+yQ)
(7)
如式(7)所示，一次复数加法包含2次实数加法。
因此，若“数字信号处理器120”与“数字信号处理器330”模块中采用相同的数字信号处理算法，则“数字信号处理器330”的复杂度小于“数字信号处理器120”复杂度的一半。
可选地，该数字信号处理器可以是对信号进行器件带宽预补偿、器件/链路非线性预补偿和光纤色散预补偿等，本发明对此不进行限定。
该数字模拟转换器340，用于将该多电平数字信号转换为多电平模拟信号。DAC将该多电平信号转换成连续的模拟信号，完成信号的处理，从而为信号的远距离传输做好准备工作。本发明仅有一路信号使用数字模拟转换器，减少了数字模拟转换器的使用数目，使得成本和功耗降低了50％。
因此，本发明实施例的发射机，能够降低数字信号处理器的计算复杂度，减少数字模拟转换器的数目和功耗，从而达到了低功耗、低复杂度和低成本通信的目的。
具体地，在光通信领域中，饱和驱动器350，用于对该幅度信号进行饱和放大，进而可以驱动光发射机前端将饱和放大后的幅度信号转换为光信号。
具体地，线性驱动器360，用于对该多电平模拟信号进行线性放大。相比现有技术，本发明实施例将一个线性驱动器改为饱和驱动器，在同样摆幅条件下，饱和驱动器相比线性驱动器至少降低30％的功耗，因此，本发明实施例的发射机能够减少通信的功耗。
具体地，光发射机前端模块370，用于将饱和放大后的该幅度信号和线性放大后的该多电平模拟信号转换为光信号。将比特流转换为光信号，能够使得信号传输容量增大，传输距离更远。
应理解，光信号的传输媒介可以是光纤，或者也可以是通过自由空间等，本发明对此不进行限定。
具体地，光接收机前端模块460，用于将光信号转换为第二幅度信号和第二相位信号；该接收机可以应用于光通信***，接收机前端接收光信号，将光信号转换为电信号。该电信号包括两路即第二幅度信号和第二相位信号。
具体地，饱和跨阻放大器470，用于将该第二幅度信号进行饱和放大，生成第一幅度信号；线性跨阻放大器480，用于将该第二相位信号进行线性 放大，生成第一相位信号。饱和跨阻放大器对幅度信号进行放大，发送给信号判决器；线性跨阻放大器对相位信号进行放大后，发送给模拟数字转换器。
具体而言，该信号判决器410，用于对第一幅度信号进行判决，生成2电平模拟信号。光信号在传输过程中由于噪声或其他因素导致信号发生偏差，接收机的信号判决器410能够将接收到的幅度信号进行判决，使其恢复为原来的2电平幅度信号。例如，可以设置信号判决器的判决阈值为VTIA,th＝0，当信号幅度小于此阈值，信号判决器的输出信号电平设为Vdet1，当信号幅度大于此阈值，信号判决器的输出信号电平则设为Vdet2。
需要说明的是，判决输出信号Vdet1,Vdet2的值是根据电路的实际应用情况确定的。
具体而言，该模拟数字转换器420，用于将第一相位信号进行转换，生成多电平数字信号，其中，该第一相位信号为多电平模拟信号。本发明仅有一路信号(即第一相位信号)使用模拟数字转换器，减少了模拟数字转换器的使用数目，使得成本和功率降低了50％。
具体而言，该数字信号处理器430，用于将该多电平数字信号转换为8电平数字信号。ADC能够将接收到的第一相位信号转换为多电平数字信号，再由数字信号处理器的均衡等操作将该多电平数字信号转换为8电平数字信号。本发明实施例仅对一路信号(即多电平数字信号)进行实数运算，能够降低计算复杂度。
具体而言，该信号转换模块440，用于将该2电平模拟信号和该8电平数字信号转换为极坐标下的星座符号数据流。接收端的信号转换模块的算法与发射端的信号转换模块的算法互为逆运算。例如，
Figure PCTCN2016094133-appb-000012
而接收端的数字信号处理器可以将相位信号数据恢复为8个电平：
Figure PCTCN2016094133-appb-000013
其中，VRxP为数字信号处理器输出信号的最大值。
进而，由式(8)及(9)可得到收端信号XRx16QAM。
具体而言，该星座判决器450，用于将该星座符号数据流转换为比特流。 信号转换模块将8电平数字信号和2电平模拟信号转换为极坐标下的星座符号数据流，最后由星座判决器将星座符号数据流转换为比特流。
因此，本发明实施例的接收机，能够降低数字信号处理器的计算复杂度，减少模拟数字转换器的数目和功耗，从而达到了低功耗、低复杂度和低成本通信的目的。
应理解，在本发明的各种实施例中，上述各过程的序号的大小并不意味着执行顺序的先后，各过程的执行顺序应以其功能和内在逻辑确定，而不应对本发明实施例的实施过程构成任何限定。
图9示出了根据本发明另一个实施例的一种通信***700的示意图。该通信***700包括星座映射器310、信号转换模块320、数字信号处理器330、数字模拟转换器340、射频发射机前端模块380、射频接收机前端模块490、信号判决器410、模拟数字转换器420、数字信号处理器430、信号转换模块440和星座判决器450。
本发明的发射机和接收机可以应用于无线通信领域。为了描述方便，下述实施例以无线通信领域为例进行说明，但本发明对此并不限定。本实施例中的各种术语的含义与前述各实施例相同。
星座映射器310确定比特流与极坐标下的星座点的映射关系，并根据该映射关系生成星座符号数据流，信号转换模块320将星座符号数据流在极坐标系下拆分成幅度信号(2电平)和相位信号(8电平)两部分。相位信号经过数字信号处理器330处理之后，生成多电平数字信号，数字模拟转换器340将该多电平数字信号转换成连续的多电平模拟信号。射频发射机前端模块380将该幅度信号和该多电平模拟信号转换为射频信号，从而实现大容量和远距离传输。本发明实施例能够降低数字信号处理器的计算复杂度，以及减少数字模拟转换器数目和功耗。
射频接收机前端模块490将接收到的射频信号转换为第一幅度信号和第一相位信号。射频信号在传输过程中由于噪声或其他因素导致信号发生偏差，接收机的信号判决器410能够将接收到的第一幅度信号进行判决，使其恢复为原来的2电平幅度信号；而模拟数字转换器420能够将接收到的第一相位信号转换为多电平数字信号，再由数字信号处理器430的预补偿等操作将该多电平数字信号转换为8电平数字信号，再由信号转换模块440将8电平数字信号和2电平模拟信号转换为极坐标下的星座符号数据流，最后由星 座判决器450将星座符号数据流转换为比特流。本发明实施例相比现有技术减少了数字信号处理器的计算复杂度、减少了模拟数字转换器的数目和功耗。
应理解，在本发明的各种实施例中，上述各过程的序号的大小并不意味着执行顺序的先后，各过程的执行顺序应以其功能和内在逻辑确定，而不应对本发明实施例的实施过程构成任何限定。
上文结合图3、图4至图9，详细描述了根据本发明实施例的发射机和接收机，下面将结合图10和图11，详细描述根据本发明实施例的信号处理的方法。
图10示出了根据本发明例的信号处理的方法900的示意性流程图，如图10所示，该信号处理的方法900应用于发射机，该发射机包括星座映射器、信号转换模块、数字信号处理器、数字模拟转换器，该信号处理的方法900包括：
S910，该星座映射器确定比特流与极坐标下的星座点的映射关系；
S920，该星座映射器根据该映射关系，生成星座符号数据流；
S930，该信号转换模块将该星座符号数据流转换为幅度信号和相位信号，其中，该幅度信号为2电平模拟信号，该相位信号为8电平数字信号；
S940，该数字信号处理器将该相位信号进行数字信号处理，生成多电平数字信号；
S950，该数字模拟转换器将该多电平数字信号转换为多电平模拟信号。
因此，本发明实施例的信号处理的方法，通过将比特流映射为极坐标下的星座符号数据流，并将该星座符号数据流转换为幅度信号和相位信号，能够降低数字信号处理器的计算复杂度，减少数字模拟转换器的数目和功耗，达到了低功耗、低复杂度和低成本的目的，从而提升了通信性能。
在本发明实施例中，可选地，该方法900还包括：
饱和驱动器对该幅度信号进行饱和放大；
线性驱动器对该多电平模拟信号进行线性放大；
光发射机前端模块将饱和放大后的该幅度信号和线性放大后的该多电平模拟信号转换为光信号。
在本发明实施例中，可选地，该方法900还包括：
射频发射机前端模块将该幅度信号和该多电平模拟信号转换为射频信 号。
可选地，在本发明实施例中，该星座映射器确定比特流与极坐标下的星座点的映射关系，包括：
该星座映射器调整该比特流与该星座点的映射关系，以使星座判决器能够扩大判决区域。
因此，本发明实施例的信号处理的方法，通过将比特流映射为极坐标下的星座符号数据流，并将该星座符号数据流转换为幅度信号和相位信号，能够降低数字信号处理器的计算复杂度，减少数字模拟转换器的数目和功耗，从而达到了低功耗、低复杂度和低成本的通信目的。
应理解，根据本发明实施例的信号处理的方法900可对应于本发明实施例的发射机300的执行主体，并且发射机300中的各个模块的前述和其它操作和/或功能分别为了实现上述各个方法的相应步骤，为了简洁，在此不再赘述。
图11示出了根据本发明例的信号处理的方法1100的示意性流程图，该方法1100应用于接收机400，该接收机包括信号判决器、模拟数字转换器、数字信号处理器、信号转换模块和星座判决器，该方法1100包括：
S1110，该信号判决器对第一幅度信号进行判决，生成2电平模拟信号；
S1120，该模拟数字转换器将第一相位信号进行转换，生成多电平数字信号，其中，该第一相位信号为多电平模拟信号；
S1130，该数字信号处理器将该多电平数字信号转换为8电平数字信号；
S1140，该信号转换模块将该2电平模拟信号和该8电平数字信号转换为极坐标下的星座符号数据流；
S1150，星座判决器将该星座符号数据流转换为比特流。
因此，本发明实施例的信号处理的方法，能够降低数字信号处理器的计算复杂度，减少模拟数字转换器的数目和功耗，从而达到了低功耗、低复杂度和低成本通信的目的。
可选地，在本发明实施例中，该方法1100还包括：
光接收机前端模块将光信号转换为第二幅度信号和第二相位信号；
饱和跨阻放大器将该第二幅度信号进行饱和放大，生成该第一幅度信号；
线性跨阻放大器将该第二相位信号进行线性放大，生成该第一相位信 号。
可选地，在本发明实施例中，该方法1100还包括：
射频接收机前端模块将射频信号转换为该第一幅度信号和该第一相位信号。
因此，本发明实施例的信号处理的方法，能够降低数字信号处理器的计算复杂度，减少模拟数字转换器的数目和功耗，从而达到了低功耗、低复杂度和低成本通信的目的。
应理解，根据本发明实施例的信号处理的方法1100可对应于本发明实施例的接收机400的执行主体，并且接收机400中的各个模块的前述和其它操作和/或功能分别为了实现上述各个方法的相应步骤，为了简洁，在此不再赘述。
图12示出了本发明的又一实施例提供的发射机的结构，包括至少一个处理器1302(例如CPU)，至少一个网络接口1305或者其他通信接口，存储器1306，和至少一个通信总线1303，用于实现这些发射机之间的连接通信。处理器1302用于执行存储器1306中存储的可执行模块，例如计算机程序。存储器1306可能包含高速随机存取存储器(RAM:Random Access Memory)，也可能还包括非不稳定的存储器(non-volatile memory)，例如至少一个磁盘存储器。通过至少一个网络接口1305(可以是有线或者无线)实现与至少一个其他网元之间的通信连接。
在一些实施方式中，存储器1306存储了程序13061，处理器1302执行程序13061，用于执行一些操作：
确定比特流与极坐标下的星座点的映射关系；
根据该映射关系，生成星座符号数据流；
将该星座符号数据流转换为幅度信号和相位信号，其中，该幅度信号为2电平模拟信号，该相位信号为8电平数字信号；
将该相位信号进行数字信号处理，生成多电平数字信号；
将该多电平数字信号转换为多电平模拟信号。
可选地，处理器1302还用于：
对该幅度信号进行饱和放大；
对该多电平模拟信号进行线性放大；
将饱和放大后的该幅度信号和线性放大后的该多电平模拟信号转换为 光信号。
可选地，处理器1302还用于：
将该幅度信号和该多电平模拟信号转换为射频信号。
在本发明实施例中，可选地，处理器1302具体用于：
调整该比特流与该星座点的映射关系，以使星座判决器能够扩大判决区域。
从本发明实施例提供的以上技术方案可以看出，本发明实施例通过将比特流映射为极坐标下的星座符号数据流，并将该星座符号数据流转换为幅度信号和相位信号，能够降低数字信号处理器的计算复杂度，减少数字模拟转换器的数目和功耗，从而达到了低功耗、低复杂度和低成本通信的目的。
图13示出了本发明的又一实施例提供的接收机的结构，包括至少一个处理器1502(例如CPU)，至少一个网络接口1505或者其他通信接口，存储器1506，和至少一个通信总线1503，用于实现这些发射机之间的连接通信。处理器1502用于执行存储器1506中存储的可执行模块，例如计算机程序。存储器1506可能包含高速随机存取存储器(RAM：Random Access Memory)，也可能还包括非不稳定的存储器(non-volatile memory)，例如至少一个磁盘存储器。通过至少一个网络接口1505(可以是有线或者无线)实现与至少一个其他网元之间的通信连接。
在一些实施方式中，存储器1506存储了程序15061，处理器1502执行程序15061，用于执行一下操作：
对接收到的第一幅度信号进行判决，生成2电平模拟信号；
将接收到的第一相位信号进行转换，生成多电平数字信号，其中，该第一相位信号为多电平模拟信号；
将该多电平数字信号转换为8电平数字信号；
将该2电平模拟信号和该8电平数字信号转换为极坐标下的星座符号数据流；
将该星座符号数据流转换为比特流。
可选地，处理器1502还用于：
将光信号转换为第二幅度信号和第二相位信号；
将该第二幅度信号进行饱和放大，生成该第一幅度信号；
将该第二相位信号进行线性放大，生成该第一相位信号。
在本发明实施例中，可选地，处理器1502还用于：
将射频信号转换为该第一幅度信号和该第一相位信号。
从本发明实施例提供的以上技术方案可以看出，本发明实施例能够降低数字信号处理器的计算复杂度，减少模拟数字转换器的数目和功耗，从而达到了低功耗、低复杂度和低成本通信的目的。
应理解，本发明中的具体的例子只是为了帮助本领域技术人员更好地理解本发明实施例，而非限制本发明实施例的范围。
还应理解，在本发明实施例中，“与A对应的B”表示B与A相关联，根据A可以确定B。但还应理解，根据A确定B并不意味着仅仅根据A确定B，还可以根据A和/或其他信息确定B。
本领域普通技术人员可以意识到，结合本文中所公开的实施例描述的各示例的单元及算法步骤，能够以电子硬件、或者计算机软件和电子硬件的结合来实现。这些功能究竟以硬件还是软件方式来执行，取决于技术方案的特定应用和设计约束条件。专业技术人员可以对每个特定的应用来使用不同方法来实现所描述的功能，但是这种实现不应认为超出本发明的范围。
所属领域的技术人员可以清楚地了解到，为描述的方便和简洁，上述描述的***、发射机和单元的具体工作过程，可以参考前述方法实施例中的对应过程，在此不再赘述。
在本申请所提供的几个实施例中，应该理解到，所揭露的***、发射机和方法，可以通过其它的方式实现。例如，以上所描述的发射机实施例仅仅是示意性的，例如，所述单元的划分，仅仅为一种逻辑功能划分，实际实现时可以有另外的划分方式，例如多个单元或组件可以结合或者可以集成到另一个***，或一些特征可以忽略，或不执行。另一点，所显示或讨论的相互之间的耦合或直接耦合或通信连接可以是通过一些接口，发射机或单元的间接耦合或通信连接，可以是电性，机械或其它的形式。
所述作为分离部件说明的单元可以是或者也可以不是物理上分开的，作为单元显示的部件可以是或者也可以不是物理单元，即可以位于一个地方，或者也可以分布到多个网络单元上。可以根据实际的需要选择其中的部分或者全部单元来实现本实施例方案的目的。
另外，在本发明各个实施例中的各功能单元可以集成在一个处理单元中，也可以是各个单元单独物理存在，也可以两个或两个以上单元集成在一 个单元中。
所述功能如果以软件功能单元的形式实现并作为独立的产品销售或使用时，可以存储在一个计算机可读取存储介质中。基于这样的理解，本发明的技术方案本质上或者说对现有技术做出贡献的部分或者该技术方案的部分可以以软件产品的形式体现出来，该计算机软件产品存储在一个存储介质中，包括若干指令用以使得一台计算机设备(可以是个人计算机，服务器，或者网络设备等)执行本发明各个实施例所述方法的全部或部分步骤。而前述的存储介质包括：U盘、移动硬盘、只读存储器(ROM，Read-Only Memory)、随机存取存储器(RAM，Random Access Memory)、磁碟或者光盘等各种可以存储程序代码的介质。
以上所述，仅为本发明的具体实施方式，但本发明的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本发明揭露的技术范围内，可轻易想到变化或替换，都应涵盖在本发明的保护范围之内。因此，本发明的保护范围应以所述权利要求的保护范围为准。

Claims (14)

  1. 一种发射机，其特征在于，所述发射机包括星座映射器(310)、信号转换模块(320)、数字信号处理器(330)和数字模拟转换器(340)；
    所述星座映射器(310)，用于确定比特流与极坐标下的星座点的映射关系，并根据所述映射关系生成星座符号数据流；
    所述信号转换模块(320)，用于将所述星座符号数据流转换为幅度信号和相位信号，其中，所述幅度信号为2电平模拟信号，所述相位信号为8电平数字信号；
    所述数字信号处理器(330)，用于将所述相位信号进行数字信号处理，生成多电平数字信号；
    所述数字模拟转换器(340)，用于将所述多电平数字信号转换为多电平模拟信号。
  2. 根据权利要求1所述的发射机，其特征在于，所述发射机还包括：
    饱和驱动器(350)，用于对所述幅度信号进行饱和放大；
    线性驱动器(360)，用于对所述多电平模拟信号进行线性放大；
    光发射机前端模块(370)，用于将饱和放大后的所述幅度信号和线性放大后的所述多电平模拟信号转换为光信号。
  3. 根据权利要求1所述的发射机，其特征在于，所述发射机还包括：
    射频发射机前端模块(380)，用于将所述幅度信号和所述多电平模拟信号转换为射频信号。
  4. 根据权利要求1至3中任一项所述的发射机，其特征在于，所述星座映射器(310)具体用于：
    调整所述比特流与所述星座点的映射关系，以使星座判决器能够扩大判决区域。
  5. 一种接收机，其特征在于，所述接收机包括信号判决器(410)、模拟数字转换器(420)、数字信号处理器(430)、信号转换模块(440)和星座判决器(450)；
    所述信号判决器(410)，用于对第一幅度信号进行判决，生成2电平模拟信号；
    所述模拟数字转换器(420)，用于将第一相位信号进行转换，生成多电平数字信号，其中，所述第一相位信号为多电平模拟信号；
    所述数字信号处理器(430)，用于将所述多电平数字信号转换为8电平数字信号；
    所述信号转换模块(440)，用于将所述2电平模拟信号和所述8电平数字信号转换为极坐标下的星座符号数据流；
    所述星座判决器(450)，用于将所述星座符号数据流转换为比特流。
  6. 根据权利要求5所述的接收机，其特征在于，所述接收机还包括：
    光接收机前端模块(460)，用于将光信号转换为第二幅度信号和第二相位信号；
    饱和跨阻放大器(470)，用于将所述第二幅度信号进行饱和放大，生成所述第一幅度信号；
    线性跨阻放大器(480)，用于将所述第二相位信号进行线性放大，生成所述第一相位信号。
  7. 根据权利要求5所述的接收机，其特征在于，所述接收机还包括：
    射频接收机前端模块(490)，用于将射频信号转换为所述第一幅度信号和所述第一相位信号。
  8. 一种信号处理的方法，其特征在于，所述方法应用于发射机，所述发射机包括星座映射器、信号转换模块、数字信号处理器和数字模拟转换器，所述方法包括：
    所述星座映射器确定比特流与极坐标下的星座点的映射关系；
    所述星座映射器根据所述映射关系，生成星座符号数据流；
    所述信号转换模块将所述星座符号数据流转换为幅度信号和相位信号，其中，所述幅度信号为2电平模拟信号，所述相位信号为8电平数字信号；
    所述数字信号处理器将所述相位信号进行数字信号处理，生成多电平数字信号；
    所述数字模拟转换器将所述多电平数字信号转换为多电平模拟信号。
  9. 根据权利要求8所述的方法，其特征在于，所述方法还包括：
    饱和驱动器对所述幅度信号进行饱和放大；
    线性驱动器对所述多电平模拟信号进行线性放大；
    光发射机前端模块将饱和放大后的所述幅度信号和线性放大后的所述多电平模拟信号转换为光信号。
  10. 根据权利要求8所述的方法，其特征在于，所述方法还包括：
    射频发射机前端模块将所述幅度信号和所述多电平模拟信号转换为射频信号。
  11. 根据权利要求8至10中任一项所述的方法，其特征在于，所述星座映射器确定比特流与极坐标下的星座点的映射关系，包括：
    所述星座映射器调整所述比特流与所述星座点的映射关系，以使星座判决器能够扩大判决区域。
  12. 一种信号处理的方法，其特征在于，所述方法应用于接收机，所述接收机包括信号判决器、模拟数字转换器、数字信号处理器、信号转换模块和星座判决器，所述方法包括：
    所述信号判决器对第一幅度信号进行判决，生成2电平模拟信号；
    所述模拟数字转换器将第一相位信号进行转换，生成多电平数字信号，其中，所述第一相位信号为多电平模拟信号；
    所述数字信号处理器将所述多电平数字信号转换为8电平数字信号；所述信号转换模块将所述2电平模拟信号和所述8电平数字信号转换为极坐标下的星座符号数据流；
    星座判决器将所述星座符号数据流转换为比特流。
  13. 根据权利要求12所述的方法，其特征在于，所述方法还包括：
    光接收机前端模块将光信号转换为第二幅度信号和第二相位信号；
    饱和跨阻放大器将所述第二幅度信号进行饱和放大，生成所述第一幅度信号；
    线性跨阻放大器将所述第二相位信号进行线性放大，生成所述第一相位信号。
  14. 根据权利要求12所述的方法，其特征在于，所述方法还包括：
    射频接收机前端模块将射频信号转换为所述第一幅度信号和所述第一相位信号。
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