WO2017041435A1 - 显示基板及其制作方法和显示装置 - Google Patents

显示基板及其制作方法和显示装置 Download PDF

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WO2017041435A1
WO2017041435A1 PCT/CN2016/073837 CN2016073837W WO2017041435A1 WO 2017041435 A1 WO2017041435 A1 WO 2017041435A1 CN 2016073837 W CN2016073837 W CN 2016073837W WO 2017041435 A1 WO2017041435 A1 WO 2017041435A1
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insulating layer
layer
substrate
forming
polydimethylsilane
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PCT/CN2016/073837
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English (en)
French (fr)
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程磊磊
彭锐
王东方
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京东方科技集团股份有限公司
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Priority to US15/521,408 priority Critical patent/US11018166B2/en
Publication of WO2017041435A1 publication Critical patent/WO2017041435A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259—Multistep manufacturing methods
    • H01L27/1292—Multistep manufacturing methods using liquid deposition, e.g. printing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1218—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or structure of the substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
    • H01L27/1225—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1248—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259—Multistep manufacturing methods
    • H01L27/1262—Multistep manufacturing methods with a particular formation, treatment or coating of the substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/417—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
    • H01L29/41725—Source or drain electrodes for field effect devices
    • H01L29/41733—Source or drain electrodes for field effect devices for thin film transistors with insulated gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Definitions

  • the present invention relates to the field of display technologies, and in particular, to a display substrate manufacturing method, a display substrate, and a display device.
  • the insulating layer between the conductive structures is generally made of only an organic material or only an inorganic material.
  • the organic material used is generally a polymer and the dielectric constant of the polymer is relatively low
  • the use of the polymer alone as an insulating layer in the thin film transistor makes preparation.
  • the threshold voltage of the thin film transistor is relatively high, and the leakage current is large, which affects the electrical performance of the thin film transistor.
  • An object of the present invention is to take advantage of both organic materials and inorganic materials as insulating layers.
  • the present invention provides a method for fabricating a display substrate, comprising the steps of:
  • the thin film transistor includes a gate, a source, a drain and an active layer, a second insulating layer is formed between the gate and the active layer, and a first insulating layer is formed on the substrate, The active layer is formed in the first insulating layer;
  • the material of at least one of the substrate, the first insulating layer, the second insulating layer, the third insulating layer and the fourth insulating layer is an organic material, and at least one layer of the material is an inorganic material.
  • the step of forming the substrate comprises:
  • the first polydimethylsilane layer is peeled off from the base substrate to serve as the substrate.
  • the steps of forming the source and the drain include:
  • the glass substrate is removed, and a hydrophilic solution containing a conductive material is coated on the substrate to form a source and a drain in the first recess.
  • the step of forming the first insulating layer comprises:
  • a hydrophilic solution containing a semiconductor material is coated on the first silicon dioxide layer to form the active layer in the via.
  • the step of forming the second insulating layer comprises:
  • the glass substrate is removed, and a hydrophilic solution containing a conductive material is coated on the second insulating layer to form the gate in the second recess.
  • the step of forming the third insulating layer comprises:
  • the upper surface of the third insulating layer is subjected to light or oxidation treatment to form a second silicon dioxide layer on the upper surface of the third insulating layer.
  • the step of forming the fourth insulating layer comprises:
  • the fourth insulating layer is formed on the pixel electrode using at least one of polydimethylsilane, polyimide, polymethyl methacrylate, and polyvinylpyrrolidone.
  • the invention also provides a display substrate manufactured according to the above manufacturing method, comprising:
  • the thin film transistor comprises a gate, a source, a drain and an active layer
  • a first insulating layer disposed on the substrate, the active layer being disposed in the first insulating layer;
  • a second insulating layer disposed between the gate and the active layer
  • a pixel electrode disposed on the third insulating layer
  • the material of at least one of the substrate, the first insulating layer, the second insulating layer, the third insulating layer and the fourth insulating layer comprises an organic material, and at least one layer of the material comprises an inorganic material.
  • a first recess corresponding to the pattern of the source and the drain is disposed on a surface of the substrate adjacent to the first insulating layer, and a source and a drain are disposed in the first recess.
  • a through hole corresponding to the pattern of the active layer is disposed in the first insulating layer, and the active layer is disposed in the through hole,
  • the material of the first insulating layer comprises polydimethylsilane, and a first silicon dioxide layer is formed on an upper surface of the first insulating layer.
  • a second recess corresponding to the pattern of the gate is disposed on a surface of the second insulating layer adjacent to the third insulating layer, and the gate is disposed in the second recess.
  • the material of the third insulating layer comprises polydimethylsilane, and a second silicon dioxide layer is formed on an upper surface of the third insulating layer.
  • the material of the fourth insulating layer comprises at least one of polydimethylsilane, polyimide, polymethyl methacrylate and polyvinylpyrrolidone.
  • the present invention also provides a display device comprising the above display substrate.
  • the thin film transistor can be provided with both the organic material layer and the organic material layer.
  • the advantages have the advantages of including an inorganic material layer, on the one hand, simplifying the manufacturing process, on the other hand, improving the electrical properties of the thin film transistor and the physical properties of the display substrate where the thin film transistor is located. can.
  • FIG. 1 is a schematic flow chart showing a method of fabricating a display substrate according to an embodiment of the present invention
  • FIG. 2 shows a schematic flow chart of forming a substrate in accordance with one embodiment of the present invention
  • FIG. 3 shows a schematic flow diagram of forming a source and a drain in accordance with one embodiment of the present invention
  • FIG. 4 shows a schematic flow chart of forming a first insulating layer in accordance with one embodiment of the present invention
  • FIG. 5 shows a schematic flow chart of forming a second insulating layer in accordance with one embodiment of the present invention
  • FIG. 6 shows a schematic flow chart of forming a third insulating layer in accordance with one embodiment of the present invention
  • FIG. 10 and 11 illustrate a specific schematic flow chart for forming a source and a drain according to an embodiment of the present invention
  • 16 to 19 illustrate a specific schematic flow chart for forming a second insulating layer according to an embodiment of the present invention
  • Figure 22 is a block diagram showing the structure of a display substrate in accordance with one embodiment of the present invention.
  • a method for fabricating a display substrate according to an embodiment of the invention includes the steps of:
  • the thin film transistor includes a gate electrode 21, a source electrode 22, a drain electrode 23, and an active layer 24.
  • a second insulating layer 4 is formed between the gate electrode 21 and the active layer 24, and a first insulating layer is formed on the substrate 1.
  • Layer 3, an active layer 24 is formed in the first insulating layer 3;
  • the material of at least one of the fourth insulating layers 7 is an organic material, and the material of at least one layer is an inorganic material.
  • the thin film transistor By forming an insulating layer in the thin film transistor and a portion of the substrate with an organic material to form an insulating layer in the thin film transistor and another portion in the substrate with an inorganic material, the thin film transistor can be formed to have an insulating layer formed in the thin film transistor with an organic material.
  • Advantages of the substrate and the substrate that is, the manufacturing process is simple, the insulating layer can be integrally formed without stacking layer by layer, and the display substrate can be ensured to be soft and bendable), and the insulating layer and the substrate in the thin film transistor are formed by using an inorganic material.
  • the advantage ie, the dielectric constant of the insulating layer is high, the leakage current in the thin film transistor can be reduced, and the display substrate can have high toughness and bending resistance).
  • the fabrication process of the thin film transistor is simplified, and on the other hand, the electrical performance of the thin film transistor and the physical properties of the display substrate on which the thin film transistor is placed are improved.
  • step S1 includes the sub-steps:
  • the first polydimethylsilane layer is peeled off from the base substrate 8 to serve as the substrate 1, as shown in FIG.
  • the pattern of the recess 11 as the source 22 and the drain 23 can make the shape of the pattern of the source 22 and the drain 23 formed more regular, thereby ensuring good electrical properties of the source 22 and the drain 23.
  • the base substrate 8 may be formed of a silicon material, and since the hydroxyl-functionalized first polydimethylsilane layer has a hydroxyl group at the contact surface between the silicon substrate, the first polydimethylsilane layer can It is easy to peel off from the silicon substrate without causing damage to the first polydimethylsilane layer, thereby ensuring that the surface of the formed substrate 1 is flat.
  • the step of forming the source 22 and the drain 23 includes sub-steps:
  • OTS octadecyltrichlorosilane
  • the glass substrate 9 is removed, and a hydrophilic solution containing a conductive material is coated on the substrate 1 to form a source 22 and a drain 23 in the first recess 11, as shown in FIG.
  • the surface of the substrate 1 can be brought into contact with octadecyltrichlorosilane 91, and the octadecyltrichlorosilane 91 makes the substrate
  • the surface tension (surface energy) of the surface of 1 is lowered, and the first groove 11 is not in contact with octadecyltrichlorosilane 91, and the surface tension of the first polydimethylsilane layer itself is maintained.
  • a hydrophilic solution for example, ethanol
  • a conductive material for example, a metal or an alloy of aluminum, copper, molybdenum, or the like
  • a hydrophilic solution is adsorbed in a recess 11.
  • the metal or alloy in the hydrophilic solution remains in the first recess 11 to form the source 22 and the drain 23 .
  • the step of forming the first insulating layer 3 includes the sub-steps:
  • a hydrophilic solution containing a semiconductor material is coated on the first silicon dioxide layer 31 to form an active layer 24 in the via 32, as shown in FIG.
  • the insulating layer in the thin film transistor can have the advantage of an inorganic material, and on the other hand, silicon dioxide The surface tension is low.
  • a hydrophilic solution containing a semiconductor material is coated on the first silicon dioxide layer 31, the surface of the first silicon dioxide layer 31 does not adsorb the hydrophilic solution, and the through hole 32 The hydrophilic solution is adsorbed. Further, after the hydrophilic solution is evaporated, the semiconductor material (for example, a metal oxide semiconductor material) in the hydrophilic solution remains in the via hole 32 to form the active layer 24.
  • the step of forming the second insulating layer 4 includes the substeps:
  • the surface of the glass substrate 9 coated with the octadecyltrichlorosilane 91 is in contact with the surface of the second insulating layer 4 on which the second groove 41 is formed, as shown in FIG. 18;
  • the surface of the second insulating layer 4 can be brought into contact with octadecyltrichlorosilane 91, octadecyl group
  • the trichlorosilane 91 lowers the surface tension (surface energy) of the surface of the second insulating layer 4, while the second groove 41 does not come into contact with the octadecyltrichlorosilane 91, and still maintains the third polydimethyl group.
  • the silane layer itself has a higher surface tension.
  • a hydrophilic solution for example, ethanol
  • a conductive material for example, a metal or an alloy of aluminum, copper, molybdenum, or the like
  • the surface of the second insulating layer 4 does not adsorb hydrophilicity.
  • the solution while the second groove 41 adsorbs the hydrophilic solution, further, after the hydrophilic solution is evaporated, the metal or alloy in the hydrophilic solution remains in the second groove 41 to form the gate 21 .
  • the source, the drain, the active layer and the gate By forming the source, the drain, the active layer and the gate in the above manner, the combination of the source, the drain, the active layer and the gate and the layer where the gate is respectively located can be more stable and compact, which is more advantageous for ensuring the realization of the thin film transistor. Good electrical function.
  • the gate electrode 21 By forming the gate electrode 21 in the manner of the present embodiment, the gate electrode 21 can be formed inside the second insulating layer 4, so that the structure of the thin film transistor can be ensured.
  • step S3 includes the sub-steps:
  • the upper surface of the third insulating layer 5 is irradiated or oxidized to form a second silicon dioxide layer 51 on the upper surface of the third insulating layer, as shown in FIG.
  • the silicon dioxide is an inorganic material
  • forming the second silicon oxide layer 51 on the upper surface of the third insulating layer 5 can make the insulating layer in the thin film transistor have the advantage of an inorganic material.
  • the fourth polydimethylsilane layer contains silicon element, and a silicon dioxide layer can be formed on the surface of the fourth polydimethylsilane layer directly by light irradiation or oxidation, and the formed silicon dioxide layer and the fourth poly 2 are formed.
  • the methyl silane layer maintains a unitary structure such that the layers are more closely packed.
  • step S5 comprises the substeps:
  • a fourth insulating layer 7 is formed on the pixel electrode 6 using at least one of polydimethylsilane, polyimide, polymethyl methacrylate, and polyvinylpyrrolidone.
  • each layer in the thin film transistor can have an organic material layer (substrate 1 and first insulating layer 3), an inorganic material layer (first silicon oxide layer 31), and organic The spacing distribution of the material layers (the second insulating layer 4 and the third insulating layer 5), the inorganic material layer (the second silicon dioxide layer 51), and the organic material layer (the fourth insulating layer 7), so that the thin film transistor has both organic and organic Advantages of the material layer and advantages including the inorganic material layer.
  • the formation process employed in the above process may include, for example, a deposition process such as deposition, sputtering, and the like, and a patterning process such as etching.
  • the illumination operation involved in the above process can be irradiated by ultraviolet light, and the oxidation operation involved can be oxidized by ozone.
  • the above process of forming the substrate 1 or the insulating layer by the polydimethylsilane layer further includes subjecting the polydimethylsilane layer to low-temperature curing molding (for example, curing at 60 ° C for 4 hours).
  • a bottom gate type thin film transistor can be formed according to the above process as needed.
  • the present invention further provides a display substrate manufactured according to the above manufacturing method, comprising:
  • the thin film transistor includes a gate 21, a source 22, a drain 23, and an active layer 24;
  • a first insulating layer 3 disposed on the substrate 1 and an active layer 24 disposed in the first insulating layer 3;
  • a second insulating layer 4 disposed between the gate electrode 21 and the active layer 24;
  • a pixel electrode 6 disposed on the third insulating layer 5;
  • the material of at least one of the substrate 1, the first insulating layer 3, the second insulating layer 4, the third insulating layer 5, and the fourth insulating layer 7 includes an organic material, and at least one layer of the material includes an inorganic material.
  • a source 22 is provided on a surface of the substrate 1 adjacent to the first insulating layer 3
  • a first recess 11 corresponding to the pattern of the drain 23 is provided with a source pole 22 and a drain 23 in the first recess 11.
  • a through hole 32 corresponding to the pattern of the active layer 24 is disposed in the first insulating layer 3, and an active layer 24 is disposed in the through hole 32,
  • the material of the first insulating layer 3 includes polydimethylsilane, and the first silicon dioxide layer 31 is formed on the upper surface of the first insulating layer 3.
  • a second groove 41 corresponding to the pattern of the gate electrode 21 is disposed on a surface of the second insulating layer 4 adjacent to the third insulating layer 5, and a gate electrode 21 is disposed in the second groove 41.
  • the material of the third insulating layer 5 includes polydimethylsilane, and the second silicon oxide layer 51 is formed on the upper surface of the third insulating layer 5.
  • the material of the fourth insulating layer 7 includes at least one of polydimethylsilane, polyimide, polymethyl methacrylate, and polyvinylpyrrolidone.
  • the present invention also provides a display device comprising the above display substrate.
  • the display device in this embodiment may be any product or component having a display function, such as an electronic paper, a mobile phone, a tablet computer, a television, a notebook computer, a digital photo frame, and a navigator.
  • a display function such as an electronic paper, a mobile phone, a tablet computer, a television, a notebook computer, a digital photo frame, and a navigator.
  • the technical solution of the present invention is described in detail above with reference to the accompanying drawings.
  • the insulating layer in the thin film transistor is only made of an organic material in the prior art, the electrical performance of the thin film transistor is lowered, and only the insulating material is used to fabricate the insulating film in the thin film transistor.
  • the layer may increase the complexity of the fabrication process of the thin film transistor.
  • the present invention can form an insulating layer in the thin film transistor and another portion in the substrate by using an inorganic material to form an insulating layer and a portion of the substrate in the thin film transistor.
  • the thin film transistor has the advantages of including an organic material layer and an inorganic material layer. On one hand, the fabrication process is simplified, and on the other hand, the electrical performance of the thin film transistor and the physical properties of the display substrate on which the thin film transistor is placed are improved.

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Abstract

一种显示基板及其制作方法和一种显示装置，该制作方法包括：形成基底(1)；在基底(1)上形成薄膜晶体管，其中，该薄膜晶体管包括栅极(21)、源极(22)、漏极(23)和有源层(24)，在该栅极(21)和有源层(24)之间形成有第二绝缘层(4)，在该基底(1)上形成有第一绝缘层(3)，该有源层(24)形成在第一绝缘层(3)中；在薄膜晶体管之上形成第三绝缘层(5)；在第三绝缘层(5)之上形成像素电极(6)；在像素电极(6)之上形成第四绝缘层(7)，其中，基底(1)、第一绝缘层(3)、第二绝缘层(4)、第三绝缘层(5)和第四绝缘层(7)中的至少一层的材料为有机材料，至少一层的材料为无机材料。

Description

显示基板及其制作方法和显示装置 技术领域
本发明涉及显示技术领域，具体而言，涉及显示基板制作方法、显示基板和显示装置。
背景技术
现有技术中的柔性基板上的薄膜晶体管(Thin Film Transistor，TFT)中，各导电结构之间的绝缘层一般只采用有机材料制作、或只采用无机材料制作。
在只采用有机材料制作的绝缘层的薄膜晶体管中，由于所采用的有机材料一般为聚合物，而聚合物的介电常数相对较低，单独使用聚合物作为薄膜晶体管中的绝缘层会使得制备出的薄膜晶体管的阈值电压相对较高，并且漏电流较大，影响薄膜晶体管的电学性能。
在只采用无机材料制作的绝缘层的薄膜晶体管中，虽然无机材料的介电常数相对较高，但是在形成绝缘层时，无法一次性制作较厚的无机材料层，需要逐层涂布无机材料才能够得到所需厚度的绝缘层，工艺次数繁多。
发明内容
本发明的一个目的是兼顾有机材料和无机材料作为绝缘层的优点。
为了实现上述目的，本发明提供了一种显示基板制作方法，包括步骤：
形成基底；
在所述基底上形成薄膜晶体管，
其中，所述薄膜晶体管包括栅极、源极、漏极和有源层，在所述栅极和有源层之间形成有第二绝缘层，在所述基底上形成有第一绝缘层，所述有源层形成在第一绝缘层中；
在所述薄膜晶体管之上形成第三绝缘层；
在所述第三绝缘层之上形成像素电极；
在所述像素电极之上形成第四绝缘层，
其中，所述基底、第一绝缘层、第二绝缘层、第三绝缘层和第四绝缘层中的至少一层的材料为有机材料，至少一层的材料为无机材料。
优选地，形成基底的步骤包括：
在衬底基板上形成与源极和漏极的图形对应的第一凸起；
在所述衬底基板上形成羟基功能化的第一聚二甲基硅烷层，以在所述第一聚二甲基硅烷层的靠近衬底基板的面上与所述第一凸起对应的位置处形成与所述源极和漏极的图形对应的第一凹槽；
将所述第一聚二甲基硅烷层从所述衬底基板上剥离，以作为所述基底。
优选地，形成源极和漏极的步骤包括：
在玻璃基板上涂覆十八烷基三氯硅烷；
将所述玻璃基板的涂覆有十八烷基三氯硅烷的面与所述基底的形成有第一凹槽的面相接触；
移除所述玻璃基板，在所述基底上涂覆包含导电材料的亲水性溶液，以在所述第一凹槽中形成源极和漏极。
优选地，形成第一绝缘层的步骤包括：
在所述基底上形成第二聚二甲基硅烷层，以作为所述第一绝缘层；
对所述第一绝缘层的上表面进行光照或氧化处理，以在所述第一 绝缘层的上表面形成第一二氧化硅层；
对所述第一二氧化硅层和所述第一绝缘层进行蚀刻，以形成与所述有源层的图形对应的通孔；
在所述第一二氧化硅层上涂覆包含半导体材料的亲水性溶液，以在所述通孔中形成所述有源层。
优选地，形成第二绝缘层的步骤包括：
在所述第一绝缘层上形成第三聚二甲基硅烷层，以作为所述第二绝缘层；
对所述第二绝缘层进行蚀刻，以形成与所述栅极的图形对应的第二凹槽；
在玻璃基板上涂覆十八烷基三氯硅烷；
将所述玻璃基板的涂覆有十八烷基三氯硅烷的面与所述第二绝缘层的形成有第二凹槽的面相接触；
移除所述玻璃基板，在所述第二绝缘层上涂覆包含导电材料的亲水性溶液，以在所述第二凹槽中形成所述栅极。
优选地，形成第三绝缘层的步骤包括：
在所述第二绝缘层上形成第四聚二甲基硅烷层，以作为所述第三绝缘层；
对所述第三绝缘层的上表面进行光照或氧化处理，以在所述第三绝缘层的上表面形成第二二氧化硅层。
优选地，形成第四绝缘层的步骤包括：
采用聚二甲基硅烷、聚酰亚胺、聚甲基丙烯酸甲酯和聚乙烯吡咯烷酮中的至少一种材料在所述像素电极上形成所述第四绝缘层。
本发明还提供了一种根据上述制作方法制作的显示基板，包括：
基底；
薄膜晶体管，其设置在所述基底之上，
其中，所述薄膜晶体管包括栅极、源极、漏极和有源层；
第一绝缘层，其设置在所述基底上，所述有源层设置在所述第一绝缘层中；
第二绝缘层，其设置在所述栅极和有源层之间；
第三绝缘层，其设置在所述薄膜晶体管之上；
像素电极，其设置在所述第三绝缘层之上；
第四绝缘层，其设置在所述像素电极之上，
其中，所述基底、第一绝缘层、第二绝缘层、第三绝缘层和第四绝缘层中的至少一层的材料包括有机材料，至少一层的材料包括无机材料。
优选地，在所述基底的靠近第一绝缘层的面上设置有与源极和漏极的图形对应的第一凹槽，在所述第一凹槽中设置有源极和漏极。
优选地，在所述第一绝缘层中设置有与所述有源层的图形对应的通孔，在所述通孔中设置有所述有源层，
其中，所述第一绝缘层的材料包括聚二甲基硅烷，在所述第一绝缘层的上表面形成有第一二氧化硅层。
优选地，在所述第二绝缘层的靠近第三绝缘层的面上设置有与所述栅极的图形对应的第二凹槽，在所述第二凹槽中设置有所述栅极。
优选地，所述第三绝缘层的材料包括聚二甲基硅烷，在所述第三绝缘层的上表面形成有第二二氧化硅层。
优选地，所述第四绝缘层的材料包括聚二甲基硅烷、聚酰亚胺、聚甲基丙烯酸甲酯和聚乙烯吡咯烷酮中的至少一种。
本发明还提供了一种显示装置，包括上述显示基板。
根据上述技术方案，通过用有机材料形成薄膜晶体管中的绝缘层和基底中的一部分而用无机材料形成薄膜晶体管中的绝缘层和基底中的另一部分，可以使得薄膜晶体管既具备包括有机材料层的优点又具备包括无机材料层的优点，一方面简化了制作工艺，另一方面提高了薄膜晶体管的电学性能、以及薄膜晶体管所在显示基板的物理性 能。
附图说明
通过参考附图，可以更加清楚地理解本发明的特征和优点，附图是示意性的而不应被理解为对本发明进行任何限制，在附图中：
图1示出了根据本发明一个实施例的显示基板制作方法的示意流程图；
图2示出了根据本发明一个实施例的形成基底的示意流程图；
图3示出了根据本发明一个实施例的形成源极和漏极的示意流程图；
图4示出了根据本发明一个实施例的形成第一绝缘层的示意流程图；
图5示出了根据本发明一个实施例的形成第二绝缘层的示意流程图；
图6示出了根据本发明一个实施例的形成第三绝缘层的示意流程图；
图7至图9示出了根据本发明一个实施例的形成基底的具体示意流程图；
图10和图11示出了根据本发明一个实施例的形成源极和漏极的具体示意流程图；
图12至图15示出了根据本发明一个实施例的形成第一绝缘层的具体示意流程图；
图16至图19示出了根据本发明一个实施例的形成第二绝缘层的具体示意流程图；
图20和图21示出了根据本发明一个实施例的形成第三绝缘层的具体示意流程图；以及
图22示出了根据本发明一个实施例的显示基板的结构示意图。
附图标号说明：
1-基底；11-第一凹槽；21-栅极；22-源极；23-漏极；24-有源层；3-第一绝缘层；31-第一二氧化硅层；32-通孔；4-第二绝缘层；41-第二凹槽；5-第三绝缘层；51-第二二氧化硅层；6-像素电极；7-第四绝缘层；8-衬底基板；81-第一凸起；9-玻璃基板；91-十八烷基三氯硅烷。
具体实施方式
为了使本领域技术人员能够更清楚地理解本发明的上述目的、特征和优点，下面结合附图和具体实施方式对本发明进行进一步详细描述。需要说明的是，在不冲突的情况下，本申请中的实施例及实施例中的特征可以相互组合。
在下面的描述中阐述了很多具体细节以便于充分理解本发明，但是，本发明还可以采用不同于在此描述的其他方式来实施，因此，本发明的保护范围并不受下面公开的具体实施例的限制。
如图1所示，根据本发明一个实施例的显示基板制作方法，包括步骤：
S1，形成基底1；
S2，在基底1上形成薄膜晶体管，
其中，薄膜晶体管包括栅极21、源极22、漏极23和有源层24，在栅极21和有源层24之间形成有第二绝缘层4，在基底1上形成有第一绝缘层3，有源层24形成在第一绝缘层3中；
S3，在薄膜晶体管之上形成第三绝缘层5；
S4，在第三绝缘层5之上形成像素电极6；
S5，在像素电极6之上形成第四绝缘层7，
其中，基底1、第一绝缘层3、第二绝缘层4、第三绝缘层5和 第四绝缘层7中的至少一层的材料为有机材料，至少一层的材料为无机材料。
通过用有机材料形成薄膜晶体管中的绝缘层和基底中的一部分而用无机材料形成薄膜晶体管中的绝缘层和基底中的另一部分，可以使得薄膜晶体管既具备用有机材料形成薄膜晶体管中的绝缘层和基底时的优点(即制作工艺简单，可以整体成型制作绝缘层而无需逐层堆叠，并且能够保证显示基板柔软而可弯曲)，同时还具备用无机材料形成薄膜晶体管中的绝缘层和基底时的优点(即绝缘层介电常数较高，可以降低薄膜晶体管中的漏电流，并且能够保证显示基板具有较高的韧性、耐弯折)。从而，一方面简化了薄膜晶体管的制作工艺，另一方面提高了薄膜晶体管的电学性能、以及薄膜晶体管所在显示基板的物理性能。
如图2所示，优选地，形成基底1的步骤(即步骤S1)包括子步骤：
S11，在衬底基板8上形成与源极22和漏极23的图形对应的第一凸起81，如图7所示；
S12，在衬底基板8上形成羟基功能化的第一聚二甲基硅烷(Polydimethylsiloxane，PDMS)层，且在第一聚二甲基硅烷层的靠近衬底基板8的面上与第一凸起81对应的位置处形成与源极22和漏极23的图形对应的第一凹槽11，如图8所示；
S13，将第一聚二甲基硅烷层从衬底基板8上剥离，以作为基底1，如图9所示。
与通过蚀刻在第一聚二甲基硅烷层中形成源极22和漏极23的图形相比，通过以与第一凸起81互补的方式在第一聚二甲基硅烷层中形成第一凹槽11作为源极22和漏极23的图形可以使形成的源极22和漏极23的图形的形状更加规则，进而能保证源极22和漏极23具有良好的电学性能。
另外，还可以用硅材料形成衬底基板8，由于羟基功能化的第一聚二甲基硅烷层与硅基板之间的接触面处具有羟基基团，因此第一聚二甲基硅烷层能够容易地从硅基板上剥离而不会对第一聚二甲基硅烷层造成损伤，从而能保证形成的基底1的表面平整。
如图3所示，优选地，形成源极22和漏极23的步骤包括子步骤：
S201，在玻璃基板9上涂覆十八烷基三氯硅烷(Octadecyltrichlorosilane，OTS)91；
S202，将玻璃基板9的涂覆有十八烷基三氯硅烷91的面与基底1的形成有第一凹槽11的面相接触，如图10所示；
S203，移除玻璃基板9，在基底1上涂覆包含导电材料的亲水性溶液，以在第一凹槽11中形成源极22和漏极23，如图11所示。
通过将涂覆有十八烷基三氯硅烷91的玻璃基板9与基底1接触，可以使得基底1的表面与十八烷基三氯硅烷91相接触，十八烷基三氯硅烷91使得基底1的表面的表面张力(表面能)下降，而第一凹槽11内不会与十八烷基三氯硅烷91相接触，仍保持第一聚二甲基硅烷层本身较高的表面张力。
然后，在将包含导电材料(例如铝、铜、钼等金属或合金)的亲水性溶液(例如乙醇)涂覆在基底1上时，基底1的表面不会吸附亲水性溶液，而第一凹槽11内则会吸附亲水性溶液，进一步地，将亲水性溶液蒸发后，亲水性溶液中的金属或合金就保留在第一凹槽11内形成源极22和漏极23。通过本实施例的方式形成源极22和漏极23，可以将源极22和漏极23形成在基底1内部，从而能保证薄膜晶体管与基底1结合牢固。
如图4所示，优选地，形成第一绝缘层3的步骤包括子步骤：
S204，在基底1上形成第二聚二甲基硅烷层，以作为第一绝缘层3，如图12所示；
S205，对第一绝缘层3的上表面进行光照或氧化处理，以在第一 绝缘层的上表面形成第一二氧化硅层31，如图13所示；
S206，对第一二氧化硅层31和第一绝缘层3进行蚀刻，以形成与有源层24的图形对应的通孔32，如图14所示；
S207，在第一二氧化硅层31上涂覆包含半导体材料的亲水性溶液，以在通孔32中形成有源层24，如图15所示。
在所述第一绝缘层3的上表面形成第一二氧化硅层31，一方面由于二氧化硅是无机材料，可以使得薄膜晶体管中的绝缘层具备无机材料的优点，另一方面二氧化硅的表面张力较低，当在第一二氧化硅层31上涂覆包含半导体材料的亲水性溶液时，第一二氧化硅层31的表面不会吸附亲水性溶液，而通孔32内会吸附亲水性溶液，进一步地，将亲水性溶液蒸发后，亲水性溶液中的半导体材料(例如金属氧化物半导体材料)就保留在通孔32中形成了有源层24。
如图5所示，优选地，形成第二绝缘层4的步骤包括子步骤：
S208，在第一绝缘层3上形成第三聚二甲基硅烷层，以作为第二绝缘层4，如图16所示；
S209，对第二绝缘层4进行蚀刻，以形成与栅极21的图形对应的第二凹槽41，如图17所示；
S210，在玻璃基板9上涂覆十八烷基三氯硅烷91；
S211，将玻璃基板9的涂覆有十八烷基三氯硅烷91的面与第二绝缘层4的形成有第二凹槽41的面相接触，如图18所示；
S212，移除玻璃基板9，在第二绝缘层4上涂覆包含导电材料的亲水性溶液，以在第二凹槽41中形成栅极21，如图19所示。
通过将涂覆有十八烷基三氯硅烷91的玻璃基板9与第二绝缘层4接触，可以使得第二绝缘层4的表面与十八烷基三氯硅烷91相接触，十八烷基三氯硅烷91使得第二绝缘层4的表面的表面张力(表面能)下降，而第二凹槽41内不会与十八烷基三氯硅烷91相接触，仍保持第三聚二甲基硅烷层本身较高的表面张力。
在将包含导电材料(例如铝、铜、钼等金属或合金)的亲水性溶液(例如乙醇)涂覆在第二绝缘层4上时，第二绝缘层4的表面不会吸附亲水性溶液，而第二凹槽41内则会吸附亲水性溶液，进一步地，将亲水性溶液蒸发后，亲水性溶液中的金属或合金就保留在第二凹槽41内形成栅极21。
通过上述方式形成源极、漏极、有源层和栅极，可以使得源极、漏极、有源层和栅极与其分别所在的层的结合更加稳定且紧凑，更有利于保证薄膜晶体管实现良好的电学功能。通过本实施例的方式形成栅极21，可以将栅极21形成在第二绝缘层4内部，从而能保证薄膜晶体管的结构牢固。
如图6所示，优选地，形成第三绝缘层5的步骤(即步骤S3)包括子步骤：
S31，在第二绝缘层4上形成第四聚二甲基硅烷层，以作为第三绝缘层5，如图20；
S32，对第三绝缘层5的上表面进行光照或氧化处理，以在第三绝缘层的上表面形成第二二氧化硅层51，如图21。
由于二氧化硅是无机材料，在所述第三绝缘层5的上表面形成第二二氧化硅层51可以使得薄膜晶体管中的绝缘层具备无机材料的优点。而且，第四聚二甲基硅烷层中包含硅元素，可以直接通过光照或者氧化来在第四聚二甲基硅烷层的表面形成二氧化硅层，形成的二氧化硅层与第四聚二甲基硅烷层保持一体结构，使得各层结构之间更加紧密。
优选地，形成第四绝缘层7的步骤(即步骤S5)包括子步骤：
采用聚二甲基硅烷、聚酰亚胺、聚甲基丙烯酸甲酯和聚乙烯吡咯烷酮中的至少一种材料在像素电极6上形成第四绝缘层7。
通过上述工艺，可以使得薄膜晶体管中的各层具有有机材料层(基底1和第一绝缘层3)、无机材料层(第一二氧化硅层31)、有机 材料层(第二绝缘层4和第三绝缘层5)、无机材料层(第二二氧化硅层51)和有机材料层(第四绝缘层7)的间隔分布，使得薄膜晶体管同时具备包括有机材料层的优点和包括无机材料层的优点。
需要说明的是，上述流程所采用的形成工艺例如可包括沉积、溅射等成膜工艺和刻蚀等构图工艺。上述工艺中所涉及的光照操作可以通过紫外光进行照射，所涉及的氧化操作可以通过臭氧进行氧化。
上述采用十八烷基三氯硅烷的工艺也可以替换为采用六甲基硅氧烷。
上述通过聚二甲基硅烷层形成基底1或绝缘层的工艺还包括对聚二甲基硅烷层进行低温固化成型(例如在60℃下固化4小时)。
上述工艺仅以形成顶栅型薄膜晶体管进行了示例性说明，实际上可以视需要来根据上述工艺形成底栅型薄膜晶体管。
如图22所示，本发明还提供了一种根据上述制作方法制作的显示基板，包括：
基底1；
薄膜晶体管，其设置在基底1之上，
其中，薄膜晶体管包括栅极21、源极22、漏极23和有源层24；
第一绝缘层3，其设置在基底1上，有源层24设置在第一绝缘层3中；
第二绝缘层4，其设置在栅极21和有源层24之间；
第三绝缘层5，其设置在薄膜晶体管之上；
像素电极6，其设置在第三绝缘层5之上；以及
第四绝缘层7，其设置在像素电极6之上，
其中，基底1、第一绝缘层3、第二绝缘层4、第三绝缘层5和第四绝缘层7中的至少一层的材料包括有机材料，至少一层的材料包括无机材料。
优选地，在基底1的靠近第一绝缘层3的面上设置有与源极22 和漏极23的图形对应的第一凹槽11，在第一凹槽11中设置有源极22和漏极23。
优选地，在第一绝缘层3中设置有与有源层24的图形对应的通孔32，在通孔32中设置有有源层24，
其中，第一绝缘层3的材料包括聚二甲基硅烷，在第一绝缘层3的上表面形成有第一二氧化硅层31。
优选地，在第二绝缘层4的靠近第三绝缘层5的面上设置有与栅极21的图形对应的第二凹槽41，在第二凹槽41中设置有栅极21。
优选地，第三绝缘层5的材料包括聚二甲基硅烷，在第三绝缘层5的上表面形成有第二二氧化硅层51。
优选地，第四绝缘层7的材料包括聚二甲基硅烷、聚酰亚胺、聚甲基丙烯酸甲酯和聚乙烯吡咯烷酮中的至少一种。
本发明还提供了一种显示装置，包括上述显示基板。
需要说明的是，本实施例中的显示装置可以为电子纸、手机、平板电脑、电视机、笔记本电脑、数码相框、导航仪等具有显示功能的任何产品或部件。
以上结合附图详细说明了本发明的技术方案，考虑到现有技术中只采用有机材料制作薄膜晶体管中的绝缘层会使得薄膜晶体管的电学性能下降、而只采用无机材料制作薄膜晶体管中的绝缘层会提高薄膜晶体管的制作工艺的复杂度，本发明通过用有机材料形成薄膜晶体管中的绝缘层和基底中的一部分而用无机材料形成薄膜晶体管中的绝缘层和基底中的另一部分，可以使得薄膜晶体管既具备包括有机材料层的优点又具备包括无机材料层的优点，一方面简化了制作工艺，另一方面提高了薄膜晶体管的电学性能、以及薄膜晶体管所在显示基板的物理性能。
需要指出的是，在附图中，为了图示的清晰可能夸大了层和区域的尺寸。而且，应当理解的是，当元件或层被称为在另一元件或层“上” 时，它可以直接在其他元件上、或者其间可以存在一个或以上的中间的层或元件。另外，应当理解的是，当元件或层被称为在另一元件或层“下”时，它可以直接在其他元件下、或者其间可以存在一个或以上的中间的层或元件。另外，还应当理解的是，当层或元件被称为在两层或两个元件“之间”时，它可以为两层或两个元件之间的惟一的层、或者两层或两个元件之间还可以存在一个或以上的其他中间层或元件。通篇相似的参考标记指示相似的元件。
在本发明中，术语“第一”、“第二”、“第三”和“第四”仅用于描述目的，而不能理解为指示或暗示相对重要性。术语“多个”指两个或两个以上，除非另有明确的限定。
以上所述仅为本发明的优选实施例而已，并不用于限制本发明，对于本领域的技术人员来说，本发明可以有各种更改和变化。凡在本发明的精神和原则之内所作的任何修改、等同替换、改进等均应包含在本发明的保护范围之内。

Claims (14)

  1. 一种显示基板制作方法，其特征在于，包括步骤：
    形成基底；
    在所述基底上形成薄膜晶体管，
    其中，所述薄膜晶体管包括栅极、源极、漏极和有源层，在所述栅极和有源层之间形成有第二绝缘层，在所述基底上形成有第一绝缘层，所述有源层形成在第一绝缘层中；
    在所述薄膜晶体管之上形成第三绝缘层；
    在所述第三绝缘层之上形成像素电极；
    在所述像素电极之上形成第四绝缘层，
    其中，所述基底、第一绝缘层、第二绝缘层、第三绝缘层和第四绝缘层中的至少一层的材料为有机材料，至少一层的材料为无机材料。
  2. 根据权利要求1所述的制作方法，其特征在于，形成基底的步骤包括：
    在衬底基板上形成与源极和漏极的图形对应的第一凸起；
    在所述衬底基板上形成羟基功能化的第一聚二甲基硅烷层，以在所述第一聚二甲基硅烷层的靠近衬底基板的面上与所述第一凸起对应的位置处形成与源极和漏极的图形对应的第一凹槽；
    将所述第一聚二甲基硅烷层从所述衬底基板上剥离，以作为所述基底。
  3. 根据权利要求2所述的制作方法，其特征在于，形成源极和漏极的步骤包括：
    在玻璃基板上涂覆十八烷基三氯硅烷；
    将所述玻璃基板的涂覆有十八烷基三氯硅烷的面与所述基底的形成有第一凹槽的面相接触；
    移除所述玻璃基板，在所述基底上涂覆包含导电材料的亲水性溶液，以在所述第一凹槽中形成源极和漏极。
  4. 根据权利要求1所述的制作方法，其特征在于，形成第一绝缘层的步骤包括：
    在所述基底上形成第二聚二甲基硅烷层，以作为所述第一绝缘层；
    对所述第一绝缘层的上表面进行光照或氧化处理，以在所述第一绝缘层的上表面形成第一二氧化硅层；
    对所述第一二氧化硅层和所述第一绝缘层进行蚀刻，以形成与所述有源层的图形对应的通孔；
    在所述第一二氧化硅层上涂覆包含半导体材料的亲水性溶液，以在所述通孔中形成所述有源层。
  5. 根据权利要求1所述的制作方法，其特征在于，形成第二绝缘层的步骤包括：
    在所述第一绝缘层上形成第三聚二甲基硅烷层，以作为所述第二绝缘层；
    对所述第二绝缘层进行蚀刻，以形成与所述栅极的图形对应的第二凹槽；
    在玻璃基板上涂覆十八烷基三氯硅烷；
    将所述玻璃基板的涂覆有十八烷基三氯硅烷的面与所述第二绝缘层的形成有第二凹槽的面相接触；
    移除所述玻璃基板，在所述第二绝缘层上涂覆包含导电材料的亲水性溶液，以在所述第二凹槽中形成所述栅极。
  6. 根据权利要求1所述的制作方法，其特征在于，形成第三绝缘层的步骤包括：
    在所述第二绝缘层上形成第四聚二甲基硅烷层，以作为所述第三绝缘层；
    对所述第三绝缘层的上表面进行光照或氧化处理，以在所述第三绝缘层的上表面形成第二二氧化硅层。
  7. 根据权利要求1至6中任一项所述的制作方法，其特征在于，形成第四绝缘层的步骤包括：
    采用聚二甲基硅烷、聚酰亚胺、聚甲基丙烯酸甲酯和聚乙烯吡咯烷酮中的至少一种材料在所述像素电极上形成所述第四绝缘层。
  8. 一种根据权利要求1至7中任一项所述制作方法制作的显示基板，其特征在于，包括：
    基底；
    薄膜晶体管，其设置在所述基底之上，
    其中，所述薄膜晶体管包括栅极、源极、漏极和有源层；
    第一绝缘层，其设置在所述基底上，所述有源层设置在所述第一绝缘层中；
    第二绝缘层，其设置在所述栅极和有源层之间；
    第三绝缘层，其设置在所述薄膜晶体管之上；
    像素电极，其设置在所述第三绝缘层之上；
    第四绝缘层，其设置在所述像素电极之上，
    其中，所述基底、第一绝缘层、第二绝缘层、第三绝缘层和第四绝缘层中的至少一层的材料包括有机材料，至少一层的材料包括无机材料。
  9. 根据权利要求8所述的显示基板，其特征在于，在所述基底的靠近第一绝缘层的面上设置有与源极和漏极的图形对应的第一凹槽，在所述第一凹槽中设置有源极和漏极。
  10. 根据权利要求8所述的显示基板，其特征在于，在所述第一绝缘层中设置有与所述有源层的图形对应的通孔，在所述通孔中设置有所述有源层，
    其中，所述第一绝缘层的材料包括聚二甲基硅烷，在所述第一绝缘层的上表面形成有第一二氧化硅层。
  11. 根据权利要求8所述的显示基板，其特征在于，在所述第二绝缘层的靠近第三绝缘层的面上设置有与所述栅极的图形对应的第二凹槽，在所述第二凹槽中设置有所述栅极。
  12. 根据权利要求8所述的显示基板，其特征在于，所述第三绝缘层的材料包括聚二甲基硅烷，在所述第三绝缘层的上表面形成有第二二氧化硅层。
  13. 根据权利要求8至12中任一项所述的显示基板，其特征在于，所述第四绝缘层的材料包括聚二甲基硅烷、聚酰亚胺、聚甲基丙烯酸甲酯和聚乙烯吡咯烷酮中的至少一种。
  14. 一种显示装置，其特征在于，包括权利要求8至13中任一项所述的显示基板。
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