WO2017020518A1 - 阵列基板、液晶显示面板及显示装置 - Google Patents

阵列基板、液晶显示面板及显示装置 Download PDF

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Publication number
WO2017020518A1
WO2017020518A1 PCT/CN2015/099338 CN2015099338W WO2017020518A1 WO 2017020518 A1 WO2017020518 A1 WO 2017020518A1 CN 2015099338 W CN2015099338 W CN 2015099338W WO 2017020518 A1 WO2017020518 A1 WO 2017020518A1
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WIPO (PCT)
Prior art keywords
array substrate
sub
wire grid
polarizing film
disposed
Prior art date
Application number
PCT/CN2015/099338
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English (en)
French (fr)
Inventor
王英涛
Original Assignee
京东方科技集团股份有限公司
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Application filed by 京东方科技集团股份有限公司 filed Critical 京东方科技集团股份有限公司
Priority to US15/037,879 priority Critical patent/US9891469B2/en
Publication of WO2017020518A1 publication Critical patent/WO2017020518A1/zh

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    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
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    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
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    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
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    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
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    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136286Wiring, e.g. gate line, drain line
    • GPHYSICS
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    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/1368Active matrix addressed cells in which the switching element is a three-electrode device
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/133345Insulating layers
    • GPHYSICS
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    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
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    • G02F1/133531Polarisers characterised by the arrangement of polariser or analyser axes
    • GPHYSICS
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    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
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    • G02F1/133548Wire-grid polarisers
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    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
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    • G02F1/134345Subdivided pixels, e.g. for grey scale or redundancy
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    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1343Electrodes
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    • G02F1/134363Electrodes characterised by their geometrical arrangement for applying an electric field parallel to the substrate, i.e. in-plane switching [IPS]
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    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
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    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
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    • G02F2201/12Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode
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Definitions

  • Embodiments of the present invention relate to an array substrate, a liquid crystal display panel, and a display device.
  • transmissive liquid crystal displays emit light under direct sunlight. Therefore, people are constantly seeking ways to achieve better contrast between the display indoors and outdoors.
  • Transflective technology has been included in a solution to the reduction of outdoor contrast.
  • there are usually two main ways to achieve transflective One is to achieve a single-box thickness of the Electronically Controlled Birefringence (ECB) mode, however this mode usually requires an additional compensation film and the viewing angle is not good.
  • EBC Electronically Controlled Birefringence
  • the other is a double-box thick transflective mode.
  • the process of this mode is complicated, the production cost is high, and the display characteristics are not very good.
  • At least one embodiment of the present invention provides an array substrate, a liquid crystal display panel, and a display device, which can make the display panel and the display device including the array substrate provided by the embodiment of the present invention have more uniform brightness and good overall uniformity.
  • At least one embodiment of the present invention provides an array substrate including a substrate substrate and a plurality of sub-pixels disposed on the substrate, each of the sub-pixels including a plurality of transmissive regions and a plurality of reflective regions.
  • the transmissive area and the reflective area are alternately arranged in a first direction.
  • the transmissive area and the reflective area are alternately arranged in a second direction, and the second direction is perpendicular to the first direction.
  • the plurality of transmissive regions and/or the plurality of reflective regions in a region where each of the sub-pixels are located are evenly distributed in the sub-pixels.
  • a wire is disposed in each of the sub-pixels.
  • a gate polarizing film, each of the sub-pixels, the wire grid polarizing film includes a plurality of sets of a plurality of parallelly disposed metal lines disposed in the plurality of reflective regions, each of the reflective regions being provided with a set of the plurality of reflective regions a plurality of metal wires arranged in parallel, wherein a plurality of parallelly disposed metal wires in the wire grid polarizing film are disposed to transmit linearly polarized light having a polarization direction perpendicular to a direction in which the metal wires extend and a direction of reflection polarization parallel to the metal Linearly polarized light in the direction of line extension.
  • the metal wire material comprises one or a combination of aluminum, chromium, copper, silver, nickel, iron, and cobalt.
  • an array substrate provided by an embodiment of the present invention further includes a plurality of data lines, and the wire grid polarizing film is disposed in the same layer as the plurality of data lines and insulated from each other.
  • an array substrate provided by an embodiment of the present invention further includes a plurality of gate lines, and the wire grid polarizing film is disposed in the same layer as the plurality of gate lines and insulated from each other.
  • an array substrate further includes a common electrode line disposed in the same layer and extending in the same direction as the gate line, and the wire grid polarizing film and the common electrode line are electrically connected in each of the sub-pixels. Sexual connection.
  • a wire grid polarizing film in each sub-pixel is electrically connected to a pixel electrode in the sub-pixel.
  • an array substrate provided by an embodiment of the present invention further includes a thin film transistor, and the wire grid polarizing film is multiplexed as a pixel electrode in the sub-pixel, and the pixel electrode is electrically connected to a drain of the thin film transistor.
  • the pixel electrode in the sub-pixel is a slit-shaped electrode.
  • an array substrate provided by an embodiment of the present invention further includes a common electrode, and the common electrode is located between the pixel electrode and the substrate.
  • the wire grid polarizing film is multiplexed as a common electrode in the sub-pixel.
  • the common electrode in the sub-pixel is a slit electrode or a comb electrode.
  • an array substrate further includes a pixel electrode and a thin film transistor, the pixel electrode is located between the common electrode and the substrate, and the pixel electrode and the drain of the thin film transistor are electrically Sexual connection.
  • the wire grid polarizing film is multiplexed as a pixel electrode and a common electrode of a finger structure provided in the same layer.
  • a transparent metal oxide conductive layer is disposed on the wire grid polarizing film in each of the sub-pixels.
  • the transparent metal oxide conductive layer and the pattern of the wire grid polarizing film are identical.
  • At least one embodiment of the present invention further provides a liquid crystal display panel comprising: an opposite opposing substrate and an array substrate, and a liquid crystal layer filled between the array substrate and the opposite substrate;
  • the array substrate is the array substrate described in any of the embodiments of the present invention.
  • a wire grid polarizing film is disposed in each of the sub-pixels, and each of the sub-pixels includes a plurality of the wire grid polarizing films.
  • a plurality of sets of a plurality of parallelly disposed metal lines in the reflective area, each of the reflective areas is provided with a plurality of the plurality of parallelly disposed metal lines, and a plurality of parallelly arranged metal lines in the wire grid polarizing film are disposed
  • the linearly polarized light having a polarization direction perpendicular to the extending direction of the metal line and the linearly polarized light having a direction of reflection polarization parallel to the extending direction of the metal line are disposed on a side of the array substrate away from the opposite substrate In the polarizing plate, a direction in which the plurality of parallelly disposed metal wires extend is parallel to a direction of a polarization axis of the lower polarizing plate.
  • At least one embodiment of the present invention further provides a display device comprising the liquid crystal display panel according to any embodiment of the present invention.
  • 1a is a top plan view of a region in which a sub-pixel in an array substrate includes a plurality of transmissive regions and a plurality of reflective regions according to an embodiment of the present invention
  • 1b is a top plan view showing a region in which a sub-pixel in an array substrate includes a plurality of transmissive regions and a plurality of reflective regions according to another embodiment of the present invention
  • FIG. 1c is a schematic top view of a region in which a sub-pixel in an array substrate includes a plurality of transmissive regions and a plurality of reflective regions according to another embodiment of the present invention (transmission region and reflective region are in the Alternately arranged in one direction and in the second direction);
  • FIG. 1 is a top plan view of a wire grid polarizing film provided in an array substrate according to an embodiment of the invention
  • 1e is a schematic top plan view of an array substrate having a wire grid polarizing film according to another embodiment of the present invention.
  • FIG. 2a is a schematic perspective view of a plurality of parallelly disposed metal lines in a reflective region in an array substrate according to an embodiment of the present invention
  • 2b is a schematic diagram of light transmission and reflection of a plurality of parallelly disposed metal lines in a reflective region in an array substrate according to an embodiment of the present invention
  • 3a is a schematic diagram of an array substrate with a wire grid polarizing film according to an embodiment of the invention.
  • 3b is a cross-sectional view showing a line-gate polarizing film and a gate line in the same layer in the array substrate according to an embodiment of the present invention (a cross-sectional view taken along line A-A' in FIG. 3a);
  • FIG. 4a is a schematic diagram of multiplexing a wire grid polarizing film into a pixel electrode in an array substrate according to an embodiment of the invention
  • FIG. 4B is a cross-sectional view of an array substrate of an ADS mode in which a wire grid polarizing film is multiplexed into a pixel electrode according to an embodiment of the present invention (a cross-sectional view taken along line A-A' in FIG. 4a);
  • 4c is a cross-sectional view of an array substrate of an ADS mode in which a wire grid polarizing film is multiplexed into a common electrode according to an embodiment of the present invention
  • 4D is a cross-sectional view of an array substrate of an ADS mode in which a wire grid polarizing film is multiplexed into a pixel electrode and a transparent metal oxide conductive layer is disposed thereon according to an embodiment of the present invention
  • FIG. 5 is a cross-sectional view of an array substrate of an ADS mode in which a wire grid polarizing film and a gate line are disposed in the same layer according to an embodiment of the present invention
  • 6a is a schematic diagram of an IPS mode array substrate in which a wire grid polarizing film is multiplexed into a pixel electrode and a common electrode according to an embodiment of the present invention
  • 6b is another schematic diagram of an IPS mode array substrate in which a wire grid polarizing film is multiplexed into a pixel electrode and a common electrode according to an embodiment of the present invention
  • 6c is a schematic diagram of a pixel electrode and a common electrode of the interposer structure disposed in the same layer;
  • FIG. 7 is a schematic diagram of a display panel according to an embodiment of the invention.
  • FIG. 8 is a schematic diagram of a method for implementing a dark state in a display panel or a display device in an ADS mode according to an embodiment of the present invention
  • FIG. 9 is a schematic diagram of a method for implementing a bright state in a display panel or a display device in an ADS mode according to an embodiment of the present invention.
  • LCDs liquid crystal displays
  • the display area is divided into a reflective area and a transmissive area, wherein the transmissive area is displayed by means of backlight emission, and the reflective area is displayed by reflecting external ambient light. In this way, in an environment with strong outdoor light, the reflected light can be used to compensate the display effect.
  • one sub-pixel contains only one reflective region and one transmissive region, and its display characteristics are not very good, such as uneven brightness.
  • WGP wire grid polarizer
  • An embodiment of the present invention provides an array substrate, as shown in FIG. 1a, including a substrate substrate 100 and a plurality of sub-pixels 103 on the substrate substrate 100.
  • the substrate substrate 100 includes a plurality of data lines 101 and a plurality of gate lines 102 which are interdigitated and insulated from each other, on the substrate.
  • a plurality of sub-pixels 103 arranged in an array may be defined on the substrate 100 by a plurality of data lines 101 and a plurality of gate lines 102. It should be noted that the sub-pixel 103 may be defined by a plurality of gate lines and a plurality of data lines, but is not limited thereto.
  • One sub-pixel 103 includes, for example, a gate line, a data line, a pixel electrode, and a switching element.
  • the sub-pixel 103 is the smallest unit in the array substrate for display.
  • Each of the sub-pixels 103 includes a plurality of transmissive regions 105 and a plurality of reflective regions 104 (not limited to the specific number shown in the figures).
  • the plurality of transmissive regions 105 are not mutually co-edges
  • the plurality of reflective regions 104 are not mutually co-edges.
  • Non-co-edges mean that the pattern formed by the transmissive area and the pattern formed by the reflective area have no common side.
  • the area where each sub-pixel is located includes a plurality of transmissive areas and reflective areas, so that the embodiment of the present invention can be provided.
  • the display panel and the display device of the array substrate have more uniform brightness and good overall uniformity. Moreover, good brightness uniformity can be obtained both indoors and outdoors.
  • the transmissive area 105 and the reflective area 104 are alternately arranged in the first direction.
  • the first direction is a horizontal direction parallel to the paper surface.
  • a plurality of the embodiments described in the embodiments of the present invention are, for example, more than one.
  • the transmissive area 105 and the reflective area 104 may all be strip-shaped, for example, rectangular areas, but are not limited thereto.
  • the transmissive area 105 and the reflective area 104 may also be other shapes than the rectangular area.
  • the shape of the reflective area 104 may include a shape of a line shape, a zigzag shape, a circle shape, or the like.
  • the shape of the transmissive area 105 may include a shape of a line shape, a zigzag shape, a circle shape, or the like.
  • Fig. 1b shows the case where the transmissive area 105 and the reflective area 104 are both line-shaped.
  • the shape of the transmissive area 105 and the reflective area 104 is not specifically limited in the embodiment of the present invention.
  • the transmissive area 105 and the reflective area 104 are alternately arranged in the first direction, and the transmissive area 105 and the reflective area 104 are alternately arranged in the second direction.
  • the two directions are perpendicular to the first direction.
  • the transmission region 105 and the reflective region 104 are alternately arranged in both the first direction and the second direction to make the distribution of the transmissive region 105 and the reflective region 104 more uniform. It is more advantageous to improve the uniformity of luminance distribution of the display panel of the array substrate including the type of the transmissive region and the reflective region.
  • a wire grid polarizing film 106 is provided in each of the sub-pixels 103.
  • the wire grid polarizing film 106 includes a plurality of sets of a plurality of parallelly disposed metal lines 116 disposed in the plurality of reflective regions 104, and each of the reflective regions 104 is provided with a plurality of sets of parallelly arranged metal lines and lines.
  • a plurality of parallelly disposed metal lines 116 in each of the reflective regions 104 of the gate polarizing film 106 are configured to transmit linearly polarized light having a polarization direction perpendicular to a direction in which the metal lines extend and a linear polarization in which a direction of reflection polarization is parallel to a direction in which the metal lines extend.
  • Light A plurality of metal wires arranged in parallel are wire grid polarizers.
  • FIG. 1d is a schematic view showing a plurality of parallelly disposed metal lines in each of the reflective regions in a case where the transmissive region and the reflective region are both rectangular
  • FIG. 1e is a case where each of the transmissive region and the reflective region are in a zigzag shape. Schematic diagram of a plurality of parallel arranged metal lines in the area.
  • FIG. 1d and FIG. 1e illustrate a case where a plurality of parallelly disposed metal lines in each reflective region of the wire grid polarizing film are illustrated by alternately arranging the transmissive region and the reflective region in the first direction.
  • the transmissive area and the reflective area are alternately arranged in the second direction can be referred to FIG. 1c and the case where the transmissive area and the reflective area are alternately arranged in the first direction.
  • a plurality of transmissive regions and a plurality of reflective regions in a region where each sub-pixel is located are uniformly distributed in the sub-pixels, but are not limited thereto.
  • the plurality of transmissive regions and/or the plurality of reflective regions may also be unevenly distributed in the sub-pixels.
  • the array substrate provided by the embodiment of the present invention includes the sub-pixels including the plurality of transmissive regions and the plurality of reflective regions as described above.
  • all of the sub-pixels of the array substrate include a plurality of transmissive regions and a plurality of reflective regions.
  • a plurality of transmissive regions and a plurality of reflective regions are included in a portion of the sub-pixels of the array substrate.
  • other types of sub-pixels may also be included in the array substrate provided by the embodiments of the present invention.
  • a plurality of transmissive regions and a plurality of reflective regions as described above are not included in other types of sub-pixels.
  • the sub-pixels including the plurality of transmissive regions and the plurality of reflective regions may be uniformly distributed on the base substrate, or may be unevenly distributed. In the case where the sub-pixels including the plurality of transmissive regions and the plurality of reflective regions are uniformly distributed on the base substrate, the brightness uniformity of the display panel including the array substrate is improved.
  • a plurality of parallelly disposed metal lines 116 in the reflective region 104 can be as shown in FIG. 2a.
  • Each of the reflective regions 104 includes a plurality of metal wires 116 disposed in parallel.
  • the properties of the wire grid polarizing film are as follows: for natural light to be applied to the wire grid bias On the light film, linearly polarized light parallel to the direction of the metal line is almost completely reflected back, and linearly polarized light perpendicular to the direction of the metal line can be transmitted through.
  • the width W of each metal wire may be 30 nm to 50 nm.
  • the distance P between adjacent two metal wires may be 100-150 nm.
  • the height H of each metal wire may be 100-300 nm.
  • the plurality of parallelly disposed metal lines in the wire grid polarizing film 106 in the array substrate provided by the embodiment of the present invention can be obtained by depositing a metal film, coating a photoresist, exposing and developing a photoresist pattern, and using a photoresist pattern as a photoresist pattern.
  • the mask is formed by etching or the like, and for example, exposure and development can be performed by an interference exposure method using a laser. That is, the laser light of a specific wavelength is used to illuminate the photoresist from two directions of the angle ⁇ to form an interference fringe for exposure, and by changing ⁇ , an uneven lattice structure having various pitches in the laser wavelength range used can be obtained.
  • wire grid polarizing film a plurality of parallel-connected metal wires forming a wire grid polarizing film are formed.
  • the wire grid polarizing film can also be formed by other methods such as nanoimprinting, and will not be described in detail herein, nor is it limited to form a wire grid polarizing film.
  • the wire grid polarizing film is generally made of a metal material.
  • the metal wire is a nano-scale metal wire.
  • the metal wire material may include one or a combination of aluminum (Al), chromium (Cr), copper (Cu), silver (Ag), nickel (Ni), iron (Fe), or cobalt (Co).
  • the wire grid polarizing film can be made of a single metal film. It may also be disposed in the same layer as a common metal line (for example, a gate line, a data line, etc.) in the array substrate.
  • the wire grid polarizing film separately made of a metal film may be located above or below the pixel electrode, may or may not be electrically connected to the pixel electrode. Because the wire grid polarizing film and the data lines and the gate lines do not overlap. In different examples, the wire grid polarizing film may be disposed in the same layer as the data line or the gate line and insulated from each other, so that the wire pattern polarizing film can be realized without adding a new patterning process in the conventional array substrate fabrication process. Production can save the number of masks used and the manufacturing process, save production costs and improve production efficiency.
  • the array substrate includes a base substrate 100 and a thin film transistor 108, a data line 101, a gate line 102, and sub-pixels 103 on the base substrate 100.
  • the wire grid polarizing film in the sub-pixel 103 includes a plurality of sets of a plurality of metal wires 116 arranged in parallel.
  • the figure shows five sets of multiple flats
  • the metal wires 116 are arranged in rows, but the plurality of metal wires arranged in parallel are not limited to the five groups shown.
  • Each of the plurality of parallelly disposed metal lines 116 constitutes a reflective area 104, and between the adjacent two reflective areas 104 is a transmissive area 105.
  • a plurality of parallelly disposed metal lines 116 and data lines and gate lines do not coincide.
  • FIG. 3b shows a schematic cross-sectional view of the wire grid polarizing film disposed in the same layer as the gate line.
  • the gate line 102 is disposed in the same layer as the gate electrode 1084. It can be a cross-sectional view taken along line A-A' in Figure 3a.
  • a gate electrode 1084 and a wire grid polarizing film 106 are provided on the base substrate 100.
  • a gate insulating layer 1085 is disposed over the layer where the gate electrode 1084 and the wire grid polarizing film 106 are located, an active layer 1083 is disposed over the gate insulating layer 1085, and a source 1082 is disposed over the layer where the active layer 1083 is located.
  • drain 1081, the drain 1081 and the source 1082 are spaced apart from each other and are connected to the active layer 1083.
  • the drain 1081 and the source 1082 are respectively disposed on both sides of the active layer 1083 at the drain 1081 and the source.
  • a first insulating layer 121 is disposed on the layer where the 1082 is located, and a pixel electrode 124 is disposed on the first insulating layer 121.
  • the pixel electrode is electrically connected to the drain 1081 of the thin film transistor 108 through the via 125.
  • the plurality of parallelly disposed metal lines in the wire grid polarizing film in the array substrate may be multiplexed as a pixel electrode, a common electrode or used for storage, in addition to being a reflective region. capacitance.
  • a pixel electrode a common electrode or used for storage, in addition to being a reflective region.
  • capacitance a capacitance.
  • the pixel electrode and the wire grid polarizing film are multiplexed in the array substrate.
  • the wire grid polarizing film 106 is multiplexed as a pixel electrode in each sub-pixel, which is electrically connected to the drain 1081 of the thin film transistor 108 disposed at the intersection of the data line 101 and the gate line 102, and the drain 1081 is generally connected to the data line. 101 same layer settings.
  • an array substrate of an Advanced-Super Dimensional Switching (ADS) mode is provided.
  • a gate electrode 1084 is disposed on the substrate substrate 100, and a gate insulation is disposed on the layer where the gate electrode 1084 is located.
  • the layer 1085 is provided with an active layer 1083 over the gate insulating layer 1085, a source 1082 and a drain 1081 disposed above the layer where the active layer 1083 is located, and a gap between the drain 1081 and the source 1082.
  • the drain 1081 and the source 1082 are disposed on both sides of the active layer 1083, and a first insulating layer 121 is disposed on the layer where the drain 1081 and the source 1082 are located, in the first insulating layer 121.
  • a common electrode 123 is disposed thereon, a second insulating layer 122 is disposed on the layer where the common electrode 123 is located, and a pixel electrode 124 is disposed on the second insulating layer 122.
  • the pixel electrode is electrically connected to the drain 1081 of the thin film transistor 108 through the via 125. Connected.
  • each sub-pixel the wire grid polarizing film 106 is multiplexed as a pixel electrode, and each sub-pixel 103 includes a plurality of transmissive regions 105 and a plurality of anti-pixels
  • the shot area 104, the transmissive area 105 and the reflective area 104 are alternately arranged (alternately arranged in the first direction). Between adjacent two reflective regions 104 is a transmissive region 105. Between adjacent two transmissive regions 105 is a reflective region 104.
  • the pixel electrode 124 is a slit electrode, and includes a terminal electrode 1243 and a plurality of strip electrodes 1241 connected to the terminal electrode 1243.
  • a slit 1242 is formed between two adjacent strip electrodes 1241. .
  • the wire grid polarizing film is multiplexed into a slit-shaped pixel electrode in each sub-pixel.
  • the wire grid polarizing film in each sub-pixel includes a plurality of sets of a plurality of metal wires 116 arranged in parallel, and four sets of a plurality of metal wires 116 arranged in parallel are illustrated in FIG. 4a, but the plurality of metal wires 116 arranged in parallel are not limited to those illustrated in the figure. The four groups described.
  • Each of the plurality of parallelly disposed metal lines 116 is a reflective area 104.
  • the region where the slit of the pixel electrode is located is the transmission region 105.
  • a plurality of parallelly disposed metal lines 116 in the wire grid polarizing film 106 are disposed to transmit linearly polarized light whose polarization direction is perpendicular to the direction in which the metal lines 116 extend and linearly polarized light whose reflection polarization direction is parallel to the direction in which the metal lines 116 extend.
  • the width of one strip electrode (the width of the reflection region) in each of the pixel electrodes may be 1.5 to 4 ⁇ m, and further may be 2-3 ⁇ m.
  • the distance between the adjacent two strip electrodes of each pixel electrode (the width of the slit, the width of the transmissive area) may be 1 to 9 ⁇ m, further may be 2 to 8 ⁇ m, and further may be 3 to 7 ⁇ m.
  • the common electrode 123 is located between the pixel electrode 124 and the base substrate 100.
  • the common electrode may be, for example, a plate electrode, but is not limited thereto.
  • the common electrode 123 may be disposed on the pixel electrode 124, that is, the pixel electrode 124 is located between the common electrode 123 and the substrate substrate 100.
  • the wire grid polarizing film 106 can be multiplexed as the common electrode 123 in the sub-pixel 103.
  • the wire grid polarizing film 106 multiplexed as a pixel electrode is formed using an easily oxidizable metal such as Al, since aluminum is easily oxidized, in order to further prevent the produced wire grid polarizing film 106 from being oxidized, for example,
  • a transparent metal oxide conductive layer 126 such as an ITO film layer, is disposed on the wire grid polarizing film 106. Further, since the transparent metal oxide conductive layer 126 disposed on the wire-gate polarizing film 106 needs to be broken at each sub-pixel, it is inevitable that the added transparent metal oxide conductive layer 126 is patterned, which increases the array. The production process of the substrate.
  • the pattern of the transparent metal oxide conductive layer 126 and the wire grid polarizing film 106 may be set to be uniform in each sub-pixel.
  • the transparent metal oxide conductive layer 126 and the wire grid polarizing film 106 can be simultaneously formed by one patterning process. The pattern does not increase the number of masks used.
  • the pixel electrode is not limited to a slit-shaped electrode as long as it can form a plurality of transmissive regions and a plurality of reflective regions.
  • the wire grid polarizing film may not be multiplexed as a pixel electrode, and may be disposed in the same layer as the gate line or the data line, for example.
  • the gate line is disposed in the same layer as the gate, and is formed by patterning the same metal film, and the wire grid polarizing film is disposed in the same layer as the gate line and the gate.
  • the transmissive area 105 and the reflective area 104 are alternately arranged in the first direction, and the transmissive area 105 and the reflective area 104 are also alternately arranged in the second direction, and the second direction is vertical. In the first direction.
  • FIGS. 4b, 4c, 4d, and 5 are described by taking an ADS type array substrate as an example. But it is not limited to this.
  • the array substrate provided by the embodiment of the present invention may also be an In-Plane Switching (IPS) mode, a Twisted Nematic (TN) mode, or a Vertical Alignment (VA) mode array substrate. .
  • IPS In-Plane Switching
  • TN Twisted Nematic
  • VA Vertical Alignment
  • the wire grid polarizing film may be multiplexed as a pixel electrode.
  • the wire grid polarizing film may be disposed in the same layer as a normal metal wire.
  • the wire grid polarizing film may be disposed in the same layer as the data lines or the gate lines and insulated from each other.
  • the pixel electrode and the common electrode in the array substrate in the IPS mode are multiplexed with the wire grid polarizing film.
  • the pixel electrode and the common electrode in each sub-pixel are arranged in the same layer as the interposer structure.
  • the wire grid polarizing film 106 multiplexes the pixel electrode and the common electrode as the interdigitated structure in each sub-pixel (for example, the pixel electrode and the common electrode are finger-shaped or comb-like); and the wire grid polarizing film 106 as a pixel electrode is multiplexed;
  • the drain 1081 of the thin film transistor disposed at the intersection of the data line 101 and the gate line 102 is electrically connected, and the drain 1081 can be disposed in the same layer as the data line 101.
  • Each of the sub-pixels 103 includes a plurality of transmissive regions 105 and a plurality of reflective regions 104, and the transmissive regions 105 and the reflective regions 104 are alternately arranged. Between adjacent two reflective regions 104 is a transmissive region 105. Between adjacent two transmissive regions 105 is a reflective region 104.
  • the pixel electrode 124 of the interdigitated structure includes a terminal electrode 1243 and a plurality of strip electrodes 1241 connected to the terminal electrode 1243 (the strip electrodes are not limited to the number in the figure).
  • the common electrode of the interdigitated structure includes a terminal electrode 1233 and a plurality of strip electrodes 1231 connected to the terminal electrode 1233 (the strip electrodes are not limited to the number in the drawing).
  • a plurality of sets of parallel arranged metal of the wire grid polarizing film 106 The line constitutes a strip electrode 1241 of the pixel electrode and a strip electrode 1231 of the common electrode.
  • a region where the plurality of strip electrodes 1241 and 1231 of the pixel electrode and the common electrode are located is a reflective region, and a strip region between the strip electrode 1241 of the adjacent pixel electrode and the strip electrode 1231 of the common electrode is a transmissive region.
  • the wire grid polarizing film 106 as the pixel electrode and the common electrode is due to the drain of the thin film transistor. 1081 production in the same layer. Therefore, the portion of the wire grid polarizing film 106 as the pixel electrode 124 can be directly electrically connected to the drain electrode 1081, and the portion of the wire grid polarizing film 106 as the common electrode 123 needs to be connected to the common electrode line 107 through the via hole, and the common electrode line 107 can be It is disposed in the same layer as the gate line 102 and the gate electrode 1084.
  • the wire grid polarizing film 106 as the pixel electrode and the common electrode is the same as the gate electrode 1084 of the thin film transistor. Layer production. Therefore, the portion of the wire grid polarizing film 106 as the pixel electrode 124 needs to be electrically connected to the drain electrode 1081 through the via hole, and the portion of the wire grid polarizing film 106 as the common electrode 123 is directly connected to the common electrode line 107, and the common electrode line 107 can be The gate line 102 and the gate 1084 are disposed in the same layer.
  • the wire grid polarizing film 106 as the pixel electrode and the common electrode is disposed to be formed simultaneously with the data line 101 or the gate line 102, and the formation can be omitted.
  • the pixel electrode and the common electrode above the drain can save the number of masks used and the manufacturing process.
  • the oxide conductive layer may be added in the same manner as in the first embodiment, that is, in each sub-pixel, on the wire grid polarizing film 106.
  • a transparent metal oxide conductive layer such as an ITO film layer is provided.
  • the pattern of the transparent metal oxide conductive layer and the wire grid polarizing film 106 may be set to be uniform in each sub-pixel.
  • the wire grid polarizing film may be connected to the pixel electrode or may be connected to the common electrode line as a part of the storage capacitor.
  • the wire grid polarizing film 106 may be electrically connected to the pixel electrode in each sub-pixel, thereby constituting Part of the storage capacitor to increase the storage capacitor helps the device to increase the display resolution.
  • the wire grid polarizing film 106 and the common electrode line may be electrically connected in each sub-pixel to form a part of the storage capacitor. In order to increase the storage capacitance, the device is improved in display resolution.
  • the embodiment of the present invention further provides a liquid crystal display panel. As shown in FIG. 7, the array substrate 10 and the opposite substrate 20 are oppositely disposed, and the liquid crystal layer 30 is filled between the array substrate 10 and the opposite substrate 20.
  • the array substrate 10 is any one of the above array substrates provided by the embodiments of the present invention.
  • the counter substrate and the array substrate are disposed opposite each other, and the counter substrate and the array substrate are respectively upper and lower substrates of the display panel.
  • a display structure such as a thin film transistor array is formed on the array substrate, and a color resin is formed on the counter substrate.
  • the opposite substrate is a color film substrate.
  • the opposite substrate may include a color filter unit corresponding to the sub-pixels on the array substrate, and may further include a black matrix or the like.
  • an upper polarizing plate 230 is disposed on a side of the opposite substrate 20 away from the array substrate 10
  • a lower polarizing plate 130 is disposed on a side of the array substrate 10 away from the opposite substrate 20 , and each sub-pixel 103 is provided.
  • the wire grid polarizing film 106 is disposed in the same manner.
  • the direction in which the plurality of metal wires extend in the wire grid polarizing film 106 and the direction of the polarizing axis (light transmitting axis) of the lower polarizing plate 130 are parallel to each other.
  • the polarizing plate transmits only light in the direction of the polarizing axis.
  • the backlight module 140 disposed outside the array substrate is generally included.
  • the backlight module may include an LED lamp assembly, a reflector, and a light guide.
  • other components may be included, which are not limited herein.
  • Embodiments of the present invention also provide a display device including any of the above liquid crystal display panels.
  • the display device may be any product or component having a display function, such as a mobile phone, a watch, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigator, and the like.
  • a display function such as a mobile phone, a watch, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigator, and the like.
  • the polarization axes of the upper polarizing plate 230 and the lower polarizing plate 130 are perpendicular to each other.
  • the direction of the polarization axis of the upper polarizing plate 230 is the x-axis.
  • the direction of the polarization axis of the lower polarizing plate 130 is the y-axis direction
  • the y-axis is the direction perpendicular to the plane of the paper
  • the x-axis is the horizontal direction parallel to the plane of the paper.
  • the extending direction of the plurality of metal wires of the wire grid polarizing film and the direction of the polarization axis of the lower polarizing plate 130 are parallel to each other, that is, the direction in which the plurality of metal wires extend is the y-axis direction.
  • the initial liquid crystal molecules are arranged in the y-axis direction.
  • FIG. 7 only partially shows the structure of the display panel or the display device, and other places not mentioned may be referred to the foregoing description or refer to the general design.
  • the ambient light passes through the upper polarizer, it becomes linearly polarized light in the x direction, and the linearly polarized light in the x direction can pass through the transmissive region (the transmissive region can transmit natural light), and is finally absorbed when reaching the lower polarizing plate. There is no reflected light, so it is dark.
  • the linearly polarized light in the y direction cannot pass through the wire grid polarizing film (the wire grid polarizing film).
  • the plurality of metal wires extend in a direction parallel to the direction of the polarization axis of the lower polarizer.
  • the linearly polarized light in the y direction passes through the liquid crystal molecules and is still in the y direction, and the upper polarizing plate cannot pass through the polarizing axis in the x direction, so that the light of the backlight cannot pass, and the dark state is exhibited.
  • the liquid crystal molecules rotate along the x-y plane, assuming that the phase retardation of the liquid crystal molecules of the brightest state is ⁇ /2.
  • the linearly polarized light in the y direction cannot be reflected back through the wire grid polarizing film in the reflection region, and becomes linearly polarized light in the x direction again through the liquid crystal molecules, and can pass through the upper polarizing plate to exhibit a bright state.
  • the linearly polarized light in the y direction can pass through the transmissive region and can pass through the lower polarizer to reach the backlight.
  • the backlight light passes through the lower polarizer and becomes linearly polarized light in the y direction. That is, the linearly polarized light in the y direction is a linearly polarized light that can pass through the transmissive region and becomes a x direction through the liquid crystal molecules, and can pass through the upper polarizing plate, so that a bright state can be exhibited by the liquid crystal cell.
  • the linearly polarized light in the y direction cannot pass through the wire grid polarizing film of the reflection region, and is reflected back.
  • the transmissive area is displayed by means of backlight emission, and the reflective area is used to reflect the external environment. Light is achieved. That is to achieve a bright state display.
  • the ADS mode is shown in FIG. 8 and the wire grid polarizing film is multiplexed into the pixel electrode, the implementation methods of the above-mentioned bright state and the dark state are not limited to the structure, and other modes provided by the embodiments of the present invention are not limited. Or other conditions can also refer to the implementation of the above bright state and dark state.
  • the embodiment of the present invention includes a plurality of transmissive regions and a plurality of reflective regions by using the sub-pixels, so that the transflective display panel and the display device of the array substrate including the seed pixel have more uniform brightness and good overall uniformity.
  • a transflective display mode can be realized by providing a wire grid polarizing film in each reflective region, and a transflective display panel with a single box thickness, no additional compensation film, more uniform brightness, and good overall uniformity can be obtained. And display device.
  • the transmissive area and the reflective area may be alternately arranged, and the transmissive area 105 and the reflective area 104 may be alternately arranged in the first direction.
  • the transmissive area 105 and the reflective area 104 may also be alternately arranged in the second direction, the second direction being perpendicular to the first direction.
  • the wire grid polarizing film can be multiplexed into a pixel electrode.
  • the wire grid polarizing film may be disposed in the same layer as the gate line or the data line, and the wire grid polarizing film may be fabricated without adding a new patterning process in the conventional array substrate fabrication process, thereby saving the number of mask plates used and Production process, saving production costs and improving production efficiency.
  • the array substrate, the liquid crystal display panel and the display device provided by the embodiments of the invention can realize a transflective display mode with more uniform brightness, good overall uniformity, wide viewing angle, single box thickness, simple process and no additional compensation film. It can solve the problem that the usual transflective mode is not good.
  • the display panel and the display device provided by the embodiments of the present invention have a simpler structure, do not require an additional compensation film, and can realize wide viewing angle display.
  • the film thickness and the area shape of each layer do not reflect the trueness of the array substrate.
  • the actual scale is only intended to illustrate the contents of the embodiments of the present invention. It will be understood that when an element such as a layer, a film, a region or a substrate is referred to as being "on” or “lower” Or there may be intermediate elements.

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Abstract

一种阵列基板、液晶显示面板及显示装置。该阵列基板(10)包括衬底基板(100)以及设置在衬底基板(100)上的多个子像素(103),各子像素(103)所在区域均包括多个透射区域(105)和多个反射区域(104)。包含该阵列基板的显示面板及显示装置具有更均匀的亮度,整体均匀性好。

Description

阵列基板、液晶显示面板及显示装置 技术领域
本发明的实施例涉及一种阵列基板、液晶显示面板及显示装置。
背景技术
随着显示技术的快速发展,人们越来越注重对显示器的应用及创新。当然,人们对显示特性的要求也越来越高。而通常的透射式液晶显示器在日光直射下,图像会发生冲蚀现象。故而人们在不断寻求实现显示器无论在室内还是室外都有较好的对比度的方法。
半透半反技术已被列入解决室外对比度下降的一个方案。然而通常实现半透半反主要有两种方式。一种是实现单盒厚的电控双折射(Electrically Controlled Birefringence,ECB)模式,然而这种模式通常需要额外的补偿膜,并且视角不好。另一种是双盒厚半透半反模式,然而这种模式的工艺制程比较复杂,生产成本较高,而且显示特性不是太好。
发明内容
本发明至少一实施例提供一种阵列基板、液晶显示面板及显示装置,其可使得包含本发明实施例提供的阵列基板的显示面板及显示装置具有更均匀的亮度,整体均匀性好。
本发明至少一实施例提供一种阵列基板,包括衬底基板以及设置在所述衬底基板上的多个子像素,各所述子像素所在区域均包括多个透射区域和多个反射区域。
例如,本发明一实施例提供的阵列基板中,所述透射区域和所述反射区域在第一方向上交替排布。
例如,本发明一实施例提供的阵列基板中,所述透射区域和所述反射区域在第二方向上交替排布,所述第二方向垂直于所述第一方向。
例如,本发明一实施例提供的阵列基板中,各所述子像素所在区域内的所述多个透射区域和/或所述多个反射区域均匀分布在所述子像素中。
例如,本发明一实施例提供的阵列基板中,各所述子像素内均设置有线 栅偏光膜,各所述子像素内,所述线栅偏光膜均包括设置在所述多个反射区域内的多组多条平行设置的金属线,每个所述反射区域设置一组所述多条平行设置的金属线,所述线栅偏光膜中的多条平行设置的金属线配置来透过偏振方向垂直于所述金属线延伸方向的线偏振光以及反射偏振方向平行于所述金属线延伸方向的线偏振光。
例如,本发明一实施例提供的阵列基板中,所述金属线材质包括铝、铬、铜、银、镍、铁、钴中的一种或几种的组合。
例如,本发明一实施例提供的阵列基板还包括多条数据线,所述线栅偏光膜与所述多条数据线同层设置且相互绝缘。
例如,本发明一实施例提供的阵列基板还包括多条栅线,所述线栅偏光膜与所述多条栅线同层设置且相互绝缘。
例如,本发明一实施例提供的阵列基板还包括与所述栅线同层设置且延伸方向相同的公共电极线,在各所述子像素内所述线栅偏光膜与所述公共电极线电性相连。
例如,本发明一实施例提供的阵列基板中,各子像素内的线栅偏光膜与所述子像素内的像素电极电性相连。
例如,本发明一实施例提供的阵列基板还包括薄膜晶体管,所述线栅偏光膜复用作为所述子像素内的像素电极,所述像素电极与所述薄膜晶体管的漏极电性相连。
例如,本发明一实施例提供的阵列基板中,所述子像素内的像素电极为狭缝状电极。
例如,本发明一实施例提供的阵列基板还包括公共电极,所述公共电极位于所述像素电极和所述衬底基板之间。
例如,本发明一实施例提供的阵列基板中,各所述子像素内,所述线栅偏光膜复用作为所述子像素内的公共电极。
例如,本发明一实施例提供的阵列基板中,所述子像素内的公共电极为狭缝状电极或梳状电极。
例如,本发明一实施例提供的阵列基板还包括像素电极和薄膜晶体管,所述像素电极位于所述公共电极和所述衬底基板之间,所述像素电极与所述薄膜晶体管的漏极电性相连。
例如,本发明一实施例提供的阵列基板中,所述线栅偏光膜复用作为同层设置的插指结构的像素电极和公共电极。
例如,本发明一实施例提供的阵列基板中,在各所述子像素内,在所述线栅偏光膜上设置有透明金属氧化物导电层。
例如,本发明一实施例提供的阵列基板中,在各所述子像素内,所述透明金属氧化物导电层与所述线栅偏光膜的图案一致。
本发明至少一实施例还提供一种液晶显示面板,包括:相对而置的对置基板和阵列基板,以及填充在所述阵列基板和对置基板之间的液晶层;
所述阵列基板为本发明任一实施例中所述的阵列基板。
例如,本发明一实施例提供的液晶显示面板中,各所述子像素内均设置线栅偏光膜,各所述子像素内,所述线栅偏光膜均包括设置在所述多个所述反射区域内的多组多条平行设置的金属线,每个所述反射区域设置一组所述多条平行设置的金属线,所述线栅偏光膜中的多条平行设置的金属线配置来透过偏振方向垂直于所述金属线延伸方向的线偏振光以及反射偏振方向平行于所述金属线延伸方向的线偏振光,在所述阵列基板远离所述对置基板的一侧设置有下偏光板,所述多条平行设置的金属线的延伸方向与所述下偏光板的偏光轴的方向相互平行。
本发明至少一实施例还提供一种显示装置,包括本发明任一实施例中所述的液晶显示面板。
附图说明
为了更清楚地说明本发明实施例的技术方案,下面将对实施例的附图作简单地介绍,显而易见地,下面描述中的附图仅仅涉及本发明的一些实施例,而非对本发明的限制。
图1a为本发明一实施例提供的一种阵列基板中一个子像素所在区域包括多个透射区域和多个反射区域的俯视示意图;
图1b为本发明另一实施例提供的一种阵列基板中一个子像素所在区域包括多个透射区域和多个反射区域的俯视示意图;
图1c为本发明另一实施例提供的一种阵列基板中一个子像素所在区域包括多个透射区域和多个反射区域的俯视示意图(透射区域和反射区域在第 一方向以及第二方向上均交替排布);
图1d为本发明一实施例提供的一种阵列基板中具有的线栅偏光膜的俯视示意图;
图1e为本发明另一实施例提供的一种具有线栅偏光膜的阵列基板的俯视示意图;
图2a为本发明一实施例提供的阵列基板中的一个反射区域内的多条平行设置的金属线的立体示意图;
图2b为本发明一实施例提供的阵列基板中的一个反射区域内的多条平行设置的金属线的光线透过及反射情况示意图;
图3a为本发明一实施例提供的具有线栅偏光膜的阵列基板示意图;
图3b为本发明一实施例提供的阵列基板中线栅偏光膜与栅线同层设置的剖视示意图(图3a中A-A’剖视图);
图4a为本发明一实施例提供的阵列基板中线栅偏光膜复用为像素电极示意图;
图4b为本发明一实施例提供的线栅偏光膜复用为像素电极的ADS模式的阵列基板剖视示意图(图4a中A-A’剖视图);
图4c为本发明一实施例提供的一种线栅偏光膜复用为公共电极的ADS模式的阵列基板剖视示意图;
图4d为本发明一实施例提供的一种线栅偏光膜复用为像素电极且在其上设置透明金属氧化物导电层的ADS模式的阵列基板剖视示意图;
图5为本发明一实施例提供的一种线栅偏光膜与栅线同层设置的ADS模式的阵列基板剖视示意图;
图6a为本发明一实施例提供的线栅偏光膜复用为像素电极和公共电极的IPS模式的阵列基板示意图;
图6b为本发明一实施例提供的线栅偏光膜复用为像素电极和公共电极的IPS模式的阵列基板的另一示意图;
图6c为同层设置的插指结构的像素电极和公共电极示意图;
图7为本发明一实施例提供的一种显示面板示意图;
图8为本发明一实施例提供的一种ADS模式的显示面板或显示装置中暗态的实现方法示意图;
图9为本发明一实施例提供的一种ADS模式的显示面板或显示装置中亮态的实现方法示意图。
附图标记:
10-阵列基板;20-对置基板;30-液晶层;100-阵列基板的衬底基板;101-数据线;102-栅线;103-子像素;1081-漏极;1082-源极;1083-有源层;1084-栅极;1085-栅极绝缘层;104-反射区域;105-透射区域;106-线栅偏光膜;107-公共电极线;116-金属线;121-第一绝缘层;122-第二绝缘层;123-公共电极;1231-条状电极;1233-端电极;124-像素电极;1241-条状电极;1242-狭缝;1243-端电极;125-过孔;130-下偏光板;140-背光模组;1301-下偏光板的偏光轴;200-对置基板的衬底基板;230-上偏光板;2301-上偏光板的偏光轴。
具体实施方式
为使本发明实施例的目的、技术方案和优点更加清楚,下面将结合本发明实施例的附图,对本发明实施例的技术方案进行清楚、完整地描述。显然,所描述的实施例是本发明的一部分实施例,而不是全部的实施例。基于所描述的本发明的实施例,本领域普通技术人员在无需创造性劳动的前提下所获得的所有其他实施例,都属于本发明保护的范围。
出于控制背光功率和户外显示特性的考虑,很多液晶显示屏(Liquid Crystal Display,LCD)都采用了半透半反模式,利用反射区域反射环境光来实现补偿亮度的效果。一般将显示区域分为反射区域和透射区域,其中透射区域利用背光出射的方式实现显示,而反射区域利用反射外界环境光实现显示。这样一来,在户外光线很强的环境下,可以利用反射区域反射光补偿显示效果。
在采用线栅偏振片(Wire Grid Polarizer,WGP)作为反射区域的半透半反模式中,一个子像素内只含有一个反射区域和一个透射区域,其显示特性不是很好,例如亮度不均匀。
本发明的实施例提供一种阵列基板,如图1a所示,包括衬底基板100以及位于衬底基板100上的多个子像素103。例如,如图1a所示,衬底基板100上包括交叉而置并且相互绝缘的多条数据线101和多条栅线102,在衬底 基板100上可由多条数据线101和多条栅线102限定出多个呈阵列排列的子像素103。需要说明的是,子像素103可以由多条栅线和多条数据线限定而得,但不限于此。一个子像素103例如包括一条栅线、一条数据线、一个像素电极和一个开关元件。子像素103为阵列基板中最小的用以进行显示的单元。
各子像素103包括多个透射区域105和多个反射区域104(不限于图中分别示出的具体个数)。例如,多个透射区域105互不共边,多个反射区域104互不共边。互不共边例如是指透射区域形成的图形和反射区域形成的图形没有公共边。
例如,相对于一个子像素包含一个透射区域和一个反射区域的显示模式来说,本发明实施例中,各子像素所在区域包括多个透射区域和反射区域,从而可使得包含本发明实施例提供的阵列基板的显示面板及显示装置具有更均匀的亮度,整体均匀性好。并且,无论是在室内还是室外,都能获得较好的亮度均匀性。
例如,如图1a所示,各子像素103内,透射区域105和反射区域104在第一方向上交替排布。在第一方向上,相邻两个反射区域104之间为透射区域105,相邻两个透射区域105之间为反射区域104。第一方向为平行于纸面的水平方向。本发明实施例中所述的多个例如为大于一个。例如,透射区域105和反射区域104可均为条状,例如为矩形区域,但不限于此。
例如,透射区域105和反射区域104亦可为除了矩形区域外的其他形状。例如,反射区域104的形状可包括折线形、锯齿形、圆形等形状。透射区域105的形状可包括折线形、锯齿形、圆形等形状。图1b示出了透射区域105和反射区域104均为折线形的情况。本发明的实施例对透射区域105和反射区域104的形状不做具体限定。
例如,如图1c所示,各子像素103内,透射区域105和反射区域104除了在第一方向上交替排布外,透射区域105和反射区域104在第二方向上亦交替排布,第二方向垂直于第一方向。透射区域105和反射区域104在第一方向上和第二方向上均交替排布可使得透射区域105和反射区域104的分布更加均匀。更有利于包含该种类型透射区域和反射区域的阵列基板的显示面板的亮度分布均匀性的提高。
例如,如图1d所示,各子像素103内均设置线栅偏光膜106。各子像素103内,线栅偏光膜106均包括设置在多个反射区域104内的多组多条平行设置的金属线116,每个反射区域104设置一组多条平行设置的金属线,线栅偏光膜106中的每个反射区域104内的多条平行设置的金属线116配置来透过偏振方向垂直于金属线延伸方向的线偏振光以及反射偏振方向平行于金属线延伸方向的线偏振光。多条平行设置的金属线即为线栅偏振片。图1d为透射区域和反射区域均为矩形的情况下,每个反射区域内的多条平行设置的金属线的示意图,图1e为透射区域和反射区域均为折线形的情况下,每个反射区域内的多条平行设置的金属线的示意图。
需要说明的是,图1d和图1e均以透射区域和反射区域在第一方向上交替排布为例说明线栅偏光膜中各反射区域内多条平行设置的金属线的情况。例如,透射区域和反射区域在第二方向上交替排布的情况可参照图1c以及透射区域和反射区域在第一方向上交替排布的情况。
本发明的实施例中以透射区域和反射区域均为矩形为例进行说明。
例如,图1a-图1e中,各子像素所在区域内的多个透射区域和多个反射区域均匀分布在子像素中,但不限于此。多个透射区域和/或多个反射区域亦可不均匀的分布在子像素中。多个透射区域和多个反射区域均匀分布在子像素中的情况下,更有利于包含该阵列基板的显示面板的亮度均匀性的提高。
需要说明的是,本发明实施例提供的阵列基板中,包括如上所述的包括多个透射区域和多个反射区域的子像素。例如,阵列基板的所有子像素中均包括多个透射区域和多个反射区域。亦可阵列基板的部分子像素中均包括多个透射区域和多个反射区域。例如,本发明实施例提供的阵列基板中亦可包括其他类型的子像素。例如,其他类型的子像素内不包括如上所述的多个透射区域和多个反射区域。阵列基板中包括其他类型的子像素的情况下,包括多个透射区域和多个反射区域的子像素可均匀分布在衬底基板上,亦可不均匀分布。包括多个透射区域和多个反射区域的子像素均匀分布在衬底基板上的情况下,有利于包含该阵列基板的显示面板亮度均匀性的提高。
例如,该阵列基板中,反射区域104中的多条平行设置的金属线116可如图2a所示。每个反射区域104内包括多条平行设置的金属线116。
例如,如图2b所示,该线栅偏光膜性质如下:对于自然光照射到线栅偏 光膜上,平行于金属线方向的线偏振光几乎全被反射回来,而垂直于金属线方向的线偏振光可以透射过去。
例如,该阵列基板的线栅偏光膜中,如图2b所示,每条金属线的宽度W可以为30nm-50nm。
例如,该阵列基板的线栅偏光膜中,如图2b所示,相邻两条金属线之间的距离P可以为100-150nm。
例如,该阵列基板的线栅偏光膜中,如图2b所示,每条金属线的高度H可以为100-300nm。
本发明实施例提供的阵列基板中的线栅偏光膜106中的多条平行设置的金属线可以通过沉积金属薄膜、涂覆光刻胶、曝光显影得到光刻胶图案、以光刻胶图案为掩模进行刻蚀等工艺形成,例如可以利用激光的干涉曝光法完成曝光显影。即利用特定波长的激光从角度θ的两个方向照射光刻胶形成干涉条纹进行曝光,通过改变θ可以得到在使用的激光波长范围内有各种间距的凹凸格子结构。即形成线栅偏光膜的多条平行设置的金属线。当然,还可以通过纳米压印等其他方式形成线栅偏光膜,在此不作详述,亦不限定采用何种方式形成线栅偏光膜。
例如,由于在本发明实施例提供的阵列基板中,线栅偏光膜一般采用金属材料制作。例如,金属线为纳米级金属线。例如,金属线材质可以包括铝(Al)、铬(Cr)、铜(Cu)、银(Ag)、镍(Ni)、铁(Fe)或钴(Co)中的一种或几种的组合。例如,线栅偏光膜可以由一层金属薄膜单独制作而成。也可以与阵列基板中通常的金属线(例如栅线、数据线等)同层设置。由一层金属薄膜单独制作的线栅偏光膜可位于像素电极之上或之下,可以与像素电极电连接,也可以不与像素电极电连接。因线栅偏光膜和数据线以及栅线均不会重合。在不同的示例中,可以将线栅偏光膜设置为与数据线或栅线同层设置且相互绝缘,这样可以在通常的阵列基板制作工艺上不增加新的构图工艺而实现线栅偏光膜的制作,可以节省掩膜板使用数量以及制作工艺,节省生产成本,提高生产效率。
例如,如图3a所示,该阵列基板包括衬底基板100以及位于衬底基板100上的薄膜晶体管108、数据线101、栅线102以及子像素103。子像素103内的线栅偏光膜包括多组多条平行设置的金属线116。图中示出五组多条平 行设置的金属线116,但多条平行设置的金属线不限于所示的五组。每组多条平行设置的金属线116构成一个反射区域104,相邻两个反射区域104之间为透射区域105。多条平行设置的金属线116和数据线以及栅线均不重合。
例如,图3b示出线栅偏光膜与栅线同层设置的剖视示意图。栅线102与栅极1084同层设置。其可为图3a中A-A’剖视图。该阵列基板中,在衬底基板100上设置栅极1084以及线栅偏光膜106。在栅极1084以及线栅偏光膜106所在的层之上设置栅极绝缘层1085,在栅极绝缘层1085之上设置有源层1083,在有源层1083所在的层之上设置源极1082和漏极1081,漏极1081和源极1082之间具有间隔,并均与有源层1083相连,漏极1081和源极1082分设在有源层1083的两侧,在漏极1081和源极1082所在的层之上设置第一绝缘层121,在第一绝缘层121上设置像素电极124,像素电极通过过孔125与薄膜晶体管108的漏极1081电性相连。
在此基础上,本发明实施例提供的阵列基板中的线栅偏光膜中的多条平行设置的金属线除了作为反射区域之外,还可以本身复用为像素电极、公共电极或用于存储电容。下面通过具体几个实例进行说明。
实施例一
在本实施例中,如图4a所示,在阵列基板中将像素电极和线栅偏光膜进行复用。例如,在各子像素内线栅偏光膜106复用作为像素电极,其与设置在数据线101和栅线102交叉处的薄膜晶体管108的漏极1081电性相连,该漏极1081一般与数据线101同层设置。
例如,如图4b所示为超维场转换(Advanced-super Dimensional Switching,ADS)模式的阵列基板,在衬底基板100上设置栅极1084,在栅极1084所在的层之上设置栅极绝缘层1085,在栅极绝缘层1085之上设置有源层1083,在有源层1083所在的层之上设置源极1082和漏极1081,漏极1081和源极1082之间具有间隔,并均与有源层1083相连,漏极1081和源极1082分设在有源层1083的两侧,在漏极1081和源极1082所在的层之上设置第一绝缘层121,在第一绝缘层121上设置公共电极123,在公共电极123所在的层之上设置第二绝缘层122,在第二绝缘层122上设置像素电极124,像素电极通过过孔125与薄膜晶体管108的漏极1081电性相连。在各子像素内,线栅偏光膜106复用作为像素电极,各子像素103包括多个透射区域105和多个反 射区域104,透射区域105和反射区域104交替排布(在第一方向上交替排布)。相邻两个反射区域104之间为透射区域105。相邻两个透射区域105之间为反射区域104。
例如,如图4a所示,像素电极124为狭缝状电极,包括端电极1243以及与该端电极1243相连的多个条状电极1241,相邻两个条状电极1241之间为狭缝1242。在各子像素内线栅偏光膜复用为狭缝状的像素电极。在各子像素内线栅偏光膜包括多组多条平行设置的金属线116,图4a中示出四组多条平行设置的金属线116,但多条平行设置的金属线116不限于图中所述的四组。每组多条平行设置的金属线116所在区域即为反射区域104。像素电极的狭缝所在的区域即为透射区域105。线栅偏光膜106中多条平行设置的金属线116配置来透过偏振方向垂直于金属线116延伸方向的线偏振光以及反射偏振方向平行于金属线116延伸方向的线偏振光。
例如,每个像素电极中一个条状电极的宽度(反射区域的宽度)可以为1.5-4μm,进一步可为2-3μm。每个像素电极相邻两个条状电极之间的距离(狭缝的宽度,透射区域的宽度)可以为1-9μm,进一步可为2-8μm,更进一步可为3-7μm。
例如,如图4b所示,公共电极123位于像素电极124和衬底基板100之间,在每个子像素内,公共电极例如可为板状电极,但不限于此。
如图4c所示,ADS模式的阵列基板中,也可以公共电极123设置在像素电极124之上,即,像素电极124位于公共电极123和衬底基板100之间。此情况下,可将线栅偏光膜106复用作为子像素103内的公共电极123。
若采用易氧化的金属例如Al制作复用为像素电极的线栅偏光膜106时,因铝容易被氧化,因此,为了更好的防止制作出的线栅偏光膜106被氧化,例如,还可以在各子像素内,如图4d所示,在线栅偏光膜106上设置透明金属氧化物导电层126,例如ITO膜层。进一步地,由于在线栅偏光膜106上设置的透明金属氧化物导电层126需要在各子像素断开,因此,不可避免的需要对增加的透明金属氧化物导电层126进行构图,这会增加阵列基板的生产工序。为了避免增加阵列基板的生产工序,例如,可以在各子像素内,将透明金属氧化物导电层126与线栅偏光膜106的图案设置为一致。这样可以通过一次构图工艺,同时形成透明金属氧化物导电层126与线栅偏光膜106 的图案,不会增加掩膜板的使用数量。
例如,像素电极不限于狭缝状的电极,只要其能形成多个透射区域和多个反射区域的像素电极形态均可。
例如,线栅偏光膜亦可不复用为像素电极,例如,可以与栅线或者数据线同层设置。例如,如图5所示,栅线与栅极同层设置,由同一层金属薄膜构图形成,则线栅偏光膜与栅线、栅极同层设置。此情况下,各子像素103内,透射区域105和反射区域104除了在第一方向上交替排布外,透射区域105和反射区域104亦在第二方向上亦交替排布,第二方向垂直于第一方向。
需要说明的是,图4b、图4c、图4d以及图5是以ADS型阵列基板为例进行说明的。但不限于此。例如,本发明实施例提供的阵列基板也可以为面内开关(In-Plane Switching,IPS)模式、扭曲向列相(Twisted Nematic,TN)模式或垂直取向(Vertical Alignment,VA)模式的阵列基板。
例如,TN模式或VA模式的阵列基板中,线栅偏光膜亦可复用为像素电极。同样,TN模式或VA模式的阵列基板中,线栅偏光膜也可以与通常的金属线同层设置。例如,可以将线栅偏光膜设置为与数据线或栅线同层设置且相互绝缘。
实施例二
在本实施例中,如图6a和图6b所示,将IPS模式下的阵列基板中的像素电极和公共电极与线栅偏光膜进行复用。例如,在IPS模式下的阵列基板结构中,每个子像素内像素电极和公共电极成插指结构同层设置。因此,在各子像素内线栅偏光膜106复用作为插指结构的像素电极和公共电极(例如,像素电极和公共电极呈指状或梳状);复用作为像素电极的线栅偏光膜106与设置在数据线101和栅线102交叉处的薄膜晶体管的漏极1081电性相连,漏极1081可与数据线101同层设置。各子像素103包括多个透射区域105和多个反射区域104,透射区域105和反射区域104交替排布。相邻两个反射区域104之间为透射区域105。相邻两个透射区域105之间为反射区域104。
如图6c所示,插指结构的像素电极124包含端电极1243以及与该端电极1243相连的多个条状电极1241(条状电极不限于图中的个数)。插指结构的公共电极包括端电极1233以及与该端电极1233相连的多个条状电极1231(条状电极不限于图中的个数)。线栅偏光膜106的多组多条平行设置的金属 线构成像素电极的条状电极1241和公共电极的条状电极1231。例如,像素电极和公共电极的多个条状电极1241、1231所在区域即为反射区域,相邻的像素电极的条状电极1241和公共电极的条状电极1231之间即为透射区域。
例如,在将线栅偏光膜106设置为与数据线101同层设置的情况下,如图6a所示,此时,作为像素电极和公共电极的线栅偏光膜106由于与薄膜晶体管的漏极1081同层制作。因此,线栅偏光膜106作为像素电极124的部分可以直接和漏极1081电性相连,线栅偏光膜106作为公共电极123的部分需要通过过孔与公共电极线107连接,公共电极线107可与栅线102、栅极1084同层设置。在将线栅偏光膜106设置为与栅线102同层设置的情况下,如图6b所示,此时,作为像素电极和公共电极的线栅偏光膜106由于与薄膜晶体管的栅极1084同层制作。因此,线栅偏光膜106作为像素电极124的部分需要通过过孔与漏极1081电性相连,线栅偏光膜106作为公共电极123的部分直接与公共电极线107连接,公共电极线107可与栅线102、栅极1084同层设置。
例如,在制作图6a和图6b所示结构的IPS型阵列基板时,将作为像素电极和公共电极的线栅偏光膜106设置为与数据线101或栅线102同时制作,可以省去单独形成在漏极之上的像素电极和公共电极,可以节省掩膜板使用数量以及制作工艺。
进一步地,在将复用作为像素电极和公共电极的线栅偏光膜106与数据线101同层设置时,线栅偏光膜106之上没有保护容易被氧化。因此,为了更好的防止制作出的线栅偏光膜106被氧化,例如,还可以和实施例一中采用相同的方式增加氧化物导电层,即在各子像素内,在线栅偏光膜106上设置透明金属氧化物导电层,例如ITO膜层。同样,为了避免增加阵列基板的生产工序,例如,还可以在各子像素内,将透明金属氧化物导电层与线栅偏光膜106的图案设置为一致。
实施例三
在本实施例中,线栅偏光膜可以与像素电极连接,也可以与公共电极线连接作为存储电容的一部分。
例如,在各子像素内单独设置有像素电极(线栅偏光膜不复用为像素电极)时,在各子像素内线栅偏光膜106可以与像素电极电性相连,从而构成 存储电容的一部分,以增大存储电容,有利于器件提高显示分辨率。或者,在阵列基板中公共电极线与栅线同层设置且延伸方向相同的情况下,可以在各子像素内将线栅偏光膜106与公共电极线电性相连,从而构成存储电容的一部分,以增大存储电容,有利于器件提高显示分辨率。
本发明实施例还提供一种液晶显示面板,如图7所示,包括相对而置的阵列基板10和对置基板20,以及填充在阵列基板10和对置基板20之间的液晶层30。
例如,该阵列基板10为本发明实施例提供的上述任一阵列基板。
例如,对置基板与阵列基板相对设置,对置基板和阵列基板分别为显示面板的上下两个基板,通常在阵列基板上形成薄膜晶体管阵列等显示结构,在对置基板上形成彩色树脂。例如,对置基板为彩膜基板。对置基板上可包括与阵列基板上的子像素对应的滤色单元,还可以包括黑矩阵等。
例如,如图7所示,在对置基板20远离阵列基板10的一侧设置有上偏光板230,在阵列基板10远离对置基板20的一侧设置有下偏光板130,各子像素103内均设置线栅偏光膜106,有关线栅偏光膜106可参见之前描述,线栅偏光膜106的多条金属线延伸方向与下偏光板130的偏光轴(透光轴)方向相互平行。偏光板只让偏光轴方向的光透过。
此外,在本发明实施例提供的上述液晶显示面板中,如图7所示,一般还会包含设置在阵列基板外侧的背光模组140。例如,该背光模组可包括LED灯组件、反射板和导光板,当然还可能包含其他部件,在此不做限定。
本发明的实施例还提供一种显示装置,包括任一上述液晶显示面板。
例如,该显示装置可以为:手机、手表、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。该显示装置的实施可以参见上述液晶显示面板的实施例,重复之处不再赘述。
例如,如图7所示,本发明实施例提供的显示面板或显示装置中,上偏光板230和下偏光板130的偏光轴方向相互垂直,例如,上偏光板230的偏光轴方向为x轴方向,下偏光板130的偏光轴方向为y轴方向,y轴即为垂直于纸面的方向,x轴为平行于纸面的水平方向。则线栅偏光膜的多条金属线的延伸方向与下偏光板130的偏光轴方向相互平行,即多条金属线延伸方向为y轴方向。而初始液晶分子排列方向为y轴方向。
需要说明的是,图7仅部分示出显示面板或显示装置的结构,其他未涉及之处可参见之前叙述或参见通常设计。
以下对本发明实施例中提供的显示面板或显示装置中,亮态和暗态的实现方法予以说明。暗态的实现方法,如图8所示。
先对液晶盒不施加电压,那么液晶分子的初始方向沿着y轴方向排列。对于反射区域,当环境光通过上偏光板后,变成x方向的线偏振光,而x方向的线偏振光是可以通过反射区域的,最终到达下偏光板的时候被吸收,没有反射光,从而为暗态。而对于透射区域,与通常技术相同。即当环境光通过上偏光板后,变成x方向的线偏振光,而x方向的线偏振光是可以通过透射区域的(透射区域可以透过自然光),最终到达下偏光板的时候被吸收,没有反射光,从而为暗态。
而对于下方来自背光源的光,当光经过下偏光板的时候变成y方向的线偏振光,对于反射区域,y方向的线偏振光是无法通过线栅偏光膜的(线栅偏光膜的多条金属线延伸方向与下偏光板的偏光轴方向相互平行)。而对于透射区域,y方向的线偏振光经过液晶分子后还是y方向,是无法通过偏光轴为x方向的上偏光板的,从而背光源的光也无法通过,呈现暗态。
亮态的实现方法,如图9所示。
对液晶盒施加电压,液晶分子会沿着x-y面转动,假设最亮态液晶分子相位延迟为λ/2。
对于反射区域,当自然光自上而下经过上偏光板后会变成x方向的线偏振光,而x方向的线偏振光经过液晶分子变成y方向的线偏振光。y方向的线偏振光无法通过反射区域的线栅偏光膜而被反射回去,再次经过液晶分子又变成x方向的线偏振光,可透过上偏光板,呈现亮态。而对于透射区域,y方向的线偏振光是可以通过透射区域,并可通过下偏光板,到达背光源处。
而对于透射区域,与通常技术相同。对于下方来自背光源的光,背光源的光经过下偏光板后,变成y方向的线偏振光。即y方向的线偏振光是可以通过透射区域的,并经过液晶分子变成x方向的线偏振光,可通过上偏光板,从而,可以通过液晶盒而呈现亮态。背光源的光到达反射区域时,y方向的线偏振光无法通过反射区域的线栅偏光膜,而被反射回去。
透射区域利用背光出射的方式实现显示,而反射区域利用反射外界环境 光实现显示。即实现亮态显示。需要说明的是,虽然图8所示为ADS模式且为线栅偏光膜复用为像素电极的情况,但上述亮态和暗态的实现方法不限于该结构,本发明实施例提供的其他模式或其他情况亦可参照上述亮态和暗态的实现方法。
本发明的实施例通过各子像素包括多个透射区域和多个反射区域,从而使得包含该种子像素的阵列基板的半透半反显示面板及显示装置的亮度更均匀,整体均匀性好。
例如,各反射区域内可通过设置线栅偏光膜的方式实现半透半反显示模式,可以获得单盒厚、无需额外的补偿膜、亮度更均匀,整体均匀性好的半透半反显示面板及显示装置。
例如,透射区域和反射区域可交替排布,透射区域105和反射区域104可在第一方向上交替排布。除此之外,透射区域105和反射区域104在第二方向上亦可交替排布,第二方向垂直于第一方向。从而更有利于包含该种类型透射区域和反射区域的阵列基板的显示面板的亮度分布均匀性的提高。
并且,可将线栅偏光膜复用为像素电极。或者亦可将线栅偏光膜与栅线或数据线同层设置,可以在通常的阵列基板制作工艺上不增加新的构图工艺而实现线栅偏光膜的制作,可以节省掩膜板使用数量以及制作工艺,节省生产成本,提高生产效率。
本发明实施例提供的阵列基板、液晶显示面板及显示装置可以实现亮度更均匀,整体均匀性好、宽视角、单盒厚、工艺简单、无需额外的补偿膜的半透半反显示模式。可解决通常的半透半反模式视角不好的问题。
本发明的实施例提供的显示面板及显示装置与通常的ECB单盒厚模式以及双盒厚半透半反模式相比,结构更简单,不需要额外的补偿膜,而且可以实现宽视角显示。
有以下几点需要说明:
(1)除非另作定义,此处使用的技术术语或者科学术语应当为本发明所属领域内具有一般技能的人士所理解的通常意义。本公开中使用的“第一”、“第二”以及类似的词语并不表示任何顺序、数量或者重要性,而只是用来区分不同的组成部分。
(2)本发明实施附图中,各层薄膜厚度和区域形状不反映阵列基板的真 实比例,目的只是示意说明本发明实施例的内容。可以理解,当诸如层、膜、区域或基板之类的元件被称作位于另一元件“上”或“下”时,该元件可以“直接”位于另一元件“上”或“下”,或者可以存在中间元件。
(3)本发明实施例及附图中,只涉及到与本发明实施例涉及到的结构,其他结构可在本公开的基础上参考通常设计。
(4)在不冲突的情况下,本发明的实施例及实施例中的特征可以相互组合。
以上所述,仅为本发明的具体实施方式,但本发明的保护范围并不局限于此,任何熟悉本技术领域的技术人员在本发明揭露的技术范围内,可轻易想到变化或替换,都应涵盖在本发明的保护范围之内。因此,本发明的保护范围应以所述权利要求的保护范围为准。
本专利申请要求于2015年8月3日递交的中国专利申请第201510483267.5号的优先权,在此全文引用上述中国专利申请公开的内容以作为本申请的一部分。

Claims (22)

  1. 一种阵列基板,包括衬底基板以及设置在所述衬底基板上的多个子像素,其中,各所述子像素所在区域均包括多个透射区域和多个反射区域。
  2. 如权利要求1所述的阵列基板,其中,所述透射区域和所述反射区域在第一方向上交替排布。
  3. 如权利要求2所述的阵列基板,其中,所述透射区域和所述反射区域在第二方向上交替排布,所述第二方向垂直于所述第一方向。
  4. 如权利要求1-3任一项所述的阵列基板,其中,各所述子像素所在区域内的所述多个透射区域和/或所述多个反射区域均匀分布在所述子像素中。
  5. 如权利要求1-4任一项所述的阵列基板,其中,各所述子像素内均设置有线栅偏光膜,各所述子像素内,所述线栅偏光膜均包括设置在所述多个反射区域内的多组多条平行设置的金属线,每个所述反射区域设置一组所述多条平行设置的金属线,所述线栅偏光膜中的多条平行设置的金属线配置来透过偏振方向垂直于所述金属线延伸方向的线偏振光以及反射偏振方向平行于所述金属线延伸方向的线偏振光。
  6. 如权利要求5所述的阵列基板,其中,所述金属线材质包括铝、铬、铜、银、镍、铁、钴中的一种或几种的组合。
  7. 如权利要求5或6所述的阵列基板,还包括多条数据线,其中,所述线栅偏光膜与所述多条数据线同层设置且相互绝缘。
  8. 如权利要求5或6所述的阵列基板,还包括多条栅线,其中,所述线栅偏光膜与所述多条栅线同层设置且相互绝缘。
  9. 如权利要求8所述的阵列基板,还包括与所述栅线同层设置且延伸方向相同的公共电极线,其中,在各所述子像素内所述线栅偏光膜与所述公共电极线电性相连。
  10. 如权利要求5-7任一项所述的阵列基板,其中,各子像素内的线栅偏光膜与所述子像素内的像素电极电性相连。
  11. 如权利要求5-7任一项所述的阵列基板,还包括薄膜晶体管,其中,所述线栅偏光膜复用作为所述子像素内的像素电极,所述像素电极与所述薄膜晶体管的漏极电性相连。
  12. 如权利要求11所述的阵列基板,其中,所述子像素内的像素电极为狭缝状电极或梳状电极。
  13. 如权利要求12所述的阵列基板,还包括公共电极,其中,所述公共电极位于所述像素电极和所述衬底基板之间。
  14. 如权利要求5-7任一项所述的阵列基板,其中,各所述子像素内,所述线栅偏光膜复用作为所述子像素内的公共电极。
  15. 如权利要求14所述的阵列基板,其中,所述子像素内的公共电极为狭缝状电极。
  16. 如权利要求15所述的阵列基板,还包括像素电极和薄膜晶体管,其中,所述像素电极位于所述公共电极和所述衬底基板之间,所述像素电极与所述薄膜晶体管的漏极电性相连。
  17. 如权利要求5或6所述的阵列基板,其中,所述线栅偏光膜复用作为同层设置的插指结构的像素电极和公共电极。
  18. 如权利要求5-17任一项所述的阵列基板,其中,在各所述子像素内,在所述线栅偏光膜上设置有透明金属氧化物导电层。
  19. 如权利要求18所述的阵列基板,其中,在各所述子像素内,所述透明金属氧化物导电层与所述线栅偏光膜的图案一致。
  20. 一种液晶显示面板,包括:相对而置的对置基板和阵列基板,以及填充在所述阵列基板和对置基板之间的液晶层;其中,
    所述阵列基板为如权利要求1-19任一项所述的阵列基板。
  21. 如权利要求20所述的液晶显示面板,其中,所述阵列基板为如权利要求1-4任一项所述的阵列基板的情况下,各所述子像素内均设置线栅偏光膜,各所述子像素内,所述线栅偏光膜均包括设置在所述多个所述反射区域内的多组多条平行设置的金属线,每个所述反射区域设置一组所述多条平行设置的金属线,所述线栅偏光膜中的多条平行设置的金属线配置来透过偏振方向垂直于所述金属线延伸方向的线偏振光以及反射偏振方向平行于所述金属线延伸方向的线偏振光,在所述阵列基板远离所述对置基板的一侧设置有下偏光板,所述多条平行设置的金属线的延伸方向与所述下偏光板的偏光轴的方向相互平行;
    所述阵列基板为如权利要求5-19任一项所述的阵列基板的情况下,在所 述阵列基板远离所述对置基板的一侧设置有下偏光板,所述多条平行设置的金属线的延伸方向与所述下偏光板的偏光轴的方向相互平行。
  22. 一种显示装置,包括如权利要求20或21所述的液晶显示面板。
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