WO2017004949A1 - 阵列基板、显示面板以及显示装置 - Google Patents
阵列基板、显示面板以及显示装置 Download PDFInfo
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- WO2017004949A1 WO2017004949A1 PCT/CN2015/098270 CN2015098270W WO2017004949A1 WO 2017004949 A1 WO2017004949 A1 WO 2017004949A1 CN 2015098270 W CN2015098270 W CN 2015098270W WO 2017004949 A1 WO2017004949 A1 WO 2017004949A1
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1339—Gaskets; Spacers; Sealing of cells
- G02F1/13394—Gaskets; Spacers; Sealing of cells spacers regularly patterned on the cell subtrate, e.g. walls, pillars
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1337—Surface-induced orientation of the liquid crystal molecules, e.g. by alignment layers
- G02F1/133707—Structures for producing distorted electric fields, e.g. bumps, protrusions, recesses, slits in pixel electrodes
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/133345—Insulating layers
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- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1343—Electrodes
- G02F1/134309—Electrodes characterised by their geometrical arrangement
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1343—Electrodes
- G02F1/134309—Electrodes characterised by their geometrical arrangement
- G02F1/134345—Subdivided pixels, e.g. for grey scale or redundancy
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1343—Electrodes
- G02F1/134309—Electrodes characterised by their geometrical arrangement
- G02F1/134363—Electrodes characterised by their geometrical arrangement for applying an electric field parallel to the substrate, i.e. in-plane switching [IPS]
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1343—Electrodes
- G02F1/134309—Electrodes characterised by their geometrical arrangement
- G02F1/134372—Electrodes characterised by their geometrical arrangement for fringe field switching [FFS] where the common electrode is not patterned
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F2201/00—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
- G02F2201/12—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode
- G02F2201/121—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode common or background
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F2201/00—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
- G02F2201/12—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode
- G02F2201/122—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode having a particular pattern
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F2201/00—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
- G02F2201/12—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode
- G02F2201/123—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode pixel
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F2201/00—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
- G02F2201/12—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode
- G02F2201/124—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode interdigital
Definitions
- At least one embodiment of the present invention is directed to an array substrate, a display panel, and a display device.
- TFT-LCD Thin Film Transistor Liquid Crystal Display
- Array Substrate a Color Filter Substrate
- a liquid crystal sandwiched between two substrates (Liquid) Crystal) layer Also included in the display device are pixel electrodes and common electrodes for controlling liquid crystal deflection.
- the control of the intensity of the light is controlled by controlling the deflection of the liquid crystal molecules, and then the color image display is realized by the filtering action of the color filter substrate.
- the TFT-LCD includes an In-Plane Switching (IPS) mode and an Advanced-Super Dimensional Switching (ADS) mode.
- IPS In-Plane Switching
- ADS Advanced-Super Dimensional Switching
- a parallel electric field generated by the edge of the pixel electrode or the common electrode and a longitudinal electric field generated between the pixel electrode and the common electrode form a multi-dimensional electric field, so that the pixel electrode or the common electrode in the liquid crystal cell, the pixel electrode or the common All of the aligned liquid crystal molecules directly above the electrode can generate a rotation conversion, thereby improving the working efficiency of the planar orientation liquid crystal and increasing the light transmission efficiency.
- At least one embodiment of the present invention provides an array substrate, a display panel, and a display device, by forming a spacer strip for a pixel electrode and a common electrode protrusion on the array substrate, thereby enhancing a horizontal electric field and suppressing a vertical electric field, thereby improving transmittance. .
- An embodiment of the present invention provides an array substrate including a substrate substrate and a plurality of sub-pixels disposed on the substrate, each of the sub-pixels including a first electrode, a second electrode, and a plurality of spacer strips, A plurality of spacer strips are disposed below the first electrode and the second electrode.
- the spacer strip includes any one of a linear shape, a polygonal line shape, a wave shape, a zigzag shape, and an arc shape.
- the plurality of spacer strips are a plurality of linear spacer strips disposed in parallel.
- the first electrode and the second electrode each include a portion corresponding to the plurality of spacer strips.
- a portion of the first electrode and the second electrode corresponding to the plurality of spacer strips is a protruding portion.
- the first electrode and the second electrode are disposed in different layers, and a first insulating layer is disposed between the first electrode and the second electrode, a second electrode is located above the first electrode, and in each of the sub-pixels, the second electrode includes a plurality of second electrode strips, and in the layer where the second electrode is located, corresponding to the plurality of At the position of the spacer strip, one of the second electrode strips is disposed for each of the spacer strips.
- the first electrode is a planar electrode or the first electrode includes a plurality of first electrode strips;
- the first electrode includes a plurality of first electrode strips
- the layer where the first electrode is located at a position corresponding to the plurality of spacer strips, one spacer is disposed for each of the spacer strips
- the first electrode strip is described, and the adjacent two strips correspond to the first electrode strip and the second electrode strip, respectively.
- the second electrode is a slit electrode or a comb electrode.
- the first electrode and the second electrode are disposed in the same layer.
- the first electrode includes a plurality of first electrode strips.
- the second electrode includes a plurality of second electrode strips, in a layer where the first electrode and the second electrode are located, at positions corresponding to the plurality of spacer strips, alternately arranged or every other one
- the spacer strip alternately sets the first electrode strip and the second electrode strip.
- the first electrode and the second electrode have a zigzag structure in a cross section in a direction perpendicular to the plurality of spacer strips.
- the cross section of the spacer strip includes any one of a trapezoidal shape, a triangular shape, a semicircular shape, a stepped shape, and a mountain shape.
- an array substrate provided by an embodiment of the present invention further includes a second insulating layer and a gate insulating layer, the second insulating layer being located above the gate insulating layer and located at the first electrode and the second Below the electrode, the plurality of spacer strips are formed by a portion of the second insulating layer.
- an array substrate provided by an embodiment of the present invention further includes a gate insulating layer under the first electrode and the second electrode, and the plurality of spacer strips pass through the gate A portion of the pole insulating layer is formed.
- an array substrate provided by an embodiment of the present invention further includes a plurality of data lines and a plurality of gate lines disposed on the substrate, and each of the sub-pixels includes a plurality of spacer strips extending in parallel In an extending direction of the gate line or the data line, or an angle between an extending direction of the plurality of spacer strips and an extending direction of the gate line or the data line, or each of the sub-pixels
- the plurality of spacer strips included include at least two groups, and the spacer strips in different groups extend in different directions.
- the plurality of data lines and the plurality of gate lines intersect to define a plurality of the plurality of sub-pixels arranged in an array.
- At least one embodiment of the present invention also provides a display panel including any of the above array substrates.
- At least one embodiment of the present invention also provides a display device including any of the above display panels.
- FIG. 1 is a schematic diagram of an ADS mode array substrate
- FIG. 2a is a schematic diagram of an array substrate according to an embodiment of the invention.
- 2b is a schematic diagram of a pixel electrode and a common electrode in an array substrate according to an embodiment of the invention
- 2c is a schematic diagram of a linear spacer strip in an array substrate according to an embodiment of the invention.
- FIG. 2 is a schematic diagram of a line-shaped spacer strip in an array substrate according to an embodiment of the invention
- Figure 3a is a schematic view of the array substrate A-A' of Figure 2a (ADS mode);
- FIG. 3b is a schematic cross-sectional view of an array substrate (ADS mode) according to an embodiment of the present invention.
- Figure 3c is a schematic view of the A-A' of the array substrate of the first electrode and the second electrode of Figure 2a including a plurality of electrode strips (ADS mode);
- FIG. 4a is another schematic view of the array substrate A-A' of FIG. 2a (IPS mode);
- 4b is an alternate arrangement of the first electrode in every other spacer strip in the IPS mode array substrate of FIG. 2a A-A' schematic view of the strip and the second electrode strip;
- FIG. 5 is a schematic diagram of a display panel according to an embodiment of the invention.
- FIG. 6 is a schematic diagram showing a horizontal electric field intensity distribution of a display panel
- FIG. 7 is a schematic diagram of horizontal electric field intensity distribution of a display panel according to an embodiment of the present invention.
- FIG. 8 is a schematic diagram of horizontal electric field intensity distribution of a display panel according to another embodiment of the present invention.
- the pixel electrode and the common electrode are each formed on a corresponding planar structure layer.
- the fringe electric field formed by the potential difference between the pixel electrode and the common electrode includes two components, one is a horizontal electric field that is favorable for horizontal deflection of the liquid crystal, and the other is One is a longitudinal electric field that acts as a disturbance.
- the horizontal electric field is weak, and the longitudinal electric field is strong, resulting in a correspondingly small transmittance, and ultimately affecting the transmittance of the entire liquid crystal panel.
- the common electrode may be a slit electrode
- the pixel electrode may be a planar electrode. This situation Next, in the middle region on the slit of the common electrode, and the intermediate region between the slits, the horizontal electric field is weak, and the longitudinal electric field is strong, which may also cause the transmittance to be relatively small, and finally affect the penetration of the entire liquid crystal panel. Over rate.
- the pixel electrode and the common electrode are formed on the same planar structure layer.
- the pixel electrode and the common electrode each include a plurality of electrode strips, and the fringe electric field formed by the potential difference between the pixel electrode and the common electrode includes two components, one is a horizontal electric field that is favorable for horizontal deflection of the liquid crystal, and the other is interference.
- Vertical electric field In the middle region of each electrode strip of the pixel electrode and the middle portion of each electrode strip of the common electrode, the horizontal electric field is weak, the longitudinal electric field is strong, and the transmittance is correspondingly small, and finally affects the transmission of the entire liquid crystal panel. rate.
- a partial cross-sectional view of an array substrate of an ADS mode is provided with a gate electrode 108 on the substrate substrate 100.
- a gate insulating layer 107 is disposed over the layer on which the gate electrode 108 is located.
- An active layer 109 is disposed on the gate insulating layer 107.
- a source 110 and a drain 111 are disposed on the active layer 109.
- the source 110 and the drain 111 are both connected to the active layer 109, and the source 110 and the drain 111 are provided on both sides of the active layer 109. There is a space between the source 110 and the drain 111 to define a channel region.
- the thin film transistor includes a gate electrode 108, a gate insulating layer 107, an active layer 109, a source 110, and a drain 111.
- a second insulating layer 106 is disposed over the layer on which the source 110 and the drain 111 are located.
- a first electrode 102 is disposed on the second insulating layer 106.
- a first insulating layer 105 is disposed over the layer on which the first electrode 102 is located.
- a second electrode 103 is disposed on the first insulating layer 105.
- the second electrode 103 includes a plurality of second electrode strips 1031. The second electrode 103 is connected to the drain 111 of the thin film transistor through the via 113.
- the second electrode 103 may be a pixel electrode, and correspondingly, the first electrode 102 is a common electrode.
- the first electrode 102 and the second electrode 103 are both disposed on a planar structure.
- the horizontal electric field drive is achieved by controlling the potential difference formed between the pixel electrode and the common electrode.
- the present embodiment provides an array substrate, as shown in FIG. 2a, which includes a base substrate 100 and a plurality of sub-pixels 101 arranged in an array disposed on the base substrate 100.
- each sub-pixel includes a first electrode 102, a second electrode 103, and a plurality of spacer strips 104, and a plurality of spacer strips 104 are disposed on the first electrode 102 and the second electrode 103.
- the first electrode 102 and the second electrode 103 each include a portion corresponding to the plurality of spacer strips 104.
- the second electrode 103 includes a plurality of second electrode strips 1031 disposed corresponding to a portion of the plurality of spacer strips.
- a second electrode strip 1031 is disposed corresponding to each of the spacer strips 104 on the plurality of spacer strips 104.
- the first electrode 102 is a planar electrode, but the shape of the first electrode is not limited thereto.
- the first electrode 102 can also include a plurality of first electrode strips.
- the first electrode 102 includes a plurality of first electrode strips corresponding to the plurality of spacer strips.
- each sub-pixel 101 includes a first electrode 102 and a second electrode 103, and the first electrode 102 and the second electrode 103 may be disposed in the same layer. (as shown in Figures 4a and 4b) or a different layer arrangement (as shown in Figures 3a and 3b), a plurality of spacer strips 104 are disposed within each sub-pixel 101 on the substrate.
- the first electrode 102 and the second electrode 103 are disposed over a layer on which the plurality of spacer strips 104 are located.
- the first electrode 102 and the second electrode 103 each include a portion correspondingly disposed above the plurality of spacer strips 104.
- a portion of the first electrode 102 and the second electrode 103 correspondingly disposed above the plurality of spacer strips 104 is a protrusion (protrusion) portion.
- a portion of the first electrode 102 and the second electrode 103 correspondingly disposed above the plurality of spacer strips 104 is a protruding portion with respect to a portion not disposed above the plurality of spacer strips 104.
- the first electrode is the pixel electrode 123
- the second electrode is a common electrode
- the first electrode is connected to the drain of the thin film transistor through the hole 113.
- the first electrode is a common electrode
- the second electrode is a pixel electrode 123
- the second electrode is connected to a drain of the thin film transistor through the hole.
- the array substrate provided in the first embodiment further includes a plurality of data lines 114 and a plurality of gate lines 115 disposed on the base substrate 100, a plurality of data lines 114 and a plurality of gates.
- the lines 115 are insulated from each other, and the plurality of data lines 114 and the plurality of gate lines 115 intersect to define a plurality of sub-pixels 101 arranged in an array.
- the sub-pixel 101 may be defined by a plurality of gate lines 115 and a plurality of data lines 114, but is not limited thereto.
- One sub-pixel 101 includes, for example, a gate line, a data line, a pixel electrode, and a switching element.
- the sub-pixel 101 is the smallest of the array substrates for display. unit.
- the spacer strip 104 includes a linear shape, a polygonal line shape, or the like, and may have a shape of a wave shape, a zigzag shape, an arc shape, or the like.
- the shape of the electrode strip corresponding to the plurality of spacer strips included in the first electrode and/or the second electrode corresponds to the shape of the plurality of spacer strips.
- the plurality of spacer strips are a plurality of linear spacer strips disposed in parallel, and correspondingly, the first electrode and/or the second electrode may include a plurality of linear electrode strips disposed in parallel.
- the direction in which the plurality of spacer strips 104 extend is parallel to the direction in which the data lines 115 extend.
- the direction in which the plurality of spacer strips 104 extend is parallel to the direction in which the gate lines 114 extend.
- the angle between the extending direction of the plurality of spacer strips and the extending direction of the gate lines or the data lines is an acute angle, or the plurality of spacer strips included in each sub-pixel include at least two groups, and the spacer strips in different groups
- the direction of extension is different.
- the first electrode and the second electrode on each set of spacer strips correspond to one domain.
- the second electrode may be a slit electrode or a comb electrode, and each includes a plurality of second electrode strips.
- the slit electrode can be, for example, as shown in Fig. 2a.
- the pixel electrode 123 is a slit-shaped electrode and includes a plurality of slits 1232.
- the electrode strips 1231 are between the adjacent two slits.
- the first electrode can be a planar electrode as shown in Figure 3a. Or the first electrode may be a slit electrode or a comb electrode.
- the plurality of comb teeth of the comb electrode are a plurality of electrode strips.
- the first electrode and the second electrode may be comb electrodes, each of which includes a plurality of electrode strips.
- the comb electrode can for example be as shown in Figure 2b.
- the common electrode 122 and the pixel electrode 123 are both comb electrodes, the common electrode 122 includes a plurality of electrode strips 1221, and the pixel electrode 123 includes a plurality of electrode strips 1231.
- a first insulating layer 105 is disposed between the first electrode and the second electrode, and the second electrode 103 is located at the first electrode 102.
- the second electrode 103 includes a plurality of second electrode strips 1031, and in the layer in which the second electrode is located, at a position corresponding to the plurality of spacer strips 104, each interval is separated
- the spacer 104 is provided with a second electrode strip 1031.
- the first electrode is a planar electrode or the first electrode includes a plurality of first electrode strips.
- the first In the case where the electrode includes a plurality of first electrode strips, as shown in FIG. 3c, in the layer in which the first electrode 102 is located, at a position corresponding to the plurality of spacer strips 104, a first spacer strip 104 is disposed first.
- the electrode strips, and the adjacent two spacer strips respectively correspond to the first electrode strip of the first electrode and the second electrode strip of the second electrode, but are not limited thereto.
- the first electrode 102 and the second electrode 103 are disposed in the same layer, in each sub-pixel 101, the first electrode 102 includes a plurality of first electrode strips 1021, and the second electrode 103 includes a plurality of
- the second electrode strip 1031 has a first electrode strip 1021 and a second electrode strip 1031 alternately disposed at a position corresponding to the plurality of spacer strips 104 in a layer where the first electrode and the second electrode are located, as shown in FIG. 4a. .
- the first electrode strip 1021 and the second electrode strip 1031 are alternately disposed every other spacer strip 104 as shown in FIG. 4b.
- the arrangement shown in Figure 4b facilitates the separation of two adjacent electrode strips.
- the first electrode 102 and the second electrode 103 are in a cross section perpendicular to a plurality of spacer strips (for example, a plurality of spacer strips are disposed in parallel) 104.
- the zigzag structure can be as shown in Figures 3a, 3b, 4a and 4b.
- the first electrode 102 and/or the second electrode 103 have protrusions (protrusions) at positions corresponding to the respective spacer strips 104.
- the cross section of the spacer strip includes any one of a trapezoidal shape, a triangular shape, a semicircular shape, a stepped shape, and a mountain shape. This is not limited.
- the cross section of the spacer strip is trapezoidal as an example.
- the array substrate provided in the first embodiment further includes a second insulating layer 106 and a gate insulating layer 107.
- the second insulating layer 106 is located above the gate insulating layer 107 and under the first electrode 102 and the second electrode 103, and the plurality of spacer strips 104 are formed by a portion of the second insulating layer 106. That is, the plurality of spacer strips are formed of a film forming the second insulating layer.
- the array substrate provided in the example of the embodiment further includes a plurality of thin film transistors 112.
- each of the thin film transistors includes a gate electrode 108, a gate insulating layer 107, an active layer 109, a source 110, and a drain 111.
- the gate insulating layer 107 is located under the first electrode 102 and the second electrode 103.
- a plurality of spacer strips 104 may be formed through a portion of the gate insulating layer 107.
- the plurality of spacer strips 104 in FIG. 3a are replaced by a portion of the gate insulating layer 107. That is, a plurality of spacer strips are formed of a thin film forming a gate insulating layer.
- the present embodiment provides a display panel, as shown in FIG. 5, including the array substrate 10 of any of the first embodiments.
- the display panel further includes an opposite substrate 20, and the opposite substrate is disposed opposite to the array substrate.
- the opposite substrate and the array substrate are respectively upper and lower substrates of the display panel, and a thin film transistor is generally formed on the array substrate.
- a display structure such as an array forms a color resin on the opposite substrate.
- the opposite substrate is a color film substrate.
- a black matrix 202 and a color film 201 are provided on the opposite substrate 20.
- a liquid crystal layer 30 is provided between the array substrate 10 and the counter substrate 20.
- the embodiment provides a display device, including the display panel of any of the second embodiment.
- the display device may be a liquid crystal display and any display product or component such as a television, a digital camera, a mobile phone, a watch, a tablet, a notebook computer, a navigator, or the like including the display device.
- a display product or component such as a television, a digital camera, a mobile phone, a watch, a tablet, a notebook computer, a navigator, or the like including the display device.
- FIG. 6 is a schematic diagram of a horizontal electric field intensity distribution of a typical low power ADS technology TFT-LCD (for example, in the case where the pixel electrode and the common electrode as shown in FIG. 1 are each formed on a corresponding planar structure layer).
- the horizontal electric field intensity distribution 131 on a typical technical pixel is shown by the dashed line in FIG.
- the horizontal electric field is the weakest and the transmittance is relatively small, which ultimately affects the transmittance of the entire panel.
- the w1 and w2 width corresponding regions are regions where the horizontal electric field intensity is smaller than the reference electric field intensity value (Eth), and in order to achieve high transmittance, w1 and w2 widths are required to be as small as possible.
- FIG. 7 is a schematic cross-sectional view showing a pixel of a low power consumption ADS type TFT-LCD according to an embodiment of the present invention.
- the array substrate structure thereof may be as shown in FIG. 3a, but is not limited thereto.
- the horizontal electric field intensity distribution 132 on the pixel of the embodiment of the present invention is shown by the upper solid line in FIG.
- the dashed line in Figure 7 is the horizontal electric field strength distribution 131 on a typical technical pixel.
- Eth reference electric field intensity value
- the corresponding horizontal electric field intensity on the upper region is smaller than the reference electric field intensity value Eth (w1, w2). In the entire pixel region, the horizontal electric field intensity is greater, and the transmittance of the pixel is thus greatly improved.
- the cross section of the pixel electrode and the common electrode in a direction perpendicular to the plurality of spacer strips has a zigzag structure.
- the array substrate of the structure can enhance the horizontal electric field in the pixel region, suppress the longitudinal electric field, and reduce the area of the intermediate region between the electrode strips of the pixel electrode and the intermediate region between the electrode strips having a weak horizontal electric field region, thereby Increase transmission rate.
- the storage capacitance between the pixel electrode and the common electrode can also be increased.
- the area where the horizontal electric field intensity is less than the reference electric field intensity value (Eth) may be correspondingly reduced, in the entire pixel area. Inside, the horizontal electric field intensity is greater, and the transmittance of the pixel is thus greatly improved.
- Embodiments of the present invention enhance the horizontal electric field by suppressing the longitudinal electric field by forming a spacer strip for the pixel electrode and/or the common electrode protrusion on the array substrate, thereby increasing the transmittance.
- the number of electrode strips and electrode strips included in the electrode strip, the second electrode (pixel electrode) included in the first electrode (common electrode) in the drawings of the embodiments of the present invention is not limited to the number described in the drawing. .
- the shapes of the first electrode (common electrode) and the second electrode (pixel electrode) are also not limited to the shapes described in the drawings.
- each of the sub-pixels included in the array substrate may include a plurality of spacer strips, or some of the sub-pixels included in the array substrate may include A plurality of spacer strips are not limited thereto.
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Abstract
Description
Claims (17)
- 一种阵列基板,包括衬底基板以及设置在所述衬底基板上的多个子像素,其中,各所述子像素包括第一电极、第二电极和多个隔垫条,所述多个隔垫条设置在所述第一电极和所述第二电极的下方。
- 根据权利要求1所述的阵列基板,其中,所述隔垫条包括直线形、折线形、波浪形、锯齿形、弧形中的任意一种。
- 根据权利要求1或2所述的阵列基板,其中,所述多个隔垫条为多个平行设置的直线形隔垫条。
- 根据权利要求1-3任一项所述的阵列基板,其中,各所述子像素内,所述第一电极和所述第二电极均包括对应设置在所述多个隔垫条之上的部分。
- 根据权利要求4所述的阵列基板,其中,所述第一电极和所述第二电极对应设置在所述多个隔垫条之上的部分为突起部分。
- 根据权利要求1-5任一项所述的阵列基板,其中,所述第一电极和所述第二电极异层设置,所述第一电极和所述第二电极之间设置第一绝缘层,所述第二电极位于所述第一电极之上,在各所述子像素内,所述第二电极包括多个第二电极条,并且在所述第二电极所在的层中,对应所述多个隔垫条的位置处,每间隔一个所述隔垫条设置一个所述第二电极条。
- 根据权利要求6所述的阵列基板,其中,所述第一电极为面状电极或者所述第一电极包括多个第一电极条;所述第一电极包括多个第一电极条的情况下,在所述第一电极所在的层中,对应所述多个隔垫条的位置处,每间隔一个所述隔垫条设置一个所述第一电极条,并且,相邻两个隔垫条分别对应所述第一电极条和所述第二电极条。
- 根据权利要求1-7任一项所述的阵列基板,其中,所述第二电极为狭缝状电极或梳状电极。
- 根据权利要求1-5任一项所述的阵列基板,其中,所述第一电极和所述第二电极同层设置,在各所述子像素内,所述第一电极包括多个第一电极条,所述第二电极包括多个第二电极条,在所述第一电极和所述第二电极所 在的层中,对应所述多个隔垫条的位置处,交替设置或每隔一个所述隔垫条交替设置所述第一电极条和所述第二电极条。
- 根据权利要求1-9任一项所述的阵列基板,其中,所述第一电极和所述第二电极在沿垂直于所述多个隔垫条的方向上的截面呈锯齿形结构。
- 根据权利要求1-10任一项所述的阵列基板,其中,所述隔垫条的截面包括梯形、三角形、半圆形、台阶形、山峰形中的任意一种。
- 根据权利要求1-11任一项所述的阵列基板,还包括第二绝缘层和栅极绝缘层,其中,所述第二绝缘层位于所述栅极绝缘层之上并且位于所述第一电极和所述第二电极之下,所述多个隔垫条通过所述第二绝缘层的一部分来形成。
- 根据权利要求1-11任一项所述的阵列基板,还包括栅极绝缘层,其中,所述栅极绝缘层位于所述第一电极和所述第二电极之下,所述多个隔垫条通过所述栅极绝缘层的一部分来形成。
- 根据权利要求1-13任一项所述的阵列基板,还包括设置在所述衬底基板上的多条数据线和多条栅线,各所述子像素包括的所述多个隔垫条的延伸方向平行于所述栅线或所述数据线的延伸方向,或者所述多个隔垫条的延伸方向与所述栅线或所述数据线的延伸方向的夹角为锐角,或者各所述子像素包括的所述多个隔垫条包括至少两个组,不同组中的隔垫条的延伸方向不同。
- 根据权利要求14所述的阵列基板,其中,所述多条数据线和所述多条栅线交叉限定多个呈阵列排列的所述多个子像素。
- 一种显示面板,包括权利要求1-15任一项所述的阵列基板。
- 一种显示装置,包括权利要求16所述的显示面板。
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CN104914630B (zh) * | 2015-07-07 | 2019-01-29 | 重庆京东方光电科技有限公司 | 阵列基板、显示面板以及显示装置 |
CN105549278B (zh) * | 2016-01-11 | 2018-03-06 | 深圳市华星光电技术有限公司 | Ips型tft‑lcd阵列基板的制作方法及ips型tft‑lcd阵列基板 |
CN105652496B (zh) * | 2016-01-25 | 2018-03-09 | 武汉华星光电技术有限公司 | 一种阵列基板及触摸屏 |
CN105842939B (zh) * | 2016-06-17 | 2019-07-30 | 京东方科技集团股份有限公司 | 用于薄膜晶体管的显示器件及其具有该显示器件的显示装置 |
CN107219694B (zh) * | 2017-07-28 | 2020-04-07 | 京东方科技集团股份有限公司 | 一种阵列基板及其制作方法、显示装置 |
CN109541861A (zh) * | 2017-09-22 | 2019-03-29 | 京东方科技集团股份有限公司 | 像素结构、阵列基板及显示装置 |
CN107561793B (zh) * | 2017-09-26 | 2020-11-06 | 武汉华星光电技术有限公司 | 一种阵列基板及液晶显示面板 |
CN109581759A (zh) * | 2017-09-29 | 2019-04-05 | 京东方科技集团股份有限公司 | 一种阵列基板及其制备方法、显示面板 |
CN110441965B (zh) * | 2019-08-23 | 2022-05-20 | 京东方科技集团股份有限公司 | 一种阵列基板、显示面板以及显示装置 |
CN110764321B (zh) * | 2019-10-16 | 2022-08-05 | 深圳市华星光电半导体显示技术有限公司 | 薄膜晶体管像素电极层结构及显示面板 |
CN113934064B (zh) * | 2021-10-27 | 2023-11-03 | 京东方科技集团股份有限公司 | 阵列基板、液晶显示面板及显示装置 |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1276588A (zh) * | 1999-05-26 | 2000-12-13 | 松下电器产业株式会社 | 液晶显示元件和液晶显示元件的制造方法 |
CN2743872Y (zh) * | 2004-09-27 | 2005-11-30 | 鸿富锦精密工业(深圳)有限公司 | 横向电场液晶显示器 |
US20090021660A1 (en) * | 2007-07-20 | 2009-01-22 | Ruibo Lu | Multi-Domain Vertical Alignment Liquid Crystal Displays With Improved Angular Dependent Gamma Curves |
CN101900913A (zh) * | 2009-05-29 | 2010-12-01 | 株式会社半导体能源研究所 | 液晶显示装置及其制造方法 |
CN104914630A (zh) * | 2015-07-07 | 2015-09-16 | 重庆京东方光电科技有限公司 | 阵列基板、显示面板以及显示装置 |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5034162B2 (ja) * | 2005-03-23 | 2012-09-26 | 日本電気株式会社 | アクティブマトリクス型液晶表示装置 |
JP4488002B2 (ja) * | 2006-12-25 | 2010-06-23 | ソニー株式会社 | 液晶表示素子および表示装置 |
KR101471546B1 (ko) * | 2007-09-12 | 2014-12-11 | 삼성디스플레이 주식회사 | 액정 표시 장치 |
CN103278979B (zh) * | 2012-09-27 | 2016-04-20 | 上海天马微电子有限公司 | 平面式液晶显示器的阵列基板及其制造方法 |
-
2015
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- 2015-12-22 WO PCT/CN2015/098270 patent/WO2017004949A1/zh active Application Filing
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Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1276588A (zh) * | 1999-05-26 | 2000-12-13 | 松下电器产业株式会社 | 液晶显示元件和液晶显示元件的制造方法 |
CN2743872Y (zh) * | 2004-09-27 | 2005-11-30 | 鸿富锦精密工业(深圳)有限公司 | 横向电场液晶显示器 |
US20090021660A1 (en) * | 2007-07-20 | 2009-01-22 | Ruibo Lu | Multi-Domain Vertical Alignment Liquid Crystal Displays With Improved Angular Dependent Gamma Curves |
CN101900913A (zh) * | 2009-05-29 | 2010-12-01 | 株式会社半导体能源研究所 | 液晶显示装置及其制造方法 |
CN104914630A (zh) * | 2015-07-07 | 2015-09-16 | 重庆京东方光电科技有限公司 | 阵列基板、显示面板以及显示装置 |
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US20170199409A1 (en) | 2017-07-13 |
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