WO2016127639A1 - 像素电路的驱动方法及其驱动装置 - Google Patents
像素电路的驱动方法及其驱动装置 Download PDFInfo
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- WO2016127639A1 WO2016127639A1 PCT/CN2015/089719 CN2015089719W WO2016127639A1 WO 2016127639 A1 WO2016127639 A1 WO 2016127639A1 CN 2015089719 W CN2015089719 W CN 2015089719W WO 2016127639 A1 WO2016127639 A1 WO 2016127639A1
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- switching transistor
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
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- the present disclosure relates to the field of display technologies, and in particular, to a driving method of a pixel circuit and a driving device thereof.
- OLED organic light emitting diode
- PMOLED Passive Matrix Driving OLED
- AMOLED Active Matrix Driving OLED
- the degree of human eye perception varies with the brightness of the ambient light. For example, when the ambient light is bright, the brightness of the display needs to be increased to make the display clearer; when the ambient light is dark, the brightness of the display needs to be lowered to avoid the glare of the display with higher brightness. . Therefore, people need to adjust the brightness of the display according to different viewing environments.
- the data voltage Vdata outputted by the data line is adjusted to achieve the purpose of adjusting the display brightness.
- the gray scale value is converted into a brightness value by means of a lookup table, and then the brightness value is subjected to a gain operation of a corresponding multiple, thereby Adjust the brightness value.
- the above method requires a large number of searching steps in the brightness adjustment process, so a large amount of memory needs to be added. In this way, a large amount of FPGA (Field-Programmable Gate Array) resources are occupied, which increases the production cost.
- FPGA Field-Programmable Gate Array
- Embodiments of the present disclosure provide a driving method of a pixel circuit and a driving apparatus thereof, which can solve the problem that an increase in the number of memories causes an increase in cost when luminance adjustment is performed by a gamma curve and a look-up table method.
- a driving method of a pixel circuit includes a driving transistor, a light emitting device whose anode is connected to a second pole of the driving transistor, and a first switching transistor.
- the first pole of the first switching transistor is connected to the first voltage terminal, the second pole is connected to the first pole of the driving transistor, and the gate is connected to the first gate line.
- the driving method includes: acquiring brightness information of a display screen in a light emitting stage; determining a duty ratio of the pulse signal according to the brightness information; and inputting a high level to the first voltage end, the first gate line A gate signal having the duty ratio is input to a gate of the first switching transistor to control a lighting time of the light emitting device.
- a driving device of a pixel circuit includes a driving transistor, a light emitting device whose anode is connected to a second pole of the driving transistor, and a first switching transistor.
- the first pole of the first switching transistor is connected to the first voltage terminal, the second pole is connected to the first pole of the driving transistor, and the gate is connected to the first gate line.
- the driving device includes an acquiring unit, a duty ratio determining unit, and a pulse signal triggering unit.
- the acquiring unit is configured to acquire brightness information of the display screen in a lighting stage of the pixel circuit.
- the duty ratio determining unit is configured to determine a duty ratio of the pulse signal according to the brightness information.
- the pulse signal triggering unit is configured to input a pulse signal having the duty ratio to a gate of the first switching transistor through the first gate line to input a high level when the first voltage terminal inputs a high level to control The luminescence time of the illuminating device.
- the driving transistor When the driving transistor is turned on, the high level input by the first voltage terminal enables the driving current flowing through the driving transistor to drive the light emitting device to emit light, and the pulse signal having the duty ratio can control the on and off of the light emitting device. , thereby controlling the illumination time of the light emitting device and changing the effective value of the driving current of the light emitting device. Accordingly, in the driving process of the pixel circuit, the purpose of adjusting the brightness of the light emitting device can be achieved.
- the above-mentioned process of adjusting the brightness of the light-emitting device does not involve the look-up table step of the brightness and gray-scale interchange process, the number of memories can be reduced, and the occupancy rate of the FPGA resources can be reduced, thereby achieving The purpose of reducing the cost; on the other hand, in the process of brightness adjustment, the gray scale data input by the data line is not changed, and the fineness of the display screen is avoided due to the reduced range of the gray scale in the brightness adjustment process. Impact.
- FIG. 1 is a schematic structural diagram of a pixel circuit according to an embodiment of the present disclosure
- FIG. 2 is a flowchart of a driving method for a pixel circuit according to an embodiment of the present disclosure
- FIG. 3a is a pulse signal according to an embodiment of the present disclosure
- FIG. 3b is another pulse signal according to an embodiment of the present disclosure.
- FIG. 4 is a schematic structural diagram of another pixel circuit according to an embodiment of the present disclosure.
- FIG. 5 is a timing diagram of a control signal according to an embodiment of the present disclosure.
- FIG. 6 is a schematic structural diagram of a driving apparatus for a pixel circuit according to an embodiment of the present disclosure.
- the embodiment of the present disclosure provides a driving method of a pixel circuit, wherein the pixel circuit, as shown in FIG. 1 , may include a driving transistor Td, a light emitting device L whose anode is connected to a second pole of the driving transistor Td, and a first Switching transistor T1.
- the first pole of the first switching transistor T1 is connected to the first voltage terminal ELVDD
- the second pole is connected to the first pole of the driving transistor Td
- the gate is connected to the first gate line G1.
- the above driving method may include S101 to S103. In S101, the luminance information of the display screen is acquired in the light-emitting phase P4 as shown in FIG.
- the duty ratio of the pulse signal is determined based on the luminance information.
- the first voltage terminal ELVDD is input to a high level, and the first gate line G1 inputs a pulse signal PWM (Pulse Width Modulation) having the duty ratio to the gate of the first switching transistor T1 to The light-emitting time of the light-emitting device L is controlled.
- PWM Pulse Width Modulation
- the cathode of the light emitting device L is connected to the second voltage terminal ELVSS.
- the light emitting device L may be an LED (Light Emitting Diode) in the prior art.
- LED Light Emitting Diode
- an OLED is taken as an example for description.
- Embodiments of the present disclosure provide a driving method of a pixel circuit.
- the pixel circuit includes a driving transistor, an anode and a light emitting device connected to a second pole of the driving transistor, and a first switching transistor.
- the first pole of the first switching transistor is connected to the first voltage terminal
- the second pole is connected to the first pole of the driving transistor
- the gate is connected to the first gate line.
- the driving method of the pixel circuit includes: firstly, acquiring luminance information of a display screen in an illumination phase, thereby obtaining a luminance value of a screen that is finally required to be displayed; and then determining a duty ratio of the pulse signal according to the luminance information, thereby The duty ratio of the pulse signal is matched with the brightness information; finally, the first voltage terminal is input to a high level, and the first gate line inputs a pulse signal having the duty ratio to the gate of the first switching transistor.
- the driving transistor is turned on, the high level input by the first voltage terminal enables the driving current flowing through the driving transistor to drive the light emitting device to emit light, and the pulse signal having the duty ratio can control the on and off of the light emitting device.
- the purpose of controlling the light-emitting time of the light-emitting device and changing the effective value of the driving current of the light-emitting device can be achieved.
- the above-mentioned process of adjusting the brightness of the light-emitting device does not involve the look-up table step of the brightness and gray-scale interchange process, the number of memories can be reduced, and the occupancy rate of the FPGA resources can be reduced, thereby achieving The purpose of reducing costs.
- the gray scale value of the data line input is not changed, which avoids the influence on the fineness of the display screen due to the reduction of the gray scale adjustable range in the brightness adjustment process.
- the process of full screen brightness adjustment in the prior art is essentially an adjustment of the maximum value of the gray scale adjustable range.
- the full screen is The overall brightness is reduced.
- the grayscale value of the picture can only vary from 0 to 60 for a single pixel unit. Therefore, in the same pixel unit, two-frame display pictures with similar gray-scale values may not be recognized by the human eye, thereby making the display picture not fine enough.
- the grayscale value of the data line input is not changed, so The grayscale adjustable range is still between 0 and 255, so it does not affect the fineness of the display.
- the brightness information of the above display screen will be exemplified below.
- the brightness information described above may include a brightness value of the display screen. That is to say, the brightness information may be a specific value representing the brightness, for example, the brightness information may be X cd/m 2 (candela per square meter).
- the duty of the pulse signal corresponding to the luminance value of X cd/m2 can be found from the correspondence table between the luminance value in which the display screen is stored and the duty ratio of the pulse signal. ratio.
- the on and off of the light emitting diode OLED is controlled by the pulse signal PWM having the duty ratio to control the light emitting time of the light emitting diode OLED, thereby changing the effective value of the driving current flowing through the light emitting diode OLED in the light emitting phase P4.
- the effective value of the driving current is large, the brightness of the light emitting diode OLED is high; when the effective value of the driving current is small, the brightness of the light emitting diode OLED is low.
- the effective brightness value of the light emitting diode OLED is the same as the target brightness value X cd/m 2 , thereby realizing the brightness adjustment of the light emitting diode OLED.
- the display panel may include a plurality of pixel units arranged in a matrix, and the pixel units in the same row may be controlled by the same gate line. Since the pulse signal PWM described above can be input to the first switching transistor T1 through the first gate line G1. The first gate line G1 of each row controls a row of pixel units, and the first switching transistor T1 is disposed in the pixel circuit of each pixel unit. Therefore, in the process of performing progressive scanning on each row of gate lines in the display panel by the gate driving circuit, the pulse signal PWM is input row by row to all of the first gate lines G1 in the display panel. Accordingly, adjustment of the full screen brightness of the display panel can be achieved.
- the pulse signal PWM can control the magnitude of the effective value of the driving current flowing through the light emitting diode OLED.
- the pulse signal PWM is as shown in FIG. 3a and its duty ratio is 10%, in the entire illuminating phase P4, only the light-emitting diode OLED has a driving current flowing in 10% of the time, so that the driving current can be made.
- the effective value is about 10% of the driving current of the light-emitting diode OLED when it is always bright in the light-emitting phase.
- the light-emitting diode OLED when the duty ratio is 90%, in the entire light-emitting phase P4, the light-emitting diode OLED has a driving current flowing in 90% of the time, so that the effective value of the driving current can be made to emit light.
- the diode OLED has about 90% of the drive current when the illumination phase is always on.
- the brightness information may include a display mode corresponding to the brightness value of the display screen, for example, the brightness information may be a night mode, an outdoor mode, a rainy day mode, or the like.
- the brightness of the outside light at night is less than that of the rainy day
- the brightness of the external light on a rainy day is less than the brightness of the outside light when it is outdoors. Therefore, in the night and rainy days, there may be a phenomenon that the brightness value of the display screen is too high to cause glare; and in the case of sunny outdoors, there may be a picture whose brightness value is too low and the external light is strong, so that the picture is not clear. phenomenon.
- the brightness value of the display screen corresponding to the night mode may be adjusted to be smaller than the brightness value corresponding to the rainy day mode, and the brightness value corresponding to the rainy day mode may be adjusted to be smaller than the outdoor mode. Brightness value.
- the duty ratio of the pulse signal corresponding to the display mode can be found from the correspondence table between the display mode and the duty ratio of the pulse signal.
- the light-emitting time of the light-emitting diode OLED is controlled by the pulse signal PWM having the duty ratio, thereby changing the effective value of the driving current flowing through the light-emitting diode OLED in the light-emitting phase P4, so that the effective brightness value and the target of the light-emitting diode OLED
- the luminance values X cd/m2 are the same, thereby achieving brightness adjustment of the light emitting diode OLED.
- determining the duty ratio of the pulse signal according to the brightness information may include: the percentage value of the brightness value and the percentage value of the duty ratio may be equal.
- the pulse signal PWM can have a duty cycle of 10% as shown in Figure 3a.
- the pulse signal PWM may have a duty ratio of 90% as shown in FIG. 3b. In this way, the duty cycle of the pulse signal PWM can be intuitively derived from the brightness.
- the luminance value of each pixel unit in all the pixel units is the luminance threshold T.
- the full screen brightness of the display can be 10% of the full screen brightness threshold U.
- the full screen luminance of the display screen may be 90% of the full screen luminance threshold U.
- the description has been made by taking the duty ratio of the pulse signal PWM as 10% or 90% as an example. Pulse signals PWM with other duty cycles are not repeated here, but they should all belong to The scope of protection of the present disclosure.
- the minimum step value of the PWM duty ratio of the pulse signal that needs to be input in two adjacent display screens is 10%, for example, the first pulse signal PWM The duty cycle is 10%.
- the PWM signal duty of the second pulse signal is 20%.
- the minimum brightness step value of the adjacent two display pictures is 10% of the brightness threshold T. Therefore, if the minimum brightness step value is too large, the brightness difference between two adjacent display pictures is large during the brightness adjustment process.
- the minimum step value of the PWM duty ratio of the pulse signal that needs to be input in two adjacent display screens can be reduced, for example, the minimum step of the pulse duty PWM duty ratio when the adjacent two display screens need to be input.
- the minimum brightness step value of two adjacent display pictures may be 10 ⁇ of the brightness threshold T.
- a plurality of TFTs are disposed on the array substrate of the OLED display.
- the above TFT is generally formed using polysilicon.
- the TFT switching circuit fabricated on a large-area glass substrate often fluctuates in electrical parameters such as threshold voltage Vth, mobility, etc., so that the current flowing through the OLED device not only follows
- the change in the on-voltage stress generated by the long-time conduction of the TFT changes, and it also varies depending on the threshold voltage Vth of the TFT.
- the brightness uniformity and brightness constancy of the display will be affected, thereby reducing the picture quality and quality of the display.
- an OLED pixel circuit with a compensation function is provided in the display.
- the following takes a specific embodiment to take an OLED pixel circuit with a compensation function as shown in FIG. 4 as an example.
- a method for realizing the above brightness is described in detail.
- the above pixel circuit may further include a second switching transistor T2, a first capacitor C1, and a second capacitor C2.
- the first pole of the second switching transistor T2 is connected to the data line Data, the second pole is connected to the gate of the driving transistor Td, and the gate is connected to the second gate line G2.
- One end of the first capacitor C1 is connected to the gate of the driving transistor Td, and the other end is connected to a light emitting device such as an anode of the light emitting diode OLED.
- One end of the second capacitor C2 is connected to a light emitting device, such as an anode of the light emitting diode OLED, and the other end is connected to the second voltage terminal ELVSS.
- a light emitting device such as an anode of the light emitting diode OLED
- all the transistors (Td, T1, and T2) in the embodiment of the present disclosure may be a depletion transistor or an enhancement transistor. The disclosure is not limited thereto, but should all fall within the scope of protection of the present disclosure.
- Third: All of the transistors (Td, T1, and T2) in the embodiments of the present disclosure may be N-type transistors or P-type transistors. The disclosure is not limited thereto, but should all fall within the scope of protection of the present disclosure.
- the description is made by taking an example in which the driving transistor Td, the first switching transistor T1, and the second switching transistor T2 are both N-type enhancement transistors.
- the potential of the source is lower than the potential of the drain, so that the carrier (electron) in the N-type transistor can be made from the potential of the transistor after the transistor is turned on.
- the low source flows to the higher potential drain.
- the driving transistor Td in FIG. 4 since the voltage input by the first voltage terminal ELVDD is used to drive the light emitting diode OLED to emit light, the input voltage thereof is generally greater than the voltage at the node b. Therefore, the second extreme source of the driving transistor Td is the first extremely drain.
- the first poles of the transistors may be drains, and the second poles may all be sources.
- the working process of the pixel circuit can be specifically divided into four phases, namely: a reset phase, a compensation phase, a write phase, and an illumination phase, which can be represented by P1, P2, P3, and P4, respectively.
- the first voltage terminal ELVDD inputs a low level
- the first gate line G1 inputs a high level
- the second gate line G2 inputs a high level
- the data line Data inputs a reference voltage Vref.
- the description is made by taking the reference voltage Vref as a low level as an example.
- the first switching transistor T1 and the second switching transistor T2 may be respectively turned on, so that the reference voltage Vref of the data line Data input can be transmitted to the driving.
- the potential of the node a is Vref, thereby resetting the gate voltage of the driving transistor Td and the electric power across the first capacitor C1 and the second capacitor C2, and displaying the picture in the previous frame.
- the first voltage terminal ELVDD inputs a high level
- the first gate line G1 inputs a high level
- the second gate line G2 inputs a high level
- the data line Data inputs a reference voltage Vref.
- the first switching transistor T1 and the second switching transistor T2 continue to be in an on state, and the first voltage terminal ELVDD is input to a high level to charge the driving transistor Td in the on state, and the gate of the driving transistor Td is connected.
- the potential Vref of the point a) is lower than the level of the threshold voltage Vth of the driving transistor Td itself to the source (node b) of the driving transistor Td, so that the potential of the node b is Vref-Vth.
- the driving transistor Td is turned off, and the voltage across the first capacitor C1 is Vth.
- the first voltage terminal ELVDD inputs a high level
- the first gate line G1 inputs a low level
- the second gate line G2 inputs a high level
- the data line Data inputs a data voltage Vdata.
- the first switching transistor T1 is in an off state, and the second switching transistor T2 and the driving transistor Td are turned on.
- the data line Data is input to the data voltage Vdata.
- the potential of the gate (node a) of the driving transistor Td is Vdata.
- the first voltage terminal ELVDD is input to a high level
- the second gate line G2 is input to a low level
- the first gate line G1 is input with a pulse signal PWM having a duty ratio (for example, 10%).
- the second switching transistor T2 is in an off state, and the first gate line G1 inputs a pulse signal PWM having a duty ratio (for example, 10%) to control the on-time of the first switching transistor T1, so that the first switching transistor T1 is turned on during 10% of the light-emitting phase P4, thereby controlling the OLED light-emitting time and changing the effective value of the light-emitting diode OLED drive current.
- PWM pulse signal having a duty ratio (for example, 10%)
- the luminance of the light emitting diode OLED is related to the magnitude of the effective value of the driving current.
- the pulse signal PWM is input by the first gate line G1
- the pulse signal PWM can be input to all of the display panel line by line in the process of performing progressive scanning on each row of gate lines in the display panel by the gate driving circuit.
- First grid line On G1 the adjustment of the full screen brightness of the display panel can be realized.
- the first voltage terminal ELVDD is input with a high level, and when the light-emitting diode OLED emits light under the control of the pulse signal PWM, the gate-source voltage of the driving transistor Td may be:
- Vgs Va-Vb
- the current I for driving the OLED light emission is independent of the threshold voltage Vth of the driving transistor Td, so that the display luminance difference due to the drift of the threshold voltage can be avoided.
- the transistors are all described by taking an N-type enhancement type TFT as an example.
- an N-type depletion TFT can also be used.
- the threshold voltage Vth is a positive value for the N-type enhancement type TFT
- the threshold voltage Vth is a negative value for the N-type depletion type TFT.
- connection position of the first voltage terminal ELVDD and the second voltage terminal ELVSS in FIG. 4 is interchanged.
- the first pole of the first switching transistor T1 originally connected to the first voltage terminal ELVDD is connected to the second voltage terminal ELVSS; the cathode of the light emitting device L originally connected to the second voltage terminal ELVSS is connected to the first voltage terminal ELVDD.
- Embodiments of the present disclosure provide a driving device for a pixel circuit.
- the pixel circuit as shown in FIG. 1, may include a driving transistor Td and a light emitting device L whose anode is connected to the second electrode of the driving transistor Td.
- the first pole of the first switching transistor T1 is connected to the first voltage terminal ELVDD
- the second pole is connected to the first pole of the driving transistor Td
- the gate is connected to the first gate line G1.
- the driving device may include an acquiring unit 100, a duty ratio determining unit 101, and a pulse signal triggering unit 102.
- the obtaining unit 100 is configured to acquire brightness information of the display screen in the light emitting phase P4 of the pixel circuit.
- the duty ratio determining unit 101 is configured to determine a duty ratio of the pulse signal based on the brightness information.
- the pulse signal triggering unit 102 is configured to input a pulse signal PWM having the duty ratio to the gate of the first switching transistor T1 through the first gate line G1 to control the light emission when the first voltage terminal ELVDD inputs a high level.
- the luminescence time of device L is configured to input a pulse signal PWM having the duty ratio to the gate of the first switching transistor T1 through the first gate line G1 to control the light emission when the first voltage terminal ELVDD inputs a high level.
- the brightness information includes a brightness value of the display screen, or the brightness information may include a display mode corresponding to a brightness value of the display screen, for example, the brightness information may be a night mode, an outdoor mode, or a rainy day mode. Wait.
- the luminance value is a percentage value
- the percentage value of the luminance value and the percentage value of the duty ratio may be equal.
- Embodiments of the present disclosure provide a driving device for a pixel circuit.
- the pixel circuit includes a driving transistor, a light emitting device whose anode is connected to a second pole of the driving transistor, and a first switching transistor.
- the first pole of the first switching transistor is connected to the first voltage terminal
- the second pole is connected to the first pole of the driving transistor
- the gate is connected to the first gate line.
- the driving device may include: an acquiring unit, a duty ratio determining unit, and a pulse signal triggering unit.
- the acquiring unit is configured to acquire brightness information of the display screen in a lighting stage of the pixel circuit; the duty ratio determining unit is configured to determine a duty ratio of the pulse signal according to the brightness information; and the pulse signal triggering unit is configured to be used for driving the transistor One pole inputs a pulse signal having the duty cycle.
- the driving transistor When the driving transistor is turned on, the high level input to the first voltage terminal enables the driving current flowing through the driving transistor to drive the light emitting device to emit light, and the pulse signal having the duty ratio can control the on and off of the light emitting device. Thereby, it is possible to control the lighting time of the light emitting device and change the effective value of the driving current of the light emitting device.
- the purpose of adjusting the brightness of the light emitting device can be achieved.
- the number of memories can be reduced, and the occupancy rate of the FPGA resources can be reduced, thereby achieving The purpose of reducing the cost;
- the gray scale data input by the data line is not changed, and the fineness of the display screen is avoided due to the reduced range of the gray scale in the brightness adjustment process. Impact.
- the foregoing program may be stored in a computer readable storage medium, and the program is executed when executed.
- the method includes the steps of the foregoing method embodiments; and the foregoing storage medium includes: a ROM, a RAM, a magnetic disk, or an optical disk, and the like, which can store program codes. medium.
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Abstract
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Claims (10)
- 一种用于像素电路的驱动方法,所述像素电路包括驱动晶体管、阳极与驱动晶体管的第二极相连接的发光器件、以及第一开关晶体管,所述第一开关晶体管的第一极连接第一电压端,第二极与所述驱动晶体管的第一极相连接,栅极连接第一栅线,其中,所述驱动方法包括:在发光阶段,获取显示画面的亮度信息;根据所述亮度信息确定脉冲信号的占空比;所述第一电压端输入高电平,所述第一栅线向所述第一开关晶体管的栅极输入具有所述占空比的脉冲信号,以控制所述发光器件的发光时间。
- 根据权利要求1所述的用于像素电路的驱动方法,其中,所述亮度信息包括所述显示画面的亮度值。
- 根据权利要求1所述的用于像素电路的驱动方法,其中,所述亮度信息包括与所述显示画面的亮度值相对应的显示模式。
- 根据权利要求2或3所述的用于像素电路的驱动方法,其中,在所述亮度值为百分比值的情况下,所述根据所述亮度信息确定脉冲信号的占空比包括:所述亮度值的百分比值与所述占空比的百分比值相等。
- 根据权利要求4所述的用于像素电路的驱动方法,其中,所述像素电路还包括第二开关晶体管、第一电容器以及第二电容器,所述第二开关晶体管的第一极连接数据线,第二极连接所述驱动晶体管的栅极,栅极连接第二栅线;所述第一电容器的一端连接所述驱动晶体管的栅极,另一端连接所述发光器件的阳极;所述第二电容器的一端连接所述发光器件的阳极,另一端连接所述第二电压端。
- 根据权利要求5所述的用于像素电路的驱动方法,其中,所述驱动晶体管、所述第一开关晶体管以及所述第二开关晶体管均为N型晶体管;或,所述驱动晶体管、所述第一开关晶体管以及所述第二开关晶体管均为P型晶体管。
- 根据权利要求6所述的用于像素电路的驱动方法,其中,所述驱动晶体管、所述第一开关晶体管以及所述第二开关晶体管均为增强型晶体管或耗尽型晶体管。
- 根据权利要求7所述的用于像素电路的驱动方法,其中,在所述第一开关晶体管、所述第二开关晶体管均为N型增强型晶体管的情况下,所述驱动晶体管、所述第一开关晶体管和所述第二开关晶体管的第一极为漏极,第二极为源极。
- 根据权利要求8所述的用于像素电路的驱动方法,其中,所述驱动方法包括:在重置阶段,所述第一电压端输入低电平,所述第一栅线输入高电平,所述第一开关晶体管导通,所述第二栅线输入高电平,所述第二开关晶体管导通,所述数据线输入参考电压;在补偿阶段,所述第一栅线输入高电平,所述第一开关晶体管导通,所述第二栅线输入高电平,所述第二开关晶体管导通,所述数据线输入参考电压,所述第一电压端输入高电平,所述驱动晶体管的阈值电压存入所述第一电容器;在写入阶段,所述第二栅线输入高电平,所述第二开关晶体管导通,所述第一栅线输入低电平,所述第二开关晶体管处于截止状态,所述数据线输入的数据电压写入所述驱动晶体管的栅极;在所述发光阶段,所述第一电压端输入高电平,所述第二栅线栅极输入低电平,所述第二开关晶体管截止,所述第一栅线输入具有所述占空比的脉冲信号。
- 一种用于像素电路的驱动装置,所述像素电路包括驱动晶体管、阳极与驱动晶体管的第二极相连接的发光器件、以及第一开关晶体管,所述第一开关晶体管的第一极连接第一电压端,第二极与所述驱动晶体管的第一极相连接,栅极连接第一栅线,其中,所述驱动装置包括:获取单元、占空比确定单元以及脉冲信号触发单元;所述获取单元用于在所述像素电路的发光阶段,获取显示画面的亮度信息;所述占空比确定单元用于根据所述亮度信息,确定脉冲信号的占空比;所述脉冲信号触发单元用于在所述第一电压端输入高电平时,通过所述 第一栅线向所述第一开关晶体管的栅极输入具有所述占空比的脉冲信号,以控制所述发光器件的发光时间。
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