WO2016050058A1 - 功率半导体器件及其制造方法 - Google Patents

功率半导体器件及其制造方法 Download PDF

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WO2016050058A1
WO2016050058A1 PCT/CN2015/077097 CN2015077097W WO2016050058A1 WO 2016050058 A1 WO2016050058 A1 WO 2016050058A1 CN 2015077097 W CN2015077097 W CN 2015077097W WO 2016050058 A1 WO2016050058 A1 WO 2016050058A1
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layer
junction termination
termination structure
gate
barrier layer
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PCT/CN2015/077097
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English (en)
French (fr)
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裴轶
李元
吴传佳
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苏州捷芯威半导体有限公司
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Priority to JP2017510357A priority Critical patent/JP6333469B2/ja
Publication of WO2016050058A1 publication Critical patent/WO2016050058A1/zh
Priority to US15/473,572 priority patent/US10103219B2/en

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Definitions

  • the present invention relates to the field of semiconductor technology, and in particular to a power semiconductor device having a junction termination structure and a method of fabricating the same.
  • the third-generation semiconductor material GaN has a high breakdown field strength (greater than 3 MV/cm) and a large band gap (room temperature 3.4 eV), so that it has a prospect of application under high temperature and high pressure.
  • a two-dimensional electron gas (2DEG) channel with high electron concentration and high mobility can be formed near the interface of the heterojunction. Therefore, GaN is particularly suitable for applications in high voltage, high current, high temperature, high speed, high power devices.
  • the withstand voltage can only reach 20 to 30% of the theoretical value. This is because the electric field concentrates when a high voltage is applied to the drain edge near the drain terminal. So device breakdown in GaN HEMTs typically occurs at the edge of the gate near the drain side. Therefore, increasing the withstand voltage capability of a device generally begins with reducing the peak of the electric field at the edge of the drain end of the gate.
  • a field plate structure is a common method for reducing the peak of an electric field.
  • a layer of insulating dielectric is deposited on the gate first, and then a metal field plate is deposited.
  • the field plate is connected to the gate or the source and has a fixed potential.
  • the equipotential of the field plate itself can pull the power line at the edge of the gate. Turning on makes the potential gradient gentle, reducing the electric field strength at the edge of the gate that would otherwise reach the material breakdown limit, and absorbing the peak to the edge of the field plate, which is equivalent to expanding the depletion region. Since the integral of the electric field is the breakdown voltage, the breakdown voltage is actually much larger.
  • the most desirable result of the field plate modulating the electric field is that the distribution of the electric field is expected to be close to a rectangle, which maximizes the integrated area of the electric field strength to the distance, thereby maximizing the breakdown voltage of the device.
  • the field plate structure introduces new electric field spikes near the drain edge. Since the electric field agglomeration effect also exists at the edge of the field plate electrode, the dielectric breakdown at the edge of the field plate is another way of device breakdown. path. Therefore, in the actual use of the field plate structure, it is also necessary to consider the dielectric breakdown of the insulating medium itself in the field plate structure.
  • the dielectric layer introduces a capacitor, which reduces the switching speed of the device and increases the power loss. Therefore, it is very necessary to find new field plate technology to increase the breakdown voltage of the device.
  • the present invention proposes a power semiconductor device having a junction termination structure and a method of fabricating the same.
  • the material of the junction terminal is a semiconductor, and may be AlGaN having a constant Al content, AlGaN having a graded Al content, InAlN having a constant In content, InAlN having a gradually changed In content, n-type GaN, or p-type GaN.
  • the junction termination structure extends from the edge of the gate near the drain side toward the drain direction, and its thickness decreases in the drain direction.
  • the lattice constant of the junction termination material is larger than the lattice constant of the barrier layer material, a compressive stress is introduced in the junction termination.
  • piezoelectric negative charge is generated in the junction terminal, and the generated polarization electric field reduces the concentration of the two-dimensional electron gas at the interface between the barrier layer and the channel layer.
  • the degree of depletion of the two-dimensional electron gas is also gradually changed. In the place where the junction terminal thickness is large, the polarization electric field intensity is large, and the exhaustion degree of the two-dimensional electron gas is the largest, with the junction terminal.
  • the reduction in thickness reduces the extent to which the two-dimensional electron gas is depleted.
  • a structure in which the degree of depletion under the junction terminal is gradually changed and the concentration of the two-dimensional electron gas in the other portion is kept constant is formed.
  • the junction termination can adjust the electric field distribution on the surface of the device barrier layer when an applied voltage is applied to the drain of the device. Since the junction terminal has the largest thickness near the edge of the gate, the depletion of the two-dimensional electron gas is most pronounced, so the electric field peak here is most suppressed. At the same time, since the junction terminal thickness gradually decreases toward the drain direction, the degree of depletion of the two-dimensional electron gas near the drain direction is gradually reduced, and finally returns to the two-dimensional electron concentration when there is no depletion. Therefore, the electric field lines at the edge of the terminal do not suddenly increase to be dense, and no new electric field spikes are introduced at the edge of the terminal. The electric field on the surface of the barrier layer between the gate and the drain smoothly transitions over a wider range, and the voltage of the barrier layer semiconductor between the source and the drain is similar, which increases the breakdown voltage of the device.
  • a power semiconductor device comprising:
  • a source a drain and a gate on the barrier layer, the gate being located between the source and the drain;
  • junction termination structure on the barrier layer, the junction termination structure extending from the edge of the gate adjacent to the drain side toward the drain direction, the lattice constant of the junction termination structure being greater than The lattice constant of the barrier layer.
  • the thickness of the junction termination structure decreases in a direction toward the drain of the gate.
  • the junction termination structure is a planar junction termination structure, a curved junction termination structure or a stepped junction termination structure.
  • the barrier layer is an AlGaN layer
  • the junction termination structure is an AlGaN layer having a constant Al content
  • an Al content is from the interface of the junction termination structure and the barrier layer to the junction
  • the barrier layer material is InAlN
  • the junction termination structure is an InAlN layer having a constant In content
  • an In content is from the interface of the junction termination structure and the barrier layer to the junction
  • a groove is provided in a partial region of the barrier layer, at least a partial region of the gate is located above the groove, and the gate metal is filled in the groove.
  • a gate metal field plate is disposed over at least a portion of the gate and over at least a portion of the junction termination structure, the gate and the junction termination structure passing through the gate Metal field plates are connected.
  • a source metal field plate is formed over at least a portion of the source region and over at least a portion of the junction termination structure, the source and the junction termination structure passing through the source metal field
  • the plates are connected, and an air bridge and/or a dielectric bridge are formed under the source metal field plate.
  • a partial region of the junction termination structure is located below the gate.
  • the power semiconductor device further includes a cap layer, the gate electrode being located above the cap layer, and the junction termination structure extending from the cap layer toward the drain direction.
  • a method of manufacturing a power semiconductor device comprising:
  • S6 forming source, drain, gate, and junction termination structures on the barrier layer, the gate being between the source and the drain; the junction termination structure from the gate An edge extending to a side of the drain extends toward the drain, and a lattice constant of the junction termination structure is greater than a lattice constant of the barrier layer.
  • the junction termination structure is formed by a metal organic chemical vapor deposition, a sputtering process, an evaporation process, or a chemical coating process.
  • junction termination structure on the barrier layer is specifically:
  • the photoresist layer is photolithographically developed using a mask having a dense lattice, and then dry etched to remove a portion of the termination layer to form the junction termination structure.
  • the mask is gradually increased in exposure from the gate to the drain.
  • junction termination structure on the barrier layer is specifically:
  • the photoresist layer is photolithographically developed using a mask, and then subjected to dry etching to remove a portion of the termination layer;
  • the width of the exposure window is reduced, and the photoresist layer is photolithographically developed and developed using a mask, and then dry etching is performed to remove the portion of the termination layer until a junction termination structure is formed.
  • the junction termination structure is a planar junction termination structure, a curved junction termination structure, or a stepped junction termination structure.
  • the two-dimensional electron gas at the interface between the barrier layer and the channel layer is partially depleted due to the piezoelectric effect caused by the difference in lattice constant between the junction termination structure and the lower barrier layer; the junction termination structure can effectively improve the potential
  • the electric field distribution of the barrier layer increases the breakdown voltage of the device.
  • FIG. 1 is a schematic structural view of a HEMT of a planar junction terminal structure according to a first embodiment of the present invention
  • Figure 2a is a schematic view of the energy band at the position A-A' in Figure 1
  • Figure 2b is a schematic view of the energy band at the position B-B' in Figure 1;
  • FIG. 3 is a schematic structural view of a HEMT in a planar junction termination structure according to a first embodiment of the present invention
  • FIG. 4 is a schematic structural view of a HEMT of a stepped junction terminal structure according to a second embodiment of the present invention.
  • FIG. 5 is a schematic structural view showing a process of preparing a HEMT of a stepped junction terminal structure according to a second embodiment of the present invention
  • 6a and 6b are schematic structural views showing another process of preparing a HEMT of a stepped junction terminal structure according to a second embodiment of the present invention.
  • FIG. 7 is a schematic structural view of a HEMT of a curved junction terminal structure according to a third embodiment of the present invention.
  • FIG. 8 is a schematic structural view of a HEMT of a curved junction terminal structure according to a fourth embodiment of the present invention.
  • FIG. 9 is a schematic structural view of a HEMT having a gate metal field plate and a junction termination structure in a fifth embodiment of the present invention.
  • FIG. 10 is a schematic structural view of a HEMT having a source metal field plate and a junction termination structure in a sixth embodiment of the present invention.
  • FIG. 11 is a schematic structural diagram of a HEMT of a planar junction terminal structure according to a seventh embodiment of the present invention.
  • FIG. 12 is a schematic structural diagram of a HEMT of a planar junction terminal structure according to an eighth embodiment of the present invention.
  • FIG. 13 is a schematic structural diagram of a HEMT of a planar junction terminal structure according to a ninth embodiment of the present invention.
  • the invention discloses a power semiconductor device, comprising:
  • a source a drain and a gate on the barrier layer, the gate being located between the source and the drain;
  • junction termination structure on the barrier layer, the junction termination structure extending from the edge of the gate adjacent to the drain side toward the drain direction, the lattice constant of the junction termination structure being greater than The lattice constant of the barrier layer.
  • the invention also discloses a manufacturing method of a power semiconductor device, comprising:
  • S6 forming source, drain, gate, and junction termination structures on the barrier layer, the gate being between the source and the drain; the junction termination structure from the gate An edge extending to a side of the drain extends toward the drain, and a lattice constant of the junction termination structure is greater than a lattice constant of the barrier layer.
  • FIG. 1 is a schematic structural view of a HEMT of a planar junction terminal structure according to a first embodiment of the present invention. It should be noted that the planar junction termination structure according to the embodiment of the present invention refers to a plane in which the surface of the junction termination structure is flat.
  • the HEMT specifically includes:
  • the substrate may be silicon, sapphire, silicon carbide or other materials;
  • the role of the channel layer 15 affects the crystal quality, surface morphology, and electrical properties of the heterojunction formed by the channel layer 15 and the barrier layer 16;
  • the channel layer 15 may comprise an undoped GaN layer
  • the barrier layer 16 grown on the channel layer 15 may include AlGaN or other nitrides, and the channel layer 15 and the barrier layer 16 together form a semiconductor heterojunction structure, forming a high concentration at the interface between the two. a two-dimensional electron gas and a conductive channel at a heterojunction interface of the GaN channel layer 15;
  • the barrier layer 16 is a source 17 and a drain 20, and the source 17 and the drain 20 form an ohmic contact with the barrier layer 16.
  • the material of the ohmic metal may be metal such as Ni, Ti, Al or Au.
  • the barrier layer 16 between the source 17 and the drain 20 is a gate 18, and the gate 18 forms a Schottky contact with the barrier layer 16;
  • the thickness of the junction termination structure 19 is decreasing from the edge of the gate 18 to the drain 20.
  • the material of the barrier layer 16 is AlGaN
  • the material of the junction termination structure 19 in this embodiment may also be AlGaN, and the Al content in the junction termination structure 19 is smaller than the Al content in the barrier layer 16.
  • the lattice constant of the junction termination structure 19 is larger than the lattice constant of the barrier layer 16, and compressive stress is introduced at the interface between the two. Since the piezoelectric polarization coefficient of AlGaN is large, the polarization electric field generated is very strong, and there is a spontaneous polarization effect in AlGaN. Under the dual action of piezoelectric effect and spontaneous polarization effect, the junction termination structure 19 is generated. The piezoelectric negative charge has a depletion effect on the two-dimensional electron gas at the interface between the lower barrier layer 16 and the channel layer 15.
  • the termination structure of the semiconductor junction there is more piezoelectric negative charge at the junction terminal portion where the thickness is larger, and the depletion effect on the two-dimensional electron gas is stronger, as shown in the energy band diagram at A-A' in Fig. 2a. .
  • the two-dimensional electron gas at the junction end of the smaller thickness is less exhausted, as shown in the energy band diagram at B-B' in Fig. 2b, compared to the energy band diagram at the A-A' position in Fig. 1.
  • the Fermi level is shifted up, and the Fermi level is closer to the bottom of the GaN conduction band, so the two-dimensional electron gas concentration here is larger.
  • the concentration of the two-dimensional electron gas under it gradually decreases.
  • the maximum thickness of the junction termination structure that is, the two-dimensional electron gas exhausted at the gate near the drain is the most exhaustive, so the termination structure of the junction has the most obvious effect on the reduction of the electric field peak.
  • the effect on the two-dimensional electron gas depletion is reduced, which maintains a low channel on-resistance and satisfies the requirements of the modulated electric field strength.
  • the manufacturing method of the HEMT structure in this embodiment is specifically: firstly providing a substrate 12, and sequentially growing a nucleation layer 13, a buffer layer 14, a channel layer 15, a barrier layer 16, and a barrier layer on the substrate 12.
  • a source 17 and a drain 20, a gate 18 between the source 17 and the drain 20, and a junction termination structure 19 are formed on 16.
  • the channel layer 15 may be made of a GaN material
  • the barrier layer 16 may be made of an AlGaN material.
  • junction terminal structure The manufacturing method of the junction terminal structure will be described below.
  • barrier layer 16 and the junction termination structure 19 are AlGaN materials.
  • Photolithography is used on the junction termination layer to lithography the junction termination region using a specially designed mask.
  • the mask is formed by adjusting the density of the shading matrix to form a junction termination from the gate to the gate.
  • a mask design that gradually increases the exposure away from the gate, and forms a photoresist layer 21 having a thickness decreasing from the gate to the drain after development, as shown in FIG. 3;
  • the lithography region is etched by a dry etching process, and an etched region conforming to the requirements is formed on the barrier layer 16 by optimizing the etching selectivity ratio (for example, 1:1) of the photoresist and the AlGaN junction termination layer.
  • the planar junction termination structure is shown in Figure 1.
  • a gate, a source and a drain of the device may also be formed on the barrier layer, and finally a passivation layer may be added.
  • the passivation layer may be silicon nitride, aluminum oxide, tantalum oxide or the like.
  • the passivated HEMT can reduce the surface state density of the device and suppress the current collapse effect of the HEMT.
  • the material for forming the junction termination structure 19 may also be AlGaN whose Al content is gradually decreasing from the interface of the junction termination structure 19 and the barrier layer 16 toward the surface of the junction termination structure 19. And the Al content in the junction termination structure 19 is at the junction termination structure 19 and the barrier layer 16 The interface is the largest, but smaller than the Al content in the barrier layer 16. Further, the material for forming the junction termination structure 19 may also be n-type GaN or p-type GaN or the like.
  • the barrier layer 16 may also be InAlN, and the corresponding junction termination structure 19 may be InAlN.
  • the In content in the junction termination structure is greater than the In content in the barrier layer 16.
  • the corresponding junction termination structure 19 may also be InAlN whose In content is gradually decreasing from the interface of the junction termination structure 19 and the barrier layer 16 toward the surface of the junction termination structure 19, and
  • the In content in the junction termination structure 19 is the largest at the interface between the junction termination structure 19 and the barrier layer 16, but smaller than the In content in the barrier layer 16, and further, the material used to form the junction termination structure 20 may also be n-type GaN or P-type GaN or the like.
  • FIG. 4 is a schematic structural view of a HEMT of a stepped junction terminal structure according to a second embodiment of the present invention. It should be noted that the terminal structure having a stepped junction according to the embodiment of the present invention means that the surface of the terminal structure is stepped.
  • the junction terminal structure 19 is a stepped structure, and the rest is the same as the first embodiment.
  • the barrier layer 16 and the junction termination structure 19 may both be AlGaN, and the Al content in the junction termination structure 19 is smaller than the Al content in the barrier layer 16.
  • the junction termination structure 19 functions the same as in the first embodiment, and the depletion of the two-dimensional electron gas at the interface between the barrier layer 16 and the channel layer 15 is also gradual, so that the modulation of the electric field is also gradual.
  • the junction termination structure in the present embodiment may also be an AlGaN whose Al content is gradually decreasing from the interface of the junction termination structure 20 and the barrier layer 16 toward the surface of the junction termination structure 19, and the Al content in the junction termination structure 20 is The interface between the junction termination structure 19 and the barrier layer 16 is the largest, but smaller than the Al content in the barrier layer 16.
  • the material for forming the junction termination structure 19 may also be n-type GaN or p-type GaN or the like.
  • the barrier layer 16 may also be InAlN, and the corresponding junction termination structure may be InAlN.
  • the In content in the junction termination structure is greater than the In content in the barrier layer 16.
  • the corresponding junction termination structure 19 may also be InAlN whose In content is gradually decreasing from the interface of the junction termination structure 19 and the barrier layer 16 toward the surface of the junction termination structure 19, and
  • the In content in the junction termination structure 20 is the largest at the interface between the junction termination structure 19 and the barrier layer 16, but smaller than the In content in the barrier layer 16, and further, the material used to form the junction termination structure 20 may also be n-type GaN or P-type GaN or the like.
  • junction termination structure is simpler in the preparation method than the structure in which the thickness is uniformly changed in the first embodiment.
  • a schematic diagram of a structure in the preparation process of the junction termination structure in the second embodiment is as shown in FIG. 5, first depositing an AlGaN junction termination layer 19 on the barrier layer 16; then using the photoresist 21 to make light on the junction termination layer.
  • the transmitted light is decremented from the gate near the junction terminal to the drain, thereby making the exposure degree of the photoresist Decreasing, after development, the photoresist forms a stepped structure;
  • a dry etching process is performed to etch the lithographic region, and by optimizing the etching selectivity ratio (such as 1:1) of the photoresist and the AlGaN junction terminal layer, a stepped shape is formed on the barrier layer. Junction terminal structure.
  • a passivation layer may be added.
  • the photolithographic mask in this embodiment has a lower resolution requirement than the junction terminal in which the thickness is continuously changed in the first embodiment, and thus is easier to design.
  • 6a and 6b are schematic structural views showing another manufacturing process of a HEMT having a stepped junction terminal structure in a second embodiment of the present invention.
  • the photoresist 21 is first coated on the termination termination layer 19, and then exposed, developed, and etched to remove a portion of the GaN junction termination layer to form a layer as shown in FIG. 6a. Structure. The above process is repeated and the width of the exposure window is reduced to form the structure of Figure 6b. The above process is repeated to form the HEMT device having the stepped junction termination structure shown in FIG.
  • a curved junction termination structure means that the surface of the junction termination structure is a curved surface rather than a flat plane.
  • the curved junction termination structure includes an upper convex curved surface and a concave curved curved surface.
  • the curved junction termination structure described in the third embodiment is a junction termination structure of an upper convex curved structure.
  • the difference in this embodiment compared to the first embodiment is that the surface of the junction terminal structure 19 is an upper convex curved surface.
  • the curved junction terminal can adjust the electric field distribution by adjusting the curvature of the curved surface. Compared with the planar junction terminal, the electric field distribution is optimized by the tilt angle.
  • the curved junction termination structure provided in the third embodiment increases the method for optimizing the electric field distribution, which can be better. Improve device characteristics.
  • the manufacturing method of the HEMT structure shown in the third embodiment is similar to the manufacturing method of the HEMT shown in the first embodiment.
  • the surface is formed to have an upper convex curve.
  • the surface photoresist is then etched to form a junction termination structure having a convex curved surface.
  • FIG. 8 is a schematic structural view of a HEMT having a concave curved junction terminal structure according to a fourth embodiment of the present invention.
  • the present embodiment is different in that the surface of the junction terminal structure is a concave curved shape.
  • the concave curved surface junction terminal can adjust the electric field distribution by adjusting the curvature of the curve, and optimizes the electric field distribution by the tilt angle of the planar junction terminal, thereby increasing the method of optimizing the electric field distribution, and the device characteristics can be better improved.
  • the manufacturing method of the HEMT structure shown in the fourth embodiment is similar to the manufacturing method of the HEMT shown in the third embodiment.
  • the photoresist having a concave curved surface is formed first.
  • a junction termination structure having a concave curved surface is formed.
  • FIG. 9 is a schematic structural view of a HEMT having a gate metal field plate and a junction termination structure in a fifth embodiment of the present invention.
  • the present embodiment is provided with a gate metal field plate 21 above at least a portion of the gate 18 and at least a portion of the junction termination structure 19.
  • the gate 18 and the junction termination structure 19 are connected by the gate metal field plate 21.
  • the material of the gate metal field plate 21 may be the same as the gate metal, or may be other metals that form ohmic contact with the gate.
  • the structure Under the joint action of the junction termination structure 19 and the gate metal field plate 21, the structure can further suppress the electric field spike near the drain terminal of the gate, thereby increasing the breakdown voltage of the device. In this structure, there is no insulating dielectric layer under the gate metal field plate 21, and the structure is simple and easy to implement.
  • FIG. 10 is a schematic structural view of a HEMT having a source metal field plate and a junction termination structure in a sixth embodiment of the present invention.
  • the HEMT structure provided by the present embodiment forms a source metal field plate 22 over at least a portion of the source 17 and at least a portion of the junction termination structure 19, and the source
  • the polar metal field plate has an air bridge.
  • the source 17 is connected to the junction termination structure 19 via a source metal field plate 22 having an air bridge.
  • the material of the source metal field plate 22 may be the same as the source metal, or may be other metals that form ohmic contact with the source.
  • the termination terminal structure 19 Combined with the source metal field plate 22, the structure can further suppress the electric field spike near the drain terminal of the gate, thereby increasing the breakdown voltage of the device.
  • the insulating metal layer may be formed in whole or in part under the source metal field plate 22.
  • the source metal field plate 22 forms a dielectric bridge or a combination of a dielectric bridge and an air bridge, and can also suppress the gate from being close to the drain end.
  • the electric field spikes increase the breakdown voltage of the device.
  • FIG. 11 is a schematic structural diagram of a HEMT of a planar junction termination structure according to a seventh embodiment of the present invention.
  • the difference in this embodiment is that at least part of the barrier layer 16 under the gate 18 is provided with a gate recess, and the gate metal is filled in the recess to form a gate. Lower extension area.
  • Embodiments of the present invention can form a gate metal junction termination structure 19 while depositing a gate metal. An enhanced device can be obtained when the two-dimensional electron gas under the gate 18 is depleted, and the gate metal junction termination structure 19 can further reduce the electric field peak at the edge of the gate 18, thereby enhancing the withstand voltage capability of the device.
  • a recess may be disposed in a portion of the barrier layer 16 and the gate is filled thereon.
  • the recesses, and the gates 18 are formed over the barrier layer 16, which are not listed here.
  • FIG. 12 is a schematic structural view of a HEMT of a planar junction terminal structure according to an eighth embodiment of the present invention.
  • the difference in this embodiment compared to the first embodiment is that a partial region of the junction termination structure 19 can be located below the gate 18.
  • the portion of the gate 18 above the junction termination structure 19 can be used as a conventional metal field plate, and the junction termination structure 19 can further reduce the electric field peak at the gate edge, further enhancing the withstand voltage capability of the device.
  • the structure of the junction termination portion under the gate can be increased, which is not listed here.
  • FIG. 13 is a schematic structural diagram of an enhanced HEMT of a planar junction terminal according to a ninth embodiment of the present invention.
  • the difference in this embodiment is that a cap layer is disposed directly under the gate electrode 18, and the cap layer may be P-type GaN, P-type AlGaN or other nitride, and the cap layer may be depleted.
  • a two-dimensional electron gas in the lower channel of the gate thereby implementing an enhanced HEMT device.
  • Junction termination structure 19 The cap layer extends toward the drain 20 and the thickness is continuously reduced.
  • the junction termination structure 19 can further reduce the electric field peak at the gate edge, enhancing the withstand voltage capability of the device.
  • the cap layer not only functions to realize the enhanced function but also achieve the high voltage of the device.
  • the structure in which the gate is completely above the junction terminal can be added, and the configurations are not listed here. .
  • junction termination structure of the present invention and its application and manufacturing method in a GaN-based power semiconductor device have been described in detail by some exemplary embodiments, the above embodiments are not exhaustive, and those skilled in the art Various changes can be made within the spirit and scope of the invention.
  • the termination terminal structure is not limited to the three types of planar, curved, and stepped shapes in the above embodiments, and the junction termination structures of other shapes or structures are also within the scope protected by the present invention; accordingly, the termination method of the manufacturing method thereof
  • the preparation of the structure is not limited to the method of the sparse lattice lithography and the multiple lithography in the above embodiments, and other methods capable of preparing the junction termination structure of the present invention are all within the scope of protection of the present invention.
  • the present invention has the following advantages over the prior art:
  • the two-dimensional electron gas at the interface between the barrier layer and the channel layer is partially depleted due to the piezoelectric effect caused by the difference in lattice constant between the junction termination structure and the lower barrier layer thereof;
  • the junction termination structure can effectively improve the electric field distribution of the barrier layer and increase the breakdown voltage of the device.

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Abstract

一种功率半导体器件及其制造方法，功率半导体器件包括：基片（12）、成核层（13）、缓冲层（14）、沟道层（15）、势垒层（16）、源极（17）、漏极（20）、栅极（18）、及位于势垒层上的结终端结构（19），结终端结构从栅极靠近漏极一侧的边缘处向漏极方向延伸，结终端结构的晶格常数大于势垒层的晶格常数。由于结终端结构和其下势垒层之间的晶格常数差异引起的压电效应，使得势垒层与沟道层界面处的二维电子气被部分耗尽。结终端结构可以有效改善势垒层的电场分布，提升器件的击穿电压。

Description

功率半导体器件及其制造方法
本申请要求于2014年09月30日提交中国专利局、申请号为201410521547.6、发明名称为“功率半导体器件及其制造方法”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本发明涉及半导体技术领域，特别是涉及一种具有结终端结构的功率半导体器件及其制造方法。
背景技术
第三代半导体材料GaN具有高击穿场强(大于3MV/cm)、大禁带宽度(室温3.4eV)，从而具有在高温高压下应用的前景。同时，由于III-V化合物半导体具有强烈的自发极化和压电极化效应，在异质结的界面附近可以形成高电子浓度、高迁移率的二维电子气(2DEG)沟道。因此，GaN特别适用于高压、大电流、高温、高速、高功率器件的应用。
在实际的GaN高电子迁移率晶体管(HEMT)中耐压一般只能达到理论值的20～30％，这是因为靠近漏端的栅极边缘处在漏端施加高压下会出现电场集中的现象，所以在GaN HEMT中器件击穿通常发生在栅极靠近漏极一侧的边缘处。因此，提升器件的耐压能力通常从降低栅极漏端边缘处的电场峰值着手。
采用场板结构是降低电场峰值的一种常用方法。通常在栅极处先沉积一层绝缘介质层，再沉积一层金属场板，该场板与栅极或源极相连，具有一个固定电位，场板自身的等电位可以将栅边缘的电力线拉开，使得电势梯度变得平缓，将处于栅边缘处本来达到材料击穿极限的电场强度降低，而把峰值吸收到场板边缘，相当于扩大了耗尽区。因为电场的积分即为击穿电压，所以实际上击穿电压大得多。场板调制电场的最理想的结果是希望电场的分布图接近矩形，这样可以使电场强度对距离的积分面积最大，从而使得器件的击穿电压达到最大。
然而，场板结构会在靠近漏极边缘处引入新的电场尖峰。由于场板电极的边缘处同样存在电场聚集效应，场板边缘的介质击穿是器件击穿的另一条途 径。因此在场板结构的实际使用过程中，还需考虑场板结构中绝缘介质自身的介电击穿。而介质层会引入电容，降低器件开关转换速度，增加功率损耗。因此，寻找新的场板技术以提升器件击穿电压是非常有必要的。
因此，针对上述技术问题，有必要提供一种具有结终端结构的功率半导体器件及其制造方法。
发明内容
有鉴于此，本发明提出了一种具有结终端结构的功率半导体器件及其制造方法。该结终端的材料为半导体，可以是Al含量恒定的AlGaN、Al含量渐变的AlGaN、In含量恒定的InAlN、In含量渐变的InAlN、n型GaN或p型GaN。该结终端结构从栅极靠近漏极一侧的边缘处向漏极方向延伸，并且其厚度沿漏极方向递减。
由于结终端材料的晶格常数大于势垒层材料的晶格常数，在结终端中引入压应力。在压电效应和自发极化效应的双重作用下，结终端中产生压电负电荷，产生的极化电场使势垒层与沟道层界面处的二维电子气的浓度降低。随着结终端厚度的变化，二维电子气的耗尽程度也是逐渐变化的，在结终端厚度大的地方，极化电场强度大，对二维电子气的耗尽程度最大，随着结终端厚度的减小，对二维电子气耗尽的程度减小。在整个势垒层沟道层界面处形成了结终端下耗尽程度渐变和其它部位保持高二维电子气浓度不变的结构。
对于采用此结终端结构的HEMT器件，当有外加电压加载到器件漏极上时，结终端可以对器件势垒层表面电场分布进行调节。由于结终端在靠近栅极边缘处的厚度最大，对二维电子气的耗尽最明显，故此处的电场峰值得到最大的抑制。同时由于结终端厚度在靠近漏极方向逐渐减小，使靠近漏极方向处的二维电子气耗尽程度逐渐减小，并最终恢复至没有耗尽时的二维电子浓度。因此终端边缘的电场线不会突然增加至很密集，不会在终端边缘引入新的电场尖峰。栅极和漏极之间势垒层表面电场在更大范围内平滑过渡，源漏极之间势垒层半导体承受的电压相近，提高了器件的击穿电压。
为了实现上述目的，本发明实施例提供的技术方案如下：
一种功率半导体器件，所述功率半导体器件包括：
基片；
位于所述基片上的成核层；
位于所述成核层上的缓冲层；
位于所述缓冲层上的沟道层；
位于所述沟道层上的势垒层；
位于所述势垒层上的源极、漏极和栅极，所述栅极位于所述源极和所述漏极之间；
位于所述势垒层上的结终端结构，所述结终端结构从所述栅极靠近所述漏极一侧的边缘处向所述漏极方向延伸，所述结终端结构的晶格常数大于所述势垒层的晶格常数。
作为本发明的进一步改进，所述结终端结构的厚度沿所述栅极向所述漏极的方向上递减。
作为本发明的进一步改进，所述结终端结构为平面型结终端结构、曲面型结终端结构或阶梯状结终端结构。
作为本发明的进一步改进，所述势垒层为AlGaN层，所述结终端结构为Al含量恒定的AlGaN层、Al含量由所述结终端结构和所述势垒层的界面处向所述结终端结构的表面递减的AlGaN层、n型GaN层或p型GaN层。
作为本发明的进一步改进，所述势垒层材料为InAlN，所述结终端结构为In含量恒定的InAlN层、In含量由所述结终端结构和所述势垒层的界面处向所述结终端结构的表面递减的InAlN层、n型GaN层或p型GaN层。
作为本发明的进一步改进，所述势垒层的部分区域内设置有凹槽，所述栅极的至少部分区域位于所述凹槽上方，且所述栅极金属填充在所述凹槽内。
作为本发明的进一步改进，所述栅极的至少部分区域上方和所述结终端结构的至少部分区域上方设置有栅极金属场板，所述栅极和所述结终端结构通过所述栅极金属场板相连接。
作为本发明的进一步改进，所述源极的至少部分区域上方和所述结终端结构的至少部分区域上方形成有源极金属场板，所述源极和所述结终端结构通过源极金属场板相连接，所述源极金属场板下方形成有空气桥和/或介质桥。
作为本发明的进一步改进，所述结终端结构的部分区域位于所述栅极的下方。
作为本发明的进一步改进，所述功率半导体器件还包括帽层，所述栅极位于所述帽层的上方，所述结终端结构由所述帽层向所述漏极方向延伸。
相应地，一种功率半导体器件的制造方法，所述方法包括：
S1、提供一基片；
S2、在所述基片上形成成核层；
S3、在所述成核层上形成缓冲层；
S4、在所述缓冲层上形成沟道层；
S5、在所述沟道层上形成势垒层；
S6、在所述势垒层上形成源极、漏极、栅极和结终端结构，所述栅极位于所述源极和所述漏极之间；所述结终端结构从所述栅极靠近所述漏极一侧的边缘处向所述漏极方向延伸，所述结终端结构的晶格常数大于所述势垒层的晶格常数。
作为本发明的进一步改进，所述结终端结构通过金属有机物化学气相沉积、溅射工艺、蒸发工艺、或化学涂布工艺形成。
作为本发明的进一步改进，在所述势垒层上形成结终端结构具体为：
在所述势垒层上沉积结终端层，并在所述结终端层上形成光刻胶层；
使用具有疏密点阵的掩膜版对所述光刻胶层进行光刻并显影，然后进行干法刻蚀，去除部分结终端层，形成所述结终端结构。
作为本发明的进一步改进，所述掩膜版从所述栅极向所述漏极方向曝光度逐渐增加。
作为本发明的进一步改进，在所述势垒层上形成结终端结构具体为：
在所述势垒层上沉积结终端层，并在所述结终端层上形成光刻胶层；
使用掩膜版对所述光刻胶层进行光刻并显影，然后进行干法刻蚀，去除部分结终端层；
减小曝光窗口的宽度，重复所述使用掩膜版对所述光刻胶层进行光刻并显影，然后进行干法刻蚀，去除部分结终端层的步骤直至形成结终端结构。
作为本发明的进一步改进，所述结终端结构为平面型结终端结构、曲面型结终端结构、或阶梯状结终端结构。
本发明具有以下优点：
由于结终端结构和其下势垒层之间的晶格常数差异引起的压电效应，使得势垒层与沟道层界面处的二维电子气被部分耗尽；结终端结构可以有效改善势垒层的电场分布，提升器件的击穿电压。
附图说明
为了更清楚地说明本发明实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本发明中记载的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为本发明第一实施例中平面型结终端结构的HEMT的结构示意图；
图2a为图1中A-A’位置处的能带示意图，图2b为图1中B-B’位置处的能带示意图；
图3为本发明第一实施例中平面型结终端结构的HEMT的制备过程中的结构示意图；
图4为本发明第二实施例中阶梯状结终端结构的HEMT的结构示意图；
图5为本发明第二实施例中阶梯状结终端结构的HEMT的制备过程中的结构示意图；
图6a、6b为本发明第二实施例中阶梯状结终端结构的HEMT的另一制备过程中的结构示意图；
图7所示为本发明第三实施例中曲面型结终端结构的HEMT的结构示意图；
图8所示为本发明第四实施例中曲面型结终端结构的HEMT的结构示意图；
图9所示为本发明第五实施例中具有栅极金属场板和结终端结构的HEMT的结构示意图；
图10所示为本发明第六实施例中具有源极金属场板和结终端结构的HEMT的结构示意图。
图11为本发明第七实施例中平面型结终端结构的HEMT的结构示意图。
图12为本发明第八实施例中平面型结终端结构的HEMT的结构示意图。
图13为本发明第九实施例中平面型结终端结构的HEMT的结构示意图。
具体实施方式
以下将结合附图所示的具体实施方式对本发明进行详细描述。但这些实施方式并不限制本发明，本领域的普通技术人员根据这些实施方式所作出的结构、方法、或功能上的变换均包含在本发明的保护范围内。
此外，在不同的实施例中可能使用重复的标号或标示。这些重复仅为了简单清楚地叙述本发明，不代表所讨论的不同实施例或结构之间具有任何关联性。
本发明公开了一种功率半导体器件，包括：
基片；
位于基片上的成核层；
位于成核层上的缓冲层；
位于缓冲层上的沟道层；
位于沟道层上的势垒层；
位于势垒层上的源极、漏极和栅极，所述栅极位于所述源极和所述漏极之间；
位于所述势垒层上的结终端结构，所述结终端结构从所述栅极靠近所述漏极一侧的边缘处向所述漏极方向延伸，所述结终端结构的晶格常数大于所述势垒层的晶格常数。
本发明还公开了一种功率半导体器件的制造方法，包括：
S1、提供一基片；
S2、在基片上形成成核层；
S3、在成核层上形成缓冲层；
S4、在缓冲层上形成沟道层；
S5、在沟道层上形成势垒层；
S6、在所述势垒层上形成源极、漏极、栅极和结终端结构，所述栅极位于所述源极和所述漏极之间；所述结终端结构从所述栅极靠近所述漏极一侧的边缘处向所述漏极方向延伸，所述结终端结构的晶格常数大于所述势垒层的晶格常数。
实施例一
参图1所示为本发明第一实施例中平面型结终端结构的HEMT的结构示意图。需要说明的是，本发明实施例所述的平面型结终端结构是指结终端结构的表面为平整的平面。
该HEMT具体包括：
基片12，基片可以是硅、蓝宝石、碳化硅或其他材料；
在基片12上外延生长的成核层13和缓冲层14，成核层13和缓冲层14可以包括GaN或AlN或其他氮化物，成核层13和缓冲层14起到匹配基片12和沟道层15的作用，影响其上方由沟道层15和势垒层16构成的异质结的晶体质量、表面形貌以及电学性质等参数；
在缓冲层14上生长的沟道层15，沟道层15可以包含非掺杂GaN层；
在沟道层15上生长的势垒层16，势垒层16可以包含AlGaN或其他氮化物，沟道层15和势垒层16一起组成半导体异质结结构，在二者界面处形成高浓度二维电子气，并在GaN沟道层15的异质结界面处产生导电沟道；
在势垒层16之上为源极17和漏极20，源极17和漏极20与势垒层16形成欧姆接触，该欧姆金属的材质可以为金属Ni、Ti、Al、Au等金属中的一种或多种的组合；源极17和漏极20之间的势垒层16之上为栅极18，栅极18与势垒层16形成肖特基接触；
在栅极18靠近漏极20边缘处为结终端结构19，结终端结构19的厚度从栅极18边缘处向漏极20处递减。当势垒层16的材料为AlGaN时，本实施例中结终端结构19的材料也可以为AlGaN，且结终端结构19中的Al含量小于势垒层16中的Al含量。
由于结终端结构19中Al含量小于势垒层16中的Al含量，故结终端结构19的晶格常数大于势垒层16的晶格常数，在二者界面处引入了压应力。由于AlGaN的压电极化系数很大，故产生的极化电场很强，AlGaN中还存在着自发极化效应，在压电效应和自发极化效应的双重作用下，结终端结构19中产生压电负电荷，对其下势垒层16和沟道层15界面二维电子气具有耗尽作用。
对于半导体结终端结构，厚度较大处的结终端部分还有更多的压电负电荷，对二维电子气的耗尽作用更强，如图2a A-A’处的能带示意图所示。而 厚度较小的结终端处的二维电子气的耗尽程度较小，如图2b B-B’处的能带示意图所示，相比较于图1的A-A’位置处的能带图，费米能级上移，费米能级更接近于GaN导带底部，因此此处的二维电子气浓度更大。从厚度最小的结终端结构处到厚度最大的结终端结构处，其下的二维电子气浓度逐渐减小。结终端结构厚度最大处，即栅极靠近漏极处的二维电子气耗尽程度最大，故结终端结构对此处电场峰值的降低作用最为明显。同时，随着结终端结构厚度的减小，对二维电子气耗尽的作用减小，既保持了低的沟道导通电阻，又满足了调制电场强度的要求。
本实施例中HEMT结构的制造方法具体为：首先提供一基片12，在基片12上依次生长成核层13、缓冲层14、沟道层15、势垒层16，并在势垒层16上形成源极17和漏极20、以及位于源极17和漏极20之间的栅极18，和结终端结构19。其中，沟道层15可以由GaN材料制成，势垒层16可以由AlGaN材料制成。
下面着重叙述该结终端结构的制造方法。下面以势垒层16以及结终端结构19均为AlGaN材料为例进行说明。
首先在AlGaN势垒层上沉积一层AlGaN结终端层；
在结终端层上使用光刻胶做光刻工艺，使用特殊设计的掩膜版对结终端区域进行光刻，此掩膜版通过调整遮光点阵的疏密程度，形成结终端从栅极到远离栅极逐步增加曝光度的掩膜设计，显影后形成厚度从栅极向漏极方向递减的光刻胶层21，如图3所示；
然后进行干法刻蚀工艺对光刻区域进行刻蚀，通过优化光刻胶和AlGaN结终端层的刻蚀选择比(如1:1)，在势垒层16上形成符合要求的具有斜面区域的平面型结终端结构，如图1所示。在势垒层上还可以形成器件的栅极、源极和漏极，最后还可增加一层钝化层，钝化层可以是氮化硅、氧化铝、氧化铪等。钝化后的HEMT可以降低器件的表面态密度，抑制HEMT的电流崩塌效应。
作为本发明的另一实施方式，用于形成结终端结构19的材料也可以是Al含量由结终端结构19和势垒层16的界面处向结终端结构19的表面呈梯度渐减的AlGaN，并且结终端结构19中的Al含量在结终端结构19和势垒层16 界面处最大，但小于势垒层16中Al含量。此外，用于形成结终端结构19的材料还可以为n型GaN或p型GaN等。
在本实施方式中，势垒层16也可以为InAlN，对应的结终端结构19可以是InAlN，此时，结终端结构中的In含量大于势垒层16中In含量。此外，当势垒层16为InAlN时，对应的结终端结构19还可以是In含量由结终端结构19和势垒层16的界面处向结终端结构19的表面呈梯度渐减的InAlN，并且结终端结构19中的In含量在结终端结构19和势垒层16界面处最大，但小于势垒层16中In含量，此外，用于形成结终端结构20的材料还可以为n型GaN或p型GaN等。
实施例二
参图4所示为本发明第二实施例中阶梯状结终端结构的HEMT的结构示意图。需要说明的是，本发明实施例所述的具有阶梯状结终端结构是指结终端结构的表面呈阶梯状。
本实施方式中结终端结构19为阶梯状结构，其余与第一实施例相同。其中，势垒层16和结终端结构19可以均是AlGaN，并且，结终端结构19中的Al含量小于势垒层16中的Al含量。该结终端结构19与第一实施例中所起的作用相同，其对势垒层16和沟道层15界面处二维电子气的耗尽也是渐变的，从而对电场的调制也是渐变的。
本实施方式中的结终端结构也可以是Al含量由结终端结构20和势垒层16的界面处向结终端结构19的表面呈梯度渐减的AlGaN，并且结终端结构20中的Al含量在结终端结构19和势垒层16界面处最大，但小于势垒层16中Al含量。此外，用于形成结终端结构19的材料还可以为n型GaN或p型GaN等。
在本实施方式中，势垒层16也可以为InAlN，对应的结终端结构可以是InAlN，此时，结终端结构中的In含量大于势垒层16中In含量。此外，当势垒层16为InAlN时，对应的结终端结构19还可以是In含量由结终端结构19和势垒层16的界面处向结终端结构19的表面呈梯度渐减的InAlN，并且结终端结构20中的In含量在结终端结构19和势垒层16界面处最大，但小于势垒层16中In含量，此外，用于形成结终端结构20的材料还可以为n型GaN或 p型GaN等。
该结终端结构在制备方法上较第一实施例中厚度均匀变化的结构更为简单。实施例二中结终端结构的制备过程中的一个结构示意图如图5所示，先在势垒层16上沉积一层AlGaN结终端层19；然后在结终端层上使用光刻胶21做光刻工艺，在曝光时，通过调整光刻掩膜版上遮光点阵的疏密程度，使其透过的光从靠近结终端栅极处向漏极处递减，从而使光刻胶的曝光程度递减，在经过显影后，光刻胶形成阶梯状结构；
然后进行干法刻蚀工艺对光刻区域进行刻蚀，通过优化光刻胶和AlGaN结终端层的刻蚀选择比(如1:1)，在势垒层上形成符合要求的具有阶梯状的结终端结构。另外，还需要在势垒层16上形成器件的栅极、源极和漏极，最后还可增加一层钝化层。
与第一实施例中厚度连续变化的结终端相比，本实施例中光刻掩膜版对分辨率的要求低，因此更容易设计。
参图6a、6b所示为本发明第二实施例中具有阶梯状结终端结构的HEMT的另一种制备过程中的结构示意图。
本实施例中通过多次光刻来完成，首先在结终端层19上涂光刻胶21，然后经过曝光、显影后再经过刻蚀，去除部分GaN结终端层，使其形成图6a所示的结构。重复以上过程，并减小曝光窗口的宽度，形成图6b的结构。重复以上过程，形成图4所示的具有阶梯状结终端结构的HEMT器件。
实施例三
参图7所示为本发明第三实施例中曲面型结终端结构是指结终端结构的表面为曲面，而不是平整的平面。所述曲面型结终端结构包括上凸曲面和下凹曲面。实施例三所述的曲面型结终端结构为上凸曲面结构的结终端结构。
与第一实施例相比，本实施例的不同之处在于结终端结构19的表面为上凸曲面。曲面型结终端可以通过调整曲面的曲率来调整电场分布，相比平面型结终端通过倾斜角度来优化电场分布，实施例三提供的曲面型结终端结构增加了优化电场分布的方法，可以更好的改善器件特性。
实施例三所示的HEMT结构的制造方法与第一实施例所示的HEMT的制造方法类似，通过设计掩膜版上的遮光点阵疏密程度，先形成表面具有上凸曲 面的光刻胶，然后通过刻蚀，形成表面为上凸曲面形状的结终端结构。
实施例四
参图8所示为本发明第四实施例中具有下凹曲面型结终端结构的HEMT的结构示意图。
与第三实施例相比，本实施例的不同之处在于结终端结构的表面为下凹曲面形状。该下凹曲面型结终端可以通过调整曲线的曲率来调整电场分布，相比平面型结终端通过倾斜角度来优化电场分布，增加了优化电场分布的方法，可以更好的改善器件特性。
实施例四所示的HEMT结构的制造方法与实施例三所示的HEMT的制造方法类似，通过设计掩膜版上的遮光点阵疏密程度，先形成表面为下凹曲面形状的光刻胶，然后通过刻蚀，形成表面为下凹曲面形状的结终端结构。
实施例五
参图9所示为本发明第五实施例中具有栅极金属场板和结终端结构的HEMT的结构示意图。
与第一实施例相比，本实施例在栅极18的至少部分区域上方和结终端结构19的至少部分区域的上方设置有栅极金属场板21。所述栅极18和所述结终端结构19通过所述栅极金属场板21相连接。该栅极金属场板21的材料可以与栅极金属相同，也可以是其他与栅极形成欧姆接触的金属。在结终端结构19和栅极金属场板21的共同作用下，该结构可以更进一步地抑制栅极靠近漏极端的电场尖峰，从而提高器件的击穿电压。且该结构中，栅极金属场板21下没有绝缘介质层，结构简单，容易实现。
实施例六
参图10所示为本发明第六实施例中具有源极金属场板和结终端结构的HEMT的结构示意图。
与第一实施例相比，本实施例提供的HEMT结构在所述源极17的至少部分区域上方和所述结终端结构19的至少部分区域上方形成有源极金属场板22，并且该源极金属场板具有空气桥。在该结构中，源极17与结终端结构19通过具有空气桥的源极金属场板22相连接。该源极金属场板22的材料可以与源极金属相同，也可以是其他与源极形成欧姆接触的金属。在结终端结构19 和源极金属场板22的共同作用下，该结构可以更进一步地抑制栅极靠近漏极端的电场尖峰，从而提高器件的击穿电压。
进一步地，本实施方式中源极金属场板22下方还可以全部或部分形成绝缘介质层，源极金属场板22形成介质桥或介质桥与空气桥的组合，同样可以抑制栅极靠近漏极端的电场尖峰，提高器件的击穿电压。
实施例七
参图11所示为本发明第七实施例中平面型结终端结构的HEMT的结构示意图。
与第一实施例相比，本实施例的不同之处在于栅极18下方的势垒层16的至少部分区域内设置有栅极凹槽，栅极金属填充在凹槽中，形成栅极向下延伸区域。本发明实施例可以在沉积栅极金属的同时形成栅极金属结终端结构19。当栅极18下的二维电子气耗尽时可以获得增强型器件，栅极金属结终端结构19可以进一步降低栅极18边缘的电场峰值，使器件的耐压能力增强。
同样地，在实施例二、实施例三、实施例四、实施例五、实施例六、实施例七中均可以在势垒层16的部分区域设置有凹槽，位于其上方的栅极填充该凹槽，并在势垒层16的上方形成栅极18，在此不一一列出。
实施例八
参图12所示为本发明第八实施例中平面型结终端结构的HEMT的结构示意图。与第一实施例相比，本实施例的不同之处在于结终端结构19的部分区域可以位于栅极18之下。结终端结构19之上的栅极18的部分可以做为传统的金属场板，同时结终端结构19还可以进一步降低栅极边缘的电场峰值，使器件的耐压能力进一步增强。
同样地，在实施例二、实施例三、实施例四、实施例五、实施例六、实施例七中均可增加结终端一部分位于栅极之下的结构，在此不一一列出。
实施例九
参图13所示为本发明第九实施例中平面型结终端的增强型HEMT的结构示意图。与第一实施例相比，本实施例的不同之处在于栅极18的正下方设置有帽层，该帽层可以为P型GaN，P型AlGaN或其他氮化物，该帽层可耗尽栅极下沟道中的二维电子气，进而实现增强型的HEMT器件。结终端结构19 由帽层向漏极20处延伸，且厚度不断减小。该结终端结构19可以进一步降低栅极边缘的电场峰值，使器件的耐压能力增强。本实施例中帽层既起到了实现增强型的功能又可以实现高击器件穿电压的作用。
同样地，在实施例二、实施例三、实施例四、实施例五、实施例六、实施例七中均可增加栅极完全位于结终端之上的的结构，在此不一一列出。
以上虽然通过一些示例性的实施例对本发明的结终端结构及其在GaN基功率半导体器件中的应用与制造方法进行了详细的描述，但是以上这些实施例并不是穷举的，本领域技术人员可以在本发明的精神和范围内实现各种变化。如结终端结构并不限于上述实施例中的平面型、曲面型和阶梯状三种情况，其他形状或结构的结终端结构同样属于本发明所保护的范围；相应地，其制造方法中结终端结构的制备并不限于上述实施例中的疏密点阵光刻、多次光刻的方法，其他能够制备本发明中结终端结构的方法均属于本发明所保护的范围。
综上所述，与现有技术相比本发明具有以下优点：
由于结终端结构和其下势垒层之间的晶格常数差异引起的压电效应，使得势垒层与沟道层界面处的二维电子气被部分耗尽；
结终端结构可以有效改善势垒层的电场分布，提升器件的击穿电压。
对于本领域技术人员而言，显然本发明不限于上述示范性实施例的细节，而且在不背离本发明的精神或基本特征的情况下，能够以其他的具体形式实现本发明。因此，无论从哪一点来看，均应将实施例看作是示范性的，而且是非限制性的，本发明的范围由所附权利要求而不是上述说明限定，因此旨在将落在权利要求的等同要件的含义和范围内的所有变化囊括在本发明内。不应将权利要求中的任何附图标记视为限制所涉及的权利要求。
此外，应当理解，虽然本说明书按照实施方式加以描述，但并非每个实施方式仅包含一个独立的技术方案，说明书的这种叙述方式仅仅是为清楚起见，本领域技术人员应当将说明书作为一个整体，各实施例中的技术方案也可以经适当组合，形成本领域技术人员可以理解的其他实施方式。

Claims (16)

  1. 一种功率半导体器件，其特征在于，所述功率半导体器件包括：
    基片；
    位于所述基片上的成核层；
    位于所述成核层上的缓冲层；
    位于所述缓冲层上的沟道层；
    位于所述沟道层上的势垒层；
    位于所述势垒层上的源极、漏极和栅极，所述栅极位于所述源极和所述漏极之间；
    位于所述势垒层上的结终端结构，所述结终端结构从所述栅极靠近所述漏极一侧的边缘处向所述漏极方向延伸，所述结终端结构的晶格常数大于所述势垒层的晶格常数。
  2. 根据权利要求1所述的功率半导体器件，其特征在于，所述结终端结构的厚度沿所述栅极向所述漏极的方向上递减。
  3. 根据权利要求2所述的功率半导体器件，其特征在于，所述结终端结构为平面型结终端结构、曲面型结终端结构或阶梯状结终端结构。
  4. 根据权利要求1所述的功率半导体器件，其特征在于，所述势垒层为AlGaN层，所述结终端结构为Al含量恒定的AlGaN层、Al含量由所述结终端结构和所述势垒层的界面处向所述结终端结构的表面递减的AlGaN层、n型GaN层或p型GaN层。
  5. 根据权利要求1所述的功率半导体器件，其特征在于，所述势垒层材料为InAlN，所述结终端结构为In含量恒定的InAlN层、In含量由所述结终端结构和所述势垒层的界面处向所述结终端结构的表面递减的InAlN层、n型GaN层或p型GaN层。
  6. 根据权利要求1所述的功率半导体器件，其特征在于，所述势垒层的部分区域内设置有凹槽，所述栅极的至少部分区域位于所述凹槽上方，且所述栅极金属填充在所述凹槽内。
  7. 根据权利要求1所述的功率半导体器件，其特征在于，所述栅极的至少部分区域上方和所述结终端结构的至少部分区域上方设置有栅极金属场板， 所述栅极和所述结终端结构通过所述栅极金属场板相连接。
  8. 根据权利要求1所述的功率半导体器件，其特征在于，所述源极的至少部分区域上方和所述结终端结构的至少部分区域上方形成有源极金属场板，所述源极和所述结终端结构通过源极金属场板相连接，所述源极金属场板下方形成有空气桥和/或介质桥。
  9. 根据权利要求1或2所述的功率半导体器件，其特征在于，所述结终端结构的部分区域位于所述栅极的下方。
  10. 根据权利要求1或2所述的功率半导体器件，其特征在于，所述功率半导体器件还包括帽层，所述栅极位于所述帽层的上方，所述结终端结构由所述帽层向所述漏极方向延伸。
  11. 一种如权利要求1所述的功率半导体器件的制造方法，其特征在于，所述方法包括：
    S1、提供一基片；
    S2、在所述基片上形成成核层；
    S3、在所述成核层上形成缓冲层；
    S4、在所述缓冲层上形成沟道层；
    S5、在所述沟道层上形成势垒层；
    S6、在所述势垒层上形成源极、漏极、栅极和结终端结构，所述栅极位于所述源极和所述漏极之间；所述结终端结构从所述栅极靠近所述漏极一侧的边缘处向所述漏极方向延伸，所述结终端结构的晶格常数大于所述势垒层的晶格常数。
  12. 根据权利要求11所述的方法，其特征在于，所述结终端结构通过金属有机物化学气相沉积、溅射工艺、蒸发工艺、或化学涂布工艺形成。
  13. 根据权利要求11所述的方法，其特征在于，在所述势垒层上形成结终端结构具体为：
    在所述势垒层上沉积结终端层，并在所述结终端层上形成光刻胶层；
    使用具有疏密点阵的掩膜版对所述光刻胶层进行光刻并显影，然后进行干法刻蚀，去除部分结终端层，形成所述结终端结构。
  14. 根据权利要求13所述的方法，其特征在于，所述掩膜版从所述栅极 向所述漏极方向曝光度逐渐增加。
  15. 根据权利要求11所述的方法，其特征在于，在所述势垒层上形成结终端结构具体为：
    在所述势垒层上沉积结终端层，并在所述结终端层上形成光刻胶层；
    使用掩膜版对所述光刻胶层进行光刻并显影，然后进行干法刻蚀，去除部分结终端层；
    减小曝光窗口的宽度，重复所述使用掩膜版对所述光刻胶层进行光刻并显影，然后进行干法刻蚀，去除部分结终端层的步骤直至形成结终端结构。
  16. 根据权利要求11所述的方法，其特征在于，所述结终端结构为平面型结终端结构、曲面型结终端结构、或阶梯状结终端结构。
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