WO2015196861A1 - 一种开关电感电源的电路 - Google Patents

一种开关电感电源的电路 Download PDF

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Publication number
WO2015196861A1
WO2015196861A1 PCT/CN2015/077727 CN2015077727W WO2015196861A1 WO 2015196861 A1 WO2015196861 A1 WO 2015196861A1 CN 2015077727 W CN2015077727 W CN 2015077727W WO 2015196861 A1 WO2015196861 A1 WO 2015196861A1
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Prior art keywords
voltage
output
inductor
terminal
switching
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PCT/CN2015/077727
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English (en)
French (fr)
Inventor
唐样洋
张臣雄
王新入
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华为技术有限公司
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Publication of WO2015196861A1 publication Critical patent/WO2015196861A1/zh

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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/14—Arrangements for reducing ripples from dc input or output
    • H02M1/15—Arrangements for reducing ripples from dc input or output using active elements
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators

Definitions

  • the present invention relates to the field of electronic technologies, and in particular, to a circuit for switching an inductive power supply.
  • the switching power supply is a power supply that maintains the stability of the output voltage by controlling the ratio of the on-time and the off-time of the switching transistor.
  • Switching power supply has the characteristics of large voltage regulation range, low loss and simple structure. Therefore, it is widely used in various electronic devices and is an indispensable power source for the development of electronic products.
  • the essence of the DC switching power supply is the "DC (Direct Current)-DC" converter, which can convert the poor quality of the original DC voltage (coarse electricity), such as the voltage of the battery, into a higher quality DC voltage. (Precision), that is, the voltage that meets the load requirements.
  • the crude power will be temporarily stored by the energy storage component and then converted into fine power.
  • the DC switching power supply with the inductor as the energy storage component is called the switching inductor power supply, and the switching inductor power supply is often integrated in the chip.
  • the integration of the chip is getting larger and larger, and nonlinear components are also integrated into the chip.
  • This causes noise at the output of the switched inductor power supply, such as spikes and ripples, which directly burdens the load, such as affecting the response speed of the load and increasing the energy loss of the load.
  • the usual method is to design a filter capacitor at the output end of the switching inductor power supply, wherein the larger the capacitance value of the filter capacitor, the stronger the filtering capability.
  • the embodiment of the invention provides a circuit for switching an inductor power supply, which can reduce ripple and reduce spikes when the output voltage of the switching inductor power source changes, and improve the stability of the output voltage.
  • a first aspect of the embodiments of the present invention provides a circuit for switching an inductor power supply, including a voltage input terminal, a switch unit, an inductor, a feedback control unit, a response filtering unit, and a voltage output terminal, wherein:
  • the positive pole and the negative pole of the switch unit are respectively connected to the positive pole and the negative pole of the voltage input end
  • An output end of the switch unit is connected to a first end of the inductor, a second end of the inductor is connected to an input end of the feedback control unit, and an output end of the feedback control unit and a receiving end of the switch unit
  • the control terminals are connected, the positive poles of the voltage output ends are respectively connected to the second end of the inductor and the first end of the response filtering unit, and the negative poles of the voltage output end are respectively filtered with the negative pole of the switch unit and the response filter
  • the second ends of the unit are connected;
  • the switch unit is configured to alternately switch a positive pole of the voltage input end and a negative pole of the voltage output end to a first end of the inductor, the inductor for accessing power and a source from the voltage input end
  • the voltage output terminal releases electrical energy
  • the feedback control unit is configured to control a frequency of the switching unit switching connection according to the power output of the voltage output end
  • the response filtering unit includes a first field effect transistor, the first field The effect tube is configured to filter out the clutter of the positive pole of the voltage output terminal when the output voltage of the positive pole of the voltage output terminal is hopped.
  • the circuit further includes a first voltage dividing resistor and a second voltage dividing resistor
  • the response filtering unit further includes a first error amplifier
  • the first field effect transistor is NMOS tube
  • a first end of the first voltage dividing resistor is connected to a positive pole of the voltage output end, and a second end of the first voltage dividing resistor is connected to a first end of the second voltage dividing resistor, the second point a second end of the voltage resistor is connected to a negative pole of the voltage output end, a drain of the first field effect transistor is connected to a positive pole of the voltage output end, a source of the first field effect transistor and the voltage output end a negative electrode is connected, a gate of the first field effect transistor is connected to an output end of the first error amplifier, and a negative input end of the first error amplifier is connected to a second end of the first voltage dividing resistor.
  • the positive input terminal of the first error amplifier is connected to the first reference voltage.
  • the voltage of the negative input terminal of the first error amplifier and the The difference of the first reference voltage will be greater than a preset threshold, and the output of the first error amplifier outputs a high level to turn on the first FET, and the first FET filters out the Clutter of the positive pole at the voltage output.
  • the circuit further includes an RC filtering unit, the first end of the RC filtering unit is connected to the positive terminal of the voltage output end, and the RC filtering unit is The second end is connected to the negative terminal of the voltage output end;
  • the RC filtering unit is configured to filter out clutter of the positive pole of the voltage output end.
  • the RC filtering unit includes a capacitor and an equivalent resistor, where:
  • a first end of the capacitor is connected to a positive pole of the voltage output end, a second end of the capacitor is connected to a negative pole of the voltage output end, and a first end of the equivalent resistor is connected to an anode of the voltage output end, The second end of the equivalent resistor is connected to the negative terminal of the voltage output terminal.
  • the switching unit includes a second FET and a third FET, the second FET is a PMOS transistor, and the third The FET is an NMOS transistor, where:
  • a drain of the second field effect transistor is connected to a positive pole of the voltage input terminal, a source of the second field effect transistor is connected to a source of the third field effect transistor, and the third field effect transistor is a drain connected to a negative terminal of the voltage output terminal, a first end of the inductor being connected to a source of the second field effect transistor, a gate of the second field effect transistor and a third field effect transistor
  • the gates are all connected to the output of the feedback control unit;
  • the second FET is turned on when the gate of the second FET receives a low level outputted by the output of the feedback control unit, when the gate of the third FET receives the The third FET is turned on when the output of the feedback control unit is at a high level.
  • the feedback control unit includes a sampling analysis subunit, a modulation subunit, and a driving subunit, where:
  • a sampling end of the sampling analysis subunit is connected to a second end of the inductor, an output end of the sampling analysis subunit is connected to an input end of the modulation subunit, an output end of the modulation subunit is An input end of the driving subunit is connected, and an output end of the driving subunit is connected to the controlled end of the switching unit;
  • the sampling analysis subunit is configured to acquire an error voltage or an error current of the voltage output end and send an error signal to the modulation subunit according to the error voltage or an error current
  • the modulation subunit is configured to use the error signal according to the error signal
  • the pulse wave is modulated and transmitted to the driving subunit, and the driving subunit is configured to drive the switching unit according to the pulse wave.
  • the circuit further includes a first voltage dividing resistor and a second voltage dividing resistor, where the sampling analysis subunit includes Two error amplifiers and current limiting resistors, where:
  • the first end of the first voltage dividing resistor is connected to the anode of the voltage output end, and the first point a second end of the voltage resistor is connected to the first end of the second voltage dividing resistor, and a second end of the second voltage dividing resistor is connected to the negative pole of the voltage output end, and the first end of the current limiting resistor is a second end of the first voltage dividing resistor is connected, a second end of the current limiting resistor is connected to a negative input end of the second error amplifier, and a positive input end of the second error amplifier is connected to a second reference
  • the voltage, the output of the second error amplifier is coupled to the input of the modulation subunit.
  • the switching unit in the embodiment of the present invention controls the charging and discharging of the inductor, and the inductor outputs power from the voltage output terminal during the discharging, and the feedback control unit can maintain the stability of the output power of the voltage output terminal by controlling the switching unit, and the RC filter
  • the unit can filter out the clutter in the output voltage of the voltage output terminal. Further, when the voltage at the voltage output end jumps, the first field effect transistor in the response filtering unit is turned on, and the first field effect transistor that is turned on can be reduced. Ripple at the small voltage output and reduce spikes at the voltage output.
  • FIG. 1 is a schematic structural diagram of a circuit for switching an inductor power supply according to an embodiment of the present invention
  • FIG. 2 is a schematic structural diagram of a feedback control unit according to an embodiment of the present invention.
  • FIG. 3 is a schematic diagram of a circuit for switching an inductor power supply according to an embodiment of the present invention
  • FIG. 4 is a schematic diagram of another circuit of a switched inductor power supply according to an embodiment of the present invention.
  • the switching inductor power supply in the embodiment of the invention can be applied to electronic devices such as smart phones, personal computers, tablet computers, digital music players, and electronic readers, and can be used as a DC power source of the above electronic devices.
  • the circuit of the switched inductor power supply in this embodiment may include a voltage input terminal Vi, a switch unit 110, an inductor 120, a feedback control unit 130, a response filtering unit 140, and a voltage output terminal Vo, where:
  • the positive and negative poles of the switch unit 110 are respectively connected to the positive pole and the negative pole of the voltage input terminal Vi, the output end of the switch unit 110 is connected to the first end of the inductor 120, and the second end of the inductor 120 is connected to the input end of the feedback control unit 130.
  • the output end of the feedback control unit 130 is connected to the controlled end of the switch unit 110, and the positive pole of the voltage output terminal Vo is respectively connected to the second end of the inductor 120 and the first end of the response filtering unit 140, and the negative pole of the voltage output terminal Vo is respectively
  • the negative terminal of the switching unit 110 is connected to the second end of the response filtering unit 140. Further, referring to FIG.
  • the feedback control unit 130 may further include a sampling analysis sub-unit 131, a modulation sub-unit 132, and a driving sub-unit 133, wherein the sampling end of the sampling analysis sub-unit 131 is connected to the second end of the inductor, and is sampled.
  • the output end of the analysis subunit 131 is connected to the input end of the modulation subunit 132, the output end of the modulation subunit 132 is connected to the input end of the drive subunit 133, and the output end of the drive subunit 133 is connected to the controlled end of the switch unit 110.
  • the switch unit 110 is configured to alternately switch the positive pole of the voltage input terminal Vi and the negative pole of the voltage output terminal Vo to the first end of the inductor 120.
  • the inductor 120 is used for accessing the power from the voltage input terminal Vi and releasing the voltage to the voltage output terminal Vo.
  • the electric energy, the feedback control unit 130 is configured to control the switching unit 110 to switch the connected frequency according to the electric energy outputted by the voltage output terminal Vo.
  • the response filtering unit 140 is configured to filter the voltage output end when the output voltage of the positive electrode of the voltage output terminal Vo is hopped. The clutter of the positive pole of Vo.
  • the feedback control unit 130 is used in the specific implementation process, wherein the sampling analysis sub-unit 131 is configured to acquire an error voltage or an error current of the output power of the voltage output terminal Vo and send an error signal to the modulation sub-unit 132 according to the error voltage or the error current.
  • the modulation sub-unit 132 is configured to modulate the pulse wave according to the error signal and transmit the pulse wave to the driving sub-unit 133, wherein the driving sub-unit 133 is configured to drive the switching unit 110 according to the pulse wave.
  • the circuit for switching the inductive power supply may further include an RC (Resistor-Capacitor) filtering unit 150.
  • the first end of the RC filtering unit 150 is connected to the positive terminal of the voltage output terminal Vo, and the second end of the RC filtering unit 150 is connected to the voltage output.
  • the negative terminal of the terminal Vo is connected.
  • the RC filter unit 150 is for filtering out the clutter of the positive pole of the voltage output terminal Vo.
  • FIG. 3 is a schematic diagram of an alternative circuit for a switched inductor power supply in accordance with an embodiment of the present invention.
  • input voltage Vi may be the storage battery or battery pack;
  • switching unit 110 comprises a second FET PMOS (Positive channel Metal Oxide Semiconductor, P -channel MOS) field effect transistor and the third NMOS (Negative channel Metal Oxide Semiconductor, N-channel MOS);
  • the inductance 120 is shown by the inductance L in the figure;
  • the sampling analysis sub-unit 131 in the feedback control unit 130 includes a second error amplifier A2 and a current limiting resistor R4, and the modulation sub-unit 132 Including a PWM (Pulse Width Modulation) generator B1 and an oscillator B2,
  • the driving subunit 133 includes inverters D1 and D2;
  • the response filtering unit 140 includes a first FET NMOS and a first error amplifier A1;
  • the RC filter unit 150 includes a capacitor C1 and an equivalent resistor R1.
  • the circuit for switching the inductive power supply further includes a first voltage dividing resistor R2 and
  • the drain of the second field effect transistor PMOS is connected to the anode of the voltage input terminal Vi
  • the source of the second field effect transistor PMOS is connected to the source of the third field effect transistor NMOS
  • the drain of the third field effect transistor NMOS Connected to the negative terminal of the voltage output terminal Vo
  • the first end of the inductor L is connected to the source of the second field effect transistor PMOS
  • the first end of the first voltage dividing resistor R2 is connected to the positive terminal of the voltage output terminal Vo
  • the first partial voltage is
  • the second end of the resistor R2 is connected to the first end of the second voltage dividing resistor R3, the second end of the second voltage dividing resistor R3 is connected to the cathode of the voltage output terminal Vo
  • the first end of the current limiting resistor R4 is first and the first point
  • the second end of the resistor R2 is connected, the second end of the current limiting resistor R4 is connected to the negative input terminal of the second error amplifier A2, the positive input terminal of the second
  • the positive input of PWM generator B1 is connected to the output of oscillator B2.
  • the output of PWM generator B1 is connected to the input of inverters D1 and D2 respectively.
  • the output of inverter D1 is connected to the third FET NMOS, and the inverter D2
  • the output terminal is connected to the second FET PMOS
  • the first end of the capacitor C1 is connected to the positive terminal of the voltage output terminal Vo
  • the second end of the capacitor C1 is connected to the negative terminal of the voltage output terminal Vo
  • the first end of the equivalent resistor R1 is
  • the anode of the voltage output terminal Vo is connected
  • the second end of the equivalent resistor R1 is connected to the cathode of the voltage output terminal Vo
  • the drain of the first field effect transistor NMOS is connected to the anode of the voltage output terminal Vo
  • the first field effect transistor NMOS The source is connected to the negative terminal of the voltage output terminal Vo.
  • the gate of the first field effect transistor NMOS is connected to the output end of the first error amplifier A1, and the negative input terminal of the first error amplifier A1 and the second voltage divider resistor R2 are connected. Connected to the terminal, the positive input terminal of the first error amplifier A1 is connected to the first reference voltage Vref1.
  • the circuit of the switching inductor power supply is in operation.
  • the gates of the second FET NOMS and the third FET PMOS are at a low level of the PWM signal, the second FET is turned on, and the third FET is turned off, and the voltage input is at this time.
  • the terminal Vi charges the inductor L along the loop of "Vi+ ⁇ 1 ⁇ 3 ⁇ 5 ⁇ 6 ⁇ Vi-", correspondingly, when receiving the high level of the PWM signal, the second FET is turned off, the third field effect
  • the PMOS is turned on, the inductor L is discharged to the external load along the loop of "5 ⁇ Vo+ ⁇ Vo- ⁇ 2- ⁇ 3".
  • the loop "3 ⁇ 7 ⁇ 8 ⁇ 9 ⁇ 4" constitutes a feedback loop, and the feedback loop can control the duty ratio of the PWM signal according to the magnitude of the output voltage of the voltage output terminal Vo, and the duty ratio indicates that the PWM signal is high, a ratio of a low level, thereby controlling the ratio of the on-off time of the second field effect transistor PMOS and the third field effect transistor NMOS, thereby controlling the voltage of the inductor L to achieve the output voltage of the control voltage output terminal Vo
  • the purpose is to initially ensure the stability of the output voltage. For example, suppose that under normal operation, the duty ratio of the PWM signal is 50%, the output voltage of the voltage output terminal Vo is 24V, and the second reference voltage Vref2 is preset to be 12V.
  • the PWM generator B1 can According to the sawtooth wave Ramp outputted by Vc and the oscillator, a PWM signal with a duty ratio greater than 50% is modulated, for example, 60%.
  • the principle of the PWM generator modulating the PWM signal is prior art, and will not be described here.
  • the on-time of the second field effect transistor PMOS is shortened, the on-time of the third field effect transistor NMOS is increased, the charging time of the inductor L is decreased, and the output voltage of the voltage output terminal Vo is lowered until it is adjusted to 24V.
  • the capacitor C1 and the equivalent resistor R can form a simple RC filter network, and filter out the alternating current, that is, the clutter, which is mixed in the voltage output terminal Vo.
  • the feedback loop ie, the feedback control unit 130
  • the entire feedback process has a long delay and cannot respond quickly.
  • the above RC The larger the capacitance value of C1 in the filtering network (ie, RC filtering unit 150), the stronger the filtering capability, but the delay of the output voltage transition will also increase, and the difficulty coefficient of making the capacitor will also increase. It can be seen that the switching inductor power supply including only the feedback control unit 130 and the RC filtering unit 150 is not perfect.
  • the switching inductor power supply further includes a response filtering unit 140, specifically, when the output voltage of the voltage output terminal Vo jumps (ie, the output voltage value changes greatly in a short time)
  • the ripple is reduced and the spike is reduced, and the power integrity is improved.
  • the output voltage of the voltage output terminal Vo is 24V
  • the set first reference voltage Vref1 is 14V
  • the sampling voltage Vfb is also 14V
  • (Vfb-Vref1) is less than the preset threshold
  • the output voltage of the amplifier A1 is not enough to turn on the first field effect transistor NMOS.
  • FIG. 4 is a schematic diagram of an alternative circuit of a switched inductive power supply in accordance with an embodiment of the present invention.
  • the circuits in Figures 4 and 3 are mostly identical, with the difference being the feedback control unit 130.
  • the sampling analysis sub-unit 131 in the feedback control unit 130 includes a third error amplifier A3, a comparator A4, and a power amplifier A5.
  • the modulation sub-unit 132 includes a PWM generator B1 and an oscillator B2, which are driven.
  • Subunit 133 includes inverters D1 and D2.
  • the negative input terminal of the third error amplifier A3 is connected to the second terminal of the first voltage dividing resistor R2, the positive input terminal of the third error amplifier A3 is connected to the third reference voltage Vref3, and the output terminal of the third error amplifier A3 is
  • the negative input of the comparator A4 is connected, the positive input of the comparator A4 is connected to the output of the power amplifier A5, the input of the power amplifier A5 is connected to the first end of the sampling resistor R5, and the second end of the sampling resistor R5 is connected to the inductor.
  • the first end of L is connected, and the output of comparator A4 is connected to the negative input of PWM generator B1.
  • FIG. 4 and FIG. 3 adjust the duty ratio of the PWM signal according to the magnitude of the output voltage of the voltage output terminal Vo, and the feedback control unit 130 in FIG.
  • the duty cycle of the PWM signal is adjusted according to the magnitude of the output current of the voltage output terminal Vo (which can be understood as the current flowing through the inductor L).
  • the working principle of the feedback control unit 130 will be described below with reference to FIG. 4:
  • the loop "3 ⁇ 7 ⁇ 8 ⁇ 9 ⁇ 4" constitutes a feedback loop, and the feedback loop can control the duty ratio of the PWM signal according to the magnitude of the current flowing through the inductor L, thereby controlling the second FET PMOS and the third
  • the ratio of the on-off time of the FET NMOS can further control the voltage of the inductor L to achieve the purpose of controlling the output voltage of the voltage output terminal Vo, and can initially ensure the output. Voltage stability.
  • the voltage drop of the sampling resistor R5 changes, so that the output voltage of the amplifier A5 changes, the comparator A4 outputs an error signal according to the output voltage of the amplifier A5 and Vc, and the PWM signal output by the PWM generator B1 changes, and the second The on-times of the FET PMOS and the third FET are changed, respectively, thereby controlling the magnitude of the output voltage of the voltage output terminal Vo.
  • the switch unit in the embodiment of the invention controls the charge and discharge of the inductor, and the inductor outputs power from the voltage output end during the discharge, and the feedback control unit can maintain the stability of the output power of the voltage output terminal by controlling the switch unit, and the RC filter unit can filter out
  • the voltage output terminal outputs a clutter in the voltage.
  • the first field effect transistor in the response filtering unit is turned on, and the first field effect transistor that is turned on can reduce the voltage output end. Ripple and reduce spikes at the voltage output.

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Abstract

一种开关电感电源的电路包括电压输入端（1，2）、开关单元（110）、电感（120）、反馈控制单元（130）、响应滤波单元（140）以及电压输出端（10，11）。开关单元用于将电压输入端的正极和电压输出端的负极交替地切换连接到电感的第一端。电感用于从电压输入端存取电能和向电压输出端释放电能。反馈控制单元用于根据电压输出端输出的电能控制开关单元切换连接的频率。响应滤波单元包括第一场效应管（NMOS）。第一场效应管用于在电压输出端的正极的输出电压发生跳变时滤除杂波。该开关电感电源的电路可在开关电感电源的输出电压发生跳变时减小纹波和减少尖刺脉冲，提高输出电压的稳定性，并且具有高性噪比、高电源完整性以及快速响应的优点。

Description

一种开关电感电源的电路 技术领域
本发明涉及电子技术领域，尤其涉及一种开关电感电源的电路。
背景技术
开关电源是一种通过控制开关管的导通时间和关断时间的比率来维持输出电压的稳定性的电源。开关电源具有稳压范围大、损耗低和结构简单等特点，因此广泛应用于各类的电子设备，是电子产品发展中不可或缺的一种电源。其中，直流开关电源的本质是“DC(Direct Current，直流电)-DC”转换器，可将质量较差的原生态直流电压(粗电)，如蓄电池的电压，转换为质量较高的直流电压(精电)，即满足负载要求的电压。具体实现过程中，粗电会先被储能元件暂存后再转换为精电，特别地，以电感作为储能元件的直流开关电源称为开关电感电源，开关电感电源常集成在芯片中。
伴随着工艺节点的持续缩小，芯片的集成度越来越大，非线性元件也被集成到芯片中。这导致开关电感电源的输出端产生噪声，如尖刺和纹波等，直接给负载带来负担，如影响负载的响应速度和加大负载的能量损耗等。为了减小噪声，通常方法是在开关电感电源的输出端设计滤波电容，其中，滤波电容的电容值越大，滤波能力越强。但是，在开关电感电源的输出端的电压发生跳变(即输出电压值在短时间发生较大变化)时，会产生较大的噪声，这就需要选取电容值较大的电容来完成滤波，当滤波电容的电容值增大时，输出电压跳变的延时也将增大，同时制作电容的难度系数也随之增大，可见该方式减小噪声的能力是有限的。
发明内容
本发明实施例提供了一种开关电感电源的电路，可以实现在开关电感电源的输出电压发生跳变时减小纹波和减少尖刺脉冲，提高输出电压的稳定性。
本发明实施例第一方面提供了一种开关电感电源的电路，包括电压输入端、开关单元、电感、反馈控制单元、响应滤波单元以及电压输出端，其中：
所述开关单元的正极和负极分别与所述电压输入端的正极和负极相连， 所述开关单元的输出端与所述电感的第一端相连，所述电感的第二端与所述反馈控制单元的输入端相连，所述反馈控制单元的输出端与所述开关单元的受控端相连，所述电压输出端的正极分别与所述电感的第二端和所述响应滤波单元的第一端相连，所述电压输出端的负极分别与所述开关单元的负极和所述响应滤波单元的第二端相连；
所述开关单元用于将所述电压输入端的正极和所述电压输出端的负极交替地切换连接到所述电感的第一端，所述电感用于从所述电压输入端存取电能和向所述电压输出端释放电能，所述反馈控制单元用于根据所述电压输出端输出的电能控制所述开关单元切换连接的频率，所述响应滤波单元包括第一场效应管，所述第一场效应管用于在所述电压输出端的正极的输出电压发生跳变时滤除所述电压输出端的正极的杂波。
在第一方面的第一种可能实现方式中，所述电路还包括第一分压电阻和第二分压电阻，所述响应滤波单元还包括第一误差放大器，所述第一场效应管是NMOS管，其中：
所述第一分压电阻的第一端与所述电压输出端的正极相连，所述第一分压电阻的第二端与所述第二分压电阻的第一端相连，所述第二分压电阻的第二端与所述电压输出端的负极相连，所述第一场效应管的漏极与所述电压输出端的正极相连，所述第一场效应管的源极与所述电压输出端的负极相连，所述第一场效应管的栅极与所述第一误差放大器的输出端相连，所述第一误差放大器的负输入端与所述第一分压电阻的第二端相连，所述第一误差放大器的正输入端接入第一参考电压。
结合第一方面的第一种可能实现方式，在第二种可能实现方式中，当所述电压输出端的正极的输出电压发生跳变时，所述第一误差放大器的负输入端的电压和所述第一参考电压的差值将大于预设阈值，进而所述第一误差放大器的输出端输出高电平以导通所述第一场效应管，进而所述第一场效应管滤除所述电压输出端的正极的杂波。
结合第一方面的可能实现方式，在第三种可能实现方式中，所述电路还包括RC滤波单元，所述RC滤波单元的第一端与所述电压输出端的正极相连，所述RC滤波单元的第二端与所述电压输出端的负极相连；
所述RC滤波单元用于滤除所述电压输出端的正极的杂波。
结合第一方面以及第一方面的第三种可能实现方式，在第四种可能实现方式中，所述RC滤波单元包括电容和等效电阻，其中：
所述电容的第一端与所述电压输出端的正极相连，所述电容的第二端与所述电压输出端的负极相连，所述等效电阻的第一端与所述电压输出端的正极相连，所述等效电阻的第二端与所述电压输出端的负极相连。
结合第一方面的可能实现方式，在第五种可能实现方式中，所述开关单元包括第二场效应管和第三场效应管，所述第二场效应管是PMOS管，所述第三场效应管是NMOS管，其中：
所述第二场效应管的漏极与所述电压输入端的正极相连，所述第二场效应管的源极与所述第三场效应管的源极相连，所述第三场效应管的漏极与所述电压输出端的负极相连，所述电感的第一端与所述第二场效应管的源极相连，所述第二场效应管的栅极和所述第三场效应管的栅极均与所述反馈控制单元的输出端相连；
当所述第二场效应管的栅极接收到所述反馈控制单元的输出端输出的低电平时所述第二场效应管导通，当所述第三场效应管的栅极接收到所述反馈控制单元的输出端输出的高电平时所述第三场效应管导通。
结合第一方面的可能实现方式，在第六种可能实现方式中，所述反馈控制单元包括采样分析子单元、调制子单元以及驱动子单元，其中：
所述采样分析子单元的采样端与所述电感的第二端相连，所述采样分析子单元的输出端与所述调制子单元的输入端相连，所述调制子单元的输出端与所述驱动子单元的输入端相连，所述驱动子单元的输出端与所述开关单元的受控端相连；
所述采样分析子单元用于获取所述电压输出端的误差电压或误差电流并根据所述误差电压或误差电流向所述调制子单元发送误差信号，所述调制子单元用于根据所述误差信号调制脉冲波并向所述驱动子单元发送所述脉冲波，所述驱动子单元用于根据所述脉冲波驱动所述开关单元。
结合第一方面以及第一方面的第六种可能实现方式，在第七种可能实现方式中，所述电路还包括第一分压电阻和第二分压电阻，所述采样分析子单元包括第二误差放大器和限流电阻，其中：
所述第一分压电阻的第一端与所述电压输出端的正极相连，所述第一分 压电阻的第二端与所述第二分压电阻的第一端相连，所述第二分压电阻的第二端与所述电压输出端的负极相连，所述限流电阻的第一端与所述第一分压电阻的第二端相连，所述限流电阻的第二端与所述第二误差放大器的负输入端相连，所述第二误差放大器的正输入端接入第二参考电压，所述第二误差放大器的输出端与所述调制子单元的输入端相连。
由上可见，本发明实施例中的开关单元控制电感的充放电，电感在放电时从电压输出端输出电能，反馈控制单元可通过控制开关单元来保持电压输出端输出电能的稳定性，RC滤波单元可滤除电压输出端输出电压中的杂波，进一步地，在电压输出端的电压发生跳变时，响应滤波单元中的第一场效应管导通，导通的第一场效应管可减小电压输出端的纹波和减少电压输出端的尖刺脉冲。
附图说明
为了更清楚地说明本发明实施例，下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1是本发明实施例提供的一种开关电感电源的电路的结构示意图；
图2是本发明实施例提供的一种反馈控制单元的结构示意图；
图3是本发明实施例提供的一种开关电感电源的电路的原理图；
图4是本发明实施例提供的另一种开关电感电源的电路的原理图。
具体实施方式
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
本发明实施例中的开关电感电源可应用于智能手机、个人电脑、平板电脑、数字音乐播放器以及电子阅读器等电子设备，可作为上述电子设备的直流电源。
图1是本发明实施例中的一种开关电感电源的电路。如图所示本实施例中的开关电感电源的电路可以包括电压输入端Vi、开关单元110、电感120、反馈控制单元130、响应滤波单元140以及电压输出端Vo，其中：
开关单元110的正极和负极分别与电压输入端Vi的正极和负极相连，开关单元110的输出端与电感120的第一端相连，电感120的第二端与反馈控制单元130的输入端相连，反馈控制单元130的输出端与开关单元110的受控端相连，电压输出端Vo的正极分别与电感120的第二端和响应滤波单元140的第一端相连，电压输出端Vo的负极分别与开关单元110的负极和响应滤波单元140的第二端相连。进一步地，请参阅图2，反馈控制单元130可以进一步包括采样分析子单元131、调制子单元132以及驱动子单元133，其中，采样分析子单元131的采样端与电感的第二端相连，采样分析子单元131的输出端与调制子单元132的输入端相连，调制子单元132的输出端与驱动子单元133的输入端相连，驱动子单元133的输出端与开关单元110的受控端相连。
开关单元110用于将电压输入端Vi的正极和电压输出端Vo的负极交替地切换连接到电感120的第一端，电感120用于从电压输入端Vi存取电能和向电压输出端Vo释放电能，反馈控制单元130用于根据电压输出端Vo输出的电能控制开关单元110切换连接的频率，响应滤波单元140用于在电压输出端Vo的正极的输出电压发生跳变时滤除电压输出端Vo的正极的杂波。进一步地，反馈控制单元130在具体实现过程中，其中的采样分析子单元131用于获取电压输出端Vo输出电能的误差电压或误差电流并根据误差电压或误差电流向调制子单元132发送误差信号，其中的调制子单元132用于根据误差信号调制脉冲波并向驱动子单元133发送脉冲波，其中的驱动子单元133用于根据脉冲波驱动开关单元110。
可选地，开关电感电源的电路还可以包括RC(Resistor-Capacitor)滤波单元150，RC滤波单元150的第一端与电压输出端Vo的正极相连，RC滤波单元150的第二端与电压输出端Vo的负极相连。RC滤波单元150用于滤除电压输出端Vo的正极的杂波。
图3是本发明实施例中的可选的一种开关电感电源的电路的原理图。
作为一种可选的实施例，电压输入端Vi可以是蓄电池或蓄电池组；开关单元110包括第二场效应管PMOS(Positive channel Metal Oxide Semiconductor，P沟道MOS)和第三场效应管NMOS(Negative channel Metal Oxide Semiconductor，N沟道MOS)；电感120如图中电感L所示；反馈控制单元130中的采样分析子单元131包括第二误差放大器A2和限流电阻R4，调制子单元132包括PWM(Pulse Width Modulation，脉冲宽度宽度调制)发生器B1和振荡器B2，驱动子单元133包括反相器D1和D2；响应滤波单元140包括第一场效应管NMOS和第一误差放大器A1；RC滤波单元150包括电容C1和等效电阻R1。除此之外，开关电感电源的电路还包括第一分压电阻R2和第二分压电阻R3。
其中，第二场效应管PMOS的漏极与电压输入端Vi的正极相连，第二场效应管PMOS的源极与第三场效应管NMOS的源极相连，第三场效应管NMOS的漏极与电压输出端Vo的负极相连，电感L的第一端与第二场效应管PMOS的源极相连，第一分压电阻R2的第一端与电压输出端Vo的正极相连，第一分压电阻R2的第二端与第二分压电阻R3的第一端相连，第二分压电阻R3的第二端与电压输出端Vo的负极相连，限流电阻R4的第一端与第一分压电阻R2的第二端相连，限流电阻R4的第二端与第二误差放大器A2的负输入端相连，第二误差放大器A2的正输入端接入第二参考电压Vref2，第二误差放大器A2的输出端与PWM发生器B1的负输入端相连，PWM发生器B1的正输入端与振荡器B2的输出端相连，PWM发生器B1的输出端分别与反相器D1和D2的输入端相连，反相器D1的输出端与第三场效应管NMOS相连，反相器D2的输出端与第二场效应管PMOS相连，电容C1的第一端与电压输出端Vo的正极相连，电容C1的第二端与电压输出端Vo的负极相连，等效电阻R1的第一端与电压输出端Vo的正极相连，等效电阻R1的第二端与电压输出端Vo的负极相连，第一场效应管NMOS的漏极与电压输出端Vo的正极相连，第一场效应管NMOS的源极与电压输出端Vo的负极相连，第一场效应管NMOS的栅极与第一误差放大器A1的输出端相连，第一误差放大器A1的负输入端与第一分压电阻R2的第二端相连，第一误差放大器A1的正输入端接入第一参考电压Vref1。
下面将结合图3具体地说明开关电感电源的工作原理：
电压输入端Vi上电且电压输出端Vo外接负载后，开关电感电源的电路处于工作状态。第二场效应管NOMS和第三场效应管PMOS两者的栅极在接收到PWM信号的低电平时，第二场效应管PMOS导通，第三场效应管NMOS关断，此时电压输入端Vi沿“Vi+→1→3→5→6→Vi-”的回路对电感L充电，对应地，在接收到PWM信号的高电平时，第二场效应管PMOS关断，第三场效应管PMOS导通，此时电感L沿“5→Vo+→Vo-→2-→3”的回路对外接负载放电。
进一步地，回路“3→7→8→9→4”构成反馈环，反馈环可以实现根据电压输出端Vo的输出电压的大小来控制PWM信号的占空比，占空比表示PWM信号中高、低电平的比例，从而可控制第二场效应管PMOS和第三场效应管NMOS的通、断时间比例，进而可控制电感L的电压，以达到控制电压输出端Vo的输出电压的大小的目的，可初步地保证输出电压的稳定性。例如：假设正常工作下，PWM信号的占空比为50％，电压输出端Vo的输出电压为24V，预先设定第二参考电压Vref2为12V，那么，若电压输出端Vo的输出电压变为30V，采样电压Vfb将变为15V，显然Vfb大于Vref2，(Vfb-Vref2)即为误差电压，第二误差比较器A2输出误差信号Vc，Vc为误差电压的放大值，进而PWM发生器B1可根据Vc和振荡器输出的锯齿波Ramp调制出占空比大于50％的PWM信号，如60％，PWM发生器调制PWM信号的原理为现有技术，这里不再赘述，占空比增加后，第二场效应管PMOS的导通时间减短，第三场效应管NMOS的导通时间增长，电感L的充电时间减少，进而电压输出端Vo的输出电压下降，直至调节至24V。
另外，电容C1和等效电阻R可构成简单的RC滤波网络，滤除电压输出端Vo夹杂的交流电，即杂波。
需要指出的是，第一，上述反馈环(即反馈控制单元130)虽然可实现稳定电压输出端Vo的输出电压的作用，但整个反馈过程延时较长，不能快速响应，第二，上述RC滤波网络(即RC滤波单元150)中的C1的电容值越大，滤波能力越强，但输出电压跳变的延时也将增大，同时制作电容的难度系数也随之增大。由此可见，仅包含反馈控制单元130和RC滤波单元150的开关电感电源并不完善。因而，开关电感电源还包括了响应滤波单元140，具体地，当电压输出端Vo的输出电压发生跳变(即输出电压值在短时间发生较大变化) 时，第一场效应管NMOS导通，并通过“5→10→11→2→3”的回路快速响应，从而减小了纹波和减少了尖刺脉冲，提高了电源完整性。例如：假设正常工作下，电压输出端Vo的输出电压为24V，设定的第一参考电压Vref1为14V，此时采样电压Vfb也为14V，(Vfb-Vref1)小于预设阈值，第一误差放大器A1输出电压不足以导通第一场效应管NMOS，当电压输出端Vo突然产生36V的尖刺脉冲时，采样电压Vfb变为18V，(Vfb-Vref1)大于预设阈值，(Vfb-Vref1)经放大后从第一误差放大器A1输出，进而导通第一场效应管NMOS。
图4是本发明实施例中的可选的另一种开关电感电源的电路的原理图。图4和图3中的电路大部分相同，区别在于反馈控制单元130。
作为一种可选的实施例，反馈控制单元130中的采样分析子单元131包括第三误差放大器A3、比较器A4以及功率放大器A5，调制子单元132包括PWM发生器B1和振荡器B2，驱动子单元133包括反相器D1和D2。
其中，第三误差放大器A3的负输入端与第一分压电阻R2的第二端相连，第三误差放大器A3的正输入端接入第三参考电压Vref3，第三误差放大器A3的输出端与比较器A4的负输入端相连，比较器A4的正输入端与功率放大器A5的输出端相连，功率放大器A5的输入端与采样电阻R5的第一端相连，采样电阻R5的第二端与电感L的第一端相连，比较器A4的输出端与PWM发生器B1的负输入端相连。
同理，图4和图3的工作原理也类似，图3中的反馈控制单元130根据电压输出端Vo的输出电压的大小来调节PWM信号的占空比，而图3中的反馈控制单元130根据电压输出端Vo的输出电流(可理解为流过电感L的电流)的大小来调节PWM信号的占空比。具体地，下面将结合图4说明反馈控制单元130的工作原理：
电压输入端Vi上电且电压输出端Vo外接负载后，开关电感电源的电路处于工作状态。回路“3→7→8→9→4”构成反馈环，反馈环可以实现根据流过电感L的电流的大小来控制PWM信号的占空比，从而可控制第二场效应管PMOS和第三场效应管NMOS的通、断时间比例，进而可控制电感L的电压，以达到控制电压输出端Vo的输出电压的大小的目的，可初步地保证输出 电压的稳定性。具体地，当电压输出端Vo的电压改变时，由于负载的电阻一般不会改变，故电压输出端Vo的输出电流改变，进而流过电感L的电流改变，流过采样电阻R5的电流改变(即产生误差电流)，采样电阻R5的压降改变，从而放大器A5的输出电压改变，比较器A4根据放大器A5的输出电压和Vc输出误差信号，进而PWM发生器B1输出的PWM信号改变，第二场效应管PMOS和第三场效应管NMOS的导通时间分别改变，从而控制电压输出端Vo的输出电压的大小。
本发明实施例中的开关单元控制电感的充放电，电感在放电时从电压输出端输出电能，反馈控制单元可通过控制开关单元来保持电压输出端输出电能的稳定性，RC滤波单元可滤除电压输出端输出电压中的杂波，进一步地，在电压输出端的电压发生跳变时，响应滤波单元中的第一场效应管导通，导通的第一场效应管可减小电压输出端的纹波和减少电压输出端的尖刺脉冲。
以上对本发明实施例所提供的开关电感电源的电路进行了详细介绍，本文中应用了具体个例对本发明的原理及实施方式进行了阐述，以上实施例的说明只是用于帮助理解本发明的方法及其核心思想；同时，对于本领域的一般技术人员，依据本发明的思想，在具体实施方式及应用范围上均会有改变之处，综上所述，本说明书内容不应理解为对本发明的限制。

Claims (12)

  1. 一种开关电感电源的电路，其特征在于，所述电路包括电压输入端、开关单元、电感、反馈控制单元、响应滤波单元以及电压输出端，其中：
    所述开关单元的正极和负极分别与所述电压输入端的正极和负极相连，所述开关单元的输出端与所述电感的第一端相连，所述电感的第二端与所述反馈控制单元的输入端相连，所述反馈控制单元的输出端与所述开关单元的受控端相连，所述电压输出端的正极分别与所述电感的第二端和所述响应滤波单元的第一端相连，所述电压输出端的负极分别与所述开关单元的负极和所述响应滤波单元的第二端相连；
    所述开关单元用于将所述电压输入端的正极和所述电压输出端的负极交替地切换连接到所述电感的第一端，所述电感用于从所述电压输入端存取电能和向所述电压输出端释放电能，所述反馈控制单元用于根据所述电压输出端输出的电能控制所述开关单元切换连接的频率，所述响应滤波单元包括第一场效应管，所述第一场效应管用于在所述电压输出端的正极的输出电压发生跳变时滤除所述电压输出端的正极的杂波。
  2. 如权利要求1所述的开关电感电源的电路，其特征在于，所述电路还包括第一分压电阻和第二分压电阻，所述响应滤波单元还包括第一误差放大器，所述第一场效应管是NMOS(Negative channel Metal Oxide Semiconductor，N沟道MOS)管，其中：
    所述第一分压电阻的第一端与所述电压输出端的正极相连，所述第一分压电阻的第二端与所述第二分压电阻的第一端相连，所述第二分压电阻的第二端与所述电压输出端的负极相连，所述第一场效应管的漏极与所述电压输出端的正极相连，所述第一场效应管的源极与所述电压输出端的负极相连，所述第一场效应管的栅极与所述第一误差放大器的输出端相连，所述第一误差放大器的负输入端与所述第一分压电阻的第二端相连，所述第一误差放大器的正输入端接入第一参考电压。
  3. 如权利要求2所述的开关电感电源的电路，其特征在于，当所述电压 输出端的正极的输出电压发生跳变时，所述第一误差放大器的负输入端的电压和所述第一参考电压的差值将大于预设阈值，进而所述第一误差放大器的输出端输出高电平以导通所述第一场效应管，进而所述第一场效应管滤除所述电压输出端的正极的杂波。
  4. 如权利要求1所述的开关电感电源的电路，其特征在于，所述电路还包括RC(Resistor-Capacitor)滤波单元，所述RC滤波单元的第一端与所述电压输出端的正极相连，所述RC滤波单元的第二端与所述电压输出端的负极相连；
    所述RC滤波单元用于滤除所述电压输出端的正极的杂波。
  5. 如权利要求4所述的开关电感电源的电路，其特征在于，所述RC滤波单元包括电容和等效电阻，其中：
    所述电容的第一端与所述电压输出端的正极相连，所述电容的第二端与所述电压输出端的负极相连，所述等效电阻的第一端与所述电压输出端的正极相连，所述等效电阻的第二端与所述电压输出端的负极相连。
  6. 如权利要求1所述的开关电感电源的电路，其特征在于，所述开关单元包括第二场效应管和第三场效应管，所述第二场效应管是PMOS(Positive channel Metal Oxide Semiconductor，P沟道MOS)管，所述第三场效应管是NMOS管，其中：
    所述第二场效应管的漏极与所述电压输入端的正极相连，所述第二场效应管的源极与所述第三场效应管的源极相连，所述第三场效应管的漏极与所述电压输出端的负极相连，所述电感的第一端与所述第二场效应管的源极相连，所述第二场效应管的栅极和所述第三场效应管的栅极均与所述反馈控制单元的输出端相连；
    当所述第二场效应管的栅极接收到所述反馈控制单元的输出端输出的低电平时所述第二场效应管导通，当所述第三场效应管的栅极接收到所述反馈控制单元的输出端输出的高电平时所述第三场效应管导通。
  7. 如权利要求1所述的开关电感电源的电路，其特征在于，所述反馈控制单元包括采样分析子单元、调制子单元以及驱动子单元，其中：
    所述采样分析子单元的采样端与所述电感的第二端相连，所述采样分析子单元的输出端与所述调制子单元的输入端相连，所述调制子单元的输出端与所述驱动子单元的输入端相连，所述驱动子单元的输出端与所述开关单元的受控端相连；
    所述采样分析子单元用于获取所述电压输出端的误差电压或误差电流并根据所述误差电压或误差电流向所述调制子单元发送误差信号，所述调制子单元用于根据所述误差信号调制脉冲波并向所述驱动子单元发送所述脉冲波，所述驱动子单元用于根据所述脉冲波驱动所述开关单元。
  8. 如权利要求7所述的开关电感电源的电路，其特征在于，所述电路还包括第一分压电阻和第二分压电阻，所述采样分析子单元包括第二误差放大器和限流电阻，其中：
    所述第一分压电阻的第一端与所述电压输出端的正极相连，所述第一分压电阻的第二端与所述第二分压电阻的第一端相连，所述第二分压电阻的第二端与所述电压输出端的负极相连，所述限流电阻的第一端与所述第一分压电阻的第二端相连，所述限流电阻的第二端与所述第二误差放大器的负输入端相连，所述第二误差放大器的正输入端接入第二参考电压，所述第二误差放大器的输出端与所述调制子单元的输入端相连。
  9. 如权利要求7所述的开关电感电源的电路，其特征在于，所述电路还包括第一分压电阻、第二分压电阻以及采样电阻，所述采样分析子单元包括第三误差放大器、功率放大器以及比较器，其中：
    所述第一分压电阻的第一端与所述电压输出端的正极相连，所述第一分压电阻的第二端与所述第二分压电阻的第一端相连，所述第二分压电阻的第二端与所述电压输出端的负极相连，所述第三误差放大器的负输入端与所述第一分压电阻的第二端相连，所述第三误差放大器的正输入端接入第三参考电压，所述第三误差放大器的输出端与所述比较器的负输入端相连，所述比较器的正输入端与所述功率放大器的输出端相连，所述功率放大器的输入端 与所述采样电阻的第一端相连，所述采样电阻的第二端与所述电感的第一端相连，所述比较器的输出端与所述调制子单元的输入端相连。
  10. 如权利要求7所述的开关电感电源的电路，其特征在于，所述调制子单元包括PWM(Pulse Width Modulation，脉冲宽度宽度调制)发生器和振荡器，其中：
    所述PWM发生器的负输入端与所述采样分析子单元的输出端相连，所述PWM发生器的正输入端与所述振荡器的输出端相连，所述PWM发生器的输出端与所述驱动子单元的输入端相连；
    所述振荡器用于向所述PWM发生器的正输入端输入锯齿波。
  11. 如权利要求7所述的开关电感电源的电路，其特征在于，所述驱动子单元包括至少一个反相器，所述反相器的输入端与所述调制子单元的输出端相连，所述反相器的输出端与所述开关单元的受控端相连。
  12. 如权利要求1-11任一项所述的开关电感电源的电路，其特征在于，所述电压输入端是蓄电池。
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