WO2015180312A1 - 内嵌式触摸屏及显示装置 - Google Patents

内嵌式触摸屏及显示装置 Download PDF

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Publication number
WO2015180312A1
WO2015180312A1 PCT/CN2014/087003 CN2014087003W WO2015180312A1 WO 2015180312 A1 WO2015180312 A1 WO 2015180312A1 CN 2014087003 W CN2014087003 W CN 2014087003W WO 2015180312 A1 WO2015180312 A1 WO 2015180312A1
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Prior art keywords
self
disposed
capacitance
layer
electrode
Prior art date
Application number
PCT/CN2014/087003
Other languages
English (en)
French (fr)
Inventor
刘英明
董学
薛海林
王海生
王磊
杨盛际
刘红娟
Original Assignee
京东方科技集团股份有限公司
北京京东方光电科技有限公司
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Application filed by 京东方科技集团股份有限公司, 北京京东方光电科技有限公司 filed Critical 京东方科技集团股份有限公司
Priority to US14/443,561 priority Critical patent/US9519374B2/en
Priority to EP14861119.7A priority patent/EP3153946B1/en
Publication of WO2015180312A1 publication Critical patent/WO2015180312A1/zh

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Definitions

  • Embodiments of the present invention relate to an in-cell touch panel and display device.
  • the Touch Screen Panel has gradually spread throughout people's lives.
  • the touch screen can be divided into an Add-on Mode Touch Panel, an On-Cell Touch Panel, and an In-Cell Touch Panel.
  • the external touch screen is produced by separately separating the touch screen from the liquid crystal display (LCD), and then bonding them together to form a liquid crystal display with touch function.
  • the external touch screen has high production cost and low light transmittance.
  • the module is thick and so on.
  • the in-cell touch screen embeds the touch electrode of the touch screen inside the liquid crystal display, which can reduce the thickness of the whole module, and can greatly reduce the manufacturing cost of the touch screen, and is favored by the major panel manufacturers.
  • the in-cell touch panel uses the principle of mutual capacitance or self-capacitance to detect the touch position of the finger.
  • a plurality of self-capacitance electrodes disposed in the same layer and insulated from each other may be disposed in the touch screen.
  • the capacitance of the respective capacitor electrodes is a fixed value
  • the corresponding self-capacitance electrode The capacitance is a value after the fixed value is superimposed on the body capacitance.
  • the touch detection chip can determine the touch position by detecting a change in the capacitance value of each capacitor electrode during the touch period.
  • the human body capacitance can act on all self-capacitance, it can only act on the projected capacitance in the mutual capacitance with respect to the human body capacitance.
  • the amount of touch change caused by the human body touching the screen is greater than that of the touch screen fabricated by the mutual capacitance principle. Therefore, the self-capacitance touch screen can effectively improve the signal-to-noise ratio of the touch, thereby improving the touch.
  • the accuracy of the induction is a method for improving the touch.
  • a wire corresponding to the self-capacitance electrode is generally disposed.
  • the pattern of the wire and the self-capacitance electrode may be disposed on the same film layer, or the pattern of the wire and the self-capacitance electrode may be disposed in a different layer. Setting the wire and the self-capacitance electrode in the same layer can avoid adding a new patterning process, but it will form a touch dead zone.
  • the wires connecting the plurality of self-capacitance electrodes in the touch dead zone pass through the touch dead zone, so in this touch blind
  • the signals in the area are relatively turbulent, reducing the touch performance in the area.
  • At least one embodiment of the present invention provides an in-cell touch panel and a display device, which can improve the uniformity of a touch screen display screen.
  • At least one embodiment of the present invention provides an in-cell touch panel including: an upper substrate and a lower substrate opposite to each other, a plurality of self-capacitance electrodes disposed in the same layer and independent of each other, and connecting the self-capacitance electrodes to the a plurality of wires of the touch detection chip; each of the self-capacitance electrodes and each of the wires are located on a side of the upper substrate facing the lower substrate or on a side of the lower substrate facing the upper substrate; Each of the self-capacitance electrodes and the respective wires are disposed in a different layer, and the self-capacitance electrode and the wires have an interlayer insulating layer; each of the self-capacitance electrodes passes through a via hole penetrating the interlayer insulating layer The layer is electrically connected to the wire, and the interlayer insulating layer has a recessed portion in an overlapping region of the wires other than the self-capacitance electrode and the electrically-connected wire.
  • At least one embodiment of the present invention provides a display device including the above-described in-cell touch panel provided by at least one embodiment of the present invention.
  • FIG. 1 is a schematic view showing a connection relationship between a self-capacitance electrode and a wire
  • FIGS. 2a and 2b are schematic structural views of an in-cell touch panel according to an embodiment of the present invention.
  • FIG. 3 is a schematic diagram of a connection relationship between a self-capacitance electrode and a wire in an in-cell touch panel according to an embodiment of the present invention
  • FIGS. 4a and 4b are schematic diagrams showing driving timings of an in-cell touch panel according to an embodiment of the present invention.
  • FIG. 5 and FIG. 6 are schematic top views of an in-cell touch panel according to an embodiment of the present invention.
  • FIG. 7 is a schematic side view of an in-cell touch panel according to another embodiment of the present invention.
  • each film layer in the drawings do not reflect the true scale, and are merely intended to illustrate the present invention.
  • the self-capacitance electrode and the wire are disposed in the same layer to form a touch dead zone, the touch performance in the area is reduced. Therefore, based on the consideration, as shown in FIG. 1, the wire 1 and the self-capacitance electrode 2 are generally disposed in different layers, and The two are connected by a via 3. As can be seen from FIG. 1, the vias connecting the self-capacitance electrodes and the corresponding wires are not uniformly distributed throughout the display area, and thus affect the overall uniformity of the touch screen display screen.
  • the in-cell touch panel includes an upper substrate 01 and a lower substrate 02 opposite to each other, and the plurality of layers are disposed in the same layer and are independent of each other.
  • the in-cell touch panel may further include a touch detection chip 04 for determining a touch position by detecting a change in a capacitance value of the respective capacitor electrode 03 during a touch period, and the touch detection chip 04 is disposed, for example, on the upper substrate 01 or On the lower substrate 02.
  • the touch detection chip can also be provided independently of the touch screen and connected to the touch screen by, for example, a flexible printed circuit board (FPC).
  • FPC flexible printed circuit board
  • the respective capacitor electrodes 03 and the respective wires 05 are located on the side of the upper substrate 01 facing the lower substrate 02, or on the side of the lower substrate 02 facing the upper substrate 01; the self-capacitance electrodes 03 and the wires 05 are shown in FIGS. 2a and 2b. a structure disposed on a side of the lower substrate 02 facing the upper substrate 01;
  • Each of the capacitor electrodes 03 and each of the wires 05 are disposed in a different layer, and between the self-capacitance electrode 03 and the wire 05 has an interlayer insulating layer 06;
  • the respective capacitor electrodes 03 are electrically connected to the wires 05 through the vias A penetrating the interlayer insulating layer 06.
  • the interlayer insulating layer 06 has an overlap region with the wires 05 except for the wires 05 to which the respective capacitor electrodes 03 are electrically connected. Depression B.
  • a plurality of self-capacitance electrodes 03 of the same layer and independent of each other are disposed by using the principle of self-capacitance, and the touch detection chip 04 passes through the touch time period.
  • the change of the capacitance value of each capacitor electrode 03 is detected to determine the touch position, and the self-capacitance electrode 03 and the wire 05 connected to the touch detection chip 04 are disposed in different layers, and an interlayer insulating layer 06 is disposed between the two.
  • the capacitor electrode 03 is electrically connected to the wire 05 through a via A penetrating through the interlayer insulating layer 06.
  • interlayer insulating layer 06 dummy vias are disposed in the overlapping regions where the respective capacitor electrodes 03 and the wires 05 are not connected, that is, the interlayer insulating layer 06 is outside the self-capacitance electrode 03 and the wires 05 which are electrically connected, and The overlapping area of the wires 05 is provided with a recess B which is not exposed to the guide 05 below.
  • the interlayer insulating layer 06 disposed between the self-capacitance electrode 03 and the wire 05 may be composed of a plurality of insulating layers or an insulating layer.
  • the insulating layer may include an inorganic or organic insulating layer, which is not limited herein.
  • the via hole A provided in the interlayer insulating layer 06 refers to a hole penetrating through each of the insulating layers constituting the interlayer insulating layer 06, and the depressed portion B provided in the interlayer insulating layer 06 means a recess having no inter-layer insulating layer 06. groove.
  • the two can be designed to have the same cross-sectional shape, for example, the same diameter can be designed. Round shape.
  • the via A and the recess are designed to be evenly distributed in the interlayer insulating layer 06 as shown in FIG.
  • the touch screen provided by the embodiment of the invention is applicable to both a twisted nematic (TN) liquid crystal display and an advanced dual-dimensional field switch (ADS) type liquid crystal display and an in-plane switch ( In-Plane Switch, IPS) LCD display.
  • TN twisted nematic
  • ADS advanced dual-dimensional field switch
  • IPS in-plane switch
  • the common electrode layer is located as a plate electrode on the lower layer (closer to the base substrate), and the pixel electrode is located as the slit electrode on the upper layer (closer)
  • the liquid crystal layer that is, the common electrode layer is located between the pixel electrode and the lower substrate, and an insulating layer is generally provided between the pixel electrode and the common electrode layer.
  • the pixel electrode is located as a plate electrode in a lower layer (closer to the substrate substrate), and the common electrode layer is located as a slit electrode in an upper layer (closer to the liquid crystal layer). That is, the pixel electrode is located between the common electrode layer and the lower substrate, and an insulating layer is generally provided between the pixel electrode and the common electrode layer.
  • the common electrode layer 07 in the lower substrate 02 can be multiplexed with the self-capacitance electrode 03, that is, The respective capacitor electrodes 03 constitute a common electrode layer 07 on the side of the lower substrate 02 facing the upper substrate 01.
  • the touch detection chip 04 is used to load the common electrode signals into the respective capacitor electrodes 03.
  • the touch detection chip 04 is used to load the touch signals on the respective capacitor electrodes 03. .
  • a self-capacitance electrode 03 disposed in the same layer as the pixel electrode 08 may be disposed at a gap of each pixel electrode 08. That is, the respective capacitor electrodes 03 are disposed in the same layer as the pixel electrodes 08 on the lower substrate 02, and the patterns of the respective capacitor electrodes 03 are located at the gaps of the adjacent two pixel electrodes 08.
  • the self-capacitance electrode 03 is formed at the original gap of each pixel electrode 08, on the basis of the known array substrate preparation process, no additional process is required, and the production cost can be saved and the production efficiency can be improved.
  • the respective capacitor electrodes 03 may have a slit-like ITO electrode structure or a plate shape at a position corresponding to the opening region of the pixel.
  • the ITO electrode structure that is, in the HADS mode, the respective capacitor electrodes 03 are composed of slit-shaped ITO electrodes.
  • the slit-shaped ITO electrode structure is an ITO electrode having a slit in an opening region of a pixel.
  • the respective capacitor electrodes 03 are composed of a plate-shaped ITO electrode to meet the requirements of liquid crystal display.
  • the self-capacitance electrode 03 can interact with the human body electric field through the slit region of the pixel electrode layer 08. Since the specific structure of the liquid crystal panel of the ADS mode and the HADS mode belongs to a known technique, it will not be described herein.
  • the density of the touch screen is usually on the order of millimeters, so the density and the occupied area of the respective capacitor electrodes 03 can be selected according to the required touch density to ensure the required touch density.
  • the respective capacitor electrodes 03 are designed as square electrodes of about 5 mm * 5 mm.
  • the density of the display screen is usually on the order of micrometers, so for example, a self-capacitance electrode 03 can correspond to a plurality of pixel units in the display screen.
  • the common electrode layer 07 disposed on the lower substrate 02 is divided into a plurality of self-capacitance electrodes 03, in order not to affect the normal display function
  • the dividing line generally avoids the opened area of the display, and is disposed in the pattern area of the black matrix layer, that is, the orthographic projection of the gap between the respective capacitor electrodes 03 on the lower substrate 02 is generally located on the lower substrate. 02 at the gap of the pixel unit.
  • the pattern of the self-capacitance electrode 03 is disposed at the gap of each pixel electrode 08, generally, the pattern of the respective capacitor electrodes 03 is set to be the pixel electrode 08.
  • the mesh structure of the mesh is set to be the pixel electrode 08.
  • the display driving chip and the touch detection chip can be integrated into one chip, which further reduces the production cost.
  • the time at which the touch screen displays each frame is divided into a display period (Display) and a touch period (Touch).
  • the time of displaying one frame of the touch screen is 16.7 milliseconds (ms), and 5 ms is selected as the touch time period, and the other 11.7 ms is used as the display time period, of course, according to The processing capability of the IC chip is appropriately adjusted for the duration of both, and is not specifically limited herein.
  • a gate scan signal is sequentially applied to each of the gate signal lines Gate1, Gate2, ..., Gate n in the touch screen, and a gray scale signal is applied to the data signal line Data; when the common electrode layer is used to multiplex the self-capacitance
  • the touch detection chips connected to the respective capacitance electrodes Cx1 . . . Cx n respectively apply common electrode signals to the respective capacitance electrodes Cx1 . . . Cx n to realize the liquid crystal display function.
  • Cx n simultaneously applies driving signals to the respective capacitor electrodes Cx1 . . . Cx n while receiving the respective capacitor electrodes.
  • the feedback signals of Cx1 ... Cx n may also be as shown in FIG. 4b, and the touch detection chips connected to the respective capacitance electrodes Cx1 ... Cx n sequentially apply driving signals to the respective capacitance electrodes Cx1 ... Cx n to receive the respective signals.
  • the feedback signals of the capacitor electrodes Cx1 . . . Cx n are not limited herein, and the touch signal is realized by analyzing the feedback signal to determine whether a touch occurs.
  • the gate signal disposed on the side of the lower substrate 02 facing the upper substrate 01 may be further included.
  • the line 09 and the data signal line 10, the adjacent two gate signal lines 09 and the data signal line 10 enclose a sub-pixel.
  • Each of the sub-pixels includes a thin film transistor (TFT) as a switching element, a common electrode, and a pixel electrode, the gate of the TFT is electrically connected to the corresponding gate line, the source is electrically connected to the corresponding data, and the drain and the corresponding sub-channel The pixel electrodes of the pixel unit are electrically connected.
  • TFT thin film transistor
  • the wire The extending direction of 05 may be set to be the same as the gate signal line 09 or may be the same as the data signal line 10. Further, generally, the extending directions of the respective wires 05 are uniform.
  • the wire 05 connected to the self-capacitance electrode 03 can be the same as the gate signal line 09.
  • the layer is set or set in the same layer as the data signal line 10.
  • each adjacent two rows of pixels is a pixel group, and two gate signal lines 09 are disposed between the two rows of pixels for respectively providing the two rows of pixels.
  • Gate scan signal By changing the position of the gate signal line 09 and the TFT switch between the adjacent two rows of pixels, the position of the gate signal line 09 between adjacent pixel groups can be saved.
  • the wires 05 can be disposed at the gaps between adjacent pixel groups, and disposed in the same layer as the gate signal lines 09 and extending in the same direction.
  • the gate signal line 09 can be prepared in the same layer as the gate in the TFT, and the data signal line 10 is generally prepared in the same layer as the source and drain electrodes in the TFT, and the gate signal line 09 is in the layer. It may be located between the layer where the data signal line 10 is located and the lower substrate 02. If the self-capacitance electrode 03 is multiplexed at the pixel electrode layer or the common electrode layer 07, it can be seen that there are a plurality of film layers between the self-capacitance electrode 03 and the connected wire 05, and the self-capacitance electrode 03 needs to pass through the film. The vias of the layers are connected to the wires 05 at the bottom layer.
  • the first conductive portion 101 and the second conductive portion 102 are provided in the same layer as the data signal line 10.
  • Fig. 7 does not show a pattern of the data signal line 10, but shows a pattern of source and drain electrodes of the TFTs disposed in the same layer as the data signal lines 10.
  • the self-capacitance electrode 03 and the corresponding wire 05 are electrically connected to the first conductive portion 101 respectively; the self-capacitance electrode 03 is electrically connected to the second conductive portion 102 through the recess portion B, but each of the wires 05 and the second conductive portion 102 is insulated from each other.
  • the first conductive portion 101 disposed in the same layer as the data signal line 10 can ensure better upper and lower connection between the self-capacitance electrode 03 and the wire 05, and the second conductive portion 102 disposed in the same layer as the data signal line 10, After the recess B in the interlayer insulating layer 06 is electrically connected to the self-capacitance electrode 03, the square resistance of the self-capacitance electrode 03 can be reduced on the one hand, and the excessive recession can be prevented when the recess portion of the interlayer insulating layer 06 is formed on the other hand.
  • the etch causes unnecessary interlayer insulating layer 06 to be etched, so that the self-capacitance electrode 03 which should not be connected is electrically connected to the wire 05, that is, the second conductive portion 102 functions as an interlayer insulating layer. 06 etch barrier.
  • another embodiment of the present invention provides another possible implementation that can be as follows.
  • a double gate structure is adopted.
  • two gate signal lines 09 are disposed between pixels of adjacent rows; each adjacent two columns of pixels is set as one pixel group, and one common one is located.
  • the data signal line 10 between the two columns of pixels.
  • the wires 05 can be disposed at the gaps between adjacent pixel groups, and disposed in the same layer as the data signal lines 10 and extending in the same direction.
  • the pixel electrode layer is generally made of an ITO material
  • the resistance of the ITO material is high.
  • the self-capacitance electrodes 03 and the corresponding wires 05 can be electrically connected through a plurality of vias. It is equivalent to connecting the ITO electrode and a plurality of metal resistors composed of wires in parallel, so that the resistance of the electrode can be minimized, thereby improving the signal-to-noise ratio when the electrode transmits signals.
  • each of the film layers on the lower substrate 02 can be fabricated by any known patterning process.
  • an 8-substrate process can be used to obtain a lower substrate including a driving array: gate and gate line patterning ⁇ active layer patterning ⁇ Patterning of an insulating layer ⁇ data line and source/drain pattern ⁇ resin layer pattern ⁇ pixel electrode pattern ⁇ second insulating layer pattern ⁇ composite electrode layer patterning.
  • the actual design may be used, for example, a 7-time patterning process, a 6-time patterning process, or a 5-time patterning process, which is not limited herein.
  • At least one embodiment of the present invention further provides a display device, including the above-mentioned embedded touch screen provided by the embodiment of the present invention, which may be: a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, and a navigation Any product or part that has a display function.
  • a display device including the above-mentioned embedded touch screen provided by the embodiment of the present invention, which may be: a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, and a navigation Any product or part that has a display function.
  • the display device reference may be made to the above embodiment of the in-cell touch panel, and the repeated description is omitted.
  • the in-cell touch panel and the display device provided by at least one embodiment of the present invention use a self-capacitance principle to provide a plurality of self-capacitance electrodes of the same layer and independent of each other, and the touch detection chip detects the respective capacitor electrodes during the touch time period.
  • the change of the capacitance value can determine the touch position, and the self-capacitance electrode and the wire connecting the touch detection chip are disposed in different layers, and an interlayer insulating layer is disposed between the two, and the respective capacitor electrodes pass through the interlayer insulating layer.
  • the via hole is electrically connected to the wire, and a dummy via hole is disposed in the interlayer insulating layer at an overlapping region where the respective capacitor electrode and the wire are not connected, that is, the interlayer insulating layer is outside the self-capacitance electrode and the wire electrically connected. And a recess is provided in an overlapping area with the wire.
  • the dummy vias matching the via holes are added to the interlayer insulating layer to ensure the uniformity of the image in the entire display area, thereby improving the uniformity of the display screen of the touch screen.

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Abstract

一种内嵌式触摸屏及显示装置，该内嵌式触摸屏包括相对而置的上基板（01）和下基板（02），多个同层设置且相互独立的自电容电极（03），以及将所述自电容电极（03）连接至触控侦测芯片（04）的多条导线（05），各所述自电容电极（03）与各所述导线（05）异层设置，且所述自电容电极（03）与所述导线（05）之间具有层间绝缘层（06）；各所述自电容电极（03）通过贯穿所述层间绝缘层（06）的过孔与导线（05）电性相连，所述层间绝缘层在各所述自电容电极与除电性相连的导线以外导线的交叠区域具有凹陷部，从而提高触摸屏显示画面的均一性。

Description

内嵌式触摸屏及显示装置 技术领域
本发明的实施例涉及一种内嵌式触摸屏及显示装置。
背景技术
随着显示技术的飞速发展，触摸屏(Touch Screen Panel)已经逐渐遍及人们的生活中。目前，触摸屏按照组成结构可以分为：外挂式触摸屏(Add-on Mode Touch Panel)、覆盖表面式触摸屏(On-Cell Touch Panel)、以及内嵌式触摸屏(In-Cell Touch Panel)。外挂式触摸屏是将触摸屏与液晶显示屏(Liquid Crystal Display，LCD)分开生产，然后贴合到一起成为具有触摸功能的液晶显示屏，外挂式触摸屏存在制作成本较高、光透过率较低、模组较厚等缺点。内嵌式触摸屏将触摸屏的触控电极内嵌在液晶显示屏内部，可以减薄模组整体的厚度，又可以大大降低触摸屏的制作成本，受到各大面板厂家青睐。
内嵌式触摸屏是利用互电容或自电容的原理实现检测手指触摸位置。例如，可以在触摸屏中设置多个同层设置且相互绝缘的自电容电极，当人体未触碰屏幕时，各自电容电极的电容为一固定值，当人体触碰屏幕时，对应的自电容电极的电容为固定值叠加人体电容后的值。触控侦测芯片在触控时间段通过检测各自电容电极的电容值变化可以判断出触控位置。由于人体电容可以作用于全部自电容，相对于人体电容仅能作用于互电容中的投射电容。由人体碰触屏幕所引起的触控变化量会大于利用互电容原理制作出的触摸屏，因此，相对于互电容的触摸屏，自电容的触摸屏能有效提高触控的信噪比，从而提高触控感应的准确性。
在上述内嵌式触摸屏中，为了将自电容电极与触控侦测芯片连接，一般会设置与自电容电极对应连接的导线。可以将导线与自电容电极的图形设置在同一膜层，也可以将导线与自电容电极的图形异层设置。将导线和自电容电极同层设置虽然可以避免增加新的构图工艺，但是会形成触控盲区。在触控盲区内连接多个自电容电极的导线均经过该触控盲区，因此在这个触控盲 区内的信号相对比较紊乱，降低了在该区域内的触控性能。
发明内容
本发明至少一实施例提供了一种内嵌式触摸屏及显示装置，能够提高触摸屏显示画面的均一性。
本发明至少一实施例提供一种内嵌式触摸屏，包括：相对而置的上基板和下基板，多个同层设置且相互独立的自电容电极，以及将所述自电容电极连接至所述触控侦测芯片的多条导线；各所述自电容电极与各所述导线位于所述上基板面向所述下基板的一侧，或位于所述下基板面向所述上基板的一侧；各所述自电容电极与各所述导线异层设置，且所述自电容电极与所述导线之间具有层间绝缘层；各所述自电容电极通过贯穿所述层间绝缘层的过孔与导线电性相连，所述层间绝缘层在各所述自电容电极与除电性相连的导线以外导线的交叠区域具有凹陷部。
本发明至少一实施例提供一种显示装置，包括本发明至少一实施例提供的上述内嵌式触摸屏。
附图说明
为了更清楚地说明本发明实施例的技术方案，下面将对实施例的附图作简单地介绍，显而易见地，下面描述中的附图仅仅涉及本发明的一些实施例，而非对本发明的限制。
图1为一种自电容电极与导线之间的连接关系示意图；
图2a和图2b分别为本发明实施例提供的内嵌式触摸屏的结构示意图；
图3为本发明实施例提供的内嵌式触摸屏中自电容电极与导线之间的连接关系示意图；
图4a和图4b分别为本发明实施例提供的内嵌式触摸屏的驱动时序示意图；
图5和图6分别为本发明实施例提供的内嵌式触摸屏的俯视示意图；
图7为本发明另一实施例提供的内嵌式触摸屏的侧视示意图。
具体实施方式
为使本发明实施例的目的、技术方案和优点更加清楚，下面将结合本发明实施例的附图，对本发明实施例的技术方案进行清楚、完整地描述。显然，所描述的实施例是本发明的一部分实施例，而不是全部的实施例。基于所描述的本发明的实施例，本领域普通技术人员在无需创造性劳动的前提下所获得的所有其他实施例，都属于本发明保护的范围。
附图中各膜层的厚度和形状不反映真实比例，目的只是示意说明本发明内容。
由于自电容电极和导线同层设置会形成触控盲区，降低了该区域内的触控性能，因此基于该考虑，如图1所示，一般将导线1和自电容电极2异层设置，且通过过孔3将两者相连接。从图1中可以看出，连接自电容电极与对应的导线的过孔在整个显示区域分布并不均匀，因此会影响触摸屏显示画面的整体均一性。
本发明至少一实施例提供的一种内嵌式触摸屏，如图2a和图2b所示，该内嵌式触摸屏包括相对而置的上基板01和下基板02，多个同层设置且相互独立的自电容电极03，以及将自电容电极03连接至触控侦测芯片04的多条导线05。该内嵌式触摸屏还可以包括在触控时间段通过检测各自电容电极03的电容值变化以判断触控位置的触控侦测芯片04，该触控侦测芯片04例如设置在上基板01或下基板02上。在本发明的至少一个实施例中，该触控侦测芯片也可以独立于该触摸屏提供，通过例如柔性印刷电路板(FPC)连接到该触摸屏。
各自电容电极03与各导线05位于上基板01面向下基板02的一侧，或位于下基板02面向上基板01的一侧；在图2a和图2b中示出了自电容电极03与导线05设置在下基板02面向上基板01的一侧的结构；
各自电容电极03与各导线05异层设置，且自电容电极03与导线05之间具有层间绝缘层06；
各自电容电极03通过贯穿层间绝缘层06的过孔A与导线05电性相连，层间绝缘层06在各自电容电极03与除电性相连的导线05以外，与导线05的交叠区域具有凹陷部B。
本发明至少一实施例提供的上述内嵌式触摸屏，利用自电容的原理设置多个同层且相互独立的自电容电极03，触控侦测芯片04在触控时间段通过 检测各自电容电极03的电容值变化可以判断出触控位置，自电容电极03与将其连接至触控侦测芯片04的导线05异层设置，两者之间设置层间绝缘层06，各自电容电极03通过贯穿层间绝缘层06的过孔A与导线05电性相连。在层间绝缘层06中，位于各自电容电极03与导线05不相连的交叠区域设置假过孔，即层间绝缘层06在自电容电极03与除电性相连的导线05以外，并与导线05的交叠区域设置凹陷部B，该凹陷部B并不暴露在下方的导向05。通过在层间绝缘层06中增加与过孔A匹配的假过孔，保证了整个显示区域的图形均一性，从而提高触摸屏显示画面的均一性。
需要说明的是，在本发明至少一实施例提供的上述触摸屏中，在自电容电极03和导线05之间设置的层间绝缘层06可以由多层绝缘层组成，也可以由一层绝缘层组成，该绝缘层可以包括无机或者有机绝缘层，在此不做限定。层间绝缘层06中设置的过孔A是指贯穿组成层间绝缘层06的各层绝缘层的孔洞，层间绝缘层06中设置的凹陷部B是指没有贯穿层间绝缘层06的凹槽。
进一步地，为了保证触摸屏显示区域的图形均一性，在制作层间绝缘层06中的过孔A和凹陷部B时，可以将两者设计为具有相同的截面形状，例如可以设计为直径大小相同的圆形。例如，一般地，将过孔A和凹陷部设计为在层间绝缘层06中均匀分布，如图3所示。
本发明实施例提供的上述触摸屏，既适用于扭转向列(Twisted Nematic,TN)型液晶显示屏，也适用于高级超维场开关(Adwanced Dimension Switch,ADS)型液晶显示屏和平面内开关(In-Plane Switch,IPS)型液晶显示屏。
进一步地，在本发明至少一实例提供的上述触摸屏应用于传统ADS型液晶面板时，公共电极层作为板状电极位于下层(更靠近衬底基板)，像素电极作为狭缝电极位于上层(更靠近液晶层)，即公共电极层位于像素电极与下基板之间，并且，在像素电极和公共电极层之间一般设有绝缘层。
在本发明至少一实例提供的上述触摸屏应用于HADS型液晶面板时，像素电极作为板状电极位于下层(更靠近衬底基板)，公共电极层作为狭缝电极位于上层(更靠近液晶层)，即像素电极位于公共电极层与下基板之间，并且，在像素电极和公共电极层之间一般还设有绝缘层。
当本发明至少一实施例提供的上述触摸屏应用于ADS型液晶屏时，如图2a所示，可以采用下基板02中的公共电极层07复用自电容电极03，即 各自电容电极03组成位于下基板02面向上基板01一侧的公共电极层07。在显示时间段内，例如触控侦测芯片04用于对各自电容电极03加载公共电极信号；在触控时间段内，例如触控侦测芯片04用于对各自电容电极03加载触控信号。在将公共电极层07的结构复用为自电容电极03以实现触控功能时，在已知的阵列基板制备工艺的基础上，不需要增加额外的工艺，可以节省生产成本，提高生产效率。
或者，在本发明至少一实施例提供的上述触摸屏应用于HADS型液晶面板时，如图2b所示，可以在各像素电极08的间隙处设置与像素电极08同层设置的自电容电极03，即各自电容电极03与下基板02上的像素电极08同层设置，且各自电容电极03的图形位于相邻的两个像素电极08的间隙处。在各像素电极08原有的间隙处形成自电容电极03时，在已知的阵列基板制备工艺的基础上，不需要增加额外的工艺，可以节省生产成本，提高生产效率。
根据上述触摸屏具体应用的液晶显示面板的模式，当采用公共电极层07复用各自电容电极03时，各自电容电极03在与像素的开口区域对应的位置可以具有狭缝状ITO电极结构或板状ITO电极结构，即在HADS模式时各自电容电极03由狭缝状ITO电极组成。具体地，所述狭缝状ITO电极结构为在像素的开口区域具有狭缝的ITO电极。在ADS模式时各自电容电极03由板状ITO电极组成以满足液晶显示的需求，此时自电容电极03可以透过像素电极层08的狭缝区域与人体电场相互作用。由于ADS模式和HADS模式的液晶面板的具体结构属于已知技术，在此不再赘述。
一般地，触摸屏的密度通常在毫米级，因此可以根据所需的触控密度选择各自电容电极03的密度和所占面积以保证所需的触控密度。通常各自电容电极03设计为5mm*5mm左右的方形电极。而显示屏的密度通常在微米级，因此例如一个自电容电极03可对应显示屏中的多个像素单元。
在本发明至少一实施例提供的上述内嵌式触摸屏中，当采用将整层设置在下基板02上的公共电极层07分割成多个自电容电极03时，为了不影响正常的显示功能，在对公共电极层07进行分割时，分割线一般都会避开显示的开口区域，设置在黑矩阵层的图形区域，即各自电容电极03之间的间隙在下基板02上的正投影一般会位于下基板02的像素单元的间隙处。
或者，在本发明实施例提供的上述内嵌式触摸屏中，将自电容电极03的图形是设置在各像素电极08的间隙处时，一般是各自电容电极03的图形设置为以像素电极08作为网孔的网格状结构。
例如，在本发明至少一实施例提供的上述触摸屏中，不管是采用公共电极层07复用作为自电容电极03，还是在像素电极08的间隙处设置自电容电极03，为了减少显示和触控信号之间的相互干扰，采用触控和显示阶段分时驱动的方式。例如，在本发明的至少一个实施例中，还可以将显示驱动芯片和触控侦测芯片整合为一个芯片，进一步降低生产成本。
例如，如图4a和图4b所示的驱动时序图中，将触摸屏显示每一帧(V-sync)的时间分成显示时间段(Display)和触控时间段(Touch)。例如如图4a和图4b所示的驱动时序图中触摸屏的显示一帧的时间为16.7毫秒(ms)，选取其中5ms作为触控时间段，其他的11.7ms作为显示时间段，当然也可以根据IC芯片的处理能力适当的调整两者的时长，在此不做具体限定。在显示时间段(Display)，对触摸屏中的每条栅极信号线Gate1，Gate2……Gate n依次施加栅扫描信号，对数据信号线Data施加灰阶信号；当采用公共电极层复用自电容电极时，与各自电容电极Cx1……Cx n连接的触控侦测芯片向各自电容电极Cx1……Cx n分别施加公共电极信号，以实现液晶显示功能。在触控时间段(Touch)，如图4a所示，与各自电容电极Cx1……Cx n连接的触控侦测芯片向各自电容电极Cx1……Cx n同时施加驱动信号，同时接收各自电容电极Cx1……Cx n的反馈信号；也可以如图4b所示，与各自电容电极Cx1……Cx n连接的触控侦测芯片向各自电容电极Cx1……Cx n依次施加驱动信号，分别接收各自电容电极Cx1……Cx n的反馈信号，在此不做限定，通过对反馈信号的分析判断是否发生触控，以实现触控功能。
进一步地，在本发明至少一实施例提供的上述触摸屏中，如图5和图6所示，还可以包括：设置于下基板02面向上基板01的一侧的相互交叉而置的栅极信号线09和数据信号线10，相邻的两条栅极信号线09和数据信号线10围成一亚像素。每个亚像素包括作为开关元件的薄膜晶体管(TFT)、公共电极和像素电极，该TFT的栅极与对应的栅线电连接，源极与对应的数据电连接，而漏极与对应的亚像素单元的像素电极电连接。
为了便于通过导线05将自电容电极03与触控侦测芯片04连接，导线 05的延伸方向可以设置为与栅极信号线09相同，或可以与数据信号线10相同。并且，一般各导线05的延伸方向均一致。
进一步地，在本发明实施例提供的触摸屏中，为了尽可能的不增加新的膜层，保证生产效率和降低生产成本，可以将与自电容电极03连接的导线05与栅极信号线09同层设置，或与数据信号线10同层设置。
例如，本发明的一个实施例提供了一种可能的实施方式，如下所述。如图5所示，在下基板02上，以每相邻的两行像素为一个像素组，在该两行像素之间设置有两条栅极信号线09，用于分别为该两行像素提供栅极扫描信号。通过变更相邻两行像素之间的栅极信号线09和TFT开关的位置，可以节省出相邻像素组之间栅极信号线09的位置。这样，如图5所示，就可以将导线05设置在相邻的像素组之间的间隙处，且与栅极信号线09同层设置且同向延伸。
例如，在下基板02的制作过程中，栅极信号线09可以和TFT中的栅极同层制备，数据信号线10一般与TFT中的源漏极同层制备，而栅极信号线09所在层可以位于数据信号线10所在层与下基板02之间。若采用位于像素电极层或公共电极层07复用自电容电极03时，可以看出，在自电容电极03与连接的导线05之间具有多个膜层，自电容电极03需要通过贯穿这些膜层的过孔与位于底层的导线05连接。
以采用公共电极层07复用自电容电极03为例，在下基板02中，如图7所示，与数据信号线10同层设置第一导通部101和第二导通部102。图7未示出数据信号线10的图形，但示出了与数据信号线10同层设置的TFT的源漏极的图形。自电容电极03与对应的导线05分别与第一导通部101电性相连；自电容电极03通过凹陷部B与第二导通部102电性相连，但是各导线05与第二导通部102相互绝缘。
与数据信号线10同层设置的第一导通部101可以保证自电容电极03和导线05之间能更好的上下连接，而与数据信号线10同层设置的第二导通部102，通过层间绝缘层06中的凹陷部B与自电容电极03导通后，一方面可以降低自电容电极03的方阻，另一方面可以防止在制作层间绝缘层06的凹陷部时过量刻蚀而导致不必要的层间绝缘层06刻穿，从而使不应相连的自电容电极03与导线05之间的电性相连，即第二导通部102起到了层间绝缘层 06的刻蚀阻挡作用。
例如，本发明的另一个实施例提供了另一种可能的实施方式可以如下所述。如图6所示，采用双栅结构，在下基板02上，在相邻行的像素之间均设置两条栅极信号线09；每相邻的两列像素设为一个像素组，共用一条位于该两列像素之间的数据信号线10。通过增加一倍栅极信号线09的数量，可以节省出相邻像素组之间数据信号线10的位置。这样，如图6所示，就可以将导线05设置在相邻的像素组之间的间隙处，且与数据信号线10同层设置并且同向延伸。
例如，由于像素电极层一般由ITO材料制成，而ITO材料的电阻较高。为了最大限度的降低其电阻，提高各自电容电极03传递电信号的信噪比，可以将自电容电极03与对应的导线05通过多个过孔电性相连。相当于将ITO电极和多个由导线组成的金属电阻并联，这样能最大限度的减少电极的电阻，从而提高电极传递信号时的信噪比。
例如，可以采用已知的任意种构图流程制作下基板02上的各膜层，例如可以采用8次构图工艺来得到包括驱动阵列的下基板：栅极和栅线构图→有源层构图→第一绝缘层构图→数据线和源漏极构图→树脂层构图→像素电极构图→第二绝缘层构图→公共电极层构图。当然在本发明的实施例中也可以根据实际设计，例如采用7次构图工艺、6次构图工艺或5次构图工艺，在此不做限定。
本发明至少一实施例还提供了一种显示装置，包括本发明实施例提供的上述内嵌式触摸屏，该显示装置可以为：手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。该显示装置的实施可以参见上述内嵌式触摸屏的实施例，重复之处不再赘述。
本发明至少一实施例提供的上述内嵌式触摸屏及显示装置，利用自电容的原理设置多个同层且相互独立的自电容电极，触控侦测芯片在触控时间段通过检测各自电容电极的电容值变化可以判断出触控位置，自电容电极与将其连接至触控侦测芯片的导线异层设置，两者之间设置层间绝缘层，各自电容电极通过贯穿层间绝缘层的过孔与导线电性相连，并且在层间绝缘层中位于各自电容电极与导线不相连的交叠区域设置假过孔，即层间绝缘层在自电容电极与除电性相连的导线以外，并与导线的交叠区域设置凹陷部。通过在 层间绝缘层中增加与过孔匹配的假过孔，保证了整个显示区域的图形均一性，从而提高触摸屏显示画面的均一性。
以上所述仅是本发明的示范性实施方式，而非用于限制本发明的保护范围，本发明的保护范围由所附的权利要求确定。
本申请要求于2014年5月30日递交的中国专利申请第201410240043.7号的优先权，在此全文引用上述中国专利申请公开的内容以作为本申请的一部分。

Claims (10)

  1. 一种内嵌式触摸屏，包括：相对而置的上基板和下基板，多个同层设置且相互独立的自电容电极，以及将所述自电容电极连接至所述触控侦测芯片的多条导线，其中：
    各所述自电容电极与各所述导线位于所述上基板面向所述下基板的一侧，或位于所述下基板面向所述上基板的一侧；
    各所述自电容电极与各所述导线异层设置，且所述自电容电极与所述导线之间具有层间绝缘层；
    各所述自电容电极通过贯穿所述层间绝缘层的过孔与导线电性相连，所述层间绝缘层在各所述自电容电极与除电性相连的导线以外，并与导线的交叠区域具有凹陷部。
  2. 如权利要求1所述的内嵌式触摸屏，其中，所述过孔与所述凹陷部的截面形状一致，且在所述层间绝缘层中均匀分布。
  3. 如权利要求1或2所述的内嵌式触摸屏，其中，各所述自电容电极组成位于所述下基板面向所述上基板一侧的公共电极层；在显示时间段，各自电容电极上加载公共电极信号。
  4. 如权利要求1或2所述的内嵌式触摸屏，其中，各所述自电容电极与所述下基板上的像素电极同层设置，且各所述自电容电极的图形位于相邻的两个所述像素电极的间隙处。
  5. 如权利要求1-4任一项所述的内嵌式触摸屏，还包括：设置于所述下基板与所述自电容电极所在层之间的相互交叉而置的栅极信号线和数据信号线；相邻的两条栅极信号线和数据信号线围成一亚像素；
    所述导线的延伸方向与所述栅极信号线相同，或与所述数据信号线相同。
  6. 如权利要求5所述的内嵌式触摸屏，其中，以每相邻的两行像素为一个像素组，在该两行像素之间设置有两条栅极信号线分别为该两行像素提供栅极扫描信号；
    所述导线设置在相邻的像素组之间的间隙处，且与所述栅极信号线同层设置。
  7. 如权利要求6所述的内嵌式触摸屏，其中，所述栅极信号线所在层位 于所述数据信号线所在层与所述下基板之间；
    与所述数据信号线同层设置第一导通部和第二导通部；
    所述自电容电极与对应的导线分别与所述第一导通部电性相连；
    所述自电容电极通过所述凹陷部与所述第二导通部电性相连，各所述导线与所述第二导通部相互绝缘。
  8. 如权利要求5所述的内嵌式触摸屏，其中，相邻行的像素之间设置有两条栅极信号线；且每相邻的两列像素为一个像素组，共用一条位于该两列像素之间的数据信号线；
    所述导线设置在相邻的像素组之间的间隙处，且与所述数据信号线同层设置。
  9. 如权利要求1-8任一所述的内嵌式触摸屏，还包括：在触控时间段通过检测各所述自电容电极的电容值变化以判断触控位置的触控侦测芯片。
  10. 一种显示装置，包括如权利要求1-9任一项所述的内嵌式触摸屏。
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