WO2015130989A1 - Contacts auto-alignés pour cellules solaires à contact arrière - Google Patents
Contacts auto-alignés pour cellules solaires à contact arrière Download PDFInfo
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- WO2015130989A1 WO2015130989A1 PCT/US2015/017852 US2015017852W WO2015130989A1 WO 2015130989 A1 WO2015130989 A1 WO 2015130989A1 US 2015017852 W US2015017852 W US 2015017852W WO 2015130989 A1 WO2015130989 A1 WO 2015130989A1
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- solar cell
- layer
- dopant
- emitter
- contact
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0224—Electrodes
- H01L31/022408—Electrodes for devices characterised by at least one potential jump barrier or surface barrier
- H01L31/022425—Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
- H01L31/022441—Electrode arrangements specially adapted for back-contact solar cells
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0224—Electrodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
- H01L31/042—PV modules or arrays of single PV cells
- H01L31/048—Encapsulation of modules
- H01L31/049—Protective back sheets
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
- H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
- H01L31/068—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
- H01L31/0682—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells back-junction, i.e. rearside emitter, solar cells, e.g. interdigitated base-emitter regions back-junction cells
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/1804—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic Table
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
- Y02E10/547—Monocrystalline silicon PV cells
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Definitions
- the present disclosure relates in general to the fields of photovoltaic (PV) solar cells, and more particularly to self aligned contacts for solar cells.
- PV photovoltaic
- solar cell contact structure includes conductive metallization on base and emitter diffusion areas - for example aluminum metallization connecting silicon in base and emitter contact areas through relatively heavy phosphorous and boron areas, respectively.
- Figs. 1A through ID are cross-sectional diagrams of solar cells with a self aligned contact structure
- Figs. 2A through 2E are cross-sectional diagrams of solar cells at various steps during the fabrication of a abutted junction interdigitated back contact solar cell having self aligned contacts;
- Figs. 3A through 3G are cross-sectional diagrams of solar cells at various steps during the fabrication of a non abutted junction interdigitated back contact solar cell having self aligned contacts;
- Figs. 4A through 4E are cross-sectional diagrams of solar cells at various steps during the fabrication of a non abutted junction interdigitated back contact solar cell having self aligned contacts;
- Fig. 5 is cross-sectional diagram of solar cell with a self aligned contact structure consistent with Fig. 1A and having multi-level metallization.
- the solar cell comprises a semiconductor layer having a light receiving frontside and a backside opposite the frontside and attached to an electrically insulating backplane.
- a first metal layer having base and emitter electrodes self aligned to base and emitter regions is positioned on the semiconductor layer backside.
- a patterned second metal layer providing cell interconnection and connected to the first metal layer by via plugs is positioned on the backplane.
- the disclosed subject matter provides structures and methods for making self aligned contacts for back contact back junction solar cells.
- the disclosed subject matter and corresponding figures provide low-damage, high-efficiency, and low-cost process flows for the formation of thin silicon solar cells using self aligned contacts for back contact back junction (e.g., interdigitated back contact IBC) solar cells.
- the novel self aligned contact structures described may achieve higher solar cell conversion efficiency. Additionally, solar cell fabrication methods having minimal or reduced process steps for the formation of solar cell structures with self aligned contacts are described.
- Fig. 1 A is a cross-sectional diagram of a selective emitter solar cell with a self aligned contact structure having a dopant diffusion region with higher doping levels (e.g., greater than 1E18 cm-3) just below the metal to silicon absorber contact.
- Self aligned contact structures may provide higher solar cell efficiency by having heavily doped regions (n and p type ) in silicon for improved metal/Si contact resistance and lower surface recombination velocity at metal/Si contact and by minimizing heavy doping areas (e.g., doping greater than IE 18 cm-2) in the solar cell thus reducing the overall saturation current density.
- self aligned contact structure disclosed herein may also be formed by using hetero/tunneling contacts through a barrier layer in between metal and Si - such as that shown in Fig. IB.
- Fig. IB is a cross-sectional diagram of a solar cell with a self aligned contact structure formed using hetero/tunneling contacts through a barrier layer in between metal and Si.
- a self aligned structure An advantage of a self aligned structure is that heavy doping areas are limited to only under the contact where they are needed. If the contact open needs to be aligned to the heavy doping with non-self aligned contact structures, the heavy diffusions need to be much wider than the contact open to accommodate for alignment tolerances. As compared to non-self aligned contact structures, the self aligned contact structures provided may have higher efficiency because of two distinct reasons. First, heavy dopings may be deleterious when used under passivation - in other words heavy dopings are more and in some instances only useful when used under poor passivation such as metal. Thus, a self-aligned structure eliminates the areas of heavy doping under high quality passivation.
- a self-aligned structure removes the outer nesting opening and minimizes and in some instances eliminates laser damage from this step. Further, in addition to efficiency advantages, the self-aligned structure may require less process steps and thus reduce cell cost.
- Table 1 below shows a front-end process flow for the formation of a selective emitter solar cell having self aligned contacts and a field emitter - such as that shown in Fig. 1 A - using a dopant paste step.
- Step 1 is a saw damage removal step to remove damage from a wafer (e.g., a CZ wafer); however, the flows provided are equally applicable to an epitaxially formed silicon substrate processed while on template in which case Step 1 Saw Damage Removal is replace with a porous silicon and epitaxial silicon deposition step as described in detail herein.
- the front-end processing described occurs on the exposed surface of the template attached epitaxial substrate after which the epitaxial substrate may be released (e.g., mechanical or wet etch release) from the template in back end processing.
- the exemplary process flows provided are described in the context of fabrication high efficiency back contact back junction solar cells for descriptive purposes and one skilled in the art may combine, add or remove, alter, or move within an overall process flow the various processing steps disclosed.
- elements from each of the process flows described in the table provided herein may be combined together or with other known solar cell manufacturing methods.
- the laser contact open shown in Step 3 in can be separated in two steps (for example as shown in Table 2) to form self aligned contacts only for base and emitter contacts separately; the dopant paste printing step shown in Step 4 may have additional third print of undoped paste on top of already printed dopant pastes (for example as shown in Fig. 8).
- the wet etch step shown in Step 6 of Table 1 and which removes annealed dopant paste may be replaced by a dry HF vapor etch process or the removal Step 6 may be skipped (i.e., removed) entirely for an all-dry front-end process.
- the laser contact open step shown in Step 6 of Table 1 may be replaced by an etch paste process comprising etch paste deposition, dry, and rinse for a laser free front-end process.
- Table 2 below shows a front-end process flow for the formation of a selective emitter solar cell having self aligned contacts using dopant paste and using separate contact open steps.
- Table 3 below shows a front-end process flow for the formation of a selective emitter solar cell having self aligned contacts with dopant paste and the application of a diffusion barrier.
- the diffusion barrier deposition shown in Step 5 of Table 3 as an APCVD USG deposition may also be an undoped paste print.
- Tables 2 and 3 may be used to reduce autodoping from dopant pastes during diffusion anneal.
- FIG. 1C is a cross-sectional diagram of a non-abutted junction solar cell with a self aligned contact structure having a dopant diffusion region with higher doping levels (e.g., greater than 1E18 cm-3) just below the metal to silicon absorber contact.
- Steps 2, 3, and, 4 of Table 4 may be replaced with two steps of APCVD boron doped silicon oxide (BSG1) deposition followed by picosecond (ps) C02 laser - an alternative embodiment referred to as self aligned contacts with dopant paste print and non abutted junction with boron doped silicon oxide by APCVD.
- BSG1 boron doped silicon oxide
- ps picosecond
- Table 5 shows the fabrication process flow for a non selective emitter solar cell having self aligned contacts and using phosphorous dopant paste.
- Table 6 shows the fabrication process flow for a non selective emitter solar cell having self aligned contacts and using phosphorus oxychloride POC13 (POCl).
- Table 7 shows the fabrication process flow for a non selective emitter solar cell having self aligned passivated base contacts using dopant paste.
- Table 8 below shows the fabrication process flow for solar cells having self aligned base tunneling/hetero junction contacts - such as those shown in Fig. IB.
- Table 9 below shows the fabrication process flow for solar cells having self aligned contacts without a heavy diffusion region below the base contact.
- Table 10 below shows a front-end process flow for the formation of a solar cell having self aligned contacts with a field base - such as that shown in Fig. ID.
- Fig. ID is a cross- sectional diagram of a solar cell with field base and a self aligned contact structure having a dopant diffusion region with higher doping levels (e.g., greater than 1E18 cm-3) just below the metal to silicon absorber contact.
- the HF Vapor Step 6 in Table 10 and which removes annealed dopant paste may be replaced with a wet etch step.
- Table 11 shows a front-end process flow for the formation of a solar cell having a field base self aligned contacts with etch paste and dopant paste prints - such as that shown in Fig. ID
- FIGs. 2A through 2E is a process flow representation showing cross-sectional diagrams of solar cells at various steps during the fabrication of a abutted junction interdigitated back contact solar cell having self aligned contacts with dopant paste.
- Fig. 2A shows an aluminum oxide (A1203) layer deposited (e.g., by APCVD) on a silicon substrate/wafer. The aluminum oxide layer may also have an undoped silicate glass layer.
- a nanosecond (ns or ps) laser opens base and emitter contacts.
- This step may also include a wet etch to remove any oxide residue (e.g., aluminum silicon oxide residue).
- dopant pastes are paste print in emitter and base regions followed by a diffusion anneal to drive- in/diffuse the dopants and form base and emitter regions.
- dopant pastes are stripped (e.g., by wet etch).
- metal is printed on the base and emitter regions and annealed resulting in minimal shunt risk.
- Figs. 3A through 3G is a process flow representation showing cross-sectional diagrams of solar cells at various steps during the fabrication of a non abutted junction interdigitated back contact solar cell having self aligned contacts with dopant paste.
- Fig. 3A shows an aluminum oxide (A1203) layer deposited (e.g., by APCVD) on a silicon substrate/wafer. The aluminum oxide layer may also have an undoped silicate glass layer.
- a nanosecond (ns) laser opens base contacts. This step may also include a wet etch to remove any oxide residue (e.g., aluminum silicon oxide residue).
- Fig. 3A shows an aluminum oxide (A1203) layer deposited (e.g., by APCVD) on a silicon substrate/wafer.
- the aluminum oxide layer may also have an undoped silicate glass layer.
- a nanosecond (ns) laser opens base contacts. This step may also include a wet etch to remove any oxide residue (e.g., aluminum silicon
- an undoped silicate glass layer is deposited (e.g., by APCVD).
- a pico second (ps) laser ablates base and emitter contact openings.
- dopant pastes are paste print in emitter and base regions followed by a diffusion anneal to drive-in/diffuse the dopants and form base and emitter regions.
- dopant pastes are stripped (e.g., by wet etch).
- metal is printed on the base and emitter regions and annealed resulting in minimal shunt risk.
- Figs. 4A through 4E is a process flow representation showing cross-sectional diagrams of solar cells at various steps during the fabrication of a non abutted junction interdigitated back contact solar cell having self aligned contacts with dopant paste using an undoped paste first.
- Fig. 4A shows an undoped silicon oxide (Si02) paste printed on the desired based regions of a silicon substrate/wafer only.
- a doped layer e.g., doped aluminum oxide layer A1203 or doped borosilicate glass layer BSG1
- undoped silicate glass (USG) layer is deposited (e.g., by APCVD).
- the undoped silicate glass layer may have a thickness three to four times thicker as compared to the undoped layer.
- a pico second (ps) laser ablates base and emitter contact openings.
- dopant pastes are paste print in emitter and base regions followed by a diffusion anneal to drive- in/diffuse the dopants and form base and emitter regions.
- dopant pastes are stripped (e.g., by wet etch).
- metal is printed on the base and emitter regions and annealed resulting in minimal shunt risk.
- emitter or base contacts are opened sequentially (in either order) or simultaneously using various field dielectric removal techniques such as using lasers or wet etch or etch paste. And subsequently, depositing the dopant source in the opened contact, driving the dopant into silicon at high temperature, and selectively removing/etching the dopant source while keeping the field dielectric unharmed from the etchant. This leaves the dopant driven into silicon only in the area under where the contact was opened leaving a self-aligned structure.
- the methods of manufacturing described may be further categorized by the source of the under-contact dopants. These can be from a dopant paste (for example phosphorous for n-type and Boron for p-type) or deposited films which incorporate dopants in them, for example APCVD deposited Boron or phosphorous doped Si02 films. Finally, a hybrid source where N+ and p+ dopant sources come from APCVD for one type and dopant paste for the other type of dopant. A further subcategory is defined by the technique to etch away/remove the dopant source which is applicable to both wafer and epitaxial based absorbers as well as dopant source categories (dopant paste, APCVC film, and hybrid dopant source).
- dopant paste for example phosphorous for n-type and Boron for p-type
- deposited films which incorporate dopants in them, for example APCVD deposited Boron or phosphorous doped Si02 films.
- a hybrid source where
- oxide based dopant sources such as doped Si02
- either a wet process with HF can be used or a dry process using HF vapor phase etching may be deployed.
- the field area is also Si02 then the wet HF selectivity is obtained as a heavily doped SiOx film may etch much faster than an undoped film.
- the field area stack may contain an A1203 (e.g., deposited using APCVD as well). This film, once treated at high temperatures for example greater than 900°C, may have high selectivity to HF solution.
- HF vapor also very selectively etch the dopant source.
- both dopant sources may be screen printed dopant paste. If the contacts are open sequentially, then a deposited film for both contacts, or hybrid sources, may be utilized.
- Table 12 shows a front-end self aligned contact fabrication flow which yields a separated junction and is accomplished using dopant pastes (for example, screen printed dopant pastes).
- dopant pastes for example, screen printed dopant pastes.
- the emitter doping is not abutting the base contact doping and is separated by the background bulk doping of the base.
- Step 2 shows the deposition of the emitter followed by a cap.
- the emitter source is shown to be an APCVD deposited boron doped A1203, it may also be a boron doped Si02 layer or another dopant source layer deposited using different means.
- the first laser ablation (Step 3) is to open up the separation between emitter and base doping such that upon anneal, there is a separation between the junctions.
- Step 5 is a contact open within the base window for base contact as well as a contact open for the emitter.
- Both contacts are opened up in the same step - hence the method of printing the dopant source should be a selective print on top of these contacts such as screen printing of the dopant paste (as compared to a blanket deposition of a thin dopant sourced film).
- the dopant source is either wet etched or etched selectively using HF vapor.
- the etching step may be skipped (Step # 8).
- the contacts can be opened sequentially.
- either base or emitter contacts are opened first and the corresponding paste is printed and dried.
- the other contact is opened and the corresponding paste is printed and dried.
- both pastes are driven in at the same time. This alternative may avoid cross contamination in the contact during drying and burn.
- Steps 3 and 4 may be skipped and contacts can be directly opened for both base and emitter.
- the field area may be capped by a thin film which is resistant to the dopant source etchant chemistry.
- the cap layer may be APCVD based A1203 (undoped or doped) or titanium oxide (Ti02) or amorphous silicon (a-Si).
- Table 13 shows a front end separated junction self aligned solar cell process flow using only APCVD deposited films which serves as dopant sources. This flow follows the same steps as Table 12 (with all the variations described above) until Step 4. At Step 5, only one type of contact is opened first. In this case it is the emitter contact (for an n-type back contact cell). This is followed by an APCVD BSG film which is the dopant source for emitter contact doping (Step 6). Next, the base contact is opened and PSG is deposited using APCVD. In a variation, the sequence of emitter and base contact open can be reversed. An abutted version of the separated junction flow described in Table 13 skips/removes Steps 3 and 4 to create abutted junctions.
- Table 14 below shows a front end separated junction self-aligned process flow using a hybrid approach.
- one of the dopant source is a deposited APCVD film while the other type of dopant source is a printed dopant paste.
- Table 14 Self aligned contact fabrication flow yielding a separated junction using a hybrid APCVD doped dielectric film and phosphorous based dopant paste.
- the flow of Table 14 shares the first four steps (along with its variations) with Table 13.
- Step 5 of Table 14 the emitter contact is opened.
- BSG is deposited in Step 6 and Step 7 opens base contact with a laser (note, although, the flow suggests using ps lasers, nano or femto second lasers with different wavelengths are not precluded as long as they meet the contact open requirements).
- phosphorous based dopant paste is printed, dried in Step 8.
- Step 9 is an anneal step to drive the dopants from the BSG and from the phosphorous paste to create under-contact doped areas, while step 10 removes the dopant sources based on either wet or HF vapor technique.
- An abutted version of the separated junction flow described in Table 14 skips/removes Steps 3 and 4 to create abutted junctions.
- Step 6 the sequence of BSG2 (Step 6) and phosphorous dopant paste (Step 8) is reversed. Base contact is opened first, followed by phosphorous paste. This is in turn followed emitter contact and BSG2 deposition and the remaining flow is similar.
- the hybrid dopant sources are based on APCVD PSG and dopant paste boron such that the base contact is made with the APCVD deposited doped Si02 film while the emitter contact is made using boron based dopant paste.
- This variation has further variations where the sequence of contact open and its accompanying dopant source has two possibilities.
- Table 15 below is a front end process flow showing a variation of the hybrid approach of Table 14 where both dopant paste and doped dielectric films are used as a source of dopants for base and emitter under contact doping.
- both emitter and the base contacts are separated by APCVD-PSG and diffusion anneal. This is done to reduce the risk of dopant co- diffusion during diffusion anneal.
- Co-diffusion is a process when dopant source from base or emitter contact diffusion areas (phosphorous or boron) from dopant paste (phosphorous or boron) moves into other polarity (base or emitter) through gaseous phase. This process may avoided, for example, by putting a solid phase dopant sources (APCVD-PSG) on top of PSG and adding anneal before the next contact emitter contact open step - as shown in Table 15.
- the paste is phosphorous and the base is opened first (for an n-type back contact cell) and in a variation the paste is the boron paste and the emitter is opened first.
- a variation of the Table 15 process flow forms abutted junctions by skipping Steps 3 and 4 as shown in Table 16 below. As throughout this disclosure, the variations described in conjunction with Table 15 are equally applicable with the abutted junction flow.
- Metal 2 e.g., PVD
- the solar cell structures described herein may utilize a multi-layer metallization structure, such as a two-level metallization structure, comprising an on-cell base and emitter metallization first level metal (Ml) and a second level metal (M2) collecting power (voltage and current) from the first level metal (hence, completing the solar cell metallization) and which may also form cell to cell interconnections.
- the second level metal (M2) may comprise an interdigitated pattern of base and emitter current collection fingers and optionally solar cell base and emitter busbars (for example, M2 base and emitter fingers extending from base and emitter busbars, respectively).
- the first level metal may comprise an interdigitated back contact metallization structure with relatively fine pitch interdigitated fingers (much finer pitch than the second level metal pitch) arranged orthogonal/perpendicular or in some instances parallel to the interdigitated fingers of M2.
- a relatively thin electrically insulating backplane formed between Ml and M2 and attached to the solar cell provides solar cell structural support, Ml electrical insulation, and allows for solar cell fabrication (particularly M2 fabrication and solar cell frontside processing) processing improvement.
- the backplane sheet may be a continuous flexible material closely CTE-matched with the solar cell semiconductor substrate material (e.g., crystalline silicon for silicon solar cells), laminated or otherwise attached to, for example, the back-contact / back- junction solar cell prior to completion of the remaining solar cell manufacturing process steps.
- Ml may comprise interdigitated base and emitter lines (for instance, with base-emitter finger pitch of less than 2mm and in some instances less than 1mm) and M2 (in some instances with interdigitated fingers substantially orthogonal/perpendicular to Ml fingers and with a much coarser base-emitter pitch compared to Ml) serves as the electrical connector among Ml base and emitter lines (i.e., a busbarless Ml pattern while the optional cell busbars may be placed on the M2 pattern).
- Ml may comprise interdigitated base and emitter lines (for instance, with base-emitter finger pitch of less than 2mm and in some instances less than 1mm)
- M2 in some instances with interdigitated fingers substantially orthogonal/perpendicular to Ml fingers and with a much coarser base-emitter pitch compared to Ml) serves as the electrical connector among Ml base and emitter lines (i.e., a busbarless Ml pattern while the optional cell busbars may be placed on the M2 pattern).
- the metal layers in the disclosed multi-level metal designs are separated by a dielectric or an electrically insulating layer, such as a resin/fiber based prepreg material or alternatively a suitable plastic or polymer based material, forming a continuous backplane for each of the plurality of solar cells in the solar cell array placed on the continuous backplane.
- a dielectric or an electrically insulating layer such as a resin/fiber based prepreg material or alternatively a suitable plastic or polymer based material
- the backplane should preferably be relatively closely CTE (Coefficient of Thermal Expansion) matched to the CTE of the semiconductor absorber (e.g., crystalline silicon) so as to minimize CTE mismatch stress or warpage effects during thermal processing - for example a specially formulated aramid fiber resin prepreg material may provide close CTE matching with silicon while providing flexibility, electrical insulating, thermal and chemical stability, and other desirable processing and reliability characteristics such as effective crack-free lamination.
- M1/M2 interconnection structures include conductive material filled vias through the insulating layer (e.g., an insulating dielectric layer such as prepreg backplane) positioned between Ml and M2 - laminated or attached to the backsides of the solar cells after formation of the patterned M2 layer.
- the solar cells provided may utilize a two-level metallization scheme comprising a preferably busbarless (although optional busbars may be used) first-level contact metallization (Ml) using a relatively thin patterned metal (e.g., thin aluminum formed by screen printing of an aluminum paste or inkjet printing of an aluminum ink, or alternatively plasma sputtering from an aluminum target followed by laser ablation or wet etch patterning) formed directly on the solar cell backside prior to backplane lamination, and a second level thin patterned metal M2 (e.g., comprising approximately 3 to 5 microns thick Al or alternatively, about one to several microns of copper, which may in either case be optionally capped with a solderable coating such as tin) formed after backplane lamination.
- a relatively thin patterned metal e.g., thin aluminum formed by screen printing of an aluminum paste or inkjet printing of an aluminum ink, or alternatively plasma sputtering from an aluminum target followed by laser ablation or wet etch
- the patterned M2 layer may also be formed by using plating or lamination and patterning of a high-conductivity metal foil (comprising copper or aluminum).
- the Ml and M2 layers are separated by the backplane and interconnected at designated regions through conductive via plugs (conductive via plugs may be formed during M2 formation).
- Ml has fine-pitch pattern and M2 preferably is orthogonal (or substantially perpendicular) to Ml and has coarse pitch pattern (hence, fewer base and emitter fingers compared to Ml).
- Patterned M2 completes the cell-level electrical metallization and may also provide cell to cell electrical interconnections for a plurality of solar cells laminated to a continuous backplane - thus in some instances eliminating the need for separate cell to cell tabbing/bussing/soldering. Further, M2 may form array/module level bussing or
- voltage and current scaling may relax and reduce M2 conductivity requirements and constraints. For example, in consideration with other factors, utilizing a thinner M2 metal (e.g., about 2 to 5 microns thick evaporated aluminum by PVD or about 1 to few microns of copper formed by plasma sputtering or evaporation) as compared to thicker M2 metallization (e.g., about 50 to 80 microns thick electroplated copper).
- M2 metal e.g., about 2 to 5 microns thick evaporated aluminum by PVD or about 1 to few microns of copper formed by plasma sputtering or evaporation
- thicker M2 metallization e.g., about 50 to 80 microns thick electroplated copper.
- the thickness of Ml and M2 metallization layers may also be adjusted based on the number, dimensions, and shape of the interdigitated fingers on the Ml layer and M2 layer. It may be advantageous that Ml is patterned with finer interdigitated fingers as compared to the interdigitated fingers of M2.
- the solar cell base and emitter contact metallization pattern is formed directly on the cell backside, for instance using a thin layer of screen printed or inkjet printed or plasma sputtered (PVD) or evaporated aluminum (or aluminum silicon alloy or Al/NiV/Sn stack) material layer.
- PVD screen printed or inkjet printed or plasma sputtered
- Ml evaporated aluminum (or aluminum silicon alloy or Al/NiV/Sn stack) material layer.
- Ml defines the solar cell contact metallization pattern, for example fine-pitch interdigitated back- contact (IBC) conductor fingers defining the base and emitter regions of the IBC cell.
- the Ml layer extracts the solar cell current and voltage (hence the solar cell power) and transfers the solar cell electrical power through the conductive via plugs formed in the backplane to the second level/layer of high-conductivity solar cell metallization (herein referred to as M2) formed after Ml .
- M2 high-conductivity solar cell metallization
- the conductive via plugs can be formed concurrently during the formation of the patterned M2 layer, for example after laser drilling of via holes in the backplane layer.
- the backplane material attached to the backside of the solar cell(s) and placed between patterned Ml and M2 layers may be a thin (e.g., between approximately 25 microns and 1 mm and in some instances between approximately 25 microns and 250 microns) sheet of a polymeric material with sufficiently low coefficient of thermal expansion (CTE) which is closely matched to that of the semiconductor absorber layer in order to avoid causing excessive thermally induced stresses and warpage on the solar cell array.
- CTE coefficient of thermal expansion
- the backplane material should meet process integration requirements for the backend cell fabrication processes, in particular chemical resistance during wet texturing of the cell frontside and thermal stability during the PECVD deposition of the frontside passivation and anti-reflection coating (ARC) layer.
- the electrically insulating backplane material should also meet the module-level lamination process and long-term reliability requirements. While various suitable polymeric (such as plastics, fluropolymers, prepregs, etc.) and suitable non-polymeric materials (such as glass, ceramics, etc.) may be used as the backplane material, backplane material choice depends on many considerations including, but not limited to, material cost, ease of process integration, reliability, pliability, mass density, etc.
- prepreg is prepreg and more particularly an aramid fiber resin based prepreg.
- a non-woven aramid fiber is particularly advantageous.
- prepregs are reinforcing materials pre-impregnated with resin and ready to use to produce composite parts (prepregs may be used to produce composites faster and easier than wet lay-up systems).
- Prepregs may be manufactured by combining reinforcement fibers or fabrics with specially formulated pre-catalyzed resins using equipment designed to ensure consistency. Inexpensive prepreg material is commonly used in printed circuit boards.
- the backplane (e.g., prepreg sheet) may be attached to the solar cell backside using a vacuum laminator.
- the thin backplane e.g., prepreg sheet
- subsequent post- lamination fabrication process steps may include: (i) completion of the texture and passivation processes on the sunnysides (frontsides) of the solar cell, (ii) completion of the high conductivity metallization (M2) on the backside of the solar cell (which may comprise part of the solar cell backplane).
- the high-conductivity metallization M2 layer (for example comprising aluminum, copper, or silver, with aluminum and/or copper being preferred compared to silver because of much lower material cost) comprising both the emitter and base polarities is formed on the laminated backplane attached to the backside of the solar cell.
- a higher conductivity M2 layer is formed on the backplane.
- Via holes in some instances up to hundreds or thousands of via holes per solar cell
- may have diameters in some instances tapered) in the range of approximately 50 up to 500 microns (particularly in the diameter range of about 100 to 300 microns).
- These via holes land on pre-specified landing pad regions of Ml for electrical connection between the patterned M2 and Ml layers through conductive plugs formed in these via holes.
- the vias may be covered or at least partially filled with conductive metallization and M2 may be deposited in separate steps and in other instances M2 deposition at least partially covers or partially fills the vias in the same M2 deposition or formation step.
- the patterned high-conductivity metallization layer M2 is formed (for example by plasma sputtering, plating, evaporation, or a combination thereof - using an M2 material comprising, for instance, aluminum, Al/NIV, Al/NiV/Sn, or copper or solder-coated copper).
- the patterned M2 layer may be designed orthogonal to Ml - in other words rectangular or tapered M2 fingers substantially perpendicular to the Ml fingers. Because of this orthogonal transformation, the patterned interdigitated M2 layer may have far fewer and wider IBC fingers than the Ml layer (for instance, by a factor of about 10 to 50 fewer M2 fingers with respect to the Ml fingers). Hence, the M2 layer may be formed in a much coarser pattern with wider IBC fingers than the Ml layer.
- IBC interdigitated back-contact
- Optional solar cell busbars may be positioned on the M2 layer, and not on the Ml layer (in other words a busbarless Ml), to eliminate electrical shading losses associated with on-cell busbars.
- both the base and emitter interconnections and busbars may be positioned on the M2 layer on the solar cell backside backplane, electrical access is provided to both the base and emitter terminals of the solar cell on the backplane from the backside of the solar cell.
- Fig. 5 is cross-sectional diagram of solar cell with a self aligned contact structure consistent with Fig. 1A and having multi-level metallization. Specifically, Fig. 5 shows a first level metal Ml to second level metal M2 emitter connection through a backplane via where the interdigitated fingers of second level metal M2 are patterned orthogonally to the interdigitated fingers of Ml .
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Abstract
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KR1020167026447A KR20170003526A (ko) | 2014-02-26 | 2015-02-26 | 배면 접촉 태양전지용의 자체 정렬된 접촉부 |
EP15755082.3A EP3111482A4 (fr) | 2014-02-26 | 2015-02-26 | Contacts auto-alignés pour cellules solaires à contact arrière |
CN201580022322.9A CN106256025A (zh) | 2014-02-26 | 2015-02-26 | 背接触太阳能电池的自对准接触件 |
JP2016554365A JP2017508292A (ja) | 2014-02-26 | 2015-02-26 | 背面接触太陽電池のための自己整合接触 |
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US201461945116P | 2014-02-26 | 2014-02-26 | |
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PCT/US2015/017852 WO2015130989A1 (fr) | 2014-02-26 | 2015-02-26 | Contacts auto-alignés pour cellules solaires à contact arrière |
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EP (1) | EP3111482A4 (fr) |
JP (1) | JP2017508292A (fr) |
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TWI630724B (zh) * | 2016-10-14 | 2018-07-21 | 日商信越化學工業股份有限公司 | High photoelectric conversion efficiency solar cell manufacturing method and high photoelectric conversion efficiency solar cell |
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CN108831953B (zh) * | 2017-05-04 | 2021-04-27 | 上海凯世通半导体股份有限公司 | 太阳能电池的制作方法 |
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2015
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- 2015-02-26 CN CN201580022322.9A patent/CN106256025A/zh active Pending
- 2015-02-26 EP EP15755082.3A patent/EP3111482A4/fr not_active Withdrawn
- 2015-02-26 WO PCT/US2015/017852 patent/WO2015130989A1/fr active Application Filing
- 2015-02-26 KR KR1020167026447A patent/KR20170003526A/ko unknown
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CN109844961A (zh) * | 2016-10-14 | 2019-06-04 | 信越化学工业株式会社 | 高光电变换效率太阳能电池的制造方法及高光电变换效率太阳能电池 |
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CN109844961B (zh) * | 2016-10-14 | 2022-08-30 | 信越化学工业株式会社 | 高光电变换效率太阳能电池的制造方法及高光电变换效率太阳能电池 |
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CN106256025A (zh) | 2016-12-21 |
EP3111482A4 (fr) | 2017-10-25 |
KR20170003526A (ko) | 2017-01-09 |
EP3111482A1 (fr) | 2017-01-04 |
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