WO2015019480A1 - Power conversion apparatus - Google Patents

Power conversion apparatus Download PDF

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Publication number
WO2015019480A1
WO2015019480A1 PCT/JP2013/071587 JP2013071587W WO2015019480A1 WO 2015019480 A1 WO2015019480 A1 WO 2015019480A1 JP 2013071587 W JP2013071587 W JP 2013071587W WO 2015019480 A1 WO2015019480 A1 WO 2015019480A1
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WO
WIPO (PCT)
Prior art keywords
semiconductor element
diode
flywheel diode
flywheel
self
Prior art date
Application number
PCT/JP2013/071587
Other languages
French (fr)
Japanese (ja)
Inventor
千絵 小林
森 睦宏
恩田 謙一
越智 健太郎
Original Assignee
株式会社日立製作所
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Application filed by 株式会社日立製作所 filed Critical 株式会社日立製作所
Priority to PCT/JP2013/071587 priority Critical patent/WO2015019480A1/en
Priority to JP2015530634A priority patent/JP6134798B2/en
Priority to TW103120155A priority patent/TWI548199B/en
Publication of WO2015019480A1 publication Critical patent/WO2015019480A1/en

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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/483Converters with outputs that each can have more than two voltages levels
    • H02M7/487Neutral point clamped inverters
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/003Constructional details, e.g. physical layout, assembly, wiring or busbar connections
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/08Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
    • H02M1/088Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters for the simultaneous control of series or parallel connected semiconductor devices

Definitions

  • the present invention relates to a power conversion device, and more particularly to a power conversion device suitable for application of a self-extinguishing semiconductor element such as an IGBT (insulated gate bipolar transistor).
  • a self-extinguishing semiconductor element such as an IGBT (insulated gate bipolar transistor).
  • inverter devices that convert DC to AC / AC to DC have come to be used.
  • inverter devices for example, a three-level inverter device is given as a typical circuit of a large capacity inverter device.
  • the three-level inverter device is a DC voltage circuit having three potentials, that is, a positive potential P, a negative potential N, and an intermediate potential C, and three levels that can output the positive potential P, the negative potential N, and the intermediate potential C.
  • An inverter device having an inverter bridge is a DC voltage circuit having three potentials, that is, a positive potential P, a negative potential N, and an intermediate potential C, and three levels that can output the positive potential P, the negative potential N, and the intermediate potential C.
  • a so-called current driven type element such as a GTO (gate turn-off thyristor) has been mainly used.
  • IGBTs Insulated Gate Bipolar Transistors
  • IEGTs Injection-Promoting Gate Transistors
  • IGBTs Insulated Gate Bipolar Transistors
  • IEGTs Injection-Promoting Gate Transistors
  • multichip configurations in which multiple semiconductor chips are connected in parallel inside the package as a feature of voltage-driven elements. Adopted.
  • a pressure contact type in which semiconductor chips are arranged in a flat metal container and pressure is applied from both sides to realize a uniform parallel circuit has been put into practical use.
  • a flywheel diode is connected in antiparallel to the self-extinguishing semiconductor element in order to secure a return path for an inductive load or the like.
  • This flywheel diode is often housed in a package together with a self-extinguishing semiconductor chip to form a composite element. That is, a flywheel diode chip and a self-extinguishing semiconductor chip are arranged in a flat metal container inside the above-described package.
  • Patent Document 1 Such a technique is described in Patent Document 1, for example.
  • a flywheel diode chip is housed in a single package together with a self-extinguishing semiconductor chip to form a composite element.
  • a chip structure is a mesa structure in a self-extinguishing semiconductor chip such as an IGBT.
  • the chip structure of the diode is a flat structure, a pressure difference is generated between the chip surface and the electrode even if the diameter of the electrode to be pressed is the same.
  • the semiconductor package when the semiconductor package is configured with different diameters, the surface pressure of the large-diameter semiconductor package is reduced with respect to the small-diameter semiconductor package, and the contact thermal resistance is increased on the side formed with the large-diameter semiconductor package. There arises a problem of current concentration.
  • the present invention has been made in view of the above, and an object of the present invention is to provide a power converter that can be reduced in size and can suppress contact thermal resistance and current concentration.
  • a first semiconductor element, a second semiconductor element, a third semiconductor element, and a fourth semiconductor element connected in series between one terminal and the other terminal; , A first flywheel diode, a second flywheel diode, a third flywheel diode provided corresponding to each of the first semiconductor element, the second semiconductor element, the third semiconductor element, and the fourth semiconductor element, A flywheel diode and a fourth flywheel diode, a connection portion between the first semiconductor element and the second semiconductor element, and an intermediate potential terminal which is a potential between the one side terminal and the other side terminal.
  • the body element, the second semiconductor element, the third semiconductor element, and the fourth semiconductor element are connected by a pressure contact connection in a serial arrangement, and the first flywheel diode and the second flywheel
  • the diode, the first clamp diode, the second clamp diode, the third flywheel diode, and the fourth flywheel diode are arranged in series so that the first flywheel diode
  • the second flywheel diode is connected by pressure contact, the first clamp diode and the second clamp diode are connected by pressure contact, and the third flywheel diode and the fourth flywheel diode are connected by pressure contact. It was set as the structure connected.
  • FIG. 6 is an explanatory diagram (a to c) of current paths for one phase of the inverter bridge according to the present invention.
  • FIG. 6 is an explanatory diagram (d to f) of current paths for one phase of the inverter bridge according to the present invention.
  • FIG. 6 is an explanatory diagram (a to c) of current paths for one phase of an inverter bridge when a two-parallel configuration is adopted.
  • FIG. 6 is an explanatory diagram (d to f) of current paths for one phase of an inverter bridge when a two-parallel configuration is adopted.
  • FIG. 1 is a configuration diagram of a power conversion apparatus according to Embodiment 1 of the present invention.
  • FIG. 1 (a) shows a circuit configuration of the inverter device of the present invention
  • FIG. 1 (b) simply shows a structural diagram of one phase of the inverter bridge of the inverter device according to the present invention.
  • . 1A and 1B show a circuit configuration and a structure only for one phase of the inverter for simplicity.
  • a self-extinguishing type in which flywheel diodes 6, 7, 8 and 9 are connected in reverse parallel between a positive potential P and a negative potential N, respectively.
  • two sets are connected, and an intermediate potential C and self-extinguishing semiconductor elements 2, 3, 4 and 5 are connected.
  • Two sets of clamp diodes 10 and 11 are connected in the same manner.
  • a DC voltage circuit 1 has a positive potential P, a negative potential N, and an intermediate potential C, and a series of self-extinguishing semiconductor elements 2, 3, 4 and 5 in parallel with the DC voltage circuit 1.
  • the circuit is connected.
  • flywheel diodes 6, 7, 8, and 9 are connected in antiparallel to the self-extinguishing semiconductor elements 2, 3, 4, and 5, respectively.
  • the clamp diode 10 is connected in a direction in which a current flows from the terminal of the potential C of the DC voltage circuit 1 toward the connection point of the self-extinguishing semiconductor elements 2 and 3 connected in series, and the clamp diode 11 is connected in series
  • the self-extinguishing semiconductor elements 4 and 5 are connected in a direction in which a current flows from the connection point of the self-extinguishing semiconductor elements 4 and 5 toward the terminal of the potential C of the DC voltage circuit 1.
  • OUT is an output terminal connected to a load (not shown).
  • the self-extinguishing semiconductor elements 2, 3, 4 and 5 are each constituted by a semiconductor package.
  • This semiconductor package is configured by arranging semiconductor chips (IGBT chips) in a flat metal container, and a uniform connection circuit is realized by applying pressure from both sides.
  • the flywheel diodes 6, 7, 8, and 9 and the clamp diodes 10 and 11 are configured by arranging diode chips in a flat metal container, and two predetermined circuits are applied by applying pressure from both sides. Are designed to realize a uniform connection circuit.
  • the first pressure contact structure 12 is formed by stacking six semiconductor packages of flywheel diodes 6, 7, 8, and 9 and clamp diodes 10 and 11, and each semiconductor package.
  • Each of the cooling fins 13, 14, 15, 16, 17, 18, 19, 20, and 21 and the insulators 22 and 23 that are interposed between the insulators 22 and 23 is a skewer structure.
  • the second press-contact structure 24 includes a self-extinguishing type semiconductor element 2, 3, 4 and 5 and a skewer in which cooling fins 25, 26, 27, 28 and 29 provided between them are fastened together. It has a mold structure.
  • the wiring 30 is a bus bar that electrically connects the cooling fin 16 attached to the cathode side of the clamp diode 10 and the cooling fin 14 attached to the cathode side of the flywheel diode 7.
  • the wiring 31 is a bus bar that electrically connects the cooling fin 18 attached to the anode side of the clamp diode 11 and the cooling fin 20 attached to the anode side of the flywheel diode 8.
  • the wiring 32 is a bus bar that electrically connects the cooling fin 15 attached to the anode side of the flywheel diode 7 and the cooling fin 19 attached to the cathode side of the flywheel diode 8.
  • Wirings 33, 34, 35, 36, and 37 are connection wirings between the self-extinguishing semiconductor element and the flywheel diode, and the wiring 33 is connected to the cooling fin 25 attached to the collector side of the self-extinguishing semiconductor element 2 and the flywheel diode.
  • the cooling fin 13 attached to the cathode side of the wheel diode 6 and the wiring 34 are the cooling fin 26 attached to the collector side of the self-extinguishing semiconductor element 3 and the cooling fin 14 attached to the cathode side of the flywheel diode 7.
  • the wiring 35 is the cooling fin 27 attached to the collector side of the wiring 32 and the self-extinguishing semiconductor element 4, and the wiring 36 is the cooling fin 28 attached to the collector side of the self-extinguishing semiconductor element 5 and the flywheel diode 9.
  • the cooling fin 20 attached to the cathode side and the wiring 37 are the cooling fin 29 attached to the emitter side of the self-extinguishing semiconductor element 5 and the flywheel diode.
  • 9 is a bus bar that electrically connects the cooling fins 21 attached to the anode side of each of the nine. Note that the corresponding portions of the wirings 30 to 37 are shown in FIG.
  • the first pressure contact structure 12 is composed of only a diode
  • the second pressure contact structure 24 is composed of only a self-extinguishing semiconductor element.
  • the electrical connection of the flywheel diodes 6 and 7 constituting the first pressure contact structure 12 is ensured by pressing the cooling fins 13 and the cooling fins 21 from the outside, respectively.
  • the electrical connection of the clamp diodes 10 and 11 is secured, and the electrical connection of the flywheel diodes 8 and 9 is secured.
  • the self-extinguishing semiconductor elements 2, 3, 4 and 5 constituting the second press-contact structure 24 by pressing the cooling fin 25 and the cooling fin 29 from the outside respectively. Ensure each electrical connection.
  • the diameters of the first pressure contact structure and the second pressure contact structure are reduced.
  • the diameter can be reduced to the minimum necessary, and the size can be reduced. For example, if the allowable current per chip of the diode is 100 A and the allowable current per chip of the self-extinguishing semiconductor device is 50 A, the number of chips required for the diode semiconductor package is the self-extinguishing semiconductor device. Half of it is good.
  • the size of the inverter can be reduced as shown in FIG.
  • the contact pressure of the diode constituted by the semiconductor package having a large diameter decreases due to a decrease in the surface pressure of the semiconductor package having a large diameter relative to the semiconductor package having a small diameter. This leads to an increase in resistance and current concentration. Therefore, the semiconductor package constituting the pressure contact structure must have the same diameter.
  • FIG. 3 shows a configuration diagram of the power conversion apparatus according to the second embodiment.
  • FIG. 3 (a) shows the circuit configuration of the inverter device of the present invention
  • FIG. 3 (b) simply shows the structural diagram of one phase of the inverter bridge of the inverter device according to the present invention.
  • . 3A and 3B show a circuit configuration and a structure only for one phase of the inverter for simplicity.
  • the DC voltage circuit 38 has a positive potential P, a negative potential N, and an intermediate potential C, and flywheel diodes 39, 40, 41, and 42 are connected in reverse parallel to the DC voltage circuit 38. Yes.
  • series circuits of self-extinguishing semiconductor elements 43, 44, 45 and 46 are connected to the flywheel diodes 39, 40, 41 and 42, respectively.
  • self-extinguishing semiconductor elements 47, 48, 49 and 50 are connected in parallel to the self-extinguishing semiconductor elements 43, 44, 45 and 46.
  • the clamp diode 51 is connected in a direction in which a current flows from the terminal of the potential C of the DC voltage circuit 38 toward the connection point of the flywheel diodes 39 and 40, and the clamp diode 52 is connected to the flywheel diode connected thereto. They are connected in a direction in which current flows from the connection point of 41 and 42 toward the terminal of the potential C of the DC voltage circuit 38. OUT is an output terminal connected to a load (not shown).
  • the first pressure contact structure 53 is configured by stacking six semiconductor packages of flywheel diodes 39, 40, 41 and 42 and clamp diodes 51 and 52, and each semiconductor package.
  • the cooling fins 54, 55, 56, 57, 58, 59, 60, 61, and 62, and the insulators 63 and 64, which are interposed between the two, are skewered.
  • the second press-contact structure 65 includes a self-extinguishing type semiconductor element 43, 44, 45 and 46 and a skewer in which cooling fins 66, 67, 68, 69 and 70 provided between them are fastened together. It has a mold structure.
  • the third press-contact structure 71 includes a skewer in which self-extinguishing semiconductor elements 47, 48, 49, and 50 and cooling fins 72, 73, 74, 75, and 76 provided therebetween are fastened together. It has a mold structure.
  • the wiring 77 is a bus bar that electrically connects the cooling fin 57 attached to the cathode side of the clamp diode 51 and the cooling fin 55 attached to the cathode side of the flywheel diode 40.
  • the wiring 78 is a bus bar that electrically connects the cooling fin 59 attached to the anode side of the clamp diode 52 and the cooling fin 61 attached to the anode side of the flywheel diode 41.
  • the wiring 79 is a bus bar that electrically connects the cooling fin 56 attached to the anode side of the flywheel diode 40 and the cooling fin 60 attached to the cathode side of the flywheel diode 41.
  • Wirings 80, 81, 82, 83, and 84 are transition wirings between the self-extinguishing semiconductor element and the flywheel diode, and the wiring 80 is connected to the cooling fin 66 attached to the collector side of the self-extinguishing semiconductor element 43 and the flywheel diode.
  • the wiring 82 is the cooling fin 68 attached to the collector side of the wiring 79 and the self-extinguishing semiconductor element 45, and the wiring 83 is the cooling fin 69 attached to the collector side of the self-extinguishing semiconductor element 46 and the flywheel diode 42.
  • the cooling fin 61 and wiring 84 attached to the cathode side are connected to the cooling fin 70 and flywheel die attached to the emitter side of the self-extinguishing semiconductor element 46.
  • Wiring 85 is a cooling fin 66 attached to the collector side of self-extinguishing semiconductor element 43, cooling fin 72 attached to the collector side of self-extinguishing semiconductor element 47, and wiring 86 is self-extinguishing.
  • the cooling fin 67 attached to the collector side of the type semiconductor element 44, the cooling fin 73 attached to the collector side of the self-extinguishing type semiconductor element 48, and the wiring 87 were attached to the collector side of the self-extinguishing type semiconductor element 45.
  • the cooling fins 68 and the cooling fins 74 attached to the collector side of the self-extinguishing semiconductor element 49 and the wiring 88 are the cooling fins 69 and the self-extinguishing semiconductor element 50 attached to the collector side of the self-extinguishing semiconductor element 46.
  • Mounted on the collector side of The cooling fin 75 and the wiring 89 electrically connect the cooling fin 70 attached to the emitter side of the self-extinguishing semiconductor element 46 and the cooling fin 76 attached to the emitter side of the self-extinguishing semiconductor element 50, respectively.
  • Busbar Incidentally, the corresponding portions of the wirings 77 to 89 are shown in FIG.
  • the first pressure contact structure 53 is composed of only a diode
  • the second pressure contact structure 65 and the third pressure contact structure 71 are composed of only a self-extinguishing semiconductor element.
  • the parallel self-extinguishing semiconductor elements are located in the vicinity without many BUSs and capacitors, so the current flow is imbalanced due to variations in circuit inductance. Further, it is possible to suppress the generation of heat due to current concentration and the damage of the semiconductor chip due to the surge voltage. Furthermore, since the capacity density per unit (VA / m 3 ) can be increased and only one press-contact structure is added, the entire apparatus is not enlarged, and the capacity density (VA) of the entire apparatus is reduced. / m 3 ) can be increased.
  • the proposed structure shown in FIG. 3 reduces the variation in the inductance of the circuit and reduces the current unintentional than connecting the third pressure contact structure composed only of the self-extinguishing semiconductor element in parallel.
  • the reason why the balance can be suppressed will be described with reference to FIGS. 4-1, 4-2, 5, 6-1 and 6-2.
  • FIGS. 4-1 and 4-2 the current path that flows when the inverter operates in the structure of the present invention shown in FIGS. 4-1 and 4-2 is shown.
  • the path flowing through the self-extinguishing semiconductor element to the output terminal OUT the path flowing from the negative potential N shown in FIG. 4-1 (c) to the output terminal OUT through the flywheel diode, FIG.
  • the clamp diode 51 from the intermediate potential C passes through the self-extinguishing semiconductor element 44 to the output terminal OUT and the clamp diode 51 from the intermediate potential C to the self-extinguishing semiconductor.
  • the length of the path that passes through the element 48 and flows to the output terminal OUT is equal, and an imbalance due to current wiring passing through the first and second parallels is unlikely to occur.
  • FIG. 4-2 (e) a path flowing from the output terminal OUT to the self-extinguishing semiconductor element 45 and the clamp diode 52 to the intermediate potential C and the self-extinguishing semiconductor element 49 and clamp diode from the output terminal OUT.
  • the length of the path that passes through 52 and flows to the intermediate potential C is equal, and imbalance due to the wiring of the current passing through the first parallel and the second parallel is unlikely to occur.
  • FIG. 5 shows a configuration diagram in which the third pressure contact structure is connected.
  • a series circuit of self-extinguishing semiconductor elements 90, 91, 92A and 93 is connected in parallel to the positive potential P and the negative potential N. Further, flywheel diodes 94, 95, 96 and 97 are connected in antiparallel to the self-extinguishing semiconductor elements 90, 91, 92 and 93, respectively. Further, self-extinguishing semiconductor elements 98, 99, 100 and 101 are connected in parallel to the flywheel diodes 94, 95, 96 and 97.
  • the clamp diode 102 is connected in a direction in which a current flows from the terminal of the potential C toward the connection point of the self-extinguishing semiconductor elements 90 and 91 connected in series, and the clamp diode 103 is connected in series. They are connected in a direction in which current flows from the connection point of the type semiconductor elements 92 and 93 toward the terminal of the potential C. OUT is an output terminal connected to a load (not shown).
  • the first pressure contact structure 104 is formed by stacking six semiconductor packages of self-extinguishing semiconductor elements 90, 91, 92, and 93 and clamp diodes 102 and 103, and interposed between the semiconductor packages.
  • the cooling fins 105, 106, 107, 108, 109, 110, 111, 112, and 113 and the insulators 114 and 115 are clamped together.
  • the second press-contact structure 116 has a skewer structure in which flywheel diodes 94, 95, 96, and 97 and cooling fins 117, 118, 119, 120, and 121 provided between them are fastened together. It has become.
  • the third pressure contact structure 122 includes a self-extinguishing semiconductor element 98, 99, 100 and 101 and a skewer in which cooling fins 123, 124, 125, 126 and 127 provided therebetween are fastened together. It has a mold structure.
  • the wiring 128 is a bus bar that electrically connects the cooling fin 108 attached to the cathode side of the clamp diode 102 and the cooling fin 106 attached to the emitter side of the self-extinguishing semiconductor element 90.
  • the wiring 129 is a bus bar that electrically connects the cooling fin 110 attached to the anode side of the clamp diode 103 and the cooling fin 112 attached to the emitter side of the self-extinguishing semiconductor element 92.
  • the wiring 130 is a bus bar that electrically connects the cooling fin 107 attached to the emitter side of the self-extinguishing semiconductor element 91 and the cooling fin 111 attached to the collector side of the self-extinguishing semiconductor element 92. .
  • Wirings 131, 132, 133, 134, and 135 are transition wirings between the self-extinguishing semiconductor element and the flywheel diode, and the wiring 131 is connected to the cooling fin 105 attached to the collector side of the self-extinguishing semiconductor element 90 and fly
  • the wiring 132 includes the cooling fin 106 attached to the collector side of the self-extinguishing semiconductor element 91 and the cooling fin 118 attached to the cathode side of the flywheel diode 95
  • the wiring 133 is the cooling fin 119 attached to the cathode side of the wiring 130 and the flywheel diode 96
  • the wiring 134 is the cooling fin 112 attached to the collector side of the self-extinguishing semiconductor element 93 and the cathode side of the flywheel diode 97.
  • the attached cooling fin 120 and wiring 135 are connected to the cooling fin 113 and the fin attached to the emitter side of the self-extinguishing semiconductor element 93.
  • This is a bus bar for electrically connecting the cooling fins 121 attached to the anode side of the Li-wheel diode 97, respectively.
  • the wirings 136, 137, 138, 139, and 140 are connected between the self-extinguishing semiconductor element constituting the second pressure contact structure 116 and the self-extinguishing semiconductor element constituting the third pressure contact structure 122.
  • the wiring 136 is a cooling fin 117 attached to the cathode side of the flywheel diode 94 and the cooling fin 123 attached to the collector side of the self-extinguishing semiconductor element 98
  • the wiring 137 is the cathode of the flywheel diode 95.
  • the cooling fin 118 attached to the side, the cooling fin 124 attached to the collector side of the self-extinguishing semiconductor element 99, and the wiring 138 are the cooling fin 119 attached to the cathode side of the flywheel diode 96 and the self-extinguishing semiconductor.
  • the cooling fin 125 attached to the collector side of the element 100 and the wiring 139 are the cooling fin 120 attached to the cathode side of the flywheel diode 97 and the self-extinguishing semiconductor element 1
  • the cooling fin 126 attached to the collector side of 01 and the wiring 140 are the cooling fin 121 attached to the anode side of the flywheel diode 97 and the cooling fin 127 attached to the emitter side of the self-extinguishing semiconductor element 101, respectively. It is a bus bar that is electrically connected.
  • Fig. 6-1 and Fig. 6-2 show the current path that flows when the inverter is operated in the configuration where the third pressure contact structure is connected.
  • 6-1 (b) a clamp diode, a path through the self-extinguishing semiconductor element to the output terminal OUT, and a flywheel diode from the negative potential N shown in FIG. 6-1 (c).
  • the clamp diode 102 and the self-extinguishing semiconductor element 91 are passed from the intermediate potential C to the output terminal OUT and the intermediate potential C to the clamp diode 102 and the self-extinguishing semiconductor.
  • the length of the path flowing through the element 99 to the output terminal OUT is different, and an imbalance occurs due to the wiring of the current passing through the first and second parallels.
  • both ends of the fin are deformed toward the smaller diameter of the electrode to be pressed and the thermal resistance and contact resistance around the electrode are increased.
  • the entire apparatus can be reduced in size. Further, the pressure difference on the contact surface due to the difference in the tip shape and electrode diameter of the pressure contact structure can be reduced.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Inverter Devices (AREA)

Abstract

Provided is a power conversion apparatus, which has a reduced size, and which is capable of suppressing contact thermal resistance and current concentration. Self-arc-extinguishing semiconductor elements (2, 3, 4, 5) are connected in series between a positive potential (P) and a negative potential (N), flywheel diodes (6, 7, 8, 9) are connected corresponding to the self-arc-extinguishing semiconductor elements (2, 3, 4, 5), respectively, an intermediate potential (N) is connected to the self-arc-extinguishing semiconductor elements (2, 3, 4, 5) via clamp diodes (10, 11), the self-arc-extinguishing semiconductor elements (2, 3, 4, 5) are connected by means of insulation displacement connection by being disposed in series, the flywheel diodes (6, 7) and the intermediate potential (N) are disposed in series, and the clamp diodes (10, 11) and flywheel diodes (8, 9) are disposed in series.

Description

電力変換装置Power converter
 本発明は、電力変換装置に係り、特に、IGBT(絶縁ゲートバイポーラトランジスタ)などの自己消弧型半導体素子の適用に好適な電力変換装置に関する。
 
The present invention relates to a power conversion device, and more particularly to a power conversion device suitable for application of a self-extinguishing semiconductor element such as an IGBT (insulated gate bipolar transistor).
 近年、電力制御の分野では、直流を交流に/交流を直流に変換する電力変換装置(インバータ装置)が多く用いられるようになってきた。このインバータ装置のなかでは、大容量インバータ装置の代表的な回路として、例えば、3レベルインバータ装置があげられる。3レベルインバータ装置は、3つの電位即ち正電位P、負電位N及び中間の電位Cを有する直流電圧回路と、これらの正電位P、負電位N及び中間電位Cを出力することができる3レベルインバータブリッジとを有するインバータ装置である。 In recent years, in the field of power control, power converters (inverter devices) that convert DC to AC / AC to DC have come to be used. Among these inverter devices, for example, a three-level inverter device is given as a typical circuit of a large capacity inverter device. The three-level inverter device is a DC voltage circuit having three potentials, that is, a positive potential P, a negative potential N, and an intermediate potential C, and three levels that can output the positive potential P, the negative potential N, and the intermediate potential C. An inverter device having an inverter bridge.
 大容量のインバータ装置を構成するために適用された自己消弧型半導体素子は例えばGTO(ゲートターンオフサイリスタ)等の所謂電流駆動型素子が主流であったが、最近になって電圧駆動型素子であるIGBT(絶縁ゲート型バイポーラトランジスタ)やIEGT(注入促進型ゲートトランジスタ)の大容量化が進み、これらが適用されるようになってきた。 As the self-extinguishing type semiconductor element applied to construct a large capacity inverter device, for example, a so-called current driven type element such as a GTO (gate turn-off thyristor) has been mainly used. Increasing the capacity of certain IGBTs (Insulated Gate Bipolar Transistors) and IEGTs (Injection-Promoting Gate Transistors) has been applied.
 大容量のIGBT(絶縁ゲート型バイポーラトランジスタ)やIEGT(注入促進型ゲートトランジスタ)では、電圧駆動型素子の特徴として複数個の半導体チップをパッケージ内部で並列接続するようにした所謂マルチチップ構成が多く採用される。このパッケージとしては、平型の金属容器に半導体チップを配列して圧力を両側から加えることによって均一な並列回路を実現するようにした圧接型が実用化されている。 Large-capacity IGBTs (Insulated Gate Bipolar Transistors) and IEGTs (Injection-Promoting Gate Transistors) have many so-called multichip configurations in which multiple semiconductor chips are connected in parallel inside the package as a feature of voltage-driven elements. Adopted. As this package, a pressure contact type in which semiconductor chips are arranged in a flat metal container and pressure is applied from both sides to realize a uniform parallel circuit has been put into practical use.
 インバータ装置に用いられる自己消弧型半導体素子は、誘導性負荷等に対して還流路を確保するために自己消弧型半導体素子に逆並列にフライホイールダイオードが接続される。このフライホイールダイオードは、上述のパッケージ内部に自己消弧型半導体チップと共に収容して複合素子とすることが多い。すなわち、上述のパッケージ内部に、フライホイールダイオードチップと、自己消弧型半導体チップを平型の金属容器に配列している。このような技術は、例えば、特許文献1に記載されている。
In the self-extinguishing semiconductor element used in the inverter device, a flywheel diode is connected in antiparallel to the self-extinguishing semiconductor element in order to secure a return path for an inductive load or the like. This flywheel diode is often housed in a package together with a self-extinguishing semiconductor chip to form a composite element. That is, a flywheel diode chip and a self-extinguishing semiconductor chip are arranged in a flat metal container inside the above-described package. Such a technique is described in Patent Document 1, for example.
特開2001-78467号公報JP 2001-78467 A 特開2006-158107号公報JP 2006-158107 A
 上記の従来技術では、一つのパッケージ内部に自己消弧型半導体チップと共にフライホイールダイオードチップを収容して複合素子としており、一般的にチップ構造がIGBT等の自己消弧型半導体チップではメサ構造であり、ダイオードではチップ構造がフラット構造であるため、圧接する電極径が同じでもチップ表面と電極との間に圧力差が生じてしまう。 In the above prior art, a flywheel diode chip is housed in a single package together with a self-extinguishing semiconductor chip to form a composite element. Generally, a chip structure is a mesa structure in a self-extinguishing semiconductor chip such as an IGBT. In addition, since the chip structure of the diode is a flat structure, a pressure difference is generated between the chip surface and the electrode even if the diameter of the electrode to be pressed is the same.
 一方、フライホイールダイオードを別パッケージに収納した素子も実用化されている。このような技術は、例えば、特許文献2に記載されている。この技術では、パッケージに収納されている自己消弧型半導体素子とフライホイールダイオード素子とを用いてインバータ装置を構成するものの、クランプダイオードと自己消弧型半導体素子が直列的に配置されており、一般的には圧接する半導体パッケージ内のダイオードチップのチップ数と自己消弧型半導体素子のチップ数が異なるものであり、これらの圧接構造体の径を必要最小限の径にすることができずに、大型化が避けられないという問題が生じる。また、異径の半導体パッケージで構成されると、小さい径の半導体パッケージに対して大きい径の半導体パッケージの面圧が低下し、径の大きな半導体パッケージで構成された側で接触熱抵抗の増加と電流集中を招いてしまうという問題が生じる。 On the other hand, an element in which a flywheel diode is housed in a separate package has been put into practical use. Such a technique is described in Patent Document 2, for example. In this technology, an inverter device is configured using a self-extinguishing semiconductor element and a flywheel diode element housed in a package, but the clamp diode and the self-extinguishing semiconductor element are arranged in series. Generally, the number of diode chips in the semiconductor package to be in pressure contact is different from the number of chips in the self-extinguishing semiconductor element, and the diameter of these pressure contact structures cannot be reduced to the minimum necessary diameter. In addition, there arises a problem that enlargement is inevitable. In addition, when the semiconductor package is configured with different diameters, the surface pressure of the large-diameter semiconductor package is reduced with respect to the small-diameter semiconductor package, and the contact thermal resistance is increased on the side formed with the large-diameter semiconductor package. There arises a problem of current concentration.
 本発明は上記に鑑みて為されたもので、本発明の目的とするところは、小型が可能で、接触熱抵抗と電流集中の抑制が可能な電力変換装置を提供することにある。
The present invention has been made in view of the above, and an object of the present invention is to provide a power converter that can be reduced in size and can suppress contact thermal resistance and current concentration.
 上記目的を達成するために、本発明では、一方側端子と他方側端子の間に直列接続された第1の半導体素子、第2の半導体素子、第3の半導体素子及び第4の半導体素子と、前記第1の半導体素子、第2の半導体素子、第3の半導体素子及び第4の半導体素子の各々に対応して設けられた第1のフライホイールダイオード、第2のフライホイールダイオード、第3のフライホイールダイオード及び第4のフライホイールダイオードと、前記第1の半導体素子と前記第2の半導体素子との接続部と前記一方側端子と他方側端子の間の電位である中間電位端子とを接続する第1のクランプダイオード、及び前記第3の半導体素子と前記第4の半導体素子との接続部と前記中間電位端子とを接続する第2のクランプダイオードを有し、前記第1の半導体素子、前記第2の半導体素子、前記第3の半導体素子及び前記第4の半導体素子は、直列的な配置による圧接接続で接続され、前記第1のフライホイールダイオード、前記第2のフライホイールダイオード、前記第1のクランプダイオード、前記第2のクランプダイオード、前記第3のフライホイールダイオード及び前記第4のフライホイールダイオードは直列的な配置がなされることにより、前記第1のフライホイールダイオードと前記第2のフライホイールダイオードは圧接により接続され、前記第1のクランプダイオード及び前記第2のクランプダイオードは圧接により接続され、前記第3のフライホイールダイオードと前記第4のフライホイールダイオードは圧接により接続される構成とした。
In order to achieve the above object, in the present invention, a first semiconductor element, a second semiconductor element, a third semiconductor element, and a fourth semiconductor element connected in series between one terminal and the other terminal; , A first flywheel diode, a second flywheel diode, a third flywheel diode provided corresponding to each of the first semiconductor element, the second semiconductor element, the third semiconductor element, and the fourth semiconductor element, A flywheel diode and a fourth flywheel diode, a connection portion between the first semiconductor element and the second semiconductor element, and an intermediate potential terminal which is a potential between the one side terminal and the other side terminal. A first clamp diode to be connected; and a second clamp diode for connecting a connection portion between the third semiconductor element and the fourth semiconductor element and the intermediate potential terminal; The body element, the second semiconductor element, the third semiconductor element, and the fourth semiconductor element are connected by a pressure contact connection in a serial arrangement, and the first flywheel diode and the second flywheel The diode, the first clamp diode, the second clamp diode, the third flywheel diode, and the fourth flywheel diode are arranged in series so that the first flywheel diode The second flywheel diode is connected by pressure contact, the first clamp diode and the second clamp diode are connected by pressure contact, and the third flywheel diode and the fourth flywheel diode are connected by pressure contact. It was set as the structure connected.
 本発明によれば、小型が可能で、且つ、接触熱抵抗と電流集中の抑制が可能となる。
According to the present invention, miniaturization is possible, and contact thermal resistance and current concentration can be suppressed.
本発明の実施例1に係るインバータ装置の回路構成とインバータブリッジ1相分の構造図である。BRIEF DESCRIPTION OF THE DRAWINGS It is a circuit diagram of the inverter apparatus which concerns on Example 1 of this invention, and the structure figure for 1 phase of inverter bridges. 本発明の実施例1に係るインバータ装置の効果を示すための説明図である。It is explanatory drawing for showing the effect of the inverter apparatus which concerns on Example 1 of this invention. インバータ装置の回路構成とインバータブリッジ1相分の構造図である。It is a circuit diagram of an inverter device and a structural diagram for one phase of an inverter bridge. 本発明に係るインバータブリッジ1相分の電流経路説明図(a~c)である。FIG. 6 is an explanatory diagram (a to c) of current paths for one phase of the inverter bridge according to the present invention. 本発明に係るインバータブリッジ1相分の電流経路説明図(d~f)である。FIG. 6 is an explanatory diagram (d to f) of current paths for one phase of the inverter bridge according to the present invention. 2並列構成とした場合のインバータブリッジ1相分の構造図である。It is a structural diagram for one phase of the inverter bridge in the case of a two-parallel configuration. 2並列構成とした場合のインバータブリッジ1相分の電流経路説明図(a~c)である。FIG. 6 is an explanatory diagram (a to c) of current paths for one phase of an inverter bridge when a two-parallel configuration is adopted. 2並列構成とした場合のインバータブリッジ1相分の電流経路説明図(d~f)である。FIG. 6 is an explanatory diagram (d to f) of current paths for one phase of an inverter bridge when a two-parallel configuration is adopted.
 以下、図面に基づいてこの発明における実施例を説明する。 Hereinafter, embodiments of the present invention will be described with reference to the drawings.
 図1は本発明の実施例1に係る電力変換装置の構成図である。図1(a)は本発明のインバータ装置の回路構成を示すものであり、図1(b)は本発明に係るインバータ装置のインバータブリッジ1相分の構造図を簡易的に示したものである。尚、図1(a)及び図1(b)においては、簡単のためインバータ1相分についてのみの回路構成及び構造を示している。例えば、直流を3相交流に変換するものである場合には、正電位P、負電位Nの間に、フライホイールダイオード6、7、8及び9が夫々逆並列に接続される自己消弧型半導体素子2、3、4及び5の直列回路の組が図示される組の他に2組が接続され、さらに、中間の電位Cと自己消弧型半導体素子2、3、4及び5を接続するクランプダイオード10、11が同様に2組が接続される。 FIG. 1 is a configuration diagram of a power conversion apparatus according to Embodiment 1 of the present invention. FIG. 1 (a) shows a circuit configuration of the inverter device of the present invention, and FIG. 1 (b) simply shows a structural diagram of one phase of the inverter bridge of the inverter device according to the present invention. . 1A and 1B show a circuit configuration and a structure only for one phase of the inverter for simplicity. For example, in the case of converting DC to three-phase AC, a self-extinguishing type in which flywheel diodes 6, 7, 8 and 9 are connected in reverse parallel between a positive potential P and a negative potential N, respectively. In addition to the illustrated set of series circuits of semiconductor elements 2, 3, 4 and 5, two sets are connected, and an intermediate potential C and self- extinguishing semiconductor elements 2, 3, 4 and 5 are connected. Two sets of clamp diodes 10 and 11 are connected in the same manner.
 図1(a)において、直流電圧回路1は正電位P、負電位N及び中間の電位Cを持ち、この直流電圧回路1と並列に自己消弧型半導体素子2、3、4及び5の直列回路が接続されている。また、自己消弧型半導体素子2、3、4及び5にはフライホイールダイオード6、7、8及び9が夫々逆並列に接続されている。クランプダイオード10は、直流電圧回路1の電位Cの端子から直列接続された自己消弧型半導体素子2及び3の接続点に向けて電流を流す方向に接続され、またクランプダイオード11は、直列接続された自己消弧型半導体素子4及び5の接続点から直流電圧回路1の電位Cの端子に向けて電流を流す方向に接続されている。尚、OUTは図示しない負荷に接続される出力端子である。 In FIG. 1A, a DC voltage circuit 1 has a positive potential P, a negative potential N, and an intermediate potential C, and a series of self- extinguishing semiconductor elements 2, 3, 4 and 5 in parallel with the DC voltage circuit 1. The circuit is connected. Further, flywheel diodes 6, 7, 8, and 9 are connected in antiparallel to the self-extinguishing semiconductor elements 2, 3, 4, and 5, respectively. The clamp diode 10 is connected in a direction in which a current flows from the terminal of the potential C of the DC voltage circuit 1 toward the connection point of the self- extinguishing semiconductor elements 2 and 3 connected in series, and the clamp diode 11 is connected in series The self- extinguishing semiconductor elements 4 and 5 are connected in a direction in which a current flows from the connection point of the self- extinguishing semiconductor elements 4 and 5 toward the terminal of the potential C of the DC voltage circuit 1. OUT is an output terminal connected to a load (not shown).
 ここで、自己消弧型半導体素子2、3、4及び5は、各々半導体パッケージで構成される。この半導体パッケージは、平型の金属容器の中に半導体チップ(IGBTチップ)を配列して構成され、圧力を両側から加えることによって均一な接続回路を実現するようになっている。フライホイールダイオード6、7、8及び9、クランプダイオード10、11も同様に、平型の金属容器の中にダイオードチップを配列して構成され、圧力を両側から加えることによって、所定の2つの回路がそれぞれ均一な接続回路を実現するようになっている。 Here, the self- extinguishing semiconductor elements 2, 3, 4 and 5 are each constituted by a semiconductor package. This semiconductor package is configured by arranging semiconductor chips (IGBT chips) in a flat metal container, and a uniform connection circuit is realized by applying pressure from both sides. Similarly, the flywheel diodes 6, 7, 8, and 9 and the clamp diodes 10 and 11 are configured by arranging diode chips in a flat metal container, and two predetermined circuits are applied by applying pressure from both sides. Are designed to realize a uniform connection circuit.
 次に、図1(b)において、第1の圧接構造体12はフライホイールダイオード6、7、8及び9と並びにクランプダイオード10及び11の6個の半導体パッケージを積み重ねて構成され、各半導体パッケージの間に各々介装された冷却フィン13、14、15、16、17、18、19、20及び21と、絶縁物22及び23を共締めする串型の構造となっている。 Next, in FIG. 1B, the first pressure contact structure 12 is formed by stacking six semiconductor packages of flywheel diodes 6, 7, 8, and 9 and clamp diodes 10 and 11, and each semiconductor package. Each of the cooling fins 13, 14, 15, 16, 17, 18, 19, 20, and 21 and the insulators 22 and 23 that are interposed between the insulators 22 and 23 is a skewer structure.
 また、第2の圧接構造体24は、自己消弧型半導体素子2、3、4及び5と、各々の間に設けられた冷却フィン25、26、27、28及び29とを共締めした串型の構造となっている。 The second press-contact structure 24 includes a self-extinguishing type semiconductor element 2, 3, 4 and 5 and a skewer in which cooling fins 25, 26, 27, 28 and 29 provided between them are fastened together. It has a mold structure.
 配線30はクランプダイオード10のカソード側に取り付けられた冷却フィン16とフライホイールダイオード7のカソード側に取り付けられた冷却フィン14とを電気的に接続するブスバーである。同様に配線31はクランプダイオード11のアノード側に取り付けられた冷却フィン18とフライホイールダイオード8のアノード側に取り付けられた冷却フィン20とを電気的に接続するブスバーである。また、配線32はフライホイールダイオード7のアノード側に取り付けられた冷却フィン15とフライホイールダイオード8のカソード側に取り付けられた冷却フィン19とを電気的に接続するブスバーである。 The wiring 30 is a bus bar that electrically connects the cooling fin 16 attached to the cathode side of the clamp diode 10 and the cooling fin 14 attached to the cathode side of the flywheel diode 7. Similarly, the wiring 31 is a bus bar that electrically connects the cooling fin 18 attached to the anode side of the clamp diode 11 and the cooling fin 20 attached to the anode side of the flywheel diode 8. The wiring 32 is a bus bar that electrically connects the cooling fin 15 attached to the anode side of the flywheel diode 7 and the cooling fin 19 attached to the cathode side of the flywheel diode 8.
 配線33、34、35、36及び37は自己消弧型半導体素子とフライホイールダイオードとの渡り配線であり、配線33は自己消弧型半導体素子2のコレクタ側に取り付けられた冷却フィン25とフライホイールダイオード6のカソード側に取り付けられた冷却フィン13、配線34は自己消弧型半導体素子3のコレクタ側に取り付けられた冷却フィン26とフライホイールダイオード7のカソード側に取り付けられた冷却フィン14、配線35は配線32と自己消弧型半導体素子4のコレクタ側に取り付けられた冷却フィン27、配線36は自己消弧型半導体素子5のコレクタ側に取り付けられた冷却フィン28とフライホイールダイオード9のカソード側に取り付けられた冷却フィン20、配線37は自己消弧型半導体素子5のエミッタ側に取り付けられた冷却フィン29とフライホイールダイオード9のアノード側に取り付けられた冷却フィン21とを夫々電気的に接続するブスバーである。尚、以上の配線30乃至37については、その相当部分が図1(a)に図示されている。 Wirings 33, 34, 35, 36, and 37 are connection wirings between the self-extinguishing semiconductor element and the flywheel diode, and the wiring 33 is connected to the cooling fin 25 attached to the collector side of the self-extinguishing semiconductor element 2 and the flywheel diode. The cooling fin 13 attached to the cathode side of the wheel diode 6 and the wiring 34 are the cooling fin 26 attached to the collector side of the self-extinguishing semiconductor element 3 and the cooling fin 14 attached to the cathode side of the flywheel diode 7. The wiring 35 is the cooling fin 27 attached to the collector side of the wiring 32 and the self-extinguishing semiconductor element 4, and the wiring 36 is the cooling fin 28 attached to the collector side of the self-extinguishing semiconductor element 5 and the flywheel diode 9. The cooling fin 20 attached to the cathode side and the wiring 37 are the cooling fin 29 attached to the emitter side of the self-extinguishing semiconductor element 5 and the flywheel diode. 9 is a bus bar that electrically connects the cooling fins 21 attached to the anode side of each of the nine. Note that the corresponding portions of the wirings 30 to 37 are shown in FIG.
 ここで、第1の圧接構造体12はダイオードのみで構成し、第2の圧接構造体24は自己消弧型半導体素子のみで構成する。例えば、第1の圧接構造体12において、冷却フィン13と冷却フィン21を各々外側から押圧することで第1の圧接構造体12を構成するフライホイールダイオード6、7の電気的接続を確保し、クランプダイオード10、11の電気的接続を確保し、フライホイールダイオード8、9の電気的接続を確保する。同様に、第2の圧接構造体24において、冷却フィン25と冷却フィン29を各々外側から押圧することで第2の圧接構造体24を構成する自己消弧型半導体素子2、3、4及び5の各々の電気的接続を確保する。 Here, the first pressure contact structure 12 is composed of only a diode, and the second pressure contact structure 24 is composed of only a self-extinguishing semiconductor element. For example, in the first pressure contact structure 12, the electrical connection of the flywheel diodes 6 and 7 constituting the first pressure contact structure 12 is ensured by pressing the cooling fins 13 and the cooling fins 21 from the outside, respectively. The electrical connection of the clamp diodes 10 and 11 is secured, and the electrical connection of the flywheel diodes 8 and 9 is secured. Similarly, in the second press-contact structure 24, the self-extinguishing semiconductor elements 2, 3, 4 and 5 constituting the second press-contact structure 24 by pressing the cooling fin 25 and the cooling fin 29 from the outside respectively. Ensure each electrical connection.
 このような構成にすることで、圧接する半導体パッケージ内のダイオードのチップ数と自己消弧型半導体素子のチップ数が異なる場合でも、第1の圧接構造体と第2の圧接構造体の径を必要最小限の径にすることができ、小型化が図れる。例えば、ダイオードの1チップ当たりの許容電流が100 Aで、自己消弧型半導体素子の1チップ当たりの許容電流が50 Aの場合、ダイオードの半導体パッケージに必要なチップ数は自己消弧型半導体素子の半分で良い。従って、ダイオードの半導体パッケージの圧接面に垂直な面積は自己消弧型半導体素子の半分で良いため、図2に示すようにインバータの小型化が可能となる。この時、異径の半導体パッケージで構成された圧接構造体では、小さい径の半導体パッケージに対して大きい径の半導体パッケージの面圧が低下し、径の大きな半導体パッケージで構成されたダイオードの接触熱抵抗の増加と電流集中を招いてしまう。従って、圧接構造体を構成する半導体パッケージは同径である必要がある。 With this configuration, even when the number of diode chips and the number of self-extinguishing semiconductor elements in the semiconductor package to be pressed are different, the diameters of the first pressure contact structure and the second pressure contact structure are reduced. The diameter can be reduced to the minimum necessary, and the size can be reduced. For example, if the allowable current per chip of the diode is 100 A and the allowable current per chip of the self-extinguishing semiconductor device is 50 A, the number of chips required for the diode semiconductor package is the self-extinguishing semiconductor device. Half of it is good. Accordingly, since the area perpendicular to the pressure contact surface of the semiconductor package of the diode may be half that of the self-extinguishing semiconductor element, the size of the inverter can be reduced as shown in FIG. At this time, in the pressure contact structure constituted by semiconductor packages having different diameters, the contact pressure of the diode constituted by the semiconductor package having a large diameter decreases due to a decrease in the surface pressure of the semiconductor package having a large diameter relative to the semiconductor package having a small diameter. This leads to an increase in resistance and current concentration. Therefore, the semiconductor package constituting the pressure contact structure must have the same diameter.
 図3に実施例2に係る電力変換装置の構成図を示す。図3(a)は本発明のインバータ装置の回路構成を示すものであり、図3(b)は本発明に係るインバータ装置のインバータブリッジ1相分の構造図を簡易的に示したものである。尚、図3(a)及び図3(b)においては、簡単のためインバータ1相分についてのみの回路構成及び構造を示している。 FIG. 3 shows a configuration diagram of the power conversion apparatus according to the second embodiment. FIG. 3 (a) shows the circuit configuration of the inverter device of the present invention, and FIG. 3 (b) simply shows the structural diagram of one phase of the inverter bridge of the inverter device according to the present invention. . 3A and 3B show a circuit configuration and a structure only for one phase of the inverter for simplicity.
 図3(a)において、直流電圧回路38は正電位P、負電位N及び中間の電位Cを持ち、この直流電圧回路38と逆並列にフライホイールダイオード39、40、41及び42が接続されている。また、フライホイールダイオード39、40、41及び42には自己消弧型半導体素子43、44、45及び46の直列回路が夫々接続されている。さらに、自己消弧型半導体素子43、44、45及び46には自己消弧型半導体素子47、48、49及び50が並列に接続されている。クランプダイオード51は、直流電圧回路38の電位Cの端子から接続されたフライホイールダイオード39及び40の接続点に向けて電流を流す方向に接続され、またクランプダイオード52は、接続されたフライホイールダイオード41及び42の接続点から直流電圧回路38の電位Cの端子に向けて電流を流す方向に接続されている。尚、OUTは図示しない負荷に接続される出力端子である。次に、図3(b)において、第1の圧接構造体53はフライホイールダイオード39、40、41及び42と並びにクランプダイオード51及び52の6個の半導体パッケージを積み重ねて構成され、各半導体パッケージの間に各々介装された冷却フィン54、55、56、57、58、59、60、61及び62と、絶縁物63及び64を共締めする串型の構造となっている。 In FIG. 3A, the DC voltage circuit 38 has a positive potential P, a negative potential N, and an intermediate potential C, and flywheel diodes 39, 40, 41, and 42 are connected in reverse parallel to the DC voltage circuit 38. Yes. In addition, series circuits of self-extinguishing semiconductor elements 43, 44, 45 and 46 are connected to the flywheel diodes 39, 40, 41 and 42, respectively. Further, self-extinguishing semiconductor elements 47, 48, 49 and 50 are connected in parallel to the self-extinguishing semiconductor elements 43, 44, 45 and 46. The clamp diode 51 is connected in a direction in which a current flows from the terminal of the potential C of the DC voltage circuit 38 toward the connection point of the flywheel diodes 39 and 40, and the clamp diode 52 is connected to the flywheel diode connected thereto. They are connected in a direction in which current flows from the connection point of 41 and 42 toward the terminal of the potential C of the DC voltage circuit 38. OUT is an output terminal connected to a load (not shown). Next, in FIG. 3B, the first pressure contact structure 53 is configured by stacking six semiconductor packages of flywheel diodes 39, 40, 41 and 42 and clamp diodes 51 and 52, and each semiconductor package. The cooling fins 54, 55, 56, 57, 58, 59, 60, 61, and 62, and the insulators 63 and 64, which are interposed between the two, are skewered.
 また、第2の圧接構造体65は、自己消弧型半導体素子43、44、45及び46と、各々の間に設けられた冷却フィン66、67、68、69及び70とを共締めした串型の構造となっている。 The second press-contact structure 65 includes a self-extinguishing type semiconductor element 43, 44, 45 and 46 and a skewer in which cooling fins 66, 67, 68, 69 and 70 provided between them are fastened together. It has a mold structure.
 さらに、第3の圧接構造体71は、自己消弧型半導体素子47、48、49及び50と、各々の間に設けられた冷却フィン72、73、74、75及び76とを共締めした串型の構造となっている。 Further, the third press-contact structure 71 includes a skewer in which self-extinguishing semiconductor elements 47, 48, 49, and 50 and cooling fins 72, 73, 74, 75, and 76 provided therebetween are fastened together. It has a mold structure.
 配線77はクランプダイオード51のカソード側に取り付けられた冷却フィン57とフライホイールダイオード40のカソード側に取り付けられた冷却フィン55とを電気的に接続するブスバーである。同様に配線78はクランプダイオード52のアノード側に取り付けられた冷却フィン59とフライホイールダイオード41のアノード側に取り付けられた冷却フィン61とを電気的に接続するブスバーである。また、配線79はフライホイールダイオード40のアノード側に取り付けられた冷却フィン56とフライホイールダイオード41のカソード側に取り付けられた冷却フィン60とを電気的に接続するブスバーである。 The wiring 77 is a bus bar that electrically connects the cooling fin 57 attached to the cathode side of the clamp diode 51 and the cooling fin 55 attached to the cathode side of the flywheel diode 40. Similarly, the wiring 78 is a bus bar that electrically connects the cooling fin 59 attached to the anode side of the clamp diode 52 and the cooling fin 61 attached to the anode side of the flywheel diode 41. The wiring 79 is a bus bar that electrically connects the cooling fin 56 attached to the anode side of the flywheel diode 40 and the cooling fin 60 attached to the cathode side of the flywheel diode 41.
 配線80、81、82、83及び84は自己消弧型半導体素子とフライホイールダイオードとの渡り配線であり、配線80は自己消弧型半導体素子43のコレクタ側に取り付けられた冷却フィン66とフライホイールダイオード39のカソード側に取り付けられた冷却フィン54、配線81は自己消弧型半導体素子44のコレクタ側に取り付けられた冷却フィン67とフライホイールダイオード40のカソード側に取り付けられた冷却フィン55、配線82は配線79と自己消弧型半導体素子45のコレクタ側に取り付けられた冷却フィン68、配線83は自己消弧型半導体素子46のコレクタ側に取り付けられた冷却フィン69とフライホイールダイオード42のカソード側に取り付けられた冷却フィン61、配線84は自己消弧型半導体素子46のエミッタ側に取り付けられた冷却フィン70とフライホイールダイオード42のアノード側に取り付けられた冷却フィン62とを夫々電気的に接続するブスバーである。 Wirings 80, 81, 82, 83, and 84 are transition wirings between the self-extinguishing semiconductor element and the flywheel diode, and the wiring 80 is connected to the cooling fin 66 attached to the collector side of the self-extinguishing semiconductor element 43 and the flywheel diode. The cooling fin 54 attached to the cathode side of the wheel diode 39, the wiring 81 is a cooling fin 67 attached to the collector side of the self-extinguishing semiconductor element 44, and the cooling fin 55 attached to the cathode side of the flywheel diode 40, The wiring 82 is the cooling fin 68 attached to the collector side of the wiring 79 and the self-extinguishing semiconductor element 45, and the wiring 83 is the cooling fin 69 attached to the collector side of the self-extinguishing semiconductor element 46 and the flywheel diode 42. The cooling fin 61 and wiring 84 attached to the cathode side are connected to the cooling fin 70 and flywheel die attached to the emitter side of the self-extinguishing semiconductor element 46. A bus bar for connecting the cooling fins 62 attached to the anode side of the over de 42 respectively electrically.
 配線85、86、87、88及び89は第2の圧接構造体65を構成している自己消弧型半導体素子と第3の圧接構造体71を構成している自己消弧型半導体素子との渡り配線であり、配線85は自己消弧型半導体素子43のコレクタ側に取り付けられた冷却フィン66と自己消弧型半導体素子47のコレクタ側に取り付けられた冷却フィン72、配線86は自己消弧型半導体素子44のコレクタ側に取り付けられた冷却フィン67と自己消弧型半導体素子48のコレクタ側に取り付けられた冷却フィン73、配線87は自己消弧型半導体素子45のコレクタ側に取り付けられた冷却フィン68と自己消弧型半導体素子49のコレクタ側に取り付けられた冷却フィン74、配線88は自己消弧型半導体素子46のコレクタ側に取り付けられた冷却フィン69と自己消弧型半導体素子50のコレクタ側に取り付けられた冷却フィン75、配線89は自己消弧型半導体素子46のエミッタ側に取り付けられた冷却フィン70と自己消弧型半導体素子50のエミッタ側に取り付けられた冷却フィン76とを夫々電気的に接続するブスバーである。尚、以上の配線77乃至89については、その相当部分が図1(a)に図示されている。 The wirings 85, 86, 87, 88 and 89 are connected between the self-extinguishing semiconductor element constituting the second pressure contact structure 65 and the self-extinguishing semiconductor element constituting the third pressure contact structure 71. Wiring 85 is a cooling fin 66 attached to the collector side of self-extinguishing semiconductor element 43, cooling fin 72 attached to the collector side of self-extinguishing semiconductor element 47, and wiring 86 is self-extinguishing. The cooling fin 67 attached to the collector side of the type semiconductor element 44, the cooling fin 73 attached to the collector side of the self-extinguishing type semiconductor element 48, and the wiring 87 were attached to the collector side of the self-extinguishing type semiconductor element 45. The cooling fins 68 and the cooling fins 74 attached to the collector side of the self-extinguishing semiconductor element 49 and the wiring 88 are the cooling fins 69 and the self-extinguishing semiconductor element 50 attached to the collector side of the self-extinguishing semiconductor element 46. Mounted on the collector side of The cooling fin 75 and the wiring 89 electrically connect the cooling fin 70 attached to the emitter side of the self-extinguishing semiconductor element 46 and the cooling fin 76 attached to the emitter side of the self-extinguishing semiconductor element 50, respectively. Busbar. Incidentally, the corresponding portions of the wirings 77 to 89 are shown in FIG.
 ここで、第1の圧接構造体53はダイオードのみで構成し、第2の圧接構造体65と第3の圧接構造体71は自己消弧型半導体素子のみで構成する。このような構成にすることで、並列する自己消弧型半導体素子が多くのBUSやコンデンサを介することなく近傍に位置しているため、回路のインダクタンスのばらつきによる電流のアンバランスが原因で、横流や電流集中による発熱、サージ電圧による半導体チップの破損が発生するのを抑制できる。さらに、1ユニット当たりの容量密度(VA/m3)を大きくすることが可能、かつ圧接構造体が1つ増加するだけであるため、装置全体が大型化せず、装置全体の容量密度(VA/m3)を増加することが可能となる。 Here, the first pressure contact structure 53 is composed of only a diode, and the second pressure contact structure 65 and the third pressure contact structure 71 are composed of only a self-extinguishing semiconductor element. With such a configuration, the parallel self-extinguishing semiconductor elements are located in the vicinity without many BUSs and capacitors, so the current flow is imbalanced due to variations in circuit inductance. Further, it is possible to suppress the generation of heat due to current concentration and the damage of the semiconductor chip due to the surge voltage. Furthermore, since the capacity density per unit (VA / m 3 ) can be increased and only one press-contact structure is added, the entire apparatus is not enlarged, and the capacity density (VA) of the entire apparatus is reduced. / m 3 ) can be increased.
 以下に、並列に自己消弧型半導体素子のみで構成された第3の圧接構造体を接続するよりも、提案する図3に示す構造の方が回路のインダクタンスのばらつきを小さくし、電流のアンバランスを抑制できる理由について図4-1、図4-2、図5、図6-1、図6-2を参照して説明する。 In the following, the proposed structure shown in FIG. 3 reduces the variation in the inductance of the circuit and reduces the current unintentional than connecting the third pressure contact structure composed only of the self-extinguishing semiconductor element in parallel. The reason why the balance can be suppressed will be described with reference to FIGS. 4-1, 4-2, 5, 6-1 and 6-2.
 まず、図4-1、図4-2の本発明の構造においてインバータ動作時に流れる電流経路を示す。電流経路は全部で6パターンとなり、図4-1(a)に示す正電位Pから自己消弧型半導体素子を通り出力端子OUTに流れる経路、図4-1(b)に示す中間の電位Cからクランプダイオード、自己消弧型半導体素子を通り出力端子OUTに流れる経路、図4-1(c)に示す負電位Nからフライホイールダイオードを通り出力端子OUTに流れる経路、図4-2(d)に示す出力端子OUTからフライホイールダイオードを通り負電位Pに流れる経路、図4-2(e)に示す出力端子OUTから自己消弧型半導体素子、クランプダイオードを通り中間の電位Cに流れる経路、図4-2(f)に示す出力端子OUTから自己消弧型半導体素子を通り負電位Nに流れる経路である。 First, the current path that flows when the inverter operates in the structure of the present invention shown in FIGS. 4-1 and 4-2 is shown. There are six current paths in total, a path from the positive potential P shown in FIG. 4-1 (a) through the self-extinguishing semiconductor element to the output terminal OUT, and an intermediate potential C shown in FIG. 4-1 (b). To the clamp diode, the path flowing through the self-extinguishing semiconductor element to the output terminal OUT, the path flowing from the negative potential N shown in FIG. 4-1 (c) to the output terminal OUT through the flywheel diode, FIG. ) From the output terminal OUT to the negative potential P through the flywheel diode, and the path from the output terminal OUT to the intermediate potential C through the self-extinguishing semiconductor element and the clamp diode as shown in FIG. FIG. 4B is a path that flows from the output terminal OUT to the negative potential N through the self-extinguishing semiconductor element.
 図4-1(a)において、正電位Pから自己消弧型半導体素子43、44を通り出力端子OUTに流れる経路と正電位Pから自己消弧型半導体素子47、48を通り出力端子OUTに流れる経路の長さは等しく1並列目と2並列目を通る電流の配線によるアンバランスは発生しにくい。 In FIG. 4A, the path from the positive potential P through the self-extinguishing semiconductor elements 43 and 44 to the output terminal OUT and the positive potential P through the self-extinguishing semiconductor elements 47 and 48 to the output terminal OUT. The lengths of the flow paths are equal, and imbalance due to the wiring of the current passing through the first parallel and the second parallel is unlikely to occur.
 また、図4-1(b)において、中間の電位Cからクランプダイオード51、自己消弧型半導体素子44を通り出力端子OUTに流れる経路と中間の電位Cからクランプダイオード51、自己消弧型半導体素子48を通り出力端子OUTに流れる経路の長さは等しく1並列目と2並列目を通る電流の配線によるアンバランスは発生しにくい。 In FIG. 4B, the clamp diode 51 from the intermediate potential C passes through the self-extinguishing semiconductor element 44 to the output terminal OUT and the clamp diode 51 from the intermediate potential C to the self-extinguishing semiconductor. The length of the path that passes through the element 48 and flows to the output terminal OUT is equal, and an imbalance due to current wiring passing through the first and second parallels is unlikely to occur.
 また、図4-2(e)において、出力端子OUTから自己消弧型半導体素子45、クランプダイオード52を通り中間の電位Cに流れる経路と出力端子OUTから自己消弧型半導体素子49、クランプダイオード52を通り中間の電位Cに流れる経路の長さは等しく1並列目と2並列目を通る電流の配線によるアンバランスは発生しにくい。 Further, in FIG. 4-2 (e), a path flowing from the output terminal OUT to the self-extinguishing semiconductor element 45 and the clamp diode 52 to the intermediate potential C and the self-extinguishing semiconductor element 49 and clamp diode from the output terminal OUT. The length of the path that passes through 52 and flows to the intermediate potential C is equal, and imbalance due to the wiring of the current passing through the first parallel and the second parallel is unlikely to occur.
 また、図4-2(f)において、出力端子OUTから自己消弧型半導体素子45、46を通り負電位Nに流れる経路と出力端子OUTから自己消弧型半導体素子49、50を通り負電位Nに流れる経路の長さは等しく1並列目と2並列目を通る電流の配線によるアンバランスは発生しにくい。 In FIG. 4-2 (f), the path from the output terminal OUT through the self-extinguishing semiconductor elements 45 and 46 to the negative potential N and the output terminal OUT through the self-extinguishing semiconductor elements 49 and 50 to the negative potential. The length of the path flowing through N is equal, and imbalance due to the wiring of the current passing through the first parallel and the second parallel is unlikely to occur.
 尚、図4-1(c)においては、共通のフライホイールダイオード41、42を通るため経路は一通りしかなく電流のアンバランスは発生し得ない。図4-2(d)においても同じように電流が共通のフライホイールダイオード39、40を通るため経路は一通りしかなく電流のアンバランスは発生しない。 In FIG. 4-1 (c), since the common flywheel diodes 41 and 42 are passed, there is only one path, and current imbalance cannot be generated. Similarly in FIG. 4D, since the current passes through the common flywheel diodes 39 and 40, there is only one path and no current imbalance occurs.
 次に、図5に第3の圧接構造体接続した構成図を示す。 Next, FIG. 5 shows a configuration diagram in which the third pressure contact structure is connected.
 図5 において、正電位Pと負電位Nに対して並列に自己消弧型半導体素子90、91、92 及び93の直列回路が接続されている。また、自己消弧型半導体素子90、91、92 及び93にはフライホイールダイオード94、95、96及び97が夫々逆並列に接続されている。さらに、フライホイールダイオード94、95、96及び97には自己消弧型半導体素子98、99、100及び101が並列に接続されている。クランプダイオード102は、電位Cの端子から直列接続された自己消弧型半導体素子90及び91の接続点に向けて電流を流す方向に接続され、またクランプダイオード103は、直列接続された自己消弧型半導体素子92及び93の接続点から電位Cの端子に向けて電流を流す方向に接続されている。尚、OUTは図示しない負荷に接続される出力端子である。さらに、第1の圧接構造体104は自己消弧型半導体素子90、91、92及び93並びにクランプダイオード102及び103の6 個の半導体パッケージを積み重ねて構成され、各半導体パッケージの間に各々介装された冷却フィン105、106、107、108、109、110、111、112及び113と、絶縁物114及び115を共締めする串型の構造となっている。 In FIG. 5A, a series circuit of self-extinguishing semiconductor elements 90, 91, 92A and 93 is connected in parallel to the positive potential P and the negative potential N. Further, flywheel diodes 94, 95, 96 and 97 are connected in antiparallel to the self-extinguishing semiconductor elements 90, 91, 92 and 93, respectively. Further, self-extinguishing semiconductor elements 98, 99, 100 and 101 are connected in parallel to the flywheel diodes 94, 95, 96 and 97. The clamp diode 102 is connected in a direction in which a current flows from the terminal of the potential C toward the connection point of the self-extinguishing semiconductor elements 90 and 91 connected in series, and the clamp diode 103 is connected in series. They are connected in a direction in which current flows from the connection point of the type semiconductor elements 92 and 93 toward the terminal of the potential C. OUT is an output terminal connected to a load (not shown). Further, the first pressure contact structure 104 is formed by stacking six semiconductor packages of self-extinguishing semiconductor elements 90, 91, 92, and 93 and clamp diodes 102 and 103, and interposed between the semiconductor packages. The cooling fins 105, 106, 107, 108, 109, 110, 111, 112, and 113 and the insulators 114 and 115 are clamped together.
 また、第2の圧接構造体116は、フライホイールダイオード94、95、96及び97と、各々の間に設けられた冷却フィン117、118、119、120及び121とを共締めした串型の構造となっている。 The second press-contact structure 116 has a skewer structure in which flywheel diodes 94, 95, 96, and 97 and cooling fins 117, 118, 119, 120, and 121 provided between them are fastened together. It has become.
 さらに、第3の圧接構造体122は、自己消弧型半導体素子98、99、100及び101と、各々の間に設けられた冷却フィン123、124、125、126及び127とを共締めした串型の構造となっている。 Further, the third pressure contact structure 122 includes a self-extinguishing semiconductor element 98, 99, 100 and 101 and a skewer in which cooling fins 123, 124, 125, 126 and 127 provided therebetween are fastened together. It has a mold structure.
  配線128はクランプダイオード102のカソード側に取り付けられた冷却フィン108と自己消弧型半導体素子90のエミッタ側に取り付けられた冷却フィン106とを電気的に接続するブスバーである。同様に配線129はクランプダイオード103のアノード側に取り付けられた冷却フィン110と自己消弧型半導体素子92のエミッタ側に取り付けられた冷却フィン112とを電気的に接続するブスバーである。また、配線130は自己消弧型半導体素子91のエミッタ側に取り付けられた冷却フィン107と自己消弧型半導体素子92のコレクタ側に取り付けられた冷却フィン111とを電気的に接続するブスバーである。 The wiring 128 is a bus bar that electrically connects the cooling fin 108 attached to the cathode side of the clamp diode 102 and the cooling fin 106 attached to the emitter side of the self-extinguishing semiconductor element 90. Similarly, the wiring 129 is a bus bar that electrically connects the cooling fin 110 attached to the anode side of the clamp diode 103 and the cooling fin 112 attached to the emitter side of the self-extinguishing semiconductor element 92. The wiring 130 is a bus bar that electrically connects the cooling fin 107 attached to the emitter side of the self-extinguishing semiconductor element 91 and the cooling fin 111 attached to the collector side of the self-extinguishing semiconductor element 92. .
 配線131、132、133、134及び135は自己消弧型半導体素子とフライホイールダイオードとの渡り配線であり、配線131は自己消弧型半導体素子90のコレクタ側に取り付けられた冷却フィン105とフライホイールダイオード94のカソード側に取り付けられた冷却フィン117、配線132は自己消弧型半導体素子91のコレクタ側に取り付けられた冷却フィン106とフライホイールダイオード95のカソード側に取り付けられた冷却フィン118、配線133は配線130とフライホイールダイオード96のカソード側に取り付けられた冷却フィン119、配線134は自己消弧型半導体素子93のコレクタ側に取り付けられた冷却フィン112とフライホイールダイオード97のカソード側に取り付けられた冷却フィン120、配線135は自己消弧型半導体素子93のエミッタ側に取り付けられた冷却フィン113とフライホイールダイオード97のアノード側に取り付けられた冷却フィン121とを夫々電気的に接続するブスバーである。 Wirings 131, 132, 133, 134, and 135 are transition wirings between the self-extinguishing semiconductor element and the flywheel diode, and the wiring 131 is connected to the cooling fin 105 attached to the collector side of the self-extinguishing semiconductor element 90 and fly The cooling fin 117 attached to the cathode side of the wheel diode 94, the wiring 132 includes the cooling fin 106 attached to the collector side of the self-extinguishing semiconductor element 91 and the cooling fin 118 attached to the cathode side of the flywheel diode 95, The wiring 133 is the cooling fin 119 attached to the cathode side of the wiring 130 and the flywheel diode 96, and the wiring 134 is the cooling fin 112 attached to the collector side of the self-extinguishing semiconductor element 93 and the cathode side of the flywheel diode 97. The attached cooling fin 120 and wiring 135 are connected to the cooling fin 113 and the fin attached to the emitter side of the self-extinguishing semiconductor element 93. This is a bus bar for electrically connecting the cooling fins 121 attached to the anode side of the Li-wheel diode 97, respectively.
 配線136、137、138、139及び140は第2の圧接構造体116を構成している自己消弧型半導体素子と第3の圧接構造体122を構成している自己消弧型半導体素子との渡り配線であり、配線136はフライホイールダイオード94のカソード側に取り付けられた冷却フィン117と自己消弧型半導体素子98のコレクタ側に取り付けられた冷却フィン123、配線137はフライホイールダイオード95のカソード側に取り付けられた冷却フィン118と自己消弧型半導体素子99のコレクタ側に取り付けられた冷却フィン124、配線138はフライホイールダイオード96のカソード側に取り付けられた冷却フィン119と自己消弧型半導体素子100のコレクタ側に取り付けられた冷却フィン125、配線139はフライホイールダイオード97のカソード側に取り付けられた冷却フィン120と自己消弧型半導体素子101のコレクタ側に取り付けられた冷却フィン126、配線140はフライホイールダイオード97のアノード側に取り付けられた冷却フィン121と自己消弧型半導体素子101のエミッタ側に取り付けられた冷却フィン127とを夫々電気的に接続するブスバーである。 The wirings 136, 137, 138, 139, and 140 are connected between the self-extinguishing semiconductor element constituting the second pressure contact structure 116 and the self-extinguishing semiconductor element constituting the third pressure contact structure 122. The wiring 136 is a cooling fin 117 attached to the cathode side of the flywheel diode 94 and the cooling fin 123 attached to the collector side of the self-extinguishing semiconductor element 98, and the wiring 137 is the cathode of the flywheel diode 95. The cooling fin 118 attached to the side, the cooling fin 124 attached to the collector side of the self-extinguishing semiconductor element 99, and the wiring 138 are the cooling fin 119 attached to the cathode side of the flywheel diode 96 and the self-extinguishing semiconductor The cooling fin 125 attached to the collector side of the element 100 and the wiring 139 are the cooling fin 120 attached to the cathode side of the flywheel diode 97 and the self-extinguishing semiconductor element 1 The cooling fin 126 attached to the collector side of 01 and the wiring 140 are the cooling fin 121 attached to the anode side of the flywheel diode 97 and the cooling fin 127 attached to the emitter side of the self-extinguishing semiconductor element 101, respectively. It is a bus bar that is electrically connected.
 図6-1、図6-2に第3の圧接構造体接続した構成においてインバータ動作時に流れる電流経路を示す。電流経路は全部で6パターンとなり、図4-1、図4-2の説明と同様に図6-1(a)に示す正電位Pから自己消弧型半導体素子を通り出力端子OUTに流れる経路、図6-1(b)に示す中間の電位Cからクランプダイオード、自己消弧型半導体素子を通り出力端子OUTに流れる経路、図6-1(c)に示す負電位Nからフライホイールダイオードを通り出力端子OUTに流れる経路、図6-2(d)に示す出力端子OUTからフライホイールダイオードを通り負電位Pに流れる経路、図6-2(e)に示す出力端子OUTから自己消弧型半導体素子、クランプダイオードを通り中間の電位Cに流れる経路、図6-2(f)に示す出力端子OUTから自己消弧型半導体素子を通り負電位Nに流れる経路となる。 Fig. 6-1 and Fig. 6-2 show the current path that flows when the inverter is operated in the configuration where the third pressure contact structure is connected. There are 6 current paths in total, and the path from the positive potential P shown in FIG. 6-1 (a) through the self-extinguishing semiconductor element to the output terminal OUT is similar to the description of FIGS. 4-1 and 4-2. 6-1 (b), a clamp diode, a path through the self-extinguishing semiconductor element to the output terminal OUT, and a flywheel diode from the negative potential N shown in FIG. 6-1 (c). A path that flows to the output terminal OUT, a path that flows from the output terminal OUT to the negative potential P through the flywheel diode shown in FIG. 6-2 (d), and a self-extinguishing type from the output terminal OUT shown in FIG. 6-2 (e) The path flows through the semiconductor element and the clamp diode to the intermediate potential C, and the path flows from the output terminal OUT shown in FIG. 6B to the negative potential N through the self-extinguishing semiconductor element.
 図6-1(a)において、正電位Pから自己消弧型半導体素子90、91を通り出力端子OUTに流れる経路と正電位Pから自己消弧型半導体素子98、99を通り出力端子OUTに流れる経路の長さは異なり1並列目と2並列目を通る電流の配線によるアンバランスが発生する。 In FIG. 6A, the path from the positive potential P through the self-extinguishing semiconductor elements 90 and 91 to the output terminal OUT and the positive potential P through the self-extinguishing semiconductor elements 98 and 99 to the output terminal OUT. The lengths of the flowing paths are different, and imbalance occurs due to the wiring of the current passing through the first parallel and the second parallel.
 また、図6-1(b)において、中間の電位Cからクランプダイオード102、自己消弧型半導体素子91を通り出力端子OUTに流れる経路と中間の電位Cからクランプダイオード102、自己消弧型半導体素子99を通り出力端子OUTに流れる経路の長さは異なり1並列目と2並列目を通る電流の配線によるアンバランスが発生する。 In FIG. 6B, the clamp diode 102 and the self-extinguishing semiconductor element 91 are passed from the intermediate potential C to the output terminal OUT and the intermediate potential C to the clamp diode 102 and the self-extinguishing semiconductor. The length of the path flowing through the element 99 to the output terminal OUT is different, and an imbalance occurs due to the wiring of the current passing through the first and second parallels.
 また、図6-2(e)において、出力端子OUTから自己消弧型半導体素子92、クランプダイオード103を通り中間の電位Cに流れる経路と出力端子OUTから自己消弧型半導体素子100、クランプダイオード103を通り中間の電位Cに流れる経路の長さは異なり1並列目と2並列目を通る電流の配線によるアンバランスが発生する。 In FIG. 6-2 (e), the path flowing from the output terminal OUT to the self-extinguishing semiconductor element 92 and the clamp diode 103 to the intermediate potential C, and the self-extinguishing semiconductor element 100 and the clamp diode from the output terminal OUT. The length of the path that passes through 103 and flows to the intermediate potential C is different, and imbalance occurs due to the wiring of the current passing through the first and second parallels.
 また、図6-2(f)において、出力端子OUTから自己消弧型半導体素子92、93を通り負電位Nに流れる経路と出力端子OUTから自己消弧型半導体素子100、101を通り負電位Nに流れる経路の長さは異なり1並列目と2並列目を通る電流の配線によるアンバランスが発生する。 In FIG. 6-2 (f), the path flowing from the output terminal OUT through the self-extinguishing semiconductor elements 92, 93 to the negative potential N and the output terminal OUT from the self-extinguishing semiconductor elements 100, 101 to the negative potential. The length of the path flowing through N is different, and imbalance occurs due to the wiring of the current passing through the first and second parallels.
 尚、図6-1(c)においては、共通のフライホイールダイオード96、97を通るため経路は一通りしかなく電流のアンバランスは発生し得ない。図6-2(d)においても同じように電流が共通のフライホイールダイオード94、95を通るため経路は一通りしかなく電流のアンバランスは発生しない。 In FIG. 6-1 (c), since the common flywheel diodes 96 and 97 are passed, there is only one path and no current imbalance can occur. Similarly in FIG. 6D, since the current passes through the common flywheel diodes 94 and 95, there is only one path and no current imbalance occurs.
 以上のことから、配線によるインダクタンスのばらつきを抑制することができ、1並列目と2並列目を通る電流のアンバランスを抑制することがきでる。 From the above, it is possible to suppress variations in inductance due to wiring, and it is possible to suppress current imbalance through the first and second parallels.
 以上の実施例では、容量を増やすためにIGBTを並列接続した場合、電源―出力間を通過する配線の距離が1並列目と2並列目で異なるのを避けて、各経路におけるインダクタンスのばらつきの発生を抑制できる。また、複数台の電力変換装置盤を横方向に列盤するものと比較して、横流抑制のための結合リアクトルの追加や配線の増加などを避けて、装置の小型化が可能となる。さらに、圧接する電極と接触面積の異なる異径電極で圧接構造体を構成するものと比較して、面積の小さな電極側で過大な圧力が生じるのを避けて、冷却フィンの材質がやわらかいことに起因する、圧接する電極径が小さい方に向かってフィンの両端が変形してしまい、電極周辺の熱抵抗と接触抵抗が増大してしまうことが避けられる。同径の電極を追加することによる、冷却フィン表面から冷却水路までの距離が増えて伝達熱抵抗が増加し、冷却能力が下がるという現象を避けることができる。 In the above embodiment, when IGBTs are connected in parallel to increase the capacity, it is avoided that the distance of the wiring passing between the power source and the output is different between the first parallel and the second parallel, and the variation in inductance in each path is reduced. Generation can be suppressed. Further, as compared with the case where a plurality of power conversion device panels are arranged in the horizontal direction, it is possible to reduce the size of the device by avoiding the addition of a coupling reactor for suppressing a cross current and an increase in wiring. In addition, compared to the pressure contact structure and the different diameter electrodes with different contact areas, the pressure fin material is soft, avoiding excessive pressure on the small area electrode side. It can be avoided that both ends of the fin are deformed toward the smaller diameter of the electrode to be pressed and the thermal resistance and contact resistance around the electrode are increased. By adding the same diameter electrode, it is possible to avoid the phenomenon that the distance from the cooling fin surface to the cooling water passage increases, the heat transfer resistance increases, and the cooling capacity decreases.
 並列する半導体素子が多くのBUSやコンデンサを介することなく近傍に位置しているため、回路のインダクタンスのばらつきによる電流のアンバランスが原因で、横流や電流集中による発熱、サージ電圧による半導体チップの破損が発生するのを抑制できる。さらに、装置全体の小型化も可能となる。また、圧接構造体のチップ形状や電極径の違いによる接触面の圧力差を軽減できる。
Because parallel semiconductor elements are located in the vicinity without many buses or capacitors, the current is unbalanced due to variations in circuit inductance, causing heat generation due to cross current and current concentration, and damage to the semiconductor chip due to surge voltage. Can be prevented from occurring. Furthermore, the entire apparatus can be reduced in size. Further, the pressure difference on the contact surface due to the difference in the tip shape and electrode diameter of the pressure contact structure can be reduced.
1、38 直流電圧回路
2、3、4、5、43、44、45、46、47、48、49、50、90、91、92、93、98、99、100、101 自己消弧型半導体素子
6、7、8、9、39、40、41、42、94、95、96、97 フライホイールダイオード
10、11、51、52、102、103 クランプダイオード
13、14、15、16、17、18、19、20、21、25、26、27、28、29、54、55、56、57、58、59、60、61、62、66、67、68、69、70、72、73、74、75、76、105、106、107、108、109、110、111、112、113、117、118、119、120、121、123、124、125、126、127 冷却フィン
22、23、63、64、114、115 絶縁物
12、53、104 第1の圧接構造体
24、65、116 第2の圧接構造体
71、122 第3の圧接構造体
30、31、32、33、34、35、36、37、77、78、79、80、81、82、83、84、85、86、87、88、89、128、129、130、131、132、133、134、135、136、137、138、139、140 配線
1, 38 DC voltage circuit
2, 3, 4, 5, 43, 44, 45, 46, 47, 48, 49, 50, 90, 91, 92, 93, 98, 99, 100, 101 Self-extinguishing semiconductor element
6, 7, 8, 9, 39, 40, 41, 42, 94, 95, 96, 97 Flywheel diode
10, 11, 51, 52, 102, 103 Clamp diode
13, 14, 15, 16, 17, 18, 19, 20, 21, 25, 26, 27, 28, 29, 54, 55, 56, 57, 58, 59, 60, 61, 62, 66, 67, 68, 69, 70, 72, 73, 74, 75, 76, 105, 106, 107, 108, 109, 110, 111, 112, 113, 117, 118, 119, 120, 121, 123, 124, 125, 126, 127 Cooling fin
22, 23, 63, 64, 114, 115 Insulator
12, 53, 104 First pressure contact structure
24, 65, 116 Second pressure contact structure
71, 122 Third pressure contact structure
30, 31, 32, 33, 34, 35, 36, 37, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 128, 129, 130, 131, 132, 133, 134, 135, 136, 137, 138, 139, 140 Wiring

Claims (8)

  1.  一方側端子と他方側端子の間に直列接続された第1の半導体素子、第2の半導体素子、第3の半導体素子及び第4の半導体素子と、前記第1の半導体素子、第2の半導体素子、第3の半導体素子及び第4の半導体素子の各々に対応して設けられた第1のフライホイールダイオード、第2のフライホイールダイオード、第3のフライホイールダイオード及び第4のフライホイールダイオードと、前記第1の半導体素子と前記第2の半導体素子との接続部と前記一方側端子と他方側端子の間の電位である中間電位端子とを接続する第1のクランプダイオード、及び前記第3の半導体素子と前記第4の半導体素子との接続部と前記中間電位端子とを接続する第2のクランプダイオードを有し、前記第1の半導体素子、前記第2の半導体素子、前記第3の半導体素子及び前記第4の半導体素子は、直列的な配置による圧接接続で接続され、前記第1のフライホイールダイオード、前記第2のフライホイールダイオード、前記第1のクランプダイオード、前記第2のクランプダイオード、前記第3のフライホイールダイオード及び前記第4のフライホイールダイオードは直列的な配置がなされることにより、前記第1のフライホイールダイオードと前記第2のフライホイールダイオードは圧接により接続され、前記第1のクランプダイオード及び前記第2のクランプダイオードは圧接により接続され、前記第3のフライホイールダイオードと前記第4のフライホイールダイオードは圧接により接続されることを特徴とする電力変換装置。
    A first semiconductor element, a second semiconductor element, a third semiconductor element, and a fourth semiconductor element connected in series between one side terminal and the other side terminal, and the first semiconductor element and the second semiconductor A first flywheel diode, a second flywheel diode, a third flywheel diode, and a fourth flywheel diode provided corresponding to each of the element, the third semiconductor element, and the fourth semiconductor element; A first clamp diode that connects a connection portion between the first semiconductor element and the second semiconductor element and an intermediate potential terminal that is a potential between the one-side terminal and the other-side terminal; and the third diode A second clamp diode that connects a connection portion between the semiconductor element and the fourth semiconductor element and the intermediate potential terminal, and includes the first semiconductor element, the second semiconductor element, and the second semiconductor element. The semiconductor element and the fourth semiconductor element are connected by a pressure contact connection in a serial arrangement, and the first flywheel diode, the second flywheel diode, the first clamp diode, the second clamp diode, The clamp diode, the third flywheel diode, and the fourth flywheel diode are arranged in series, whereby the first flywheel diode and the second flywheel diode are connected by pressure contact, The power converter according to claim 1, wherein the first clamp diode and the second clamp diode are connected by pressure contact, and the third flywheel diode and the fourth flywheel diode are connected by pressure contact.
  2.  請求項1において、前記第1のフライホイールダイオード、前記第2のフライホイールダイオード、前記第1のクランプダイオード、前記第2のクランプダイオード、前記第3のフライホイールダイオード及び前記第4のフライホイールダイオードは各々半導体パッケージとして構成され、圧接する半導体パッケージの電極直径が同径であることを特徴とする電力変換装置。
     
    2. The first flywheel diode, the second flywheel diode, the first clamp diode, the second clamp diode, the third flywheel diode, and the fourth flywheel diode according to claim 1. Are each configured as a semiconductor package, and the electrode diameter of the semiconductor package that is press-contacted is the same diameter.
  3.  請求項1において、第5の半導体素子、第6の半導体素子、第7の半導体素子及び第8の半導体素子を有し、前記第5の半導体素子、第6の半導体素子、第7の半導体素子及び第8の半導体素子の各々は前記第1のフライホイールダイオード、第2のフライホイールダイオード、第3のフライホイールダイオード及び第4のフライホイールダイオードと接続されることを特徴とする電力変換装置。
    2. The fifth semiconductor element, the sixth semiconductor element, the seventh semiconductor element, and the eighth semiconductor element according to claim 1, wherein the fifth semiconductor element, the sixth semiconductor element, and the seventh semiconductor element are included. And the eighth semiconductor element is connected to the first flywheel diode, the second flywheel diode, the third flywheel diode, and the fourth flywheel diode.
  4.  請求項3において、前記第1のフライホイールダイオード及び前記第2のフライホイールダイオードと、前記第3のフライホイールダイオード及び前記第4のフライホイールダイオードが、前記第1のクランプダイオード及び前記第2のクランプダイオード、を挟みこむ構造となっていることを特徴とする電力変換装置。
     
    4. The first flywheel diode and the second flywheel diode, the third flywheel diode and the fourth flywheel diode according to claim 3, wherein the first flywheel diode and the second flywheel diode are the first clamp diode and the second flywheel diode. A power converter having a structure in which a clamp diode is sandwiched.
  5.  請求項4において、前記第2のフライホイールダイオードと前記第1のクランプダイオードは絶縁部材を介して隣接され、前記第2のクランプダイオードと前記第3のフライホイールダイオードは絶縁部材を介して隣接されることを特徴とする電力変換装置。
     
    5. The fourth flywheel diode and the first clamp diode are adjacent to each other via an insulating member, and the second clamp diode and the third flywheel diode are adjacent to each other via an insulating member. A power converter characterized by the above.
  6.  請求項5において、前記第1のクランプダイオードは、前記第1のフライホイールダイオード及び前記第2のフライホイールダイオードの間に設けられた導電体を介して、前記第1の半導体素子と前記第2の半導体素子との接続部に接続され、、前記第2のクランプダイオードは、前記第3のフライホイールダイオード及び前記第4のフライホイールダイオードの間に設けられた導電体を介して、前記第3の半導体素子と前記第4の半導体素子との接続部に接続されることを特徴とする電力変換装置
     
    6. The device according to claim 5, wherein the first clamp diode is connected to the first semiconductor element and the second via a conductor provided between the first flywheel diode and the second flywheel diode. The second clamp diode is connected to the connection portion with the semiconductor element of the third flywheel diode via a conductor provided between the third flywheel diode and the fourth flywheel diode. A power conversion device connected to a connection portion between the semiconductor element and the fourth semiconductor element
  7.  請求項1において、上記電力変換装置は正電位、負電位及び中間電位の3つの端子を有する直流電圧回路と、前記各電位を出力することができる3レベルインバータブリッジとを有し、前記3レベルインバータブリッジの1相分は、1並列目としての前記第1乃至第4の半導体素子と、2並列目とで構成され、前記1並列目を通る配線インダクタンスと前記2並列目を通る配線インダクタンスが略等しくなるよう構成したことを特徴とする電力変換装置。
    2. The power converter according to claim 1, comprising a DC voltage circuit having three terminals of a positive potential, a negative potential, and an intermediate potential, and a three-level inverter bridge capable of outputting each potential. One phase of the inverter bridge is composed of the first to fourth semiconductor elements as the first parallel and the second parallel, and the wiring inductance passing through the first parallel and the wiring inductance passing through the second parallel are A power converter configured to be substantially equal.
  8.  請求項1において、前記第1乃至第4の半導体素子で構成される直列圧接構造体と平滑コンデンサが並列接続していることを特徴とする電力変換装置。 2. The power conversion device according to claim 1, wherein a series pressure contact structure constituted by the first to fourth semiconductor elements and a smoothing capacitor are connected in parallel.
PCT/JP2013/071587 2013-08-09 2013-08-09 Power conversion apparatus WO2015019480A1 (en)

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JPH10323015A (en) * 1997-05-19 1998-12-04 Toshiba Corp Semiconductor power converter
JP2006158107A (en) * 2004-11-30 2006-06-15 Toshiba Mitsubishi-Electric Industrial System Corp 3-level inverter device
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JP2017118608A (en) * 2015-12-21 2017-06-29 東芝三菱電機産業システム株式会社 Power conversion device improved in on-characteristic of pressure-contact type semiconductor element

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