WO2014190890A1 - Composite substrate having isolation layer and manufacturing method thereof - Google Patents

Composite substrate having isolation layer and manufacturing method thereof Download PDF

Info

Publication number
WO2014190890A1
WO2014190890A1 PCT/CN2014/078482 CN2014078482W WO2014190890A1 WO 2014190890 A1 WO2014190890 A1 WO 2014190890A1 CN 2014078482 W CN2014078482 W CN 2014078482W WO 2014190890 A1 WO2014190890 A1 WO 2014190890A1
Authority
WO
WIPO (PCT)
Prior art keywords
isolation layer
sub
layer
seed
substrate
Prior art date
Application number
PCT/CN2014/078482
Other languages
French (fr)
Chinese (zh)
Inventor
陈弘
贾海强
江洋
戴隆贵
王文新
马紫光
王禄
李卫
Original Assignee
中国科学院物理研究所
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 中国科学院物理研究所 filed Critical 中国科学院物理研究所
Publication of WO2014190890A1 publication Critical patent/WO2014190890A1/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78603Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the insulating substrate or support
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78651Silicon transistors
    • H01L29/78654Monocrystalline silicon transistors
    • H01L29/78657SOS transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78681Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising AIIIBV or AIIBVI or AIVBVI semiconductor materials, or Se or Te

Definitions

  • the present invention relates to a substrate for fabricating a semiconductor device, and more particularly to a composite substrate having an isolation layer and a method of fabricating the same. Background technique
  • a silicon material is usually used as a substrate, and various semiconductor devices are fabricated on a silicon substrate by doping, photolithography, deposition, etc., but the semiconductor device and silicon directly fabricated on a silicon substrate are used.
  • the substrate is electrically coupled, resulting in large leakage currents, high power dissipation, and large parasitic capacitance.
  • SOI Silicon On Insulator
  • a new semiconductor device substrate SOI (Silicon On Insulator)
  • SOI Silicon On Insulator
  • the S0I utilizes a silicon oxide insulating layer to block electrical coupling between the top-level semiconductor device and the underlying substrate.
  • the S0I-based integrated circuit has a series of advantages such as low leakage current, low power consumption, small parasitic capacitance, and fast response speed, and is a mainstream technology of a new generation of integrated circuit chips.
  • germanium on insulator GeOI
  • silicon nitride on insulator silicon nitride on insulator
  • GaN on insulator etc.
  • An insulating layer is used as an electrical isolation layer between the top semiconductor layer and the underlying substrate to electrically isolate the semiconductor device in the top semiconductor layer from the underlying substrate to reduce leakage current, power consumption, and parasitic capacitance .
  • certain optical devices such as LEDs, are also desirable to introduce an optical isolation layer into the substrate to reflect the light emitted by the LEDs, thereby preventing light loss due to substrate leakage.
  • Such a substrate having an electrical or optical isolation layer generally comprises a substrate, an isolation layer and a semiconductor layer, wherein the substrate is typically comprised of a bulk material for isolating the semiconductor layer from the substrate in electrical, optical, etc. properties.
  • the substrate having the isolation layer is generally formed by successively growing a plurality of layers, by sequentially forming an isolation layer and a semiconductor layer on the substrate.
  • the isolation layer is very thin and it is difficult to form a complete lattice structure, which is usually amorphous, so that the lattice quality of the subsequently grown semiconductor layer is difficult to ensure.
  • the invention provides a method for manufacturing a composite substrate having an isolation layer, comprising:
  • the method further comprises the step of: growing a semiconductor layer on the second sub-isolation layer by lateral growth using at least a portion of the seed region as a seed.
  • the seed layer is epitaxially grown from a substrate at a plurality of openings, and joined at a position intermediate the two openings to form a joint region, wherein the seed region is preferably The junction area is not included.
  • the present invention can also achieve the object of the present invention by using the seed layer in the joint region as a seed and then performing lateral extension. However, it is preferable to carry out lateral extension using a seed layer other than the joint region as a seed.
  • the first sub-isolation layer and the second sub-isolation layer are composed of an insulating dielectric material.
  • the first sub-isolation layer and the second sub-isolation layer are composed of a metal material.
  • the material of the substrate is sapphire, Si, SiC, GaAs, InP or Ge.
  • the materials of the first sub-isolation layer and the second sub-isolation layer are Si0 2 , Ti0 2 , A1 2 0 3 , Ti 3 0 5 , Zr0 2 , Ta 2 0 5 , SiN, A combination of one or more of A1N, molybdenum, nickel, ruthenium, platinum, titanium, tungsten, chromium.
  • the material of the semiconductor layer is GaN, AlGaN, InGaN, GaAs, InGaAs, InGaAlP, Si, Ge or GeSi.
  • the invention provides a composite substrate comprising:
  • a second sub-isolation layer covering the opening of the first sub-isolation layer and at least a portion of the first sub-isolation layer and having an opening that exposes at least a portion of the seed region.
  • a composite substrate according to the present invention further comprising a semiconductor layer covering the first sub-isolation layer and the second sub-isolation layer, the semiconductor layer being formed by lateral growth of at least a portion of the seed region.
  • the composite substrate manufacturing method provided by the present invention can ensure that the semiconductor layer of the top layer has a good crystal quality, thereby improving the performance of the semiconductor device fabricated in the semiconductor layer.
  • the method provided by the present invention can be used as an alternative preparation scheme for SOI substrates to adapt to current silicon process technology.
  • the method provided by the invention can be used as a preparation scheme of a generalized SOI substrate, and can be applied to GaAs epitaxy on silicon, GaN epitaxy on silicon, sapphire on silicon or GaN LED process technology with reflective layer on silicon.
  • the high-density dislocation defect region is avoided by the secondary lateral epitaxy, and the second lateral epitaxy is performed by using the region with the lower dislocation defect as the seed layer, and the high-performance heteroepitaxial material can be grown.
  • the isolation layer can be dissolved by a simple substrate stripping technique, so that the semiconductor layer is peeled off and used, and the remaining substrate after peeling can be reused.
  • the manufacturing cost of the device is greatly reduced, and the greening of the semiconductor process is realized.
  • FIG. 1 through 8 are schematic views of a process flow in accordance with an embodiment of the present invention. detailed description
  • the embodiment provides a method for manufacturing a composite substrate having an isolation layer.
  • the process flow is as shown in FIG. 1-8, and includes:
  • a 300 nm thick SiO 2 film is deposited as a first sub-isolation layer 2 on the surface of the sapphire substrate 1 by PECVD, and then formed in the first sub-isolation layer 2 by photolithography and etching processes. Opening 21, exposing the surface of the sapphire substrate 1, the plurality of openings 21 forming a grating pattern having a period of 4 micrometers and an opening 21 having a width of 1 micrometer;
  • a GaN thin film is prepared by using the MOCVD lateral epitaxial growth technique with the substrate 1 at the opening 21 as a seed layer 3, and the seed layer 3 is epitaxially grown from the substrate 1 at the plurality of openings 21. Grown and laterally extended, and joined at a position intermediate the two openings 21, forming a land 202, and finally completely covering the first sub-isolation layer 2;
  • a patterned mask 4 (formed by a process of exposure, development, etc.) is formed on the surface of the seed layer 3 composed of a laterally grown GaN film, and the mask 4 has a raster pattern.
  • the grating-like pattern has a period of 4 micrometers, and the grating-like stripe has a width of 1 micrometer.
  • the grating-like mask 4 covers only a portion of the seed layer 3 between the openings 21 and does not cover the joint region 202 of the seed layer 3;
  • the seed layer 3 is etched by using the mask 4 as an etch barrier, leaving the seed layer 3 blocked by the mask 4 as a seed region 31, wherein the first sub-isolation layer 2 is not
  • the GaN film blocked by the mask 4 is etched clean, and some of the seed layer 3 may remain in the opening 21 (as shown in FIG. 4), or there may be no residue of the seed layer 3, which does not affect the subsequent process and the resulting product.
  • the final performance, so the process margin is large;
  • a 300 nm thick SiO 2 film is deposited by PECVD as the second sub-isolation layer 201;
  • an opening is formed in the second sub-isolation layer 201 to expose the seed region 31;
  • the GaN material of the seed region 31 is used as a seed, and the secondary lateral epitaxial growth of GaN is performed until the GaN film on the second sub-isolation layer 201 is integrated, thereby having the structure shown in FIG.
  • a composite substrate of an isolation layer comprising a substrate 1, an isolation layer composed of a first sub-isolation layer 2 and a second sub-isolation layer 201, and a semiconductor layer 301 on the isolation layer, wherein the first sub-isolation layer on the substrate Having an opening therein, a region other than the opening of the first sub-isolation layer having a seed region, the second sub-isolation layer covering the opening of the first sub-isolation layer and at least a portion a sub-isolation layer having an opening exposing at least a portion of the seed region, the semiconductor layer covering the first sub-isolation layer and the second sub-isolation layer, the semiconductor layer being formed by lateral growth of the seed region.
  • the GaN film is initially formed in the opening 21 in the first sub-isolation layer 2, and the GaN film defect epitaxially grown at the opening due to the lattice mismatch of the bulk substrate 1 and the epitaxial GaN material More, with the progress of lateral epitaxial growth, the defects of GaN epitaxial film are gradually reduced, and the crystal quality of laterally grown GaN is gradually improved. Therefore, during lateral growth, the lattice structure of GaN gradually becomes complete, and the more away from opening 21 The less the far defects, the higher the crystal quality, but at the intermediate position of the two openings 21, the epitaxial layer lattice structure of the land 202 may be poor due to the influence of the material system and growth conditions.
  • the seed layer in the bonding region 202 is etched away, and only the lateral epitaxial film other than the bonding region 202, that is, the portion having a higher crystal quality, is used as a seed and then subjected to secondary epitaxy, thereby being capable of being in an amorphous isolation layer.
  • a GaN semiconductor layer 301 having a higher crystal quality is formed thereon. Therefore, in the composite substrate having the isolation layer prepared by the method provided by the embodiment, the semiconductor layer has high crystal quality and few defects, so that the performance of the semiconductor device fabricated in the semiconductor layer can be improved.
  • the embodiment provides a method for manufacturing a composite substrate having an isolation layer.
  • the process flow is as shown in FIG. 1-8, and includes:
  • a 300 nm thick SiO 2 film is formed on the surface of the silicon substrate 1 as the first sub-isolation layer 2 by PECVD or thermal oxidation, and then the first sub-isolation layer is formed by photolithography and etching processes.
  • a plurality of openings 21 are formed in the second surface to expose the surface of the silicon substrate 1, and the plurality of openings 21 form a grating-like pattern having a period of 4 micrometers and an opening 21 having a width of 1 micrometer;
  • a GaN thin film is prepared as a seed layer 3 by using the MOCVD lateral epitaxial growth technique with the substrate 1 at the opening 21 as a seed, and the seed layer 3 is epitaxially grown from the substrate 1 at the plurality of openings 21 and Lateral extension, and joined at a position intermediate the two openings 21, forming a land 202, and finally completely covering the first sub-isolation layer 2;
  • a patterned mask 4 (formed by a process of exposure, development, etc.) is formed on the surface of the seed layer 3 composed of a laterally grown GaN film, and the mask 4 has a raster pattern.
  • the grating-like pattern has a period of 4 micrometers, and the grating-like stripe has a width of 1 micrometer.
  • the film 4 covers only a portion of the seed layer 3 between the openings 21 and does not cover the land 202 of the seed layer 3;
  • the seed layer 3 is etched by using the mask 4 as an etch barrier, leaving a seed layer blocked by the mask 4 as a seed region 31, wherein the first sub-isolation layer 2 is not
  • the GaN film blocked by the mask 4 is etched clean, and some of the seed layer 3 may remain in the opening 21 (as shown in FIG. 4), or there may be no residue of the seed layer 3, which does not affect the subsequent process and the obtained product. Final performance, so the process margin is large;
  • a 300 nm thick SiO 2 film is deposited by PECVD as the second sub-isolation layer 201;
  • an opening is formed in the second sub-isolation layer 201 to expose the seed region 31;
  • the GaN material of the seed region 31 is used as a seed, and the secondary lateral epitaxial growth of GaN is performed until the GaN film on the second sub-isolation layer 201 is integrated, thereby having the structure shown in FIG.
  • a composite substrate of an isolation layer comprising a substrate 1, an isolation layer composed of the first sub-isolation layer 2 and the second sub-isolation layer 201, and a semiconductor layer 301 on the isolation layer.
  • the first sub-isolation layer on the substrate has an opening
  • the region other than the opening of the first sub-isolation layer has a seed region
  • the second sub-isolation layer covers the opening of the first sub-isolation layer and at least a portion of the first sub-isolation layer.
  • the GaN film is initially formed in the opening 21 in the first sub-isolation layer 2, and the GaN film defect epitaxially grown at the opening due to the lattice mismatch of the bulk substrate 1 and the epitaxial GaN material More, with the progress of lateral epitaxial growth, the defects of GaN epitaxial film are gradually reduced, and the crystal quality of laterally grown GaN is gradually improved. Therefore, during lateral growth, the lattice structure of GaN gradually becomes complete, and the more away from opening 21 The less the far defects, the higher the crystal quality, but at the intermediate position of the two openings 21, the epitaxial layer lattice structure of the land 202 may be poor due to the influence of the material system and growth conditions.
  • the seed layer in the bonding region 202 is etched away, and only the lateral epitaxial film other than the bonding region 202, that is, the portion having a higher crystal quality, is used as the seed layer for secondary epitaxy, thereby being able to be isolated in an amorphous state.
  • a GaN semiconductor layer 301 having a higher crystal quality is formed on the layer. Therefore, in the composite substrate having the isolation layer prepared by the method provided by the embodiment, the semiconductor layer has high crystal quality and few defects, so that the performance of the semiconductor device fabricated in the semiconductor layer can be improved.
  • the embodiment provides a method for manufacturing a composite substrate having an isolation layer.
  • the process flow is as shown in FIG. 1-8, and includes:
  • a 300 nm thick metal molybdenum thin film is formed on the surface of the sapphire substrate 1 by evaporation or sputtering as the first sub-isolation layer 2, and then in the first sub-isolation layer 2 by photolithography and etching processes.
  • a GaN thin film is prepared as a seed layer 3 by using the MOCVD lateral epitaxial growth technique with the substrate 1 at the opening 21 as a seed, and the seed layer 3 is epitaxially grown from the substrate 1 at the plurality of openings 21 and Lateral extension, and joined at a position intermediate the two openings 21, forming a land 202, and finally completely covering the first sub-isolation layer 2;
  • a patterned mask 4 (formed by a process of exposure, development, etc.) is formed on the surface of the seed layer 3 composed of a laterally grown GaN film, and the mask 4 has a raster pattern.
  • the grating-like pattern has a period of 4 micrometers, and the grating-like stripe has a width of 1 micrometer.
  • the grating-like mask 4 covers only a portion of the seed layer 3 between the openings 21 and does not cover the joint region 202 of the seed layer 3;
  • the seed layer 3 is etched by using the mask 4 as an etch barrier, leaving a seed layer blocked by the mask 4 as a seed region 31, wherein the first sub-isolation layer 2 is not
  • the GaN film blocked by the mask 4 is etched clean, and some of the seed layer 3 may remain in the opening 21 (as shown in FIG. 4), or there may be no residue of the seed layer 3, which does not affect the subsequent process and the obtained product. Final performance, so the process margin is large;
  • an opening is formed in the second sub-isolation layer 201 to expose the seed region 31;
  • a composite substrate of the isolation layer includes a substrate 1, an isolation layer composed of the first sub-isolation layer 2 and the second sub-isolation layer 201, and a GaN semiconductor layer 301 on the isolation layer.
  • the GaN film is initially formed in the opening 21 in the first sub-isolation layer 2, due to the lattice mismatch of the bulk substrate 1 and the epitaxial GaN material, at the opening
  • the epitaxially grown GaN film has many defects. With the progress of lateral epitaxial growth, the defects of GaN epitaxial film are gradually reduced, and the crystal quality of laterally grown GaN is gradually improved. Therefore, during lateral growth, the lattice structure of GaN gradually tends to Complete, the farther away from the opening 21, the less the defect, the higher the crystal quality, but at the intermediate position of the two openings 21, the epitaxial layer lattice structure of the land 202 may be poor due to the influence of the material system and growth conditions.
  • the seed layer in the bonding region 202 is etched away, and only the lateral epitaxial film other than the bonding region 202, that is, the portion having a higher crystal quality, is used as the seed layer for secondary epitaxy, thereby being able to be isolated in an amorphous state.
  • a GaN semiconductor layer 301 having a higher crystal quality is formed on the layer. Therefore, in the composite substrate having the isolation layer prepared by the method provided by the embodiment, the semiconductor layer has high crystal quality and few defects, so that the performance of the semiconductor device fabricated in the semiconductor layer can be improved.
  • the composite substrate with the isolation layer prepared by the method provided by the embodiment can be used for preparing an optoelectronic device such as an LED, wherein the molybdenum layer can be used as a reflective layer to prevent light emitted from the LED in the semiconductor layer from being emitted from the substrate, thereby Improve the external quantum efficiency of the LED.
  • the spacer layer may be used as the spacer layer.
  • the embodiment provides a method for manufacturing a composite substrate having an isolation layer.
  • the process flow is as shown in FIG. 1-8, and includes:
  • a 200 nm thick SiO 2 film is formed on the surface of the silicon substrate 1 as the first sub-isolation layer 2 by PECVD or thermal oxidation, and then the first sub-isolation layer is formed by photolithography and etching processes.
  • a plurality of openings 21 are formed in the second surface to expose the surface of the silicon substrate 1, and the plurality of openings 21 form a grating-like pattern having a period of 2 micrometers and an opening 21 having a width of 0.5 micrometers;
  • a GaAs thin film is prepared as a seed layer 3 by using the MOCVD lateral epitaxial growth technique with the substrate 1 at the opening 21 as a seed, and the seed layer 3 is epitaxially grown from the substrate 1 at the plurality of openings 21 and Lateral extension, and joined at a position intermediate the two openings 21, forming a land 202, and finally completely covering the first sub-isolation layer 2;
  • a patterned mask 4 (formed by a photoresist, a process such as exposure, development, etc.) is formed on the surface of the seed layer 3 composed of a laterally grown GaAs film, and the mask 4 is in the form of a grating.
  • the grating-like pattern has a period of 2 micrometers
  • the grating-like stripe has a width of 0.5 micrometers.
  • the grating-like mask 4 covers only a portion of the seed layer 3 between the openings 21 and does not cover the joint region 202 of the seed layer 3;
  • a 200 nm thick SiO 2 film is deposited by PECVD as the second sub-isolation layer 201;
  • an opening is formed in the second sub-isolation layer 201 to expose the seed region 31;
  • the GaAs material of the seed region 31 is used as a seed, and the secondary lateral epitaxial growth of GaAs is performed until the GaAs film on the second sub-isolation layer 201 is integrated, thereby having the structure shown in FIG. A composite substrate of an isolation layer comprising a substrate 1, an isolation layer composed of the first sub-isolation layer 2 and the second sub-isolation layer 201, and a semiconductor layer 301 on the isolation layer.
  • the GaAs film is initially formed in the opening 21 in the first sub-isolation layer 2, and the GaAs film defect which is epitaxially grown at the opening due to the lattice mismatch of the bulk substrate 1 and the epitaxial GaAs material More, with the progress of lateral epitaxial growth, the defects of GaAs epitaxial film are gradually reduced, and the crystal quality of laterally grown GaAs is gradually improved.
  • the lattice structure of GaAs gradually becomes complete, and the more away from opening 21 The less the far defects, the higher the crystal quality, but at the intermediate position of the two openings 21, the epitaxial layer lattice structure of the land 202 may be poor due to the influence of the material system and growth conditions. Therefore, the seed layer in the bonding region 202 is etched away, and only the lateral epitaxial film other than the bonding region 202, that is, the portion having a higher crystal quality, is used as the seed layer for secondary epitaxy, thereby being able to be isolated in the amorphous state. A GaAs semiconductor layer 301 having a higher crystal quality is formed on the layer. Therefore, in the composite substrate having the isolation layer prepared by the method of the present embodiment, the semiconductor layer has high crystal quality and few defects, so that the performance of the semiconductor device fabricated in the semiconductor layer can be improved.
  • the embodiment provides a method for manufacturing a composite substrate having an isolation layer.
  • the process flow is as shown in FIG. 1-8, and includes:
  • a 100 nm thick SiO 2 film is formed as a first sub-isolation layer 2 on the surface of the silicon substrate 1 by thermal oxidation, and then formed in the first sub-isolation layer 2 by photolithography and etching processes.
  • a plurality of openings 21 exposing the surface of the silicon substrate 1, and the plurality of openings 21 forming a raster pattern The period is 2 microns, and the opening 21 is 0.5 microns wide;
  • a Si thin film is prepared as a seed layer 3 by using a CVD lateral epitaxial growth technique with the substrate 1 at the opening 21 as a seed, and the seed layer 3 is epitaxially grown from the substrate 1 at the plurality of openings 21 and Lateral extension, and joined at a position intermediate the two openings 21, forming a land 202, and finally covering the first sub-isolation layer 2;
  • a patterned mask 4 (formed by a process of exposure, development, etc.) is formed on the surface of the seed layer 3 composed of a laterally grown Si film, and the mask 4 has a raster pattern.
  • the grating-like pattern has a period of 2 micrometers, and the grating-like stripe has a width of 0.5 micrometers.
  • the grating-like mask 4 covers only a portion of the seed layer 3 between the openings 21 and does not cover the joint region 202 of the seed layer 3;
  • the seed layer 3 is etched by using the mask 4 as an etch barrier, leaving a seed layer blocked by the mask 4 as a seed region 31, wherein the first sub-isolation layer 2 is not
  • the Si film blocked by the mask 4 is etched clean, and some of the seed layer 3 may remain in the opening 21 (as shown in FIG. 4), or there may be no residue of the seed layer 3, which does not affect the subsequent process and the resulting product. Final performance, so the process margin is large;
  • a 200 nm thick SiO 2 film is deposited by PECVD as the second sub-isolation layer 201;
  • an opening is formed in the second sub-isolation layer 201 to expose the seed region 31;
  • FIG. 8 As shown in FIG. 8, using the Si material of the seed region 31 as a seed, secondary lateral epitaxial growth of Si is performed until the Si thin film on the second sub-isolation layer 201 is integrated, thereby having the structure shown in FIG. A composite substrate of an isolation layer comprising a substrate 1, an isolation layer composed of the first sub-isolation layer 2 and the second sub-isolation layer 201, and a semiconductor layer 301 on the isolation layer.
  • the Si film is initially formed in the opening 21 in the first sub-spacer layer 2, and the Si film defect which is epitaxially grown at the opening due to the lattice mismatch of the bulk substrate 1 and the epitaxial Si material More, with the progress of lateral epitaxial growth, the defects of the Si epitaxial film are gradually reduced, and the crystal quality of the laterally grown Si is gradually increased. Therefore, in the lateral growth process, the lattice structure of Si gradually becomes complete, and the more away from the opening 21 The less the far defects, the higher the crystal quality, but at the intermediate position of the two openings 21, the epitaxial layer lattice structure of the land 202 may be poor due to the influence of the material system and growth conditions.
  • the seed layer in the bonding region 202 is etched away, and only the lateral epitaxial film other than the bonding region 202, that is, the portion having a higher crystal quality, is used as the seed layer for secondary epitaxy, thereby enabling isolation in an amorphous state.
  • the substrate materials used in the present invention include, but are not limited to, sapphire, Si, SiC, GaAs, InP, Ge, etc., and those skilled in the art can flexibly select the desired lining according to actual needs.
  • the type of material at the bottom includes sapphire, Si, SiC, GaAs, InP, Ge, etc.
  • the spacer material used in the present invention may include an insulating dielectric material (ie, an electrical isolation layer material), a highly reflective material such as a metal (ie, an optical isolation layer material such as an opaque material).
  • the spacer material includes, but is not limited to, SiO 2 , Ti 0 2 , A 1 2 0 3 , Ti 3 0 5 , Zr0 2 , Ta 2 0 5 , SiN, A1N, molybdenum, nickel, ruthenium, platinum, titanium, tungsten, chromium, and A combination of the above materials.
  • the spacer layer referred to in the present invention is not limited to electrical and optical isolation, and may be isolated from the semiconductor layer and the substrate layer on both sides in other physical or chemical parameters, such as isolation with wet chemical etching selectivity. More generally, the spacer layer referred to in the present invention means that the semiconductor layer is separated from the substrate, and those skilled in the art can flexibly combine the respective materials of the substrate, the spacer layer, and the semiconductor layer according to actual needs.
  • the method for preparing the sub-isolation layer is not limited to the method described in the above embodiments, and may be other film preparation methods known in the art, such as chemical vapor deposition, electron beam evaporation, sputtering. , atomic layer deposition, thermal oxidation, wet oxidation, etc.
  • the plurality of openings 21 formed in the first sub-spacer layer 2 may also be other patterns, such as a matrix.
  • semiconductor materials suitable for lateral growth formed over the isolation layer include, but are not limited to, GaN, AlGaN, InGaN, GaAs, InGaAs, InGaAlP, Si, Ge, GeSi materials, and the like.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Recrystallisation Techniques (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)

Abstract

Provided is a manufacturing method of a composite substrate having an isolation layer, the method comprising: forming on a substrate (1) a first sub isolation layer (1) having an opening (21) exposing the substrate (1); utilizing a lateral growth method to form a seed layer (3) made of a semiconductor material thin film on the first sub isolation layer (2) and the substrate (1); selectively etching the seed layer (3), leaving a part of the seed layer (3) as a seed region (31) on the first sub isolation layer (2); forming a second sub isolation layer (201) covering the substrate (1), the first sub isolation layer (2), and the seed region (31); forming an opening in the second sub isolation layer (201), the opening exposing at least a part of the seed region (31); and using at least a part of the seed region (31) as a seed to grow a semiconductor layer (301) on the second sub isolation layer (201) by employing the lateral growth method.

Description

一种具有隔离层的复合衬底及其制造方法 技术领域  Composite substrate with isolation layer and manufacturing method thereof
本发明涉及一种用于制造半导体器件的衬底, 尤其涉及一种具有隔离 层的复合衬底及其制造方法。 背景技术  The present invention relates to a substrate for fabricating a semiconductor device, and more particularly to a composite substrate having an isolation layer and a method of fabricating the same. Background technique
在半导体工业中, 通常使用硅材料作为衬底, 通过掺杂、 光刻、 沉积 等手段在硅衬底上制作出各种半导体器件, 但是这种在硅衬底上直接制作 的半导体器件与硅衬底是电气耦合的, 会导致较大的漏电流、 高功耗和大 的寄生电容。  In the semiconductor industry, a silicon material is usually used as a substrate, and various semiconductor devices are fabricated on a silicon substrate by doping, photolithography, deposition, etc., but the semiconductor device and silicon directly fabricated on a silicon substrate are used. The substrate is electrically coupled, resulting in large leakage currents, high power dissipation, and large parasitic capacitance.
近年来发展出了一种新的半导体器件衬底一一绝缘体上硅晶片 ( SOI, Silicon On Insulator ), 它由顶层的单晶硅、 中间层的绝缘体氧化硅和底层 的衬底单晶硅组成, 在顶层的单晶硅中形成半导体器件。 S0I利用氧化硅 绝缘层隔断了顶层的半导体器件与底层衬底之间的电气耦合。基于 S0I的 集成电路具有漏电流小、 功耗低、 寄生电容小、 响应速度快等一系列优点, 是新一代集成电路芯片的主流技术。  In recent years, a new semiconductor device substrate, SOI (Silicon On Insulator), has been developed, which consists of a single crystal silicon on the top layer, an insulator silicon oxide on the middle layer, and a single crystal silicon on the underlying substrate. Forming a semiconductor device in the monocrystalline silicon of the top layer. The S0I utilizes a silicon oxide insulating layer to block electrical coupling between the top-level semiconductor device and the underlying substrate. The S0I-based integrated circuit has a series of advantages such as low leakage current, low power consumption, small parasitic capacitance, and fast response speed, and is a mainstream technology of a new generation of integrated circuit chips.
另外, 随着器件工艺的发展, 还发展出了许多与 S0I衬底相类似的衬 底, 如绝缘体上锗(GeOI )、 绝缘体上氮化硅、 绝缘体上 GaN等等, 这类 衬底中均具有一个绝缘层, 作为顶层半导体层与底层衬底之间的电隔离 层, 以将顶层半导体层中的半导体器件与底层衬底之间电隔离, 从而减小 漏电流、 降低功耗和寄生电容。  In addition, with the development of device technology, many substrates similar to SOI substrates have been developed, such as germanium on insulator (GeOI), silicon nitride on insulator, GaN on insulator, etc. An insulating layer is used as an electrical isolation layer between the top semiconductor layer and the underlying substrate to electrically isolate the semiconductor device in the top semiconductor layer from the underlying substrate to reduce leakage current, power consumption, and parasitic capacitance .
除了电隔离层之外, 某些光学器件, 例如 LED, 还希望能够在衬底中 引入光学隔离层, 以反射 LED发出的光, 从而防止衬底漏光造成的光损 耗。  In addition to electrical isolation layers, certain optical devices, such as LEDs, are also desirable to introduce an optical isolation layer into the substrate to reflect the light emitted by the LEDs, thereby preventing light loss due to substrate leakage.
这种具有电学或光学隔离层的衬底一般包括基底、 隔离层和半导体 层, 其中基底通常由块体材料构成, 隔离层用于在电学、 光学等性质上使 半导体层与基底相隔离。 具有隔离层的衬底一般釆用多层连续生长的方 式, 通过基底上先后生长隔离层和半导体层而形成。 但是隔离层很薄, 难 以形成完整的晶格结构, 通常为非晶态, 因此后续生长的半导体层的晶格 质量难以保证。例如若在蓝宝石基底上生长二氧化硅隔离层和 GaN半导体 层, 由于二氧化硅隔离层是非晶结构, 无法形成完整的晶格结构, 因此无 法直接在二氧化硅隔离层上生长 GaN半导体外延层。 发明内容 Such a substrate having an electrical or optical isolation layer generally comprises a substrate, an isolation layer and a semiconductor layer, wherein the substrate is typically comprised of a bulk material for isolating the semiconductor layer from the substrate in electrical, optical, etc. properties. The substrate having the isolation layer is generally formed by successively growing a plurality of layers, by sequentially forming an isolation layer and a semiconductor layer on the substrate. However, the isolation layer is very thin and it is difficult to form a complete lattice structure, which is usually amorphous, so that the lattice quality of the subsequently grown semiconductor layer is difficult to ensure. For example, if a silicon dioxide spacer and a GaN semiconductor are grown on a sapphire substrate The layer, since the silicon dioxide isolation layer is an amorphous structure and cannot form a complete lattice structure, it is not possible to directly grow a GaN semiconductor epitaxial layer on the silicon dioxide isolation layer. Summary of the invention
因此, 本发明的目的在于提供一种具有隔离层的复合衬底及其制造方 法, 能够确保顶层的半导体层具有良好的晶体质量, 从而提高半导体层中 所制作的半导体器件的性能。  SUMMARY OF THE INVENTION Accordingly, it is an object of the present invention to provide a composite substrate having an isolation layer and a method of fabricating the same, which can ensure that the semiconductor layer of the top layer has a good crystal quality, thereby improving the performance of the semiconductor device fabricated in the semiconductor layer.
本发明提供一种具有隔离层的复合衬底的制造方法, 包括:  The invention provides a method for manufacturing a composite substrate having an isolation layer, comprising:
1 )在基底上形成具有露出该基底的开口的第一子隔离层;  1) forming a first sub-isolation layer having an opening exposing the substrate on the substrate;
2 ) 利用横向生长法在第一子隔离层和基底上形成半导体材料薄膜构 成的种子层;  2) forming a seed layer formed of a thin film of a semiconductor material on the first sub-isolation layer and the substrate by a lateral growth method;
3 ) 选择性刻蚀种子层, 留下第一子隔离层上的一部分种子层作为种 子区;  3) selectively etching the seed layer leaving a portion of the seed layer on the first sub-isolation layer as a seed region;
4 ) 形成覆盖基底、 第一子隔离层和种子区的第二子隔离层;  4) forming a second sub-isolation layer covering the substrate, the first sub-isolation layer and the seed region;
5 )在第二子隔离层中形成开口以暴露出所述种子区的至少一部分。 根据本发明提供的方法, 还包括步骤 6 ) 以所述种子区的至少一部分 作为种子, 利用横向生长法在第二子隔离层上生长半导体层。  5) forming an opening in the second sub-isolation layer to expose at least a portion of the seed region. According to the method provided by the present invention, the method further comprises the step of: growing a semiconductor layer on the second sub-isolation layer by lateral growth using at least a portion of the seed region as a seed.
根据本发明提供的方法, 其中步骤 2 ) 中, 所述种子层由多个开口处 的基底上开始外延生长, 并在两个开口中间的位置处接合, 形成接合区, 其中所述种子区优选不包括所述接合区。 本发明也可以利用接合区中的种 子层作为种子再进行横向外延, 也同样可以实现本发明的目的, 但优选为 利用接合区以外的种子层作为种子进行横向外延。  According to the method provided by the present invention, in the step 2), the seed layer is epitaxially grown from a substrate at a plurality of openings, and joined at a position intermediate the two openings to form a joint region, wherein the seed region is preferably The junction area is not included. The present invention can also achieve the object of the present invention by using the seed layer in the joint region as a seed and then performing lateral extension. However, it is preferable to carry out lateral extension using a seed layer other than the joint region as a seed.
根据本发明提供的方法, 其中所述第一子隔离层和第二子隔离层由绝 缘介质材料构成。  According to the method provided by the present invention, the first sub-isolation layer and the second sub-isolation layer are composed of an insulating dielectric material.
根据本发明提供的方法, 其中所述第一子隔离层和第二子隔离层由金 属材料构成。  According to the method provided by the present invention, the first sub-isolation layer and the second sub-isolation layer are composed of a metal material.
根据本发明提供的方法, 其中所述基底的材料为蓝宝石、 Si、 SiC、 GaAs、 InP或 Ge。  According to the method provided by the present invention, the material of the substrate is sapphire, Si, SiC, GaAs, InP or Ge.
根据本发明提供的方法, 其中所述第一子隔离层和第二子隔离层的材 料为 Si02、 Ti02、 A1203、 Ti305、 Zr02、 Ta205、 SiN、 A1N、 钼、 镍、 钽、 铂、 钛、 钨、 铬中的一种或多种的组合。 According to the method provided by the present invention, the materials of the first sub-isolation layer and the second sub-isolation layer are Si0 2 , Ti0 2 , A1 2 0 3 , Ti 3 0 5 , Zr0 2 , Ta 2 0 5 , SiN, A combination of one or more of A1N, molybdenum, nickel, ruthenium, platinum, titanium, tungsten, chromium.
根据本发明提供的方法, 其中所述半导体层的材料为 GaN、 AlGaN、 InGaN、 GaAs, InGaAs, InGaAlP, Si、 Ge或 GeSi。 According to the method provided by the present invention, the material of the semiconductor layer is GaN, AlGaN, InGaN, GaAs, InGaAs, InGaAlP, Si, Ge or GeSi.
本发明提供一种复合衬底, 包括:  The invention provides a composite substrate comprising:
基底;  Substrate
基底上的具有开口的第一子隔离层;  a first sub-isolation layer having an opening on the substrate;
第一子隔离层的开口以外的区域上方的种子区;  a seed region above the region other than the opening of the first sub-isolation layer;
第二子隔离层, 覆盖第一子隔离层的开口以及至少部分第一子隔离 层, 且具有至少露出种子区的一部分的开口。  a second sub-isolation layer covering the opening of the first sub-isolation layer and at least a portion of the first sub-isolation layer and having an opening that exposes at least a portion of the seed region.
根据本发明提供的复合衬底, 还包括覆盖第一子隔离层和第二子隔离 层的半导体层, 该半导体层由种子区的至少一部分通过横向生长而形成。  A composite substrate according to the present invention, further comprising a semiconductor layer covering the first sub-isolation layer and the second sub-isolation layer, the semiconductor layer being formed by lateral growth of at least a portion of the seed region.
本发明提供的复合衬底制造方法, 能够确保顶层的半导体层具有良好 的晶体质量, 从而提高半导体层中所制作的半导体器件的性能。  The composite substrate manufacturing method provided by the present invention can ensure that the semiconductor layer of the top layer has a good crystal quality, thereby improving the performance of the semiconductor device fabricated in the semiconductor layer.
本发明提供的方法可作为 SOI衬底的替代制备方案, 适应目前的硅工 艺技术。  The method provided by the present invention can be used as an alternative preparation scheme for SOI substrates to adapt to current silicon process technology.
本发明提供的方法可作为广义的 SOI衬底的制备方案, 可以应用于硅 上 GaAs外延、 硅上 GaN外延、 蓝宝石上或硅上带反射层 GaN LED工艺 技术等等。  The method provided by the invention can be used as a preparation scheme of a generalized SOI substrate, and can be applied to GaAs epitaxy on silicon, GaN epitaxy on silicon, sapphire on silicon or GaN LED process technology with reflective layer on silicon.
本发明提供的方法中通过二次横向外延, 避免了高密度位错缺陷区, 利用位错缺陷较低的区域作为种子层进行第二次横向外延, 可以生长高性 能的异质外延材料。  In the method provided by the invention, the high-density dislocation defect region is avoided by the secondary lateral epitaxy, and the second lateral epitaxy is performed by using the region with the lower dislocation defect as the seed layer, and the high-performance heteroepitaxial material can be grown.
本发明提供的方法所制造的复合衬底中, 由于隔离层的存在, 可通过 简易的衬底剥离技术, 使隔离层溶解, 从而使半导体层剥离下来使用, 剥 离后剩余的基底可再次使用, 大幅降低了器件的制作成本, 实现了半导体 工艺的绿色环保化。 附图说明  In the composite substrate produced by the method provided by the present invention, due to the existence of the isolation layer, the isolation layer can be dissolved by a simple substrate stripping technique, so that the semiconductor layer is peeled off and used, and the remaining substrate after peeling can be reused. The manufacturing cost of the device is greatly reduced, and the greening of the semiconductor process is realized. DRAWINGS
以下参照附图对本发明实施例作进一步说明, 其中:  The embodiments of the present invention are further described below with reference to the accompanying drawings, wherein:
图 1-图 8为根据本发明的一个实施例的工艺流程的示意图。 具体实施方式  1 through 8 are schematic views of a process flow in accordance with an embodiment of the present invention. detailed description
为了使本发明的目的、 技术方案及优点更加清楚明白, 以下结合具体 实施例, 对本发明进一步详细说明。 应当理解, 此处所描述的具体实施例 仅仅用以解释本发明, 并不用于限定本发明。 实施例 1 In order to make the objects, technical solutions and advantages of the present invention more comprehensible, the present invention will be further described in detail below with reference to specific embodiments. It is understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention. Example 1
本实施例提供一种具有隔离层的复合衬底的制造方法, 其工艺流程如 图 1-8所示, 包括:  The embodiment provides a method for manufacturing a composite substrate having an isolation layer. The process flow is as shown in FIG. 1-8, and includes:
1 )如图 1所示, 利用 PECVD法在蓝宝石基底 1 的表面沉积 300nm 厚的 Si02薄膜作为第一子隔离层 2, 然后利用光刻、 刻蚀工艺在第一子隔 离层 2中形成多个开口 21 , 露出蓝宝石基底 1的表面, 多个开口 21构成 光栅状图形, 其周期为 4微米, 开口 21宽为 1微米; 1) As shown in FIG. 1, a 300 nm thick SiO 2 film is deposited as a first sub-isolation layer 2 on the surface of the sapphire substrate 1 by PECVD, and then formed in the first sub-isolation layer 2 by photolithography and etching processes. Opening 21, exposing the surface of the sapphire substrate 1, the plurality of openings 21 forming a grating pattern having a period of 4 micrometers and an opening 21 having a width of 1 micrometer;
2 )如图 2所示, 利用 MOCVD侧向外延生长技术, 以开口 21处的基 底 1为种子制备 GaN薄膜以作为种子层 3 , 该种子层 3由多个开口 21处 的基底 1上开始外延生长并横向外延, 并在两个开口 21 中间的位置处接 合, 形成接合区 202, 最终完全覆盖第一子隔离层 2;  2) As shown in FIG. 2, a GaN thin film is prepared by using the MOCVD lateral epitaxial growth technique with the substrate 1 at the opening 21 as a seed layer 3, and the seed layer 3 is epitaxially grown from the substrate 1 at the plurality of openings 21. Grown and laterally extended, and joined at a position intermediate the two openings 21, forming a land 202, and finally completely covering the first sub-isolation layer 2;
3 )如图 3所示, 在横向生长的 GaN薄膜构成的种子层 3的表面形成 图案化的掩膜 4 (由光刻胶经曝光、 显影等工艺形成), 该掩模 4呈光栅状 图形, 该光栅状图形的周期为 4微米, 光栅状条紋宽 1微米, 该光栅状掩 膜 4仅覆盖开口 21之间的一部分种子层 3 , 且不覆盖种子层 3的接合区 202;  3) As shown in FIG. 3, a patterned mask 4 (formed by a process of exposure, development, etc.) is formed on the surface of the seed layer 3 composed of a laterally grown GaN film, and the mask 4 has a raster pattern. The grating-like pattern has a period of 4 micrometers, and the grating-like stripe has a width of 1 micrometer. The grating-like mask 4 covers only a portion of the seed layer 3 between the openings 21 and does not cover the joint region 202 of the seed layer 3;
4 )如图 4所示, 以该掩膜 4为刻蚀阻挡层刻蚀种子层 3, 留下被掩膜 4遮挡的种子层 3 , 作为种子区 31 , 其中第一子隔离层 2上未被掩膜 4遮 挡的 GaN薄膜被刻蚀干净, 开口 21 中可能会残留部分种子层 3 (如图 4 中所示), 也可能没有种子层 3 的残留, 这并不影响后续工艺以及所得产 品的最终性能, 因此工艺裕度较大;  4), as shown in FIG. 4, the seed layer 3 is etched by using the mask 4 as an etch barrier, leaving the seed layer 3 blocked by the mask 4 as a seed region 31, wherein the first sub-isolation layer 2 is not The GaN film blocked by the mask 4 is etched clean, and some of the seed layer 3 may remain in the opening 21 (as shown in FIG. 4), or there may be no residue of the seed layer 3, which does not affect the subsequent process and the resulting product. The final performance, so the process margin is large;
5 )如图 5所示, 去除掩膜 4;  5) as shown in Figure 5, remove the mask 4;
6 )如图 6所示, 利用 PECVD沉积 300nm厚的 Si02薄膜作为第二子 隔离层 201 ; 6) As shown in FIG. 6, a 300 nm thick SiO 2 film is deposited by PECVD as the second sub-isolation layer 201;
7 )如图 7所示, 在第二子隔离层 201中形成开口以露出种子区 31 ; 7) as shown in FIG. 7, an opening is formed in the second sub-isolation layer 201 to expose the seed region 31;
8 )如图 8所示, 利用种子区 31的 GaN材料作为种子, 进行 GaN的 二次横向外延生长,直至第二子隔离层 201上的 GaN薄膜形成一体,从而 构成如图 8所示的具有隔离层的复合衬底, 其包括基底 1、 由第一子隔离 层 2和第二子隔离层 201—起组成的隔离层以及隔离层上的半导体层 301 , 其中基底上的第一子隔离层中具有开口, 第一子隔离层的开口以外的区域 上方具有种子区, 第二子隔离层覆盖第一子隔离层的开口以及至少部分第 一子隔离层, 且具有至少露出种子区的一部分的开口, 半导体层覆盖第一 子隔离层和第二子隔离层, 该半导体层由种子区的横向生长而形成。 8) As shown in FIG. 8, the GaN material of the seed region 31 is used as a seed, and the secondary lateral epitaxial growth of GaN is performed until the GaN film on the second sub-isolation layer 201 is integrated, thereby having the structure shown in FIG. a composite substrate of an isolation layer comprising a substrate 1, an isolation layer composed of a first sub-isolation layer 2 and a second sub-isolation layer 201, and a semiconductor layer 301 on the isolation layer, wherein the first sub-isolation layer on the substrate Having an opening therein, a region other than the opening of the first sub-isolation layer having a seed region, the second sub-isolation layer covering the opening of the first sub-isolation layer and at least a portion a sub-isolation layer having an opening exposing at least a portion of the seed region, the semiconductor layer covering the first sub-isolation layer and the second sub-isolation layer, the semiconductor layer being formed by lateral growth of the seed region.
在横向生长种子层 3的过程中, GaN薄膜最初在第一子隔离层 2中的 开口 21中形成, 由于块材基底 1与外延 GaN材料存在晶格失配, 开口处 外延生长的 GaN薄膜缺陷较多, 随着横向外延生长的进行, GaN外延薄 膜的缺陷逐渐减少,横向生长的 GaN的晶体质量逐渐提高, 因此在横向生 长过程中, GaN的晶格结构逐渐趋于完整, 离开口 21越远缺陷越少, 晶 体质量越高, 但是在两个开口 21 的中间位置处, 由于材料体系和生长条 件的影响, 接合区 202的外延层晶格结构可能会较差。 因此接合区 202中 的种子层被刻蚀掉, 仅利用接合区 202以外的横向外延薄膜, 即晶体质量 较高的这部分, 作为种子再进行二次外延, 从而能够在非晶态的隔离层上 形成晶体质量更高的 GaN半导体层 301。 因此, 本实施例提供的方法所制 备出的具有隔离层的复合衬底中, 半导体层的晶体质量高、 缺陷少, 从而 能够提高半导体层中所制作的半导体器件的性能。  In the process of laterally growing the seed layer 3, the GaN film is initially formed in the opening 21 in the first sub-isolation layer 2, and the GaN film defect epitaxially grown at the opening due to the lattice mismatch of the bulk substrate 1 and the epitaxial GaN material More, with the progress of lateral epitaxial growth, the defects of GaN epitaxial film are gradually reduced, and the crystal quality of laterally grown GaN is gradually improved. Therefore, during lateral growth, the lattice structure of GaN gradually becomes complete, and the more away from opening 21 The less the far defects, the higher the crystal quality, but at the intermediate position of the two openings 21, the epitaxial layer lattice structure of the land 202 may be poor due to the influence of the material system and growth conditions. Therefore, the seed layer in the bonding region 202 is etched away, and only the lateral epitaxial film other than the bonding region 202, that is, the portion having a higher crystal quality, is used as a seed and then subjected to secondary epitaxy, thereby being capable of being in an amorphous isolation layer. A GaN semiconductor layer 301 having a higher crystal quality is formed thereon. Therefore, in the composite substrate having the isolation layer prepared by the method provided by the embodiment, the semiconductor layer has high crystal quality and few defects, so that the performance of the semiconductor device fabricated in the semiconductor layer can be improved.
根据本发明的其他实施例, 也可以利用接合区 202中的种子层 3作为 种子再进行二次外延, 也同样可以实现本发明的目的, 但优选为利用接合 区 202以外的种子层 3作为种子进行二次外延。 实施例 2  According to other embodiments of the present invention, it is also possible to perform secondary epitaxy by using the seed layer 3 in the bonding region 202 as a seed, and the object of the present invention can also be achieved, but it is preferable to use the seed layer 3 other than the bonding region 202 as a seed. Perform secondary extension. Example 2
本实施例提供一种具有隔离层的复合衬底的制造方法, 其工艺流程如 图 1-8所示, 包括:  The embodiment provides a method for manufacturing a composite substrate having an isolation layer. The process flow is as shown in FIG. 1-8, and includes:
1 )如图 1所示, 利用 PECVD法或热氧化法在硅基底 1 的表面形成 300nm厚的 Si02薄膜作为第一子隔离层 2, 然后利用光刻、 刻蚀工艺在第 一子隔离层 2中形成多个开口 21 , 露出硅基底 1的表面, 多个开口 21构 成光栅状图形, 其周期为 4微米, 开口 21宽为 1微米; 1) As shown in FIG. 1, a 300 nm thick SiO 2 film is formed on the surface of the silicon substrate 1 as the first sub-isolation layer 2 by PECVD or thermal oxidation, and then the first sub-isolation layer is formed by photolithography and etching processes. a plurality of openings 21 are formed in the second surface to expose the surface of the silicon substrate 1, and the plurality of openings 21 form a grating-like pattern having a period of 4 micrometers and an opening 21 having a width of 1 micrometer;
2 )如图 2所示, 利用 MOCVD横向外延生长技术, 以开口 21处的基 底 1为种子制备 GaN薄膜作为种子层 3 , 该种子层 3由多个开口 21处的 基底 1上开始外延生长并横向外延, 并在两个开口 21中间的位置处接合, 形成接合区 202, 最终完全覆盖第一子隔离层 2;  2) As shown in FIG. 2, a GaN thin film is prepared as a seed layer 3 by using the MOCVD lateral epitaxial growth technique with the substrate 1 at the opening 21 as a seed, and the seed layer 3 is epitaxially grown from the substrate 1 at the plurality of openings 21 and Lateral extension, and joined at a position intermediate the two openings 21, forming a land 202, and finally completely covering the first sub-isolation layer 2;
3 )如图 3所示, 在横向生长的 GaN薄膜构成的种子层 3的表面形成 图案化的掩膜 4 (由光刻胶经曝光、 显影等工艺形成), 该掩模 4呈光栅状 图形, 该光栅状图形的周期为 4微米, 光栅状条紋宽 1微米, 该光栅状掩 膜 4仅覆盖开口 21之间的一部分种子层 3 , 且不覆盖种子层 3的接合区 202; 3) As shown in FIG. 3, a patterned mask 4 (formed by a process of exposure, development, etc.) is formed on the surface of the seed layer 3 composed of a laterally grown GaN film, and the mask 4 has a raster pattern. The grating-like pattern has a period of 4 micrometers, and the grating-like stripe has a width of 1 micrometer. The film 4 covers only a portion of the seed layer 3 between the openings 21 and does not cover the land 202 of the seed layer 3;
4 )如图 4所示, 以该掩膜 4为刻蚀阻挡层刻蚀种子层 3, 留下被掩膜 4遮挡的种子层, 作为种子区 31 , 其中第一子隔离层 2上未被掩膜 4遮挡 的 GaN薄膜被刻蚀干净, 开口 21中可能会残留部分种子层 3 (如图 4中 所示), 也可能没有种子层 3 的残留, 这并不影响后续工艺以及所得产品 的最终性能, 因此工艺裕度较大;  4), as shown in FIG. 4, the seed layer 3 is etched by using the mask 4 as an etch barrier, leaving a seed layer blocked by the mask 4 as a seed region 31, wherein the first sub-isolation layer 2 is not The GaN film blocked by the mask 4 is etched clean, and some of the seed layer 3 may remain in the opening 21 (as shown in FIG. 4), or there may be no residue of the seed layer 3, which does not affect the subsequent process and the obtained product. Final performance, so the process margin is large;
5 )如图 5所示, 去除掩膜 4;  5) as shown in Figure 5, remove the mask 4;
6 )如图 6所示, 利用 PECVD沉积 300nm厚的 Si02薄膜作为第二子 隔离层 201 ; 6) As shown in FIG. 6, a 300 nm thick SiO 2 film is deposited by PECVD as the second sub-isolation layer 201;
7 )如图 7所示, 在第二子隔离层 201中形成开口以露出种子区 31 ; 7) as shown in FIG. 7, an opening is formed in the second sub-isolation layer 201 to expose the seed region 31;
8 )如图 8所示, 利用种子区 31的 GaN材料作为种子, 进行 GaN的 二次横向外延生长,直至第二子隔离层 201上的 GaN薄膜形成一体,从而 构成如图 8所示的具有隔离层的复合衬底, 其包括基底 1、 由第一子隔离 层 2和第二子隔离层 201—起组成的隔离层以及隔离层上的半导体层 301。 其中基底上的第一子隔离层中具有开口, 第一子隔离层的开口以外的区域 上方具有种子区, 第二子隔离层覆盖第一子隔离层的开口以及至少部分第 一子隔离层, 且具有至少露出种子区的一部分的开口, 半导体层覆盖第一 子隔离层和第二子隔离层, 该半导体层由种子区的横向生长而形成。 8) As shown in FIG. 8, the GaN material of the seed region 31 is used as a seed, and the secondary lateral epitaxial growth of GaN is performed until the GaN film on the second sub-isolation layer 201 is integrated, thereby having the structure shown in FIG. A composite substrate of an isolation layer comprising a substrate 1, an isolation layer composed of the first sub-isolation layer 2 and the second sub-isolation layer 201, and a semiconductor layer 301 on the isolation layer. Wherein the first sub-isolation layer on the substrate has an opening, the region other than the opening of the first sub-isolation layer has a seed region, and the second sub-isolation layer covers the opening of the first sub-isolation layer and at least a portion of the first sub-isolation layer. And having an opening exposing at least a portion of the seed region, the semiconductor layer covering the first sub-isolation layer and the second sub-isolation layer, the semiconductor layer being formed by lateral growth of the seed region.
在横向生长种子层 3的过程中, GaN薄膜最初在第一子隔离层 2中的 开口 21中形成, 由于块材基底 1与外延 GaN材料存在晶格失配, 开口处 外延生长的 GaN薄膜缺陷较多, 随着横向外延生长的进行, GaN外延薄 膜的缺陷逐渐减少,横向生长的 GaN的晶体质量逐渐提高, 因此在横向生 长过程中, GaN的晶格结构逐渐趋于完整, 离开口 21越远缺陷越少, 晶 体质量越高, 但是在两个开口 21 的中间位置处, 由于材料体系和生长条 件的影响, 接合区 202的外延层晶格结构可能会较差。 因此接合区 202中 的种子层被刻蚀掉, 仅利用接合区 202以外的横向外延薄膜, 即晶体质量 较高的这部分, 作为种子层再进行二次外延, 从而能够在非晶态的隔离层 上形成晶体质量更高的 GaN半导体层 301。 因此, 本实施例提供的方法所 制备出的具有隔离层的复合衬底中, 半导体层的晶体质量高、 缺陷少, 从 而能够提高半导体层中所制作的半导体器件的性能。 实施例 3 In the process of laterally growing the seed layer 3, the GaN film is initially formed in the opening 21 in the first sub-isolation layer 2, and the GaN film defect epitaxially grown at the opening due to the lattice mismatch of the bulk substrate 1 and the epitaxial GaN material More, with the progress of lateral epitaxial growth, the defects of GaN epitaxial film are gradually reduced, and the crystal quality of laterally grown GaN is gradually improved. Therefore, during lateral growth, the lattice structure of GaN gradually becomes complete, and the more away from opening 21 The less the far defects, the higher the crystal quality, but at the intermediate position of the two openings 21, the epitaxial layer lattice structure of the land 202 may be poor due to the influence of the material system and growth conditions. Therefore, the seed layer in the bonding region 202 is etched away, and only the lateral epitaxial film other than the bonding region 202, that is, the portion having a higher crystal quality, is used as the seed layer for secondary epitaxy, thereby being able to be isolated in an amorphous state. A GaN semiconductor layer 301 having a higher crystal quality is formed on the layer. Therefore, in the composite substrate having the isolation layer prepared by the method provided by the embodiment, the semiconductor layer has high crystal quality and few defects, so that the performance of the semiconductor device fabricated in the semiconductor layer can be improved. Example 3
本实施例提供一种具有隔离层的复合衬底的制造方法, 其工艺流程如 图 1-8所示, 包括:  The embodiment provides a method for manufacturing a composite substrate having an isolation layer. The process flow is as shown in FIG. 1-8, and includes:
1 )如图 1所示,利用蒸发或溅射法在蓝宝石基底 1的表面形成 300nm 厚的金属钼薄膜作为第一子隔离层 2 , 然后利用光刻、 刻蚀工艺在第一子 隔离层 2中形成多个开口 21 , 露出蓝宝石基底 1的表面, 多个开口 21构 成光栅状图形, 其周期为 4微米, 开口 21宽为 1微米;  1) As shown in FIG. 1, a 300 nm thick metal molybdenum thin film is formed on the surface of the sapphire substrate 1 by evaporation or sputtering as the first sub-isolation layer 2, and then in the first sub-isolation layer 2 by photolithography and etching processes. Forming a plurality of openings 21 to expose the surface of the sapphire substrate 1, the plurality of openings 21 forming a grating-like pattern having a period of 4 micrometers and an opening 21 having a width of 1 micrometer;
2 )如图 2所示, 利用 MOCVD横向外延生长技术, 以开口 21处的基 底 1为种子制备 GaN薄膜作为种子层 3 , 该种子层 3由多个开口 21处的 基底 1上开始外延生长并横向外延, 并在两个开口 21中间的位置处接合, 形成接合区 202 , 最终完全覆盖第一子隔离层 2;  2) As shown in FIG. 2, a GaN thin film is prepared as a seed layer 3 by using the MOCVD lateral epitaxial growth technique with the substrate 1 at the opening 21 as a seed, and the seed layer 3 is epitaxially grown from the substrate 1 at the plurality of openings 21 and Lateral extension, and joined at a position intermediate the two openings 21, forming a land 202, and finally completely covering the first sub-isolation layer 2;
3 )如图 3所示, 在横向生长的 GaN薄膜构成的种子层 3的表面形成 图案化的掩膜 4 (由光刻胶经曝光、 显影等工艺形成), 该掩模 4呈光栅状 图形, 该光栅状图形的周期为 4微米, 光栅状条紋宽 1微米, 该光栅状掩 膜 4仅覆盖开口 21之间的一部分种子层 3 , 且不覆盖种子层 3的接合区 202;  3) As shown in FIG. 3, a patterned mask 4 (formed by a process of exposure, development, etc.) is formed on the surface of the seed layer 3 composed of a laterally grown GaN film, and the mask 4 has a raster pattern. The grating-like pattern has a period of 4 micrometers, and the grating-like stripe has a width of 1 micrometer. The grating-like mask 4 covers only a portion of the seed layer 3 between the openings 21 and does not cover the joint region 202 of the seed layer 3;
4 )如图 4所示, 以该掩膜 4为刻蚀阻挡层刻蚀种子层 3, 留下被掩膜 4遮挡的种子层, 作为种子区 31 , 其中第一子隔离层 2上未被掩膜 4遮挡 的 GaN薄膜被刻蚀干净, 开口 21中可能会残留部分种子层 3 (如图 4中 所示), 也可能没有种子层 3 的残留, 这并不影响后续工艺以及所得产品 的最终性能, 因此工艺裕度较大;  4), as shown in FIG. 4, the seed layer 3 is etched by using the mask 4 as an etch barrier, leaving a seed layer blocked by the mask 4 as a seed region 31, wherein the first sub-isolation layer 2 is not The GaN film blocked by the mask 4 is etched clean, and some of the seed layer 3 may remain in the opening 21 (as shown in FIG. 4), or there may be no residue of the seed layer 3, which does not affect the subsequent process and the obtained product. Final performance, so the process margin is large;
5 )如图 5所示, 去除掩膜 4;  5) as shown in Figure 5, remove the mask 4;
6 )如图 6所示, 利用蒸发或溅射法沉积 300nm厚的金属钼薄膜作为 第二子隔离层 201 ;  6) depositing a 300 nm thick metal molybdenum film as the second sub-isolation layer 201 by evaporation or sputtering as shown in FIG. 6;
7 )如图 7所示, 在第二子隔离层 201中形成开口以露出种子区 31 ; 7) as shown in FIG. 7, an opening is formed in the second sub-isolation layer 201 to expose the seed region 31;
8 )如图 8所示, 利用种子区 31的 GaN材料作为种子, 进行 GaN的 二次横向外延生长,直至第二子隔离层 201上的 GaN薄膜形成一体,从而 构成如图 8所示的具有隔离层的复合衬底, 其包括基底 1、 由第一子隔离 层 2和第二子隔离层 201—起组成的隔离层以及隔离层上的 GaN半导体层 301。 8) As shown in FIG. 8, the GaN material of the seed region 31 is used as a seed, and the secondary lateral epitaxial growth of GaN is performed until the GaN film on the second sub-isolation layer 201 is integrated, thereby having the structure shown in FIG. A composite substrate of the isolation layer includes a substrate 1, an isolation layer composed of the first sub-isolation layer 2 and the second sub-isolation layer 201, and a GaN semiconductor layer 301 on the isolation layer.
在横向生长种子层 3的过程中, GaN薄膜最初在第一子隔离层 2中的 开口 21中形成, 由于块材基底 1与外延 GaN材料存在晶格失配, 开口处 外延生长的 GaN薄膜缺陷较多, 随着横向外延生长的进行, GaN外延薄 膜的缺陷逐渐减少,横向生长的 GaN的晶体质量逐渐提高, 因此在横向生 长过程中, GaN的晶格结构逐渐趋于完整, 离开口 21越远缺陷越少, 晶 体质量越高, 但是在两个开口 21 的中间位置处, 由于材料体系和生长条 件的影响, 接合区 202的外延层晶格结构可能会较差。 因此接合区 202中 的种子层被刻蚀掉, 仅利用接合区 202以外的横向外延薄膜, 即晶体质量 较高的这部分, 作为种子层再进行二次外延, 从而能够在非晶态的隔离层 上形成晶体质量更高的 GaN半导体层 301。 因此, 本实施例提供的方法所 制备出的具有隔离层的复合衬底中, 半导体层的晶体质量高、 缺陷少, 从 而能够提高半导体层中所制作的半导体器件的性能。 In the process of laterally growing the seed layer 3, the GaN film is initially formed in the opening 21 in the first sub-isolation layer 2, due to the lattice mismatch of the bulk substrate 1 and the epitaxial GaN material, at the opening The epitaxially grown GaN film has many defects. With the progress of lateral epitaxial growth, the defects of GaN epitaxial film are gradually reduced, and the crystal quality of laterally grown GaN is gradually improved. Therefore, during lateral growth, the lattice structure of GaN gradually tends to Complete, the farther away from the opening 21, the less the defect, the higher the crystal quality, but at the intermediate position of the two openings 21, the epitaxial layer lattice structure of the land 202 may be poor due to the influence of the material system and growth conditions. Therefore, the seed layer in the bonding region 202 is etched away, and only the lateral epitaxial film other than the bonding region 202, that is, the portion having a higher crystal quality, is used as the seed layer for secondary epitaxy, thereby being able to be isolated in an amorphous state. A GaN semiconductor layer 301 having a higher crystal quality is formed on the layer. Therefore, in the composite substrate having the isolation layer prepared by the method provided by the embodiment, the semiconductor layer has high crystal quality and few defects, so that the performance of the semiconductor device fabricated in the semiconductor layer can be improved.
利用本实施例提供的方法所制备的具有隔离层的复合衬底, 可用于制 备 LED等光电器件, 其中钼层可用作反射层, 防止半导体层中的 LED发 出的光从衬底出射, 从而提高 LED 的外量子效率。 另外, 根据本发明的 其他实施例, 也可以釆用其他金属材料或反射率高的氧化物作为隔离层。 实施例 4  The composite substrate with the isolation layer prepared by the method provided by the embodiment can be used for preparing an optoelectronic device such as an LED, wherein the molybdenum layer can be used as a reflective layer to prevent light emitted from the LED in the semiconductor layer from being emitted from the substrate, thereby Improve the external quantum efficiency of the LED. Further, according to other embodiments of the present invention, other metal materials or oxides having a high reflectance may be used as the spacer layer. Example 4
本实施例提供一种具有隔离层的复合衬底的制造方法, 其工艺流程如 图 1-8所示, 包括:  The embodiment provides a method for manufacturing a composite substrate having an isolation layer. The process flow is as shown in FIG. 1-8, and includes:
1 )如图 1所示, 利用 PECVD法或热氧化法在硅基底 1 的表面形成 200nm厚的 Si02薄膜作为第一子隔离层 2, 然后利用光刻、 刻蚀工艺在第 一子隔离层 2中形成多个开口 21 , 露出硅基底 1的表面, 多个开口 21构 成光栅状图形, 其周期为 2微米, 开口 21宽为 0.5微米; 1) As shown in FIG. 1, a 200 nm thick SiO 2 film is formed on the surface of the silicon substrate 1 as the first sub-isolation layer 2 by PECVD or thermal oxidation, and then the first sub-isolation layer is formed by photolithography and etching processes. a plurality of openings 21 are formed in the second surface to expose the surface of the silicon substrate 1, and the plurality of openings 21 form a grating-like pattern having a period of 2 micrometers and an opening 21 having a width of 0.5 micrometers;
2 )如图 2所示, 利用 MOCVD横向外延生长技术, 以开口 21处的基 底 1为种子制备 GaAs薄膜作为种子层 3 , 该种子层 3由多个开口 21处的 基底 1上开始外延生长并横向外延, 并在两个开口 21中间的位置处接合, 形成接合区 202, 最终完全覆盖第一子隔离层 2;  2) As shown in FIG. 2, a GaAs thin film is prepared as a seed layer 3 by using the MOCVD lateral epitaxial growth technique with the substrate 1 at the opening 21 as a seed, and the seed layer 3 is epitaxially grown from the substrate 1 at the plurality of openings 21 and Lateral extension, and joined at a position intermediate the two openings 21, forming a land 202, and finally completely covering the first sub-isolation layer 2;
3 )如图 3所示,在侧向生长的 GaAs薄膜构成的种子层 3的表面形成 图案化的掩膜 4 (由光刻胶经曝光、 显影等工艺形成), 该掩模 4呈光栅状 图形, 该光栅状图形的周期为 2微米, 光栅状条紋宽 0.5微米, 该光栅状 掩膜 4仅覆盖开口 21之间的一部分种子层 3 ,且不覆盖种子层 3的接合区 202;  3) As shown in FIG. 3, a patterned mask 4 (formed by a photoresist, a process such as exposure, development, etc.) is formed on the surface of the seed layer 3 composed of a laterally grown GaAs film, and the mask 4 is in the form of a grating. a pattern, the grating-like pattern has a period of 2 micrometers, and the grating-like stripe has a width of 0.5 micrometers. The grating-like mask 4 covers only a portion of the seed layer 3 between the openings 21 and does not cover the joint region 202 of the seed layer 3;
4 )如图 4所示, 以该掩膜 4为刻蚀阻挡层刻蚀种子层 3 , 留下被掩膜 4遮挡的种子层, 作为种子区 31 , 其中第一子隔离层 2上未被掩膜 4遮挡 的 GaAs薄膜被刻蚀干净, 开口 21中可能会残留部分种子层 3 (如图 4中 所示), 也可能没有种子层 3 的残留, 这并不影响后续工艺以及所得产品 的最终性能, 因此工艺裕度较大; 4) as shown in FIG. 4, etching the seed layer 3 with the mask 4 as an etch barrier, leaving a mask 4, the occluded seed layer, as the seed region 31, wherein the GaAs film not blocked by the mask 4 on the first sub-isolation layer 2 is etched clean, and a part of the seed layer 3 may remain in the opening 21 (as shown in FIG. 4). ), there may be no residue of seed layer 3, which does not affect the subsequent process and the final performance of the resulting product, so the process margin is large;
5 )如图 5所示, 去除掩膜 4;  5) as shown in Figure 5, remove the mask 4;
6 )如图 6所示, 利用 PECVD沉积 200nm厚的 Si02薄膜作为第二子 隔离层 201 ; 6) As shown in FIG. 6, a 200 nm thick SiO 2 film is deposited by PECVD as the second sub-isolation layer 201;
7 )如图 7所示, 在第二子隔离层 201中形成开口以露出种子区 31 ; 7) as shown in FIG. 7, an opening is formed in the second sub-isolation layer 201 to expose the seed region 31;
8 )如图 8所示, 利用种子区 31的 GaAs材料作为种子, 进行 GaAs 的二次横向外延生长, 直至第二子隔离层 201上的 GaAs薄膜形成一体, 从而构成如图 8所示的具有隔离层的复合衬底, 其包括基底 1、 由第一子 隔离层 2和第二子隔离层 201—起组成的隔离层以及隔离层上的半导体层 301。 8) As shown in FIG. 8, the GaAs material of the seed region 31 is used as a seed, and the secondary lateral epitaxial growth of GaAs is performed until the GaAs film on the second sub-isolation layer 201 is integrated, thereby having the structure shown in FIG. A composite substrate of an isolation layer comprising a substrate 1, an isolation layer composed of the first sub-isolation layer 2 and the second sub-isolation layer 201, and a semiconductor layer 301 on the isolation layer.
在横向生长种子层 3的过程中, GaAs薄膜最初在第一子隔离层 2中 的开口 21中形成, 由于块材基底 1与外延 GaAs材料存在晶格失配, 开口 处外延生长的 GaAs薄膜缺陷较多, 随着横向外延生长的进行, GaAs外延 薄膜的缺陷逐渐减少, 横向生长的 GaAs的晶体质量逐渐提高, 因此在横 向生长过程中, GaAs的晶格结构逐渐趋于完整, 离开口 21越远缺陷越少, 晶体质量越高, 但是在两个开口 21 的中间位置处, 由于材料体系和生长 条件的影响, 接合区 202的外延层晶格结构可能会较差。 因此接合区 202 中的种子层被刻蚀掉, 仅利用接合区 202以外的横向外延薄膜, 即晶体质 量较高的这部分, 作为种子层再进行二次外延, 从而能够在非晶态的隔离 层上形成晶体质量更高的 GaAs半导体层 301。 因此, 本实施例提供的方 法所制备出的具有隔离层的复合衬底中,半导体层的晶体质量高、缺陷少, 从而能够提高半导体层中所制作的半导体器件的性能。 实施例 5  In the process of laterally growing the seed layer 3, the GaAs film is initially formed in the opening 21 in the first sub-isolation layer 2, and the GaAs film defect which is epitaxially grown at the opening due to the lattice mismatch of the bulk substrate 1 and the epitaxial GaAs material More, with the progress of lateral epitaxial growth, the defects of GaAs epitaxial film are gradually reduced, and the crystal quality of laterally grown GaAs is gradually improved. Therefore, during lateral growth, the lattice structure of GaAs gradually becomes complete, and the more away from opening 21 The less the far defects, the higher the crystal quality, but at the intermediate position of the two openings 21, the epitaxial layer lattice structure of the land 202 may be poor due to the influence of the material system and growth conditions. Therefore, the seed layer in the bonding region 202 is etched away, and only the lateral epitaxial film other than the bonding region 202, that is, the portion having a higher crystal quality, is used as the seed layer for secondary epitaxy, thereby being able to be isolated in the amorphous state. A GaAs semiconductor layer 301 having a higher crystal quality is formed on the layer. Therefore, in the composite substrate having the isolation layer prepared by the method of the present embodiment, the semiconductor layer has high crystal quality and few defects, so that the performance of the semiconductor device fabricated in the semiconductor layer can be improved. Example 5
本实施例提供一种具有隔离层的复合衬底的制造方法, 其工艺流程如 图 1-8所示, 包括:  The embodiment provides a method for manufacturing a composite substrate having an isolation layer. The process flow is as shown in FIG. 1-8, and includes:
1 )如图 1所示,利用热氧化法在硅基底 1的表面形成 lOOnm厚的 Si02 薄膜作为第一子隔离层 2 , 然后利用光刻、 刻蚀工艺在第一子隔离层 2中 形成多个开口 21 , 露出硅基底 1的表面, 多个开口 21构成光栅状图形, 其周期为 2微米, 开口 21宽为 0.5微米; 1) As shown in FIG. 1, a 100 nm thick SiO 2 film is formed as a first sub-isolation layer 2 on the surface of the silicon substrate 1 by thermal oxidation, and then formed in the first sub-isolation layer 2 by photolithography and etching processes. a plurality of openings 21 exposing the surface of the silicon substrate 1, and the plurality of openings 21 forming a raster pattern The period is 2 microns, and the opening 21 is 0.5 microns wide;
2 )如图 2所示, 利用 CVD横向外延生长技术, 以开口 21处的基底 1为种子制备 Si薄膜作为种子层 3 , 该种子层 3由多个开口 21处的基底 1 上开始外延生长并横向外延, 并在两个开口 21 中间的位置处接合, 形成 接合区 202, 最终覆盖第一子隔离层 2;  2) As shown in FIG. 2, a Si thin film is prepared as a seed layer 3 by using a CVD lateral epitaxial growth technique with the substrate 1 at the opening 21 as a seed, and the seed layer 3 is epitaxially grown from the substrate 1 at the plurality of openings 21 and Lateral extension, and joined at a position intermediate the two openings 21, forming a land 202, and finally covering the first sub-isolation layer 2;
3 )如图 3所示, 在横向生长的 Si薄膜构成的种子层 3的表面形成图 案化的掩膜 4 (由光刻胶经曝光、 显影等工艺形成), 该掩模 4呈光栅状图 形, 该光栅状图形的周期为 2微米, 光栅状条紋宽 0.5微米, 该光栅状掩 膜 4仅覆盖开口 21之间的一部分种子层 3 , 且不覆盖种子层 3的接合区 202;  3) As shown in FIG. 3, a patterned mask 4 (formed by a process of exposure, development, etc.) is formed on the surface of the seed layer 3 composed of a laterally grown Si film, and the mask 4 has a raster pattern. The grating-like pattern has a period of 2 micrometers, and the grating-like stripe has a width of 0.5 micrometers. The grating-like mask 4 covers only a portion of the seed layer 3 between the openings 21 and does not cover the joint region 202 of the seed layer 3;
4 )如图 4所示, 以该掩膜 4为刻蚀阻挡层刻蚀种子层 3, 留下被掩膜 4遮挡的种子层, 作为种子区 31 , 其中第一子隔离层 2上未被掩膜 4遮挡 的 Si薄膜被刻蚀干净, 开口 21 中可能会残留部分种子层 3 (如图 4中所 示), 也可能没有种子层 3 的残留, 这并不影响后续工艺以及所得产品的 最终性能, 因此工艺裕度较大;  4), as shown in FIG. 4, the seed layer 3 is etched by using the mask 4 as an etch barrier, leaving a seed layer blocked by the mask 4 as a seed region 31, wherein the first sub-isolation layer 2 is not The Si film blocked by the mask 4 is etched clean, and some of the seed layer 3 may remain in the opening 21 (as shown in FIG. 4), or there may be no residue of the seed layer 3, which does not affect the subsequent process and the resulting product. Final performance, so the process margin is large;
5 )如图 5所示, 去除掩膜 4;  5) as shown in Figure 5, remove the mask 4;
6 )如图 6所示, 利用 PECVD沉积 200nm厚的 Si02薄膜作为第二子 隔离层 201 ; 6) As shown in FIG. 6, a 200 nm thick SiO 2 film is deposited by PECVD as the second sub-isolation layer 201;
7 )如图 7所示, 在第二子隔离层 201中形成开口以露出种子区 31 ; 7) as shown in FIG. 7, an opening is formed in the second sub-isolation layer 201 to expose the seed region 31;
8 )如图 8所示, 利用种子区 31的 Si材料作为种子, 进行 Si的二次 横向外延生长, 直至第二子隔离层 201上的 Si薄膜形成一体,从而构成如 图 8所示的具有隔离层的复合衬底, 其包括基底 1、 由第一子隔离层 2和 第二子隔离层 201—起组成的隔离层以及隔离层上的半导体层 301。 8) As shown in FIG. 8, using the Si material of the seed region 31 as a seed, secondary lateral epitaxial growth of Si is performed until the Si thin film on the second sub-isolation layer 201 is integrated, thereby having the structure shown in FIG. A composite substrate of an isolation layer comprising a substrate 1, an isolation layer composed of the first sub-isolation layer 2 and the second sub-isolation layer 201, and a semiconductor layer 301 on the isolation layer.
在横向生长种子层 3的过程中, Si薄膜最初在第一子隔离层 2中的开 口 21中形成, 由于块材基底 1与外延 Si材料存在晶格失配, 开口处外延 生长的 Si薄膜缺陷较多, 随着横向外延生长的进行, Si外延薄膜的缺陷 逐渐减少, 横向生长的 Si的晶体质量逐渐提高, 因此在横向生长过程中, Si的晶格结构逐渐趋于完整, 离开口 21越远缺陷越少, 晶体质量越高, 但是在两个开口 21 的中间位置处, 由于材料体系和生长条件的影响, 接 合区 202的外延层晶格结构可能会较差。 因此接合区 202中的种子层被刻 蚀掉,仅利用接合区 202以外的横向外延薄膜,即晶体质量较高的这部分, 作为种子层再进行二次外延, 从而能够在非晶态的隔离层上形成晶体质量 更高的 Si半导体层 301。 因此, 本实施例提供的方法所制备出的具有隔离 层的复合衬底中, 半导体层的晶体质量高、 缺陷少, 从而能够提高半导体 层中所制作的半导体器件的性能。 In the process of laterally growing the seed layer 3, the Si film is initially formed in the opening 21 in the first sub-spacer layer 2, and the Si film defect which is epitaxially grown at the opening due to the lattice mismatch of the bulk substrate 1 and the epitaxial Si material More, with the progress of lateral epitaxial growth, the defects of the Si epitaxial film are gradually reduced, and the crystal quality of the laterally grown Si is gradually increased. Therefore, in the lateral growth process, the lattice structure of Si gradually becomes complete, and the more away from the opening 21 The less the far defects, the higher the crystal quality, but at the intermediate position of the two openings 21, the epitaxial layer lattice structure of the land 202 may be poor due to the influence of the material system and growth conditions. Therefore, the seed layer in the bonding region 202 is etched away, and only the lateral epitaxial film other than the bonding region 202, that is, the portion having a higher crystal quality, is used as the seed layer for secondary epitaxy, thereby enabling isolation in an amorphous state. Crystal quality on the layer A higher Si semiconductor layer 301. Therefore, in the composite substrate having the isolation layer prepared by the method provided by the embodiment, the semiconductor layer has high crystal quality and few defects, so that the performance of the semiconductor device fabricated in the semiconductor layer can be improved.
根据本发明的其他实施例, 其中本发明中所釆用的基底材料包括但不 限于: 蓝宝石、 Si、 SiC、 GaAs、 InP、 Ge 等, 本领域技术人员可根据实 际需要灵活地选择所需衬底的材料种类。  According to other embodiments of the present invention, the substrate materials used in the present invention include, but are not limited to, sapphire, Si, SiC, GaAs, InP, Ge, etc., and those skilled in the art can flexibly select the desired lining according to actual needs. The type of material at the bottom.
根据本发明的其他实施例, 其中本发明中所釆用的隔离层材料可包括 绝缘介质材料 (即电学隔离层材料)、 金属等高反射材料 (即光学隔离层 材料, 例如不透光的材料)。 隔离层材料包括但不限于 Si02、 Ti02、 A1203、 Ti305、 Zr02、 Ta205、 SiN、 A1N、 钼、 镍、 钽、 铂、 钛、 钨、 铬、 以及上 述材料构成的组合。 According to other embodiments of the present invention, the spacer material used in the present invention may include an insulating dielectric material (ie, an electrical isolation layer material), a highly reflective material such as a metal (ie, an optical isolation layer material such as an opaque material). ). The spacer material includes, but is not limited to, SiO 2 , Ti 0 2 , A 1 2 0 3 , Ti 3 0 5 , Zr0 2 , Ta 2 0 5 , SiN, A1N, molybdenum, nickel, ruthenium, platinum, titanium, tungsten, chromium, and A combination of the above materials.
根据本发明的其他实施例, 也可以利用接合区中的种子层作为种子再 进行横向外延, 也同样可以实现本发明的目的, 但优选为利用接合区以外 的种子层作为种子进行横向外延。  According to other embodiments of the present invention, it is also possible to carry out lateral epitaxy by using the seed layer in the joint region as a seed, and it is also possible to achieve the object of the present invention, but it is preferable to carry out lateral epitaxy using a seed layer other than the joint region as a seed.
本发明中所说的隔离层不限于电学和光学上的隔离, 也可以在其他物 理或化学参数上使其两侧的半导体层和基底层相隔离, 例如具有湿法化学 腐蚀选择性的隔离。 更广义地讲, 本发明中所指的隔离层是指将半导体层 与基底在上分离, 本领域技术人员可根据实际需要而灵活地组合基底、 隔 离层、 半导体层的各自的材料。  The spacer layer referred to in the present invention is not limited to electrical and optical isolation, and may be isolated from the semiconductor layer and the substrate layer on both sides in other physical or chemical parameters, such as isolation with wet chemical etching selectivity. More generally, the spacer layer referred to in the present invention means that the semiconductor layer is separated from the substrate, and those skilled in the art can flexibly combine the respective materials of the substrate, the spacer layer, and the semiconductor layer according to actual needs.
根据本发明的其他实施例, 其中子隔离层的制备方法不限于上述实施 例中所述的方法, 还可以为其他本领域公知的薄膜制备方法, 例如化学气 相淀积、 电子束蒸发、 溅射、 原子层淀积、 热氧化、 湿法氧化等。  According to other embodiments of the present invention, the method for preparing the sub-isolation layer is not limited to the method described in the above embodiments, and may be other film preparation methods known in the art, such as chemical vapor deposition, electron beam evaporation, sputtering. , atomic layer deposition, thermal oxidation, wet oxidation, etc.
根据本发明的其他实施例,其中第一子隔离层 2中形成的多个开口 21 也可以为其他图形, 例如矩阵状。  According to other embodiments of the present invention, the plurality of openings 21 formed in the first sub-spacer layer 2 may also be other patterns, such as a matrix.
根据本发明的其他实施例, 其中隔离层之上形成的适合侧向生长的半 导体材料, 包括但不限于: GaN、 AlGaN、 InGaN、 GaAs、 InGaAs, InGaAlP, Si、 Ge、 GeSi材料等。  In accordance with other embodiments of the present invention, semiconductor materials suitable for lateral growth formed over the isolation layer include, but are not limited to, GaN, AlGaN, InGaN, GaAs, InGaAs, InGaAlP, Si, Ge, GeSi materials, and the like.
最后所应说明的是, 以上实施例仅用以说明本发明的技术方案而非限 制。 尽管参照实施例对本发明进行了详细说明, 本领域的普通技术人员应当 理解, 对本发明的技术方案进行修改或者等同替换, 都不脱离本发明技术方 案的精神和范围, 其均应涵盖在本发明的权利要求范围当中。  It should be noted that the above embodiments are merely illustrative of the technical solutions of the present invention and are not limiting. While the invention has been described in detail herein with reference to the embodiments of the embodiments of the present invention Within the scope of the claims.

Claims

权 利 要 求 Rights request
1. 一种具有隔离层的复合衬底的制造方法, 包括: A method of manufacturing a composite substrate having an isolation layer, comprising:
1 )在基底上形成具有露出该基底的开口的第一子隔离层;  1) forming a first sub-isolation layer having an opening exposing the substrate on the substrate;
2 ) 利用横向生长法在第一子隔离层和基底上形成半导体材料薄膜构 成的种子层;  2) forming a seed layer formed of a thin film of a semiconductor material on the first sub-isolation layer and the substrate by a lateral growth method;
3 ) 选择性刻蚀种子层, 留下第一子隔离层上的一部分种子层作为种 子区;  3) selectively etching the seed layer leaving a portion of the seed layer on the first sub-isolation layer as a seed region;
4 ) 形成覆盖基底、 第一子隔离层和种子区的第二子隔离层;  4) forming a second sub-isolation layer covering the substrate, the first sub-isolation layer and the seed region;
5 )在第二子隔离层中形成开口以暴露出所述种子区的至少一部分。 5) forming an opening in the second sub-isolation layer to expose at least a portion of the seed region.
2. 根据权利要求 1所述的方法, 还包括步骤 6 )以所述种子区的至少 一部分作为种子, 利用横向生长法在第二子隔离层上生长半导体层。 2. The method of claim 1 further comprising the step of: growing a semiconductor layer on the second sub-isolation layer by lateral growth using at least a portion of the seed region as a seed.
3. 根据权利要求 1所述的方法, 其中步骤 2 ) 中, 所述种子层由多个 开口处的基底上开始外延生长, 并在两个开口中间的位置处接合, 形成接 合区, 其中所述种子区不包括所述接合区。  3. The method according to claim 1, wherein in step 2), the seed layer is epitaxially grown from a substrate at a plurality of openings, and joined at a position intermediate the two openings to form a joint region, wherein The seed zone does not include the junction zone.
4. 根据权利要求 1所述的方法,其中所述第一子隔离层和第二子隔离 层由绝缘介质材料构成。  4. The method of claim 1 wherein the first sub-isolation layer and the second sub-isolation layer are comprised of an insulating dielectric material.
5. 根据权利要求 1所述的方法,其中所述第一子隔离层和第二子隔离 层由金属材料构成。  5. The method of claim 1 wherein the first sub-isolation layer and the second sub-isolation layer are comprised of a metallic material.
6. 根据权利要求 1所述的方法, 其中所述基底的材料为蓝宝石、 Si、 SiC、 GaAs、 InP或 Ge。  6. The method according to claim 1, wherein the material of the substrate is sapphire, Si, SiC, GaAs, InP or Ge.
7. 根据权利要求 1所述的方法,其中所述第一子隔离层和第二子隔离 层的材料为 Si02、 Ti02、 A1203、 Ti305、 Zr02、 Ta205、 SiN、 A1N、 钼、 镍、 钽、 铂、 钛、 钨、 铬中的一种或多种的组合。 7. The method according to claim 1, wherein materials of the first sub-isolation layer and the second sub-isolation layer are Si0 2 , Ti0 2 , A1 2 0 3 , Ti 3 0 5 , Zr0 2 , Ta 2 0 5. A combination of one or more of SiN, A1N, molybdenum, nickel, ruthenium, platinum, titanium, tungsten, and chromium.
8. 根据权利要求 1 所述的方法, 其中所述半导体层的材料为 GaN、 AlGaN、 InGaN、 GaAs、 InGaAs, InGaAlP, Si、 Ge或 GeSi。  8. The method according to claim 1, wherein the material of the semiconductor layer is GaN, AlGaN, InGaN, GaAs, InGaAs, InGaAlP, Si, Ge or GeSi.
9. 一种由根据权利要求 1的方法制造的复合衬底, 包括:  9. A composite substrate made by the method of claim 1 comprising:
基底;  Substrate
基底上的具有开口的第一子隔离层;  a first sub-isolation layer having an opening on the substrate;
第一子隔离层的开口以外的区域上方的种子区;  a seed region above the region other than the opening of the first sub-isolation layer;
第二子隔离层, 覆盖第一子隔离层的开口以及至少部分第一子隔离 层, 且具有至少露出种子区的一部分的开口。 a second sub-isolation layer covering the opening of the first sub-isolation layer and at least a portion of the first sub-isolation layer and having an opening that exposes at least a portion of the seed region.
10. 根据权利要求 9所述的复合衬底, 还包括覆盖第一子隔离层和第 二子隔离层的半导体层, 该半导体层由种子区的至少一部分通过横向生长 而形成。 10. The composite substrate of claim 9, further comprising a semiconductor layer covering the first sub-isolation layer and the second sub-isolation layer, the semiconductor layer being formed by lateral growth of at least a portion of the seed region.
PCT/CN2014/078482 2013-05-27 2014-05-27 Composite substrate having isolation layer and manufacturing method thereof WO2014190890A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201310201293.5A CN103280425B (en) 2013-05-27 2013-05-27 A kind of compound substrate and manufacture method thereof with separator
CN201310201293.5 2013-05-27

Publications (1)

Publication Number Publication Date
WO2014190890A1 true WO2014190890A1 (en) 2014-12-04

Family

ID=49062911

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2014/078482 WO2014190890A1 (en) 2013-05-27 2014-05-27 Composite substrate having isolation layer and manufacturing method thereof

Country Status (2)

Country Link
CN (1) CN103280425B (en)
WO (1) WO2014190890A1 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103280425B (en) * 2013-05-27 2016-03-30 中国科学院物理研究所 A kind of compound substrate and manufacture method thereof with separator
CN108346718A (en) * 2017-01-25 2018-07-31 合肥彩虹蓝光科技有限公司 Utilize the compound pattern substrate and preparation method thereof that low-index material is medium
CN108807279B (en) * 2018-06-25 2021-01-22 中国科学院微电子研究所 Semiconductor structure and manufacturing method thereof

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4760036A (en) * 1987-06-15 1988-07-26 Delco Electronics Corporation Process for growing silicon-on-insulator wafers using lateral epitaxial growth with seed window oxidation
US5525536A (en) * 1991-12-26 1996-06-11 Rohm Co., Ltd. Method for producing SOI substrate and semiconductor device using the same
CN101504930A (en) * 2008-02-06 2009-08-12 株式会社半导体能源研究所 Manufacturing method of SOI substrate
US7651929B2 (en) * 2005-06-16 2010-01-26 International Business Machines Corporation Hybrid oriented substrates and crystal imprinting methods for forming such hybrid oriented substrates
CN103280425A (en) * 2013-05-27 2013-09-04 中国科学院物理研究所 Composite substrate with isolating layer and manufacturing method of composite substrate

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04137723A (en) * 1990-09-28 1992-05-12 Nippon Steel Corp Manufacture of semiconductor laminated substrate
JP3206943B2 (en) * 1991-12-26 2001-09-10 ローム株式会社 Method of manufacturing SOI substrate and semiconductor device
JP2004055943A (en) * 2002-07-23 2004-02-19 Matsushita Electric Ind Co Ltd Semiconductor device and manufacturing method therefor
CN1209793C (en) * 2002-10-16 2005-07-06 中国科学院半导体研究所 Horizontal epitaxial growth of gallium nitride and its compound semiconductor
US20060113596A1 (en) * 2004-12-01 2006-06-01 Samsung Electronics Co., Ltd. Single crystal substrate and method of fabricating the same
JP2007335801A (en) * 2006-06-19 2007-12-27 Toshiba Corp Semiconductor device and method for manufacturing the same
CN101924021B (en) * 2010-07-02 2012-07-04 北京北方微电子基地设备工艺研究中心有限责任公司 Semiconductor device, as well as manufacture method and luminescent device thereof

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4760036A (en) * 1987-06-15 1988-07-26 Delco Electronics Corporation Process for growing silicon-on-insulator wafers using lateral epitaxial growth with seed window oxidation
US5525536A (en) * 1991-12-26 1996-06-11 Rohm Co., Ltd. Method for producing SOI substrate and semiconductor device using the same
US7651929B2 (en) * 2005-06-16 2010-01-26 International Business Machines Corporation Hybrid oriented substrates and crystal imprinting methods for forming such hybrid oriented substrates
CN101504930A (en) * 2008-02-06 2009-08-12 株式会社半导体能源研究所 Manufacturing method of SOI substrate
CN103280425A (en) * 2013-05-27 2013-09-04 中国科学院物理研究所 Composite substrate with isolating layer and manufacturing method of composite substrate

Also Published As

Publication number Publication date
CN103280425B (en) 2016-03-30
CN103280425A (en) 2013-09-04

Similar Documents

Publication Publication Date Title
US8878252B2 (en) III-V compound semiconductor epitaxy from a non-III-V substrate
US8004001B2 (en) Fabrication of semiconductor devices for light emission
US8803189B2 (en) III-V compound semiconductor epitaxy using lateral overgrowth
JP5313651B2 (en) Manufacturing method of semiconductor device
US8779445B2 (en) Stress-alleviation layer for LED structures
US11670514B2 (en) Method for manufacturing semiconductor device and semiconductor substrate
JP6264675B2 (en) Silicon-on-insulator (SOI) substrate manufacturing method and SOI substrate
KR100705225B1 (en) Method of fabricating vertical type light emitting device
WO2015003609A1 (en) Composite substrate with isolation layer and manufacturing method thereof
WO2014190890A1 (en) Composite substrate having isolation layer and manufacturing method thereof
US8698284B2 (en) Nitride-based semiconductor substrates having hollow member pattern and methods of fabricating the same
US20070298592A1 (en) Method for manufacturing single crystalline gallium nitride material substrate
US20220416123A1 (en) Led device, method of manufacturing the led device, and display apparatus including the led device
US20150115277A1 (en) Episubstrates for Selective Area Growth of Group III-V Material and a Method for Fabricating a Group III-V Material on a Silicon Substrate
US8507367B2 (en) Separation of semiconductor devices
KR101705726B1 (en) method for manufacturing semiconductor substrate
KR101652791B1 (en) Manufacturing method of semiconductor device
WO2009075651A1 (en) Fabrication of semiconductor devices
JP7056826B2 (en) Manufacturing method of semiconductor device
JP5722082B2 (en) Manufacturing method of nitride semiconductor laser device
TWI476817B (en) Self alignment and assembly fabrication method for multiple material layers
TW202327123A (en) Method for producing bonded semiconductor wafer
US20190115488A1 (en) Multilayer photoreceptor device, layers of which have different lattice parameters

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 14803730

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 14803730

Country of ref document: EP

Kind code of ref document: A1