WO2014161440A1 - 一种网络处理器异常检测方法、装置及网络处理设备 - Google Patents

一种网络处理器异常检测方法、装置及网络处理设备 Download PDF

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WO2014161440A1
WO2014161440A1 PCT/CN2014/074044 CN2014074044W WO2014161440A1 WO 2014161440 A1 WO2014161440 A1 WO 2014161440A1 CN 2014074044 W CN2014074044 W CN 2014074044W WO 2014161440 A1 WO2014161440 A1 WO 2014161440A1
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message
subsystem
cpu
detection
abnormal
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PCT/CN2014/074044
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French (fr)
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姜海明
刘建成
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中兴通讯股份有限公司
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L43/00—Arrangements for monitoring or testing data switching networks
    • H04L43/08—Monitoring or testing based on specific metrics, e.g. QoS, energy consumption or environmental parameters
    • H04L43/0805—Monitoring or testing based on specific metrics, e.g. QoS, energy consumption or environmental parameters by checking availability
    • H04L43/0817—Monitoring or testing based on specific metrics, e.g. QoS, energy consumption or environmental parameters by checking availability by checking functioning

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  • the present invention relates to the field of communications, and in particular, to an abnormality detecting method and device applied to a network processor and Related network processing equipment.
  • the network chip includes two types of application specific integrated circuit ASIC and network processor NP. With its high-speed processing and flexible programmability, network processors have become an effective solution for data processing in today's networks. Resolution.
  • the software that runs on the network device containing NP includes two levels: the upper layer is embedded software (such as Linux, Vxworks) belongs to the control plane; the lower layer is microcode, which belongs to the forwarding plane.
  • Microcode resides in the microprocessor of the network processor In the engine, the microcode instructions can flexibly process messages according to business logic. Inside the network processor. Contains many children System or coprocessor, these subsystems may experience operational failures while the network processor is running. This will cause service forwarding to fail.
  • the detection method of the internal abnormality of the network processor is generally that the upper layer driver periodically reads the network through the timer.
  • the internal processor exception status register which requires constant interaction between the NP and the CPU, thus occupying the upper driver A lot of software resources.
  • the detection report of the abnormality detection If both the protocol and the protocol packet exist, the CPU will be busy and packet loss, and the service packet will be invalid due to the loss of the protocol packet. Loss of text can cause anomalies to be discovered in time.
  • An object of the embodiments of the present invention is to provide a network processor abnormality detecting method, device, and network processing device. It can better solve the abnormal detection problem of the network processor.
  • a network processor anomaly detection method including:
  • the packet generator In the NP, the packet generator generates a detection message for detecting the NP subsystem, and sends the detection message To the micro engine;
  • the micro engine performs an abnormality detection on the NP subsystem according to the received detection message, and is checked.
  • the detected abnormal state information is carried in the message and sent to the central processing unit CPU for the The CPU processes it.
  • the method further comprises:
  • the CPU pre-sets a packet sending interval for detecting a packet, and an abnormality of the NP subsystem for the packet generator. Status register ID.
  • the packet generator generates a difference including the NP subsystem according to a preset setting of the CPU.
  • the detection packet of the constant status register ID is periodically sent to the micro engine according to the message transmission interval.
  • the micro engine After receiving the detection message, the micro engine reads according to the abnormal state register ID therein.
  • the state is The value is written as the abnormal state information in the detection message and sent to the CPU.
  • the CPU determines, according to the abnormal status register ID in the received message, the status abnormality.
  • the NP subsystem is described, and the type of the abnormality of the NP subsystem is determined according to the state value therein.
  • a network processor anomaly detecting apparatus including micro-induction Engine, package generator and NP subsystem, where:
  • a packet generator configured to generate a detection packet used to detect the NP subsystem, and send the detection packet Sent to the microengine
  • a micro engine configured to perform an abnormality detection on the NP subsystem according to the received detection packet, and When an abnormality is detected, the detected abnormal state information is carried in the message and sent to the CPU for the CPU. Process it.
  • the package generator comprises:
  • a message generating unit configured to register an abnormal state of the NP subsystem set in advance by the CPU a device ID, generating a detection message including the abnormal state register ID;
  • a message sending unit configured to set the detection packet according to a packet sending interval preset by the CPU Periodically sent to the microengine.
  • the microengine comprises:
  • a register reading unit configured to, after receiving the detection message, according to an abnormal state register ID thereof, Reading a status value of an exception status register of the NP subsystem
  • An abnormal state reporting unit configured to determine, when the NP subsystem is abnormal by the state value, The status value is written as abnormal status information in the detection message and sent to the CPU.
  • a network processing device is provided, the network processing device package The above network processor abnormality detecting device is included.
  • the embodiment of the present invention uses the internal resources of the network processor to periodically poll the NP subsystem through the packet generator.
  • the exception status register is reported to the CPU in the form of an interrupt after the exception is found, effectively avoiding the traditional CPU.
  • the drawbacks of CPU busy and protocol packet loss caused by the NP internal abnormal status register are continuously polled.
  • FIG. 1 is a schematic block diagram of a network processor anomaly detection method according to an embodiment of the present invention
  • FIG. 2 is a schematic diagram of scanning an NP abnormal state by a packet generator according to an embodiment of the present invention
  • FIG. 3 is a structural block diagram of a network processor abnormality detecting apparatus according to an embodiment of the present invention.
  • FIG. 4 is a flowchart of network processor anomaly detection according to an embodiment of the present invention.
  • the packet generator of the network processor periodically sends a packet, and triggers the microcode to scan the NP.
  • the abnormal status register of the system If there is an exception, the message is interrupted and reported to the CPU.
  • the network processor in order to support OAM detection, the network processor generally has a packet generator therein, which can The message is sent periodically according to the settings.
  • the embodiment of the invention utilizes the characteristics of the network processor to configure the packet generation.
  • the device periodically sends a detection message, where the detection message carries an NP subsystem abnormal status register ID. Inspection report Enter the micro engine, the micro engine reads the exception status register according to the abnormal status register ID, and reads the result Store. If there is no abnormality, the packet is discarded. Otherwise, the detected abnormal state information is carried in the report. In the text, the CPU is sent to notify the upper software NP that an abnormality has occurred. Embodiments of the present invention are described below with reference to FIGS. 1 through 4. Line description.
  • FIG. 1 is a schematic block diagram of a network processor anomaly detection method according to an embodiment of the present invention, as shown in FIG. include:
  • Step 101 In the network processor NP, the packet generator generates a detection packet for detecting the NP subsystem. And sending the detection message to the micro engine.
  • the CPU may preset a packet sending interval for detecting packets for the packet generator. Interval, NP subsystem exception status register ID, the packet generator is generated according to the preset setting of the CPU The detection message of the abnormal state register ID of the NP subsystem is periodically sent to the message sending interval to Micro engine.
  • Step 102 The micro engine performs an abnormality detection on the NP subsystem according to the received detection packet, and is checked. When an abnormality is detected, the detected abnormal state information is carried in the message and sent to the CPU for the CPU to perform. Reason.
  • the micro engine can read according to the abnormal state register ID therein.
  • the state value of the abnormal state register of the NP subsystem when the microengine judges that the NP subsystem is normal through the state value And discarding the detection packet, otherwise, writing the status value as abnormal state information into the detection packet And sent to the CPU for the CPU to determine the status according to the abnormal status register ID in the received message.
  • the normal NP subsystem determines the abnormal type of the NP subsystem based on the state values in the message.
  • FIG. 2 is a schematic diagram of scanning an abnormal state of an NP subsystem by a packet generator according to an embodiment of the present invention, as shown in FIG. 2
  • the network processor contains multiple subsystems or coprocessors, each of which usually has an abnormal status.
  • the memory characterizes whether the system is abnormal. If the status value of the exception status register is zero, then there is no exception. Generally, different abnormal states are distinguished by abnormal values.
  • the prior art is to periodically scan these abnormalities through the upper layer software.
  • the state register implements anomaly detection.
  • An important function of the packet transmission network PTN equipment is link detection. For example, operation management maintains OAM/bidirectional detection BFD, etc., so there will be a packet generator inside the mainstream NP.
  • the packet generator packet interval can be set to periodically send detection packets.
  • the embodiment of the present invention sets the NP as the above two special Sexual combination, plus NP programmable features, flexible detection of anomalies through microcode.
  • N corresponding packet generators can be set and scanned separately.
  • the exception status registers inside the N subsystems are described.
  • FIG. 3 is a structural block diagram of a network processor anomaly detecting apparatus according to an embodiment of the present invention, as shown in FIG. 3:
  • the CPU 301 is configured to preset a packet sending interval of the detection packet and an abnormality of the NP subsystem for the packet generator.
  • Status register ID That is, the CPU 301 is responsible for packet generator configuration and exception message reception.
  • the packet generator is configured to configure the interval for sending packets for detecting packets and detecting the content of packets. Detecting the message content includes the The NP subsystem exception status register ID monitored by the packet generator, and the CPU can configure the packet generator to generate the message between the packets. Every other time.
  • Abnormal message reception When the microcode reads the abnormal status register and finds that there is an abnormal state, it will detect The abnormal state information that is sent is sent to the CPU in the packet, and the CPU processes the abnormal state information reported by the interrupt, and obtains The cause of the exception is to take appropriate action in time.
  • a packet generator 302 configured to generate a detection packet used to detect the NP subsystem 304, and send the detection packet Sent to the micro engine 303.
  • the packet generator 302 is a network processor configured to periodically generate a detection packet. Unit, usually used to implement OAM detection.
  • the packet generator 302 can send the message according to the pre-configured message of the CPU.
  • An abnormal scan packet is generated periodically, that is, a packet is detected, and the packet carries the NP subsystem to be detected. Exception status register ID.
  • the micro engine 303 is configured to perform an abnormality detection on the NP subsystem 304 according to the received detection message, and When an abnormality is detected, the detected abnormal state information is carried in the message and sent to the CPU for the CPU to enter. Line processing.
  • the micro engine 303 is a programmable packet processor, and the micro code resides therein for network processing.
  • the core component of the device processes the message according to the service forwarding process. In the embodiment of the present invention, it is used to control an abnormal sweep The processing of the message.
  • the process is as follows: Obtain an abnormal state register ID from the message, and send a read to the NP subsystem. Request, read the specified NP submodule exception status register according to the ID, and process the status value returned by the NP subsystem. Determine whether the value is equal to zero. If it is equal to zero, there is no abnormality, and the packet is discarded. Otherwise, the status value is written to the abnormal scan packet. In, send the CPU.
  • the NP subsystem is a component module of NP, including the subsystem (submodule/coprocessor) Exception status register.
  • the foregoing packet generator 302 may include:
  • the message generating unit is set to register an abnormal state of the NP subsystem 304 set in advance by the CPU 301. a device ID, generating a detection message including the abnormal state register ID;
  • the message sending unit is configured to set the detection message according to a packet sending interval preset by the CPU 301. It is sent to the micro engine 303 periodically.
  • the micro engine 303 includes:
  • a register reading unit configured to, after receiving the detection message, according to an abnormal state register ID thereof, Reading the status value of the exception status register of the NP subsystem 304;
  • An abnormal state reporting unit configured to determine when the NP subsystem 304 is abnormal by the state value The status value is written as the abnormal status information in the detection message and sent to the CPU 301.
  • the embodiment of the invention further provides a network processing device, which comprises the above network processor abnormality detecting device.
  • FIG. 4 is a flowchart of an abnormality detection of a network processor according to an embodiment of the present invention. As shown in FIG. 4, the method includes:
  • Step 401 start.
  • Step 402 Configure a packet generator.
  • step 403 an exception request is generated.
  • the microcode receives the abnormal scan message, and extracts the NP subsystem abnormal state register ID from the message, and the root An exception read request is sent to the particular NP subsystem based on the ID.
  • step 404 the abnormal state is returned.
  • the NP subsystem returns the status value of the exception status register to the microengine.
  • Step 405 processing of the returned status value.
  • the microcode judges the value. If the state value is equal to 0, step 406 is performed, otherwise the step is performed. 407.
  • Step 406 Discard the message.
  • the status value is 0, which proves that the NP subsystem has no abnormality and discards the packet.
  • Step 407 The message is sent to the CPU.
  • the status value is non-zero to prove that the NP subsystem is abnormal, and the status value is written as abnormal status information. Scan the message and send it to the CPU.
  • Step 408 the end.
  • Step 403 to step 407 are processed by microcode, and the microcode processing flow is relatively simple.
  • the CPU receives the abnormal report interrupt, and reads the abnormal status register ID and the abnormal status value from the message.
  • the CPU thus knows the abnormal NP subsystem and what type of anomaly has occurred, and then takes corresponding measures. Abnormal.
  • the embodiment of the present invention utilizes a packet generator inside the network processor to generate an abnormal scan message, and simultaneously Using the programmable flexibility of the network processor, the abnormal scan message is processed through a simple microcode process to avoid
  • the traditional polling method utilizes a method of periodically scanning between the CPU and the NPU by using a timer to interrupt the form. Reporting the abnormal state of the NP subsystem greatly reduces the burden on the CPU.
  • the technical solution provided by the embodiment of the present invention can be applied to the field of communications, and avoids the traditional way of stopping the CPU. Inquired about the drawbacks of CPU busy and protocol packet loss caused by NP internal exception status register.

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Abstract

本发明公开了一种网络处理器异常检测方法、装置及网络处理设备，涉及通信领域，所述方法包括：在网络处理器NP中，包产生器生成用于检测NP子***的检测报文，并将所述检测报文发送至微引擎；微引擎根据收到的所述检测报文，对NP子***进行异常检测，并当检测到异常时，将检测到的异常状态信息携带在报文中发送至CPU，以供CPU进行处理。本发明有效避免了传统方式CPU不停轮询NP内部异常状态寄存器带来的CPU忙、协议包丢失的弊端。

Description

一种网络处理器异常检测方法、装置及网络处理设备 技术领域
本发明涉及通信领域，特别涉及一种应用于网络处理器的异常检测方法、装置及 相关的网络处理设备。
背景技术
现今网络发展速度惊人，网络流量的增长及新业务的出现，需要网络设备具有线 速和灵活的处理能力。目前网络芯片包括专用集成电路ASIC和网络处理器NP两大类。 网络处理器凭借其高速处理及灵活的可编程性，已成为当今网络中数据处理的有效解 决方案。
包含NP的网络设备运行的软件包括两个层面：上层为嵌入式软件（如Linux、 Vxworks），属于控制层面；下层为微码，属于转发层面。微码驻留于网络处理器的微 引擎中，通过微码指令可以灵活根据业务逻辑处理报文。网络处理器内部.包含很多子 ***或者协处理器，在网络处理器运行过程中，这些子***可能会出现运行故障，这 会造成业务转发失效。
目前检测网络处理器内部异常检测方法一般是上层驱动通过定时器周期性读取网 络处理器内部异常状态寄存器，这需要NP与CPU之间不停交互，因此占用上层驱动 软件大量资源。同时，由于CPU和NP之间有大量的协议包交互，异常检测的检测报 文与协议包同时存在会造成CPU繁忙和丢包，协议包丢失造成业务运行失效，检测报 文丢失会造成异常不能及时被发现。
发明内容
本发明实施例的目的在于提供一种网络处理器异常检测方法、装置及网络处理设 备，能更好地解决网络处理器的异常检测问题。
根据本发明实施例的一个方面，提供了一种网络处理器异常检测方法，包括：
在NP中，包产生器生成用于检测NP子***的检测报文，并将所述检测报文发送 至微引擎；
所述微引擎根据收到的所述检测报文，对所述NP子***进行异常检测，并当检 测到异常时，将检测到的异常状态信息携带在报文发送至中央处理器CPU，以供所述 CPU进行处理。
优选地，还包括：
所述CPU为包产生器预先设置检测报文的报文发送间隔、所述NP子***的异常 状态寄存器ID。
优选地，所述包产生器按照所述CPU的预先设置，生成包含所述NP子***的异 常状态寄存器ID的检测报文，并按照所述报文发送间隔周期性发送至微引擎。
优选地，所述微引擎收到所述检测报文后，根据其中的异常状态寄存器ID，读取 所述NP子***的异常状态寄存器的状态值。
优选地，当所述微引擎通过所述状态值判断所述NP子***异常时，将所述状态 值作为异常状态信息写入所述检测报文中，并发送至所述CPU。
优选地，所述CPU根据收到的报文中的异常状态寄存器ID，确定状态异常的所 述NP子***，并根据其中的状态值，确定所述NP子***的异常类型。
根据本发明实施例的另一方面，提供了一种网络处理器异常检测装置，包括微引 擎、包产生器和NP子***，其中：
包产生器，用于生成用来检测所述NP子***的检测报文，并将所述检测报文发 送至所述微引擎；
微引擎，用于根据收到的所述检测报文，对所述NP子***进行异常检测，并当 检测到异常时，将检测到的异常状态信息携带在报文中发送至CPU，以供所述CPU 进行处理。
优选地，所述包产生器包括：
报文生成单元，设置为按照所述CPU预先设置的所述NP子***的异常状态寄存 器ID，生成包含所述异常状态寄存器ID的检测报文；
报文发送单元，设置为按照所述CPU预先设置的报文发送间隔，将所述检测报文 周期性发送至所述微引擎。
优选地，所述微引擎包括：
寄存器读取单元，设置为收到所述检测报文后，根据其中的异常状态寄存器ID， 读取所述NP子***的异常状态寄存器的状态值；
异常状态上报单元，设置为当通过所述状态值判断所述NP子***异常时，将所 述状态值作为异常状态信息写入所述检测报文中，并发送至所述CPU。
根据本发明实施例的另一方面，提供了一种网络处理设备，所述网络处理设备包 括上述网络处理器异常检测装置。
与现有技术相比较，本发明实施例的有益效果在于：
本发明实施例采用网络处理器内部资源，通过包产生器周期性轮询NP子***的 异常状态寄存器，发现异常后以中断形式上报CPU处理，有效避免了传统方式CPU 不停轮询NP内部异常状态寄存器带来的CPU忙、协议包丢失的弊端。
附图说明
图1是本发明实施例提供的网络处理器异常检测方法原理框图；
图2是本发明实施例提供的通过包产生器扫描NP异常状态示意图；
图3是本发明实施例提供的网络处理器异常检测装置结构框图；
图4是本发明实施例提供的网络处理器异常检测流程图。
具体实施方式
以下结合附图对本发明的优选实施例进行详细说明，应当理解，以下所说明的优 选实施例仅用于说明和解释本发明，并不用于限定本发明。
本发明实施例利用网络处理器的包产生器周期性发送报文，触发微码扫描NP子 ***的异常状态寄存器，有异常则报文中断上报CPU。
在相关技术中，网络处理器为了支持OAM检测，内部一般都有包产生器，其可 以根据设定，周期性发送报文。本发明实施例利用网络处理器这一特性，配置包产生 器周期性发送检测报文，所述检测报文中携带NP子***异常状态寄存器ID。检测报 文进入微引擎中，微引擎根据异常状态寄存器ID读取异常状态寄存器，并将读取结果 进行存储。如果没有异常，则丢弃该报文，否则，将检测到的异常状态信息携带在报 文中上送CPU，通知上层软件NP发生异常。以下通过图1至图4对本发明实施例进 行说明。
图1是本发明实施例提供的网络处理器异常检测方法原理框图，如图1所示，包 括：
步骤101、在网络处理器NP中，包产生器生成用于检测NP子***的检测报文， 并将所述检测报文发送至微引擎。
在一个优选的实施方式中，CPU可以为包产生器预先设置检测报文的报文发送间 隔、NP子***的异常状态寄存器ID，包产生器按照CPU的预先设置，生成包含所述 NP子***的异常状态寄存器ID的检测报文，并按照所述报文发送间隔周期性发送至 微引擎。
步骤102、微引擎根据收到的所述检测报文，对NP子***进行异常检测，并当检 测到异常时，将检测到的异常状态信息携带在报文中发送至CPU，以供CPU进行处 理。
优选地，微引擎收到所述检测报文后，可以根据其中的异常状态寄存器ID，读取 NP子***的异常状态寄存器的状态值，当微引擎通过所述状态值判断NP子***正常 时，将所述检测报文丢弃，否则，将所述状态值作为异常状态信息写入所述检测报文 中，并发送至CPU，以供CPU根据收到的报文中的异常状态寄存器ID，确定状态异 常的NP子***，并根据报文中的状态值，确定所述NP子***的异常类型。
图2是本发明实施例提供的通过包产生器扫描NP子***异常状态示意图，如图2 所示，网络处理器内部包含多个子***或协处理器，各个子***通常都有异常状态寄 存器表征该***是否存在异常。如果异常状态寄存器的状态值为零，则证明没有异常， 一般通过异常值区分不同的异常状态。现有技术是通过上层软件定时扫描这些异常状 态寄存器实现异常检测。分组传输网络PTN设备目前的一个重要功能就是链路检测， 比如操作管理维护OAM/双向检测BFD等，因此目前主流NP内部都会有包产生器， 可以设置包产生器报文间隔周期性发送检测报文。本发明实施例将NP的如上两个特 性结合，加上NP可编程特性，通过微码灵活的进行异常检测。
在图2中，假设NP内部有N个子***，可以设置N个相应的包产生器，分别扫 描N个子***内部的异常状态寄存器。
图3是本发明实施例提供的网络处理器异常检测装置结构框图，如图3所示：
CPU301，用于为包产生器预先设置检测报文的报文发送间隔、NP子***的异常 状态寄存器ID。也就是说，CPU301负责包产生器配置及异常报文接收。优选地，配 置包产生器：配置检测报文的报文发送间隔及检测报文内容。检测报文内容包括所述 包产生器监控的NP子***异常状态寄存器ID，CPU可以配置包产生器产生报文的间 隔时间。异常报文接收：当微码读取异常状态寄存器，发现存在异常状态，则将检测 到的异常状态信息携带在报文中上送CPU，CPU处理中断上报的异常状态信息，获取 异常原因，以便及时采取相应动作。
包产生器302，用于生成用来检测NP子***304的检测报文，并将所述检测报文 发送至微引擎303。具体地，包产生器302是网络处理器用于周期性产生检测报文的 单元，通常用于实现OAM检测。包产生器302可以按照CPU预先配置的报文发送间 隔周期性产生异常扫描报文，即检测报文，所述报文中携带有待检测的NP子***的 异常状态寄存器ID。
微引擎303，用于根据收到的所述检测报文，对NP子***304进行异常检测，并 当检测到异常时，将检测到的异常状态信息携带在报文中发送至CPU，以供CPU进 行处理。具体地，所述微引擎303为可编程包处理器，其内驻留有微码，为网络处理 器核心组成部分，根据业务转发流程处理报文。在本发明实施例中，用于控制异常扫 描报文的处理。处理过程为：从报文中获取异常状态寄存器ID，向NP子***发送读 请求，根据ID读取指定NP子模块异常状态寄存器，处理NP子***返回的状态值， 判断该值是否等于零，等于零则无异常，丢弃报文，否则将状态值写入异常扫描报文 中，上送CPU。
NP子***304，NP子***为NP的组成模块，包含该子***（子模块/协处理器） 的异常状态寄存器。
优选地，所述上述包产生器302可以包括：
报文生成单元，设置为利用CPU301预先设置的NP子***304的异常状态寄存 器ID，生成包含所述异常状态寄存器ID的检测报文；
报文发送单元，设置为按照CPU301预先设置的报文发送间隔，将所述检测报文 周期性发送至微引擎303。
其中，上述微引擎303包括：
寄存器读取单元，设置为收到所述检测报文后，根据其中的异常状态寄存器ID， 读取NP子***304的异常状态寄存器的状态值；
异常状态上报单元，设置为当通过所述状态值判断NP子***304异常时，将所 述状态值作为异常状态信息写入所述检测报文中，并发送至CPU301。
本发明实施例还提供了一种网络处理设备，其包括上述网络处理器异常检测装置。
图4是本发明实施例提供的网络处理器异常检测流程图，如图4所示，包括：
步骤401、开始。
步骤402、配置包产生器。
配置异常扫描报文（即检测报文）的报文发送间隔，异常扫描报文中配置有扫描 NP子***的异常状态寄存器ID。
步骤403、异常请求产生。
微码收到异常扫描报文，从所述报文中提取出NP子***异常状态寄存器ID，根 据该ID向特定NP子***发送异常读取请求。
步骤404、异常状态返回。
NP子***向微引擎返回异常状态寄存器的状态值。
步骤405、返回的状态值的处理。
微码对该值进行判断，如果所述状态值等于0，则执行步骤406，否则执行步骤 407。
步骤406、丢弃所述报文。
状态值为0，证明该NP子***无异常，丢弃报文。
步骤407、报文上送CPU。
状态值非零证明NP子***出现异常，将所述状态值作为异常状态信息写入异常 扫描报文并上送CPU。
步骤408、结束。
其中，步骤403至步骤407由微码处理，该微码处理流程比较简单。
CPU接收到异常上报中断，从报文中读取异常状态寄存器ID及异常的状态值， CPU从而获知出现异常的NP子***及出现了什么类型的异常，进而采取相应措施处 理异常。
本发明实施例利用了目前网络处理器内部的包产生器产生异常扫描报文，同时利 用网络处理器的可编程灵活性，通过简单的微码流程对异常扫描报文进行处理，避免 了传统轮询方法利用CPU和NPU之间利用定时器周期性扫描的方法，以中断形式上 报NP子***异常状态，极大减轻了CPU的负担。
尽管上文对本发明实施例进行了详细说明，但是本发明不限于此，本技术领域技 术人员可以根据本发明的原理进行各种修改。因此，凡按照本发明原理所作的修改， 都应当理解为落入本发明的保护范围。
工业实用性
本发明实施例提供的技术方案可以应用于通信领域，避免了传统方式CPU不停轮 询NP内部异常状态寄存器带来的CPU忙、协议包丢失的弊端。

Claims (10)

  1. 一种网络处理器异常检测方法，包括：
    在网络处理器NP中，包产生器生成用于检测NP子***的检测报文，并 将所述检测报文发送至微引擎；
    所述微引擎根据收到的所述检测报文，对所述NP子***进行异常检测， 并当检测到异常时，将检测到的异常状态信息携带在报文中发送至中央处理器 CPU，以供所述CPU进行处理。
  2. 利要求1所述的方法，其中，还包括：
    所述CPU为所述包产生器预先设置所述检测报文的报文发送间隔、所述 NP子***的异常状态寄存器ID。
  3. 根据权利要求2所述的方法，其中，所述包产生器按照所述CPU的预先设置， 生成包含所述NP子***的异常状态寄存器ID的检测报文，并按照所述报文发 送间隔周期性发送至所述微引擎。
  4. 根据权利要求3所述的方法，其中，所述微引擎收到所述检测报文后，根据其 中的所述异常状态寄存器ID，读取所述NP子***的异常状态寄存器的状态值。
  5. 根据权利要求4所述的方法，其中，当所述微引擎通过所述状态值判断所述NP 子***异常时，将所述状态值作为异常状态信息写入所述检测报文中，并发送 至所述CPU。
  6. 根据权利要求5所述的方法，其中，所述CPU根据收到的报文中的所述异常状 态寄存器ID，确定状态异常的NP子***，并根据报文中的状态值，确定所述 NP子***的异常类型。
  7. 一种网络处理器异常检测装置，包括微引擎、包产生器和NP子***，其中：
    所述包产生器，用于生成用来检测NP子***的检测报文，并将所述检测 报文发送至所述微引擎；
    所述微引擎，用于根据收到的所述检测报文，对所述NP子***进行异常 检测，并当检测到异常时，将检测到的异常状态信息携带在报文中发送至所述 CPU，以供所述CPU进行处理。
  8. 根据权利要求7所述的装置，其中，所述包产生器包括：
    报文生成单元，设置为按照所述CPU预先设置的NP子***的异常状态寄 存器ID，生成包含所述异常状态寄存器ID的检测报文；
    报文发送单元，设置为按照CPU预先设置的报文发送间隔，将所述检测报 文周期性发送至所述微引擎。
  9. 根据权利要求8所述的装置，其中，所述微引擎包括：
    寄存器读取单元，设置为收到所述检测报文后，根据其中的异常状态寄存 器ID，读取所述NP子***的异常状态寄存器的状态值；
    异常状态上报单元，设置为当通过所述状态值判断NP子***异常时，将 所述状态值作为异常状态信息写入所述检测报文中，并发送至CPU。
  10. 一种网络处理设备，所述网络处理设备包括权利要求7-9任意一项所述的网络 处理器异常检测装置。
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