WO2014110760A1 - 一种制备原位掺杂Pt的NiO有序纳米线阵列的方法 - Google Patents

一种制备原位掺杂Pt的NiO有序纳米线阵列的方法 Download PDF

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WO2014110760A1
WO2014110760A1 PCT/CN2013/070609 CN2013070609W WO2014110760A1 WO 2014110760 A1 WO2014110760 A1 WO 2014110760A1 CN 2013070609 W CN2013070609 W CN 2013070609W WO 2014110760 A1 WO2014110760 A1 WO 2014110760A1
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nanowire array
ordered
layer
doped
situ
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PCT/CN2013/070609
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English (en)
French (fr)
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李冬梅
陈鑫
梁圣法
牛洁斌
张培文
刘宇
李小静
詹爽
张�浩
罗庆
谢常青
刘明
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中国科学院微电子研究所
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Priority to PCT/CN2013/070609 priority Critical patent/WO2014110760A1/zh
Priority to US14/760,890 priority patent/US9418843B2/en
Publication of WO2014110760A1 publication Critical patent/WO2014110760A1/zh

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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N33/00—Investigating or analysing materials by specific methods not covered by groups G01N1/00 - G01N31/00
    • G01N33/0004—Gaseous mixtures, e.g. polluted air
    • G01N33/0009—General constructional details of gas analysers, e.g. portable test equipment
    • G01N33/0027—General constructional details of gas analysers, e.g. portable test equipment concerning the detector
    • G01N33/0036—General constructional details of gas analysers, e.g. portable test equipment concerning the detector specially adapted to detect a particular component
    • G01N33/004—CO or CO2
    • H—ELECTRICITY
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
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    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/10—Inorganic compounds or compositions
    • C30B29/16—Oxides
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/60—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape characterised by shape
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B33/00—After-treatment of single crystals or homogeneous polycrystalline material with defined structure
    • C30B33/005—Oxydation
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N33/00—Investigating or analysing materials by specific methods not covered by groups G01N1/00 - G01N31/00
    • G01N33/0004—Gaseous mixtures, e.g. polluted air
    • G01N33/0009—General constructional details of gas analysers, e.g. portable test equipment
    • G01N33/0027—General constructional details of gas analysers, e.g. portable test equipment concerning the detector
    • G01N33/0036—General constructional details of gas analysers, e.g. portable test equipment concerning the detector specially adapted to detect a particular component
    • G01N33/005—H2
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    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
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    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/0257—Doping during depositing
    • H01L21/02573—Conductivity type
    • H01L21/02581—Transition metal or rare earth elements
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
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    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02587—Structure
    • H01L21/0259—Microstructure
    • H01L21/02603—Nanowires
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02614—Transformation of metal, e.g. oxidation, nitridation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/34—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies not provided for in groups H01L21/0405, H01L21/0445, H01L21/06, H01L21/16 and H01L21/18 with or without impurities, e.g. doping materials
    • H01L21/46—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/428
    • H01L21/461—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/428 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/465—Chemical or electrical treatment, e.g. electrolytic etching
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y40/00—Manufacture or treatment of nanostructures
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02A—TECHNOLOGIES FOR ADAPTATION TO CLIMATE CHANGE
    • Y02A50/00—TECHNOLOGIES FOR ADAPTATION TO CLIMATE CHANGE in human health protection, e.g. against extreme weather
    • Y02A50/20—Air quality improvement or preservation, e.g. vehicle emission control or emission reduction by using catalytic converters

Definitions

  • the present invention belongs to the field of sensor technology, and in particular, to a method for preparing a ⁇ ordered nanowire array which can be applied to a native sensor doped Pt of a gas sensor.
  • electrochemical sensors have the disadvantages of being easily poisoned; infrared sensors are costly and difficult to carry; catalytic combustion gas sensors are less selective; and semiconductor gas sensors are caused by the adsorption and reaction of semiconductor sensitive membranes and gases.
  • the change of characteristics, by detecting the change to achieve the function of identifying and detecting its concentration, is simple to prepare and low in cost, but semiconductor gas sensors are mostly based on semiconductor metal oxides, generally need to work at higher temperatures, and selectivity is also better. Poor, so it is important to apply other techniques such as doping to improve its performance.
  • MO is a kind of semiconductor oxide with good performance, which has good performance in detecting CO, H 2 and other gases; and when its size is in the nanometer range, it will increase its sensitivity due to its surface area and volume ratio, and Lowering the working temperature; and the reasonably doped NK3 sensitive film will greatly improve the sensitivity and stability of the gas sensor for detecting gases such as CO and H 2 , especially after Pt doping, due to the catalytic action of Pt, The sensitivity and selectivity of the sensor to H 2 is greatly improved.
  • the present invention provides a method for preparing an in-situ Pt-doped N) ordered nanowire array, the method comprising: growing a layer on a high temperature resistant insulating substrate; coating the Ni layer a photoresist layer, an ordered nanowire array pattern region is carved in the photoresist layer by electron beam lithography, M is grown in the ordered nanowire array pattern region, and the photoresist is stripped by acetone and then ion beam is used Etching process etches the surface of the Ni layer, and engraves the M layer grown on the surface of the substrate, leaving only the ordered Ni nanowire array of the patterned nanowire array pattern region; the ordered Ni nanowire array Immersed in H 2 PtCl 6 solution, Pt is replaced on the M nanowire array by displacement reaction ; Mt nanowire array with Pt is oxidized in an oxidation furnace to obtain Pt-doped ordered N) nanowire array .
  • electron beam evaporation or magnetron sputtering is used, wherein: the electron beam evaporation condition is 10 - 4 - 10 - 6 Torr , the temperature is 1100-1600 ° C, the rate is 0.1-3 nm / s; the conditions of magnetron sputtering are voltage 400-800V, the magnetic field is about: 70 300G, air pressure: 1 ⁇ 10 mTorr, current density: 5 ⁇ 60mA /cm, power density: l ⁇ 40W/cm, the maximum rate is between lOOnm-lOOOnm.
  • the high temperature resistant insulating substrate is Si0 2 , Si, Al 2 0 3 or ceramic sheets.
  • the thickness of the grown Ni is between 10 nm and 100 nm.
  • the step of engraving the patterned nanowire array pattern region in the photoresist layer by electron beam lithography is to apply the photoresist layer coated on the N 1 layer by electron beam lithography.
  • Photolithography is performed to form an ordered nanowire array pattern region; the electron beam lithography process conditions are 100 KeV, 5 lenses, Zep glue thickness 400-800 nm, and dose 200-300.
  • electron beam evaporation or magnetron sputtering is used, wherein the electron beam evaporation condition is 10 - 4 - 10 - 6 Torr, temperature is 1100-1600 °C, rate is 0.1-3 nm/s; magnetron sputtering conditions are 400-800V, magnetic field is: 70 ⁇ 300G, air pressure: 1 ⁇ 10 mTorr, current density: 5 ⁇ 60mA /cm, power density: l ⁇ 40W/cm, the maximum rate is between lOOnm-lOOOnm.
  • the thickness of the grown Ni is between 50 nm and 5000 nm.
  • the process conditions of the ion beam etching are: beam current 250V-500V, beam current 400 mA -700 mA.
  • the ordered Ni nanowire array is immersed in the H 2 PtCl 6 solution, and the molar concentration of the H 2 PtCl 6 solution is 10 in the step of replacing the Pt on the Ni nanowire array by the displacement reaction.
  • the time for the displacement reaction in the H 2 PtCl 6 solution is 30 seconds to 30 minutes.
  • the Pt-doped Ni nanowire array is oxidized in an oxidation furnace at an oxidation temperature of 450 ° C to 950 ° C and an oxidation time of 3 hours to 12 hours.
  • the method for preparing an in-situ Pt-doped MO ordered nanowire array provided by the present invention firstly fabricates Ni nanowires by electron beam lithography, and then immersing them in a H 2 PtCl 6 solution through a displacement reaction. There will be Pt nanoparticles deposited on the Ni nanowires.
  • the method directly dopes the Ni nanowires in an aqueous solution by a displacement reaction, has a low reaction temperature, low energy consumption, and can directly control the solution concentration and the reaction temperature to control the size and number of the nanoparticles, and is simple and practical.
  • the ⁇ nanowire array with ordered Pt can be obtained by this method.
  • the sensitivity and stability of the doped sensor to gases such as CO and H 2 will be greatly improved, and the method is relatively easy to control.
  • FIG. 1 is a flow chart of a method of preparing an in-situ Pt-doped ⁇ ordered nanowire array in accordance with an embodiment of the present invention
  • 2-1 to 2-5 are process flow diagrams for preparing a Pt-doped NiO ordered nanowire array in accordance with an embodiment of the present invention.
  • the displacement reaction is a reaction in which a simple substance and a compound react to form another element and a compound.
  • metals with high metal activity can displace Pt with poor metal mobility.
  • the present invention uses electron beam evaporation or magnetron sputtering to grow Ni on a high temperature resistant insulating substrate with a thickness of lOnm-100 nm, and then uses electron beam lithography to engrave a photoresist on Ni.
  • Ordered nanowire array pattern regions then use electron beam evaporation or magnetron sputtering to grow a layer of M between 50nm and 5000nm in the ordered nanowire array pattern region to form ordered N ⁇ ft rice noodles, stripped
  • Ni grown on the substrate with a thickness of lOnm-100 nm is etched away by ion beam etching, leaving only the ordered Ni nanowires, and then immersed in a molar concentration of 10 - 5 ⁇ -10 - 3
  • a certain time in the H 2 PtCl 6 solution of hydrazine Pt is displaced on the Ni nanowire through the displacement reaction, and finally the Pt-doped ordered NiO nanowire array can be obtained by oxidation in a oxidizing furnace for a certain time.
  • FIG. 1 shows a flow chart of a method of preparing a Pt-doped NiO ordered nanowire array in accordance with an embodiment of the present invention, the method comprising the following steps:
  • Step 10 growing a Ni layer on the high temperature resistant insulating substrate
  • an M layer is grown on the high temperature resistant insulating substrate by electron beam evaporation or magnetron sputtering, wherein the electron beam evaporation condition is 10 - 4 - 10 - 6 Torr and the temperature is 1100 - 1600 ° C, the rate is 0.1-3 nm / s;
  • an embodiment using 10- 6 Torr a temperature of 1300 ° C, a rate of 1 nm / s;
  • the conditions of magnetron sputtering are voltage 400 800V, magnetic field: 70-300G, air pressure: l ⁇ 10 mTorr, current density: 5 ⁇ 60mA/cm, power density: l ⁇ 40W/cm, The maximum rate is between 00nm and lOOOnm;
  • a voltage of 400 V, a magnetic field of 100 G, a gas pressure of 1 mTorr, a current of 20 mA/cm, a power of 20 W/cm, a maximum rate of 100 nm/min is selected; in a preferred embodiment b of the invention
  • the voltage is 800V
  • the magnetic field is 300G
  • the air pressure is 10 mTorr
  • the current is 60 mA/cm
  • the power is 40 W/cm
  • the maximum speed is 1000 nm/min.
  • the voltage is 600V
  • the magnetic field is 200G
  • the air pressure is 5 mTorr
  • current 30 mA/cm power 20 W/cm
  • maximum rate 500 nm/min in a preferred embodiment d of the invention, a voltage of 500 V, a magnetic field of 160 G, a gas pressure of 4 mTorr, a current of 20 mA/cm, and a power of 15 W are selected. /cm, maximum rate 360 nm/min;
  • the high temperature resistant insulating substrate is generally SiO 2 , Si, Al 2 0 3 or ceramic sheets, etc., and the grown Ni layer has a thickness of between 10 nm and 100 nm, preferably 10 nm, 20 nm, 40 nm, 60 nm, 80 nm or 100 nm. ;
  • Step 20 coating a photoresist layer on the Ni layer, engraving an ordered nanowire array pattern region in the photoresist layer by electron beam lithography, and growing Ni in the ordered nanowire array pattern region, After the photoresist is stripped by acetone, the surface of the Ni layer is etched by an ion beam etching process, and the layer grown on the surface of the substrate is etched away, leaving only the ordered N 1 nanometer of the ordered nanowire array pattern region.
  • the patterned nanowire array pattern region is carved in the photoresist layer by electron beam lithography, and the photoresist layer coated on the Ni layer is photolithographically formed by electron beam lithography.
  • Ordered nanowire array pattern region; the process condition of the electron beam lithography is 100KeV, 5 lens, Zep glue thickness 400-800nm, dose 200-300; preferably 100KeV, 5 lens, Zep glue thickness 480nm, dose 260;
  • the thickness of the grown M between 50nm-5000 nm, normally by means of electron beam evaporation or magnetron sputtering, electron beam evaporation, wherein the condition is 10-4-- 10- 6 Torr, a temperature of 1100-1600 ° C, the rate of 0.1-3 nm / s; in a preferred embodiment of a present invention, the use of 10- 6 Torr, a temperature of 1300 ° C, rate of 1 nm/s; In a preferred embodiment b of the invention, 10 - 4 Torr is used, the temperature is 1100 ° C, and the rate is 0.1 nm / s; in a preferred embodiment c of the invention, 10 - 5 Torr is used, the temperature is 1400 ° C, the rate was 2 nm / s; in a preferred embodiment of the present invention, d, the use of 10- 6 Torr, a temperature of 1600 ° C, the rate was 3 nm /
  • the conditions for magnetron sputtering are 400 800V, the magnetic field is about: 70 300G, the gas pressure is 1 ⁇ 10 mTorr, the current density is 5 ⁇ 60mA/cm, the power density is l ⁇ 40W/cm, and the maximum speed is between lOOnm-lOOOnm.
  • 400 V, magnetic field 100 G, gas pressure 1 mTorr, current 20 mA/cm, power 20 W/cm, maximum rate 100 nm/min are selected; in a preferred embodiment of the invention b Medium, 800V, magnetic field 300G, air pressure 10mTorr, current 60 mA/cm, power 40 W/cm, maximum speed 1000 nm/min; in the preferred embodiment c of the present invention, 600V, magnetic field 200G, air pressure 5mTorr, current 30 mA/cm, power 20 W/cm, maximum rate 500 nm/min; in a preferred embodiment d of the invention, 200 V, magnetic field 100 G, air pressure 3 mTorr, current 15 mA/cm, power 10 W/cm, maximum Rate 200 nm/min;
  • the surface of the layer is etched by an ion beam etching process.
  • the process conditions of the ion beam etching are: beam current 250V-500V, beam current 400mA -700mA ; in a preferred embodiment a of the present invention, the beam is selected The current voltage is 300V, and the beam current is 600mA. In the preferred embodiment b of the present invention, the beam current is 500V, and the beam current is 700mA. In the preferred embodiment c of the present invention, the beam current is 250V, and the beam current is 400mA; In a preferred embodiment d of the invention, a beam current of 400 V is selected, and a beam current of 650 mA;
  • Step 30 immersing the ordered Ni nanowire array in a H 2 PtCl 6 solution having a molar concentration of 10 - 5 M - 10 - 3 M for a certain period of time, for example, 30 seconds to 30 minutes, preferably a molar concentration of 5X10 - 4 M, time 3 minutes, 25 ° C, by displacement reaction, Pt was replaced on the Ni nanowire array;
  • Step 40 oxidizing the Ni nanowire array with Pt in an oxidizing furnace for a certain period of time, the oxidation temperature is generally 450 to 950 ° C, the oxidation time is 3 to 12 hours, preferably 550 ° C, and oxidation for 6 hours.
  • the oxidation temperature is generally 450 to 950 ° C
  • the oxidation time is 3 to 12 hours, preferably 550 ° C, and oxidation for 6 hours.
  • a Pt-doped ordered ⁇ nanowire array can be obtained.
  • FIG. 1 A flow chart of a method for preparing an in-situ Pt-doped ⁇ ordered nanowire array according to an embodiment of the present invention shown in FIG. 1, and FIGS. 2-1 to 2-5 illustrate a system in accordance with an embodiment of the present invention.
  • 2-1 is employed in the substrate of the electron beam on the Si0 2 layer 10 nmNi schematic view of the growing evaporation, electron beam evaporation process conditions for 10- 6 Torr, 1300 ° C, a rate of 1 nm / s.
  • 2-2 is a photoresist layer coated on the Ni layer, and an ordered nanowire array pattern region is carved in the photoresist layer by electron beam lithography, and the thickness is grown in the patterned nanowire array pattern region.
  • Figure 2-3 shows the surface of the Ni layer etched by ion beam etching after the photoresist is stripped by acetone.
  • the layer grown on the surface of the substrate is etched away, leaving only the formation of the pattern region of the ordered nanowire array.
  • Schematic representation of an ordered nanowire array After the photoresist is stripped by acetone, the thickness of the substrate surface except the ordered nanowire array pattern region M is llOnm, and the thickness of the remaining portion of Ni is lOnm; the surface of the Ni layer is etched by an ion beam etching process.
  • the layer grown on the surface of the substrate is etched away, leaving only the ordered Ni nanowire array of the ordered nanowire array pattern region, and the thickness of Ni is removed by 10 nm as a whole, and the ordered nanometer is removed on the surface of the substrate.
  • the thickness of the line pattern pattern region Ni is 100 nm, and the rest of the Ni is etched away.
  • the ion beam etching conditions are a beam current of 300 V and a beam current of 60 mA.
  • 2-4 are an ordered array of nanowires Ni immersion of 25 ° C 5X10- 3 M H schematic diagram of after 10 minutes 2 PtCl 6 solution.
  • the Pt-loaded nanowire array was placed in an oxidizing furnace and oxidized in an environment of 550 ° C for 5 hours to obtain a Pt-doped ordered ⁇ ⁇ nanowire array.
  • the doped ⁇ nanowire array will greatly improve the sensitivity and stability of gases such as CO and H 2 .
  • the Ni nanowire is directly doped in an aqueous solution by a displacement reaction, the reaction temperature is low, the energy consumption is low, and the solution concentration and the reaction temperature can be directly controlled to control the size and quantity of the nanoparticles, which is simple and practical.
  • NiO nanowire arrays with ordered Pt doping can be obtained by this method.
  • the sensitivity and stability of the doped sensors to gases such as CO and 3 ⁇ 4 will be greatly improved, and the method is easier to control and utilize replacement.
  • the reaction-thermal oxidation method enables in situ controlled doping of ordered nanowire arrays.

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Abstract

本发明公开了一种制备原位掺杂Pt的NiO有序纳米线阵列的方法，包括：在耐高温绝缘衬底上生长一Ni层；在该Ni层上涂敷光刻胶层，利用电子束光刻在该光刻胶层刻出有序纳米线阵列图形区域，在该有序纳米线阵列图形区域中生长Ni，采用丙酮剥离光刻胶后用离子束刻蚀工艺对Ni层表面进行刻蚀，将衬底表面生长的Ni层刻掉，只留下该有序纳米线阵列图形区域的Ni形成有序Ni纳米线阵列；将该有序Ni纳米线阵列浸入H2PtCl6溶液中，通过置换反应在Ni纳米线阵列上有Pt被置换出来；将附有Pt的Ni纳米线阵列在氧化炉里氧化，得到Pt掺杂的有序NiO纳米线阵列。本发明简单实用，掺杂后的传感器对CO和H2等气体的敏感度和稳定性都将有很大的改善。

Description

一种制备原位掺杂 Pt的 MO有序纳米线阵列的方法
技术领域 本发明属于传感器技术领域， 特别是一种可应用于气体传感器的原 位掺杂 Pt的 ΝιΟ有序纳米线阵列的制备方法。
背景技术 由于 ¾在空气中极易***，会对人的生命财产造成严重的损失， 因 此对于它们在日常生活， 工业生产等领域中的检测非常重要。 目前有电 化学传感器、 催化燃烧式气体传感器、 红外传感器和半导体气体传感器 等可以用来在检测 H2。 其中， 电化学传感器有着易于中毒的缺点； 红外 传感器成本高，而且不易携带；催化燃烧式气体传感器则选择性比较差； 而半导体气体传感器是通过半导体敏感膜与气体的吸附和反应从而引 起其电学特性的变化， 通过检测其变化来实现识别和检测其浓度的功能， 制备简单，成本低，但是半导体气体传感器多是基于半导体金属氧化物， 一般都需要在较高温度下工作， 选择性也较差， 因此应用其他技术如掺 杂来改善其性能非常重要。
MO是一种性能比较好的半导体氧化物， 其在检测 CO、 H2等气体 有着良好的性能； 而且当其尺寸在纳米范围内时， 会由于其表面积和体 积比而提高其灵敏度， 并能降低其工作温度； 而合理掺杂的 NK3敏感膜 会使气体传感器对检测 CO和 H2等气体的灵敏性和稳定性有很大提高， 尤其是掺杂 Pt以后， 由于 Pt的催化作用， 会使传感器对 H2 的灵敏度 和选择性会大大提高。
因此掺杂 Pt的 NiO敏感线的研究对于传感器领域的研究和工业生 产都有积极的作用。 发明内容
(一） 要解决的技术问题
有鉴于此， 本发明的主要目的是提供一种原位掺杂 Pt的 N )有序 纳米线阵列的制备方法。
(二） 技术方案
为达到上述目的， 本发明提供了一种制备原位掺杂 Pt的 N )有序 纳米线阵列的方法， 该方法包括： 在耐高温绝缘衬底上生长一 层； 在该 Ni层上涂敷光刻胶层， 利用电子束光刻在该光刻胶层刻出有序纳 米线阵列图形区域， 在该有序纳米线阵列图形区域中生长 M， 采用丙酮 剥离光刻胶后后用离子束刻蚀工艺对 Ni层表面进行刻蚀， 将衬底表面 生长的 M层刻掉， 只留下该有序纳米线阵列图形区域的 形成有序 Ni纳米线阵列； 将该有序 Ni纳米线阵列浸入 H2PtCl6溶液中， 通过置换 反应在 M 纳米线阵列上有 Pt被置换出来；将附有 Pt的 M 纳米线阵列 在氧化炉里氧化， 得到 Pt掺杂的有序 N )纳米线阵列。
上述方案中， 所述在耐高温绝缘衬底上生长一 Ni层的歩骤中， 采 用电子束蒸发或磁控溅射的方式， 其中： 电子束蒸发的条件为 10— 4-10— 6 Torr, 温度为 1100-1600°C， 速率为 0.1-3 nm/s; 磁控溅射的条件为电压 400-800V , 磁场约为： 70 300G, 气压： 1 ~10 mTorr , 电流密度： 5~60mA/cm, 功率密度： l~40W/cm, 最大速率为 lOOnm-lOOOnm之间。
上述方案中，所述在耐高温绝缘衬底上生长一 Ni层的歩骤中， 耐高 温绝缘衬底为 Si02、 Si、 A1203或陶瓷片。
上述方案中，所述在耐高温绝缘衬底上生长一 M层的歩骤中， 生长 的 Ni的厚度在 10nm至 100 nm之间。
上述方案中， 所述利用电子束光刻在该光刻胶层刻出有序纳米线阵 列图形区域的歩骤中， 是采用电子束光刻对该N1层上涂敷的光刻胶层 进行光刻，形成有序纳米线阵列图形区域； 该电子束光刻的工艺条件为 100KeV, 5透镜， Zep胶厚 400-800nm， 剂量 200-300。
上述方案中，所述在该有序纳米线阵列图形区域中生长 Ni的歩骤中， 采用电子束蒸发或磁控溅射的方式，其中：电子束蒸发的条件为 10— 4-10— 6 Torr, 温度为 1100-1600 °C， 速率为 0.1-3 nm/s; 磁控溅射的条件为 400-800V,磁场为： 70~300G，气压： 1 ~10 mTorr,电流密度： 5~60mA/cm, 功率密度： l~40W/cm， 最大速率为 lOOnm-lOOOnm之间。
上述方案中，所述在该有序纳米线阵列图形区域中生长 Ni的歩骤中， 生长的 Ni的厚度在 50nm-5000 nm 之间。
上述方案中，所述用离子束刻蚀工艺对 Ni层表面进行刻蚀的歩骤中， 离子束刻蚀的工艺条件为：束流电压 250V-500V,束流 400 mA -700mA。
上述方案中， 所述将有序 Ni纳米线阵列浸入 H2PtCl6溶液中， 通过 置换反应在 Ni 纳米线阵列上有 Pt被置换出来的歩骤中， H2PtCl6溶液 的摩尔浓度为 10-5M-10-3 M， 浸入 H2PtCl6溶液中进行置换反应的时间 为 30秒至 30分钟。
上述方案中， 所述将附有 Pt的 Ni 纳米线阵列在氧化炉里氧化的歩 骤中， 氧化温度为 450°C至 950°C， 氧化时间为 3小时至 12小时。
(三） 有益效果
本发明提供的这种制备原位掺杂 Pt的 MO有序纳米线阵列的方法， 先用电子束光刻制造 Ni的纳米线， 然后将其浸入 H2PtCl6溶液中， 通过 置换反应， 就会有 Pt的纳米颗粒在 Ni纳米线上析出。 该方法是通过置 换反应直接在水溶液中对 Ni纳米线进行掺杂， 反应温度低， 耗能低， 而且可以直接控制溶液浓度和反应温度还达到控制纳米颗粒的大小和 数量，简单实用。通过该方法可以得到有序掺杂 Pt的 ΝιΟ纳米线阵列， 掺杂后的传感器对 CO和 H2等气体的敏感度和稳定性都将有很大的改善， 而且该方法比较容易控制。
附图说明 为了更进一歩说明本发明的内容， 以下结合附图及实施例子， 对本 发明做详细描述， 其中，
图 1是依照本发明实施例的制备原位掺杂 Pt的 ΝιΟ有序纳米线阵 列的方法流程图； 图 2-1至 2-5是依照本发明实施例的制备原位掺杂 Pt的 NiO有序纳 米线阵列的工艺流程图。
具体实施方式 为使本发明的目的、 技术方案和优点更加清楚明白， 以下结合具体 实施例， 并参照附图， 对本发明进一歩详细说明。
首先， 介绍置换反应的原理。 置换反应是一种单质和化合物反应生 成另一种单质和化合物的反应。 在这里， 金属活动性强的金属 可以 置换出金属活动性差的 Pt。
基于上述实现原理， 本发明利用电子束蒸发或磁控溅射在耐高温绝 缘衬底上生长厚度在 lOnm-100 nm的 Ni， 再用电子束光刻在 Ni上刻出 由光刻胶构成的有序纳米线阵列图形区域， 然后利用电子束蒸发或磁控 溅射在有序纳米线阵列图形区域中生长一层厚度在 50nm-5000 nm 之间 的 M， 形成有序 N^ft米线， 剥离光刻胶后用离子束刻蚀将衬底上生长 厚度在 lOnm-100 nm的 Ni刻掉， 只留下有序 Ni纳米线上， 再将其浸入 摩尔浓度为 10—5Μ-10— 3 Μ的 H2PtCl6溶液中一定时间， 通过置换反应， 就会有 Pt在 Ni 纳米线上被置换出来， 最后在氧化炉里氧化一定时间就 可以得到 Pt掺杂的有序 NiO纳米线阵列。
图 1示出了依照本发明实施例的制备原位掺杂 Pt的 NiO有序纳米 线阵列的方法流程图， 该方法包括以下歩骤：
歩骤 10: 在耐高温绝缘衬底上生长一 Ni层；
在本歩骤中，在耐高温绝缘衬底上生长一 M层一般采用电子束蒸发 或磁控溅射的方式， 其中电子束蒸发的条件为 10— 4-10— 6 Torr, 温度为 1100-1600°C， 速率为 0.1-3 nm/s;
在本发明的一个优选实施例 a中， 采用 10— 6 Torr, 温度 1300°C， 速 率为 1 nm/s;在本发明的优选实施例 b中，采用 10—4 ，温度1100°〇， 速率为 0.1 nm/s;在本发明的优选实施例 c中，采用 10—5 Torr,温度 1600 °C， 速率为 3 nm/s;在本发明的优选实施例 d中，采用 10—5 Torr,温度 1400°C， 速率为 2 nm/s;
在本歩骤中，磁控溅射的条件为电压 400 800V,磁场约为： 70-300G, 气压： l ~10 mTorr， 电流密度： 5~60mA/cm， 功率密度： l~40W/cm， 最大速率为 l OOnm-lOOOnm之间；
在本发明的一个优选实施例 a中， 选用电压 400V, 磁场 100G, 气 压 1 mTorr, 电流 20 mA/cm, 功率 20 W/cm, 最大速率 100 nm/min; 在 本发明的优选实施例 b中，选用电压 800V,磁场 300G,气压 10 mTorr, 电流 60 mA/cm, 功率 40 W/cm, 最大速率 1000 nm/min; 在本发明的优 选实施例 c中，选用电压 600V,磁场 200G,气压 5 mTorr,电流 30 mA/cm, 功率 20 W/cm, 最大速率 500 nm/min; 在本发明的优选实施例 d中， 选 用电压 500V,磁场 160G,气压 4mTorr，电流 20 mA/cm,功率 15 W/cm, 最大速率 360 nm/min;
耐高温绝缘衬底一般为 Si02、 Si、 A1203或陶瓷片等， 生长的 Ni层 的厚度在 10nm至 100 nm之间， 优选地厚度是 10nm、 20nm、 40nm、 60nm、 80nm或 lOOnm;
歩骤 20 : 在该 Ni层上涂敷光刻胶层， 利用电子束光刻在该光刻胶 层刻出有序纳米线阵列图形区域， 在该有序纳米线阵列图形区域中生长 Ni，采用丙酮剥离光刻胶后后用离子束刻蚀工艺对 Ni层表面进行刻蚀， 将衬底表面生长的 层刻掉， 只留下该有序纳米线阵列图形区域的 形成有序N1纳米线阵列；
在本歩骤中， 利用电子束光刻在该光刻胶层刻出有序纳米线阵列图 形区域， 是采用电子束光刻对该 Ni层上涂敷的光刻胶层进行光刻， 形 成有序纳米线阵列图形区域； 该电子束光刻的工艺条件为 100KeV， 5 透镜， Zep胶厚 400-800nm， 剂量 200-300 ; 优选地选用 100KeV , 5透 镜， Zep胶厚 480nm， 剂量 260 ;
在该有序纳米线阵列图形区域中生长 M， 生长的 M 的厚度在 50nm-5000 nm 之间， 一般采用电子束蒸发或磁控溅射的方式， 其中电 子束蒸发的条件为 10-4-10-6 Torr，温度为 1100-1600 °C，速率为 0.1-3 nm/s; 在本发明的一个优选实施例 a中， 采用 10— 6 Torr， 温度 1300 °C， 速率为 1 nm/s; 在本发明的优选实施例 b中， 采用 10— 4Torr， 温度 1100°C， 速率 为 0.1 nm/s; 在本发明的优选实施例 c中， 采用 10—5Torr， 温度 1400 °C， 速率为 2 nm/s;在本发明的优选实施例 d中，采用 10—6Torr，温度 1600°C， 速率为 3 nm/s;
磁控溅射的条件为 400 800V, 磁场约为： 70 300G, 气压： 1 ~10 mTorr, 电流密度： 5~60mA/cm， 功率密度： l~40W/cm， 最大速率为 lOOnm-lOOOnm之间； 在本发明的一个优选实施例 a中， 选用 400 V， 磁 场 100G, 气压 1 mTorr, 电流 20 mA/cm, 功率 20 W/cm, 最大速率 100 nm/min; 在本发明的优选实施例 b 中， 选用 800V, 磁场 300G, 气压 lOmTorr, 电流 60 mA/cm, 功率 40 W/cm, 最大速率 1000 nm/min; 在 本发明的优选实施例 c中， 选用 600V, 磁场 200G, 气压 5mTorr， 电流 30 mA/cm, 功率 20 W/cm， 最大速率 500 nm/min; 在本发明的优选实施 例 d中， 选用 200V, 磁场 100G, 气压 3mTorr， 电流 15 mA/cm, 功率 10 W/cm, 最大速率 200 nm/min;
用离子束刻蚀工艺对 层表面进行刻蚀， 所述离子束刻蚀的工艺 条件为： 束流电压 250V-500V, 束流 400mA -700mA; 在本发明的一个 优选实施例 a中， 选用束流电压 300V, 束流 600mA; 在本发明的优选 实施例 b中， 选用束流电压 500V, 束流 700mA; 在本发明的优选实施 例 c中， 选用束流电压 250V, 束流 400mA; 在本发明的优选实施例 d 中， 选用束流电压 400V, 束流 650mA;
歩骤 30: 将该有序 Ni纳米线阵列浸入摩尔浓度为 10— 5M-10— 3 M的 H2PtCl6溶液中一定时间， 例如 30秒至 30分钟， 优选地选用摩尔浓度为 5X10— 4M， 时间 3 分钟， 25°C， 通过置换反应， 在 Ni 纳米线阵列上有 Pt被置换出来；
歩骤 40:将附有 Pt的 Ni 纳米线阵列在氧化炉里氧化一定时间，氧 化温度一般为 450至 950 °C，氧化时间为 3至 12小时，优选地采用 550 °C， 氧化 6小时， 可以得到 Pt掺杂的有序 ΝιΟ纳米线阵列。
基于图 1所示的依照本发明实施例的制备原位掺杂 Pt的 ΝιΟ有序 纳米线阵列的方法流程图， 图 2-1至 2-5示出了依照本发明实施例的制 备原位掺杂 Pt的 N )有序纳米线阵列的工艺流程图。
图 2-1是在 Si02衬底上采用电子束蒸发生长一层 10 nmNi后的示意 图， 电子束蒸发的工艺条件为 10—6 Torr， 1300°C， 速率为 1 nm/s。
图 2-2是在该 Ni层上涂敷光刻胶层，利用电子束光刻在光刻胶层刻 出有序纳米线阵列图形区域， 在该有序纳米线阵列图形区域中生长厚度 为 100 nm的 Ni后的示意图。 电子束光刻的条件为 100KeV， 5透镜， Zep胶厚 480nm，剂量 260;电子束蒸发的条件为：在 10—6 Torr, 1300°C， 速率为 1 nm/s; 此时， 衬底上有序纳米线阵列图形区域处 的厚度为 10nm+ 100nm= 11 Onm。
图 2-3是采用丙酮剥离光刻胶后，采用离子束刻蚀工艺对 Ni层表面 进行刻蚀， 将衬底表面生长的 层刻掉， 只留下该有序纳米线阵列图 形区域的 形成有序 纳米线阵列的示意图。 在采用丙酮剥离光刻胶 后， 衬底表面除有序纳米线阵列图形区域 M的厚度为 llOnm外， 其余 部分 Ni的厚度均为 lOnm;采用离子束刻蚀工艺对 Ni层表面进行刻蚀， 将衬底表面生长的 层刻掉， 只留下该有序纳米线阵列图形区域的 形成有序 Ni纳米线阵列， 是从整体上将 Ni的厚度刻掉 10nm， 在衬底 表面除有序纳米线阵列图形区域 Ni的厚度为 lOOnm外， 其余部分的 Ni 均被刻掉。 这里， 离子束刻蚀的条件为束流电压 300V, 束流 60mA。
图 2-4是将有序 Ni纳米线阵列浸入 25°C的 5X10-3M的 H2PtCl6溶液 10分钟后的示意图。
图 2-5是将有 Pt的 纳米线阵列放入氧化炉里在 550°C的环境下氧 化 5小时后得到掺杂 Pt的有序 ΝιΟ纳米线阵列。 掺杂后的 ΝιΟ纳米线 阵列对 CO和 H2等气体的敏感度和稳定性都将有很大的改善。
本发明该通过置换反应直接在水溶液中对 Ni纳米线进行掺杂， 反 应温度低， 耗能低， 而且可以直接控制溶液浓度和反应温度还达到控制 纳米颗粒的大小和数量， 简单实用。 通过该方法可以得到有序掺杂 Pt 的 NiO纳米线阵列， 掺杂后的传感器对 CO和 ¾等气体的敏感度和稳 定性都将有很大的改善， 而且该方法比较容易控制， 利用置换反应 -热氧 化方法实现了对有序纳米线阵列进行原位的可控掺杂。 以上所述的具体实施例， 对本发明的目的、 技术方案和有益效果进 行了进一步详细说明， 所应理解的是， 以上所述仅为本发明的具体实施 例而己， 并不用于限制本发明， 凡在本发明的精神和原则之内， 所做的 任何修改、 等同替换、 改进等， 均应包含在本发明的保护范围之内。

Claims

权利要求
1、 一种制备原位掺杂 Pt的N10有序纳米线阵列的方法， 其特征在 于， 该方法包括：
在耐高温绝缘衬底上生长一 M层；
在该 Ni层上涂敷光刻胶层， 利用电子束光刻在该光刻胶层刻出有 序纳米线阵列图形区域， 在该有序纳米线阵列图形区域中生长 Ni， 采用 丙酮剥离光刻胶后用离子束刻蚀工艺对 Ni层表面进行刻蚀， 将衬底表 面生长的 层刻掉， 只留下该有序纳米线阵列图形区域的 形成有序 Ni纳米线阵列；
将该有序 Ni纳米线阵列浸入 H2PtCl6溶液中，通过置换反应在 Ni 纳 米线阵列上有 Pt被置换出来；
将附有 Pt的 M 纳米线阵列在氧化炉里氧化， 得到 Pt掺杂的有序 NiO纳米线阵列。
2、 根据权利要求 1所述的制备原位掺杂 Pt的 MO有序纳米线阵列 的方法，其特征在于，所述在耐高温绝缘衬底上生长一 M层的歩骤中， 采用电子束蒸发或磁控溅射的方式，其中：电子束蒸发的条件为 10—4-10—6 Torr, 温度为 1100-1600°C， 速率为 0.1-3 nm/s; 磁控溅射的条件为电压 400-800V , 磁场约为： 70 300G, 气压： 1 ~10 mTorr , 电流密度： 5~60mA/cm, 功率密度： l~40W/cm, 最大速率为 lOOnm-lOOOnm之间。
3、 根据权利要求 1所述的制备原位掺杂 Pt的 N )有序纳米线阵列 的方法，其特征在于，所述在耐高温绝缘衬底上生长一 M层的歩骤中， 耐高温绝缘衬底为 Si02、 Si、 A1203或陶瓷片。
4、 根据权利要求 1所述的制备原位掺杂 Pt的 N )有序纳米线阵列 的方法，其特征在于，所述在耐高温绝缘衬底上生长一 M层的歩骤中， 生长的 Ni层的厚度在 10nm至 100 nm之间。
5、 根据权利要求 1所述的制备原位掺杂 Pt的 NK3有序纳米线阵列 的方法， 其特征在于，所述利用电子束光刻在该光刻胶层刻出有序纳米 线阵列图形区域的歩骤中， 是采用电子束光刻对该 Ni层上涂敷的光刻 胶层进行光刻， 形成有序纳米线阵列图形区域； 该电子束光刻的工艺条 件为 100KeV， 5透镜， Zep胶厚 400-800nm， 剂量 200-300。
6、 根据权利要求 1所述的制备原位掺杂 Pt的 N )有序纳米线阵列 的方法， 其特征在于， 所述在该有序纳米线阵列图形区域中生长 N1的 歩骤中， 采用电子束蒸发或磁控溅射的方式， 其中： 电子束蒸发的条件 为 10-4-10-6 Torr, 温度为 1100-1600°C， 速率为 0.1-3 nm/s; 磁控溅射的 条件为 400~800V， 磁场为： 70-300G, 气压： 1 -10 mTorr, 电流密度： 5~60mA/cm,功率密度： l~40W/cm,最大速率为 lOOnm-lOOOnm之间。
7、 根据权利要求 1所述的制备原位掺杂 Pt的 N )有序纳米线阵列 的方法， 其特征在于， 所述在该有序纳米线阵列图形区域中生长 N1的 歩骤中， 生长的 Ni的厚度在 50nm-5000 nm 之间。
8、 根据权利要求 1所述的制备原位掺杂 Pt的 N )有序纳米线阵列 的方法， 其特征在于， 所述用离子束刻蚀工艺对 层表面进行刻蚀的 歩骤中， 离子束刻蚀的工艺条件为： 束流电压 250V-500V, 束流 400mA -700mA o
9、 根据权利要求 1所述的制备原位掺杂 Pt的 N )有序纳米线阵列 的方法， 其特征在于， 所述将有序 Ni纳米线阵列浸入 H2PtCl6溶液中， 通过置换反应在 Ni 纳米线阵列上有 Pt被置换出来的歩骤中， H2PtCl6 溶液的摩尔浓度为 10—5Μ-10— 3 Μ， 浸入 H2PtCl6溶液中进行置换反应的 时间为 30秒至 30分钟。
10、 根据权利要求 1所述的制备原位掺杂 Pt的 MO有序纳米线阵 列的方法， 其特征在于， 所述将附有 Pt的 M 纳米线阵列在氧化炉里氧 化的歩骤中，氧化温度为 450°C至 950°C，氧化时间为 3小时至 12小时。
PCT/CN2013/070609 2013-01-17 2013-01-17 一种制备原位掺杂Pt的NiO有序纳米线阵列的方法 WO2014110760A1 (zh)

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