WO2014098131A1 - 透明電極付き基板およびその製造方法 - Google Patents
透明電極付き基板およびその製造方法 Download PDFInfo
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- WO2014098131A1 WO2014098131A1 PCT/JP2013/083905 JP2013083905W WO2014098131A1 WO 2014098131 A1 WO2014098131 A1 WO 2014098131A1 JP 2013083905 W JP2013083905 W JP 2013083905W WO 2014098131 A1 WO2014098131 A1 WO 2014098131A1
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
- G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
- G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
- G06F3/044—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
- G06F3/0443—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means using a single layer of sensing electrodes
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/06—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the coating material
- C23C14/08—Oxides
- C23C14/086—Oxides of zinc, germanium, cadmium, indium, tin, thallium or bismuth
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/22—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
- C23C14/34—Sputtering
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/22—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
- C23C14/34—Sputtering
- C23C14/3407—Cathode assembly for sputtering apparatus, e.g. Target
- C23C14/3414—Metallurgical or chemical aspects of target preparation, e.g. casting, powder metallurgy
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/09—Use of materials for the conductive, e.g. metallic pattern
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/14—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using spraying techniques to apply the conductive material, e.g. vapour evaporation
- H05K3/16—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using spraying techniques to apply the conductive material, e.g. vapour evaporation by cathodic sputtering
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B32—LAYERED PRODUCTS
- B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
- B32B2307/00—Properties of the layers or laminate
- B32B2307/40—Properties of the layers or laminate having particular optical properties
- B32B2307/412—Transparent
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B32—LAYERED PRODUCTS
- B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
- B32B2307/00—Properties of the layers or laminate
- B32B2307/70—Other properties
- B32B2307/702—Amorphous
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B32—LAYERED PRODUCTS
- B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
- B32B2457/00—Electrical equipment
- B32B2457/20—Displays, e.g. liquid crystal displays, plasma displays
- B32B2457/208—Touch screens
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2203/00—Indexing scheme relating to G06F3/00 - G06F3/048
- G06F2203/041—Indexing scheme relating to G06F3/041 - G06F3/045
- G06F2203/04103—Manufacturing, i.e. details related to manufacturing processes specially suited for touch sensitive devices
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/032—Materials
- H05K2201/0326—Inorganic, non-metallic conductor, e.g. indium-tin oxide [ITO]
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10007—Types of components
- H05K2201/10053—Switch
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/11—Treatments characterised by their effect, e.g. heating, cooling, roughening
- H05K2203/1194—Thermal treatment leading to a different chemical state of a material, e.g. annealing for stress-relief, aging
Definitions
- the present invention relates to a substrate with a transparent electrode provided with a transparent electrode layer on a transparent film substrate, and more particularly to a substrate with a transparent electrode layer for a capacitive touch panel and a method for manufacturing the same.
- a substrate with a transparent electrode in which a transparent electrode layer made of a conductive oxide thin film is formed on a transparent substrate such as a transparent film or glass is widely used as a transparent electrode for displays, touch panels and the like.
- the main factors that determine the performance of a substrate with a transparent electrode are the electrical resistance and light transmittance of the transparent electrode layer.
- Indium-tin composite oxide (ITO) is widely used as a material that achieves both low resistance and high transmittance. ing.
- Patent Document 1 describes that increasing the tin oxide concentration of ITO on a glass substrate increases the carrier density and lowers the resistance of the ITO transparent electrode layer. More specifically, in Patent Document 1, film formation is performed in a substrate temperature range of 230 to 250 ° C. using a target having a tin oxide content of about 10% by mass.
- the time necessary for crystallization can be shortened by annealing at a high temperature of 200 ° C. or higher.
- the film substrate cannot withstand such a high temperature, the ITO film formed on the transparent film substrate must be crystallized at a relatively low temperature of about 150 ° C. It is not easy to shorten and increase productivity.
- Patent Document 3 describes a method of shortening the time required for crystallization by laminating ITO having a high tin oxide concentration and ITO having a low tin oxide concentration.
- ITO having a low tin oxide concentration is partially used, it is difficult to sufficiently reduce the resistance of the ITO film after crystallization.
- the time required for crystallization of the ITO film is reduced by extremely reducing the water pressure in the chamber before the start of the ITO film formation and during the film formation to 1.0 ⁇ 10 ⁇ 4 Pa or less. It can be shortened. In order to realize such a low partial pressure, it is necessary to lower the chamber pressure and remove moisture and gas adsorbed on the substrate film before starting the ITO film formation. When the inside of the chamber is evacuated by a vacuum pump, the time required for evacuation increases exponentially as the ultimate pressure is low (the ultimate vacuum is high). In order to reduce the moisture pressure in the chamber to 1.0 ⁇ 10 ⁇ 4 Pa or less before the start of ITO film formation, it is necessary to evacuate for a long time before film formation, and a film substrate is introduced into the chamber. As a result, the time required for film formation to be completed (occupation time of the film forming apparatus) becomes long, so that the overall productivity tends to decrease even if the crystallization time is shortened.
- an object of the present invention is to provide a substrate with a transparent electrode having an ITO film with excellent productivity and low resistance. More specifically, the provision of a substrate with a transparent electrode using an ITO target having a high tin oxide concentration and having an amorphous transparent electrode layer that can be crystallized in a short time by relatively low-temperature annealing on a transparent film substrate. With the goal.
- the inventors have made it possible to reduce the activation energy required for crystallization by increasing the amount of low-resistance grains in the amorphous transparent electrode layer before crystallization, which is necessary for crystallization. It has been found that the required time can be shortened.
- the present invention relates to a substrate with a transparent electrode provided with an amorphous transparent electrode layer made of an amorphous indium-tin composite oxide having a tin oxide content of 6.5% by mass or more and less than 16% by mass on a transparent film substrate.
- the amorphous transparent electrode layer has 50 / ⁇ m 2 or more of regions having a continuous area of 100 nm 2 or more with a current value on the applied voltage surface of 50 nA or more.
- the tin oxide content of the amorphous transparent electrode layer is larger than 8% by mass and smaller than 16% by mass.
- a crystalline transparent electrode layer having a lower resistance can be obtained when the amorphous transparent electrode layer is crystallized by heating.
- the tin oxide content of the amorphous transparent electrode layer is 6.5% by mass to 8% by mass. If the content of tin oxide is within this range, the low resistivity can be maintained and the time required for crystallization can be further shortened.
- the film thickness of the amorphous transparent electrode layer is preferably 10 nm to 35 nm.
- the time required for crystallization is preferably 30 minutes or less.
- the amorphous transparent electrode layer preferably has an activation energy for crystallization of 1.3 eV or less.
- the resistivity after the amorphous transparent electrode layer is heated at 150 ° C. for 30 minutes is preferably 1.5 ⁇ 10 ⁇ 4 to 3.0 ⁇ 10 ⁇ 4 ⁇ cm.
- this invention relates to the manufacturing method of a board
- a transparent electrode layer made of an amorphous indium-tin composite oxide is formed on a transparent film substrate by sputtering (transparent electrode layer forming step).
- transparent electrode layer forming step a composite oxide target of indium oxide and tin oxide having a tin oxide content of 6.5% by mass or more and less than 16% by mass is used.
- the tin oxide content of the target is preferably greater than 8% by mass and less than 16% by mass.
- the power source power density at the time of forming the transparent electrode layer is 2.0 W / cm 2 or more.
- pre-sputtering is performed at a power source power density of 2.0 W / cm 2 or more before starting the film formation of the transparent electrode layer.
- the power source power density at the time of pre-sputtering is preferably equal to or higher than the power source power density at the time of forming the transparent electrode layer.
- pre-sputtering may be performed before starting film formation, and film formation may be performed at a power density of 2.0 W / cm 2 or more.
- the moisture pressure in the chamber becomes 2 ⁇ 10 ⁇ 4 Pa to 1 ⁇ 10 ⁇ 3 Pa before forming the transparent electrode layer.
- the moisture pressure in the chamber at the time of forming the transparent electrode layer is preferably 3 ⁇ 10 ⁇ 4 Pa to 3 ⁇ 10 ⁇ 3 Pa.
- this invention relates to the manufacturing method of a board
- the amorphous transparent electrode layer By heating the amorphous transparent electrode layer, the amorphous ITO is crystallized to obtain a crystalline transparent electrode layer.
- the resistivity of the crystalline transparent electrode layer is preferably 1.5 ⁇ 10 ⁇ 4 to 3.0 ⁇ 10 ⁇ 4 ⁇ cm.
- the tin oxide concentration of the amorphous transparent electrode layer is large, the resistance of the transparent electrode layer after crystallization is reduced. Moreover, since the density of the low resistance grains in the amorphous transparent electrode layer is large, the time required for completing the crystallization of ITO is short. Furthermore, since it is not necessary to excessively depressurize the chamber before the start of film formation, the time required for evacuation is shortened.
- the substrate with a transparent electrode of the present invention can be reduced in resistance, and the time required from the introduction of the film substrate into the film forming chamber to the completion of film formation (occupation time of the film forming apparatus), Further, after the film formation is completed, both the time required for crystallization is short and the time required for the entire manufacturing process can be shortened, so that the productivity is excellent.
- FIG. 1 is a schematic cross-sectional view of a substrate 100 with a transparent electrode comprising a transparent electrode layer 20 on a transparent film substrate 10.
- the transparent electrode layer 20 is an amorphous film, and includes low-resistance grains 22 in the amorphous phase 21.
- the transparent film substrate a transparent and colorless substrate is used in the visible light region.
- the material of the transparent film substrate is, for example, a general-purpose resin such as a polyester resin such as polyethylene terephthalate (PET), polybutylene terephthalate (PBT), or polyethylene naphthalate (PEN), a cycloolefin resin, a polycarbonate resin, or a cellulose resin.
- the glass transition temperature of the transparent film made of these general-purpose resins is generally about 50 ° C. to 150 ° C.
- resin, such as transparent polyimide has a high glass transition temperature of 200 degreeC or more, the film which consists of such super heat resistant resin is very expensive. Therefore, from the viewpoint of reducing the manufacturing cost of the substrate with a transparent electrode, the material for the transparent film is preferably a general-purpose resin as described above.
- polyethylene phthalate and cycloolefin resin are preferably used.
- the thickness of the transparent film substrate is not particularly limited, but is preferably 0.01 to 0.4 mm, more preferably 0.02 to 0.3 mm.
- the thicker the film substrate the less susceptible to deformation due to film formation.
- the film substrate is too thick, the flexibility is lost and it is difficult to form the transparent electrode layer by the roll-to-roll method.
- the transparent electrode layer can be formed by a roll-to-roll method with high productivity while suppressing deformation of the film substrate due to heat.
- the transparent film substrate 10 may have a base layer 12 on a transparent film 11.
- the underlayer 12 serves as a film formation base when the transparent electrode layer 20 is formed on the transparent film substrate 10.
- the adhesiveness between the transparent film substrate 10 and the transparent electrode layer 20 can be improved by providing an inorganic insulating layer such as silicon oxide (SiOx) as the base layer 12.
- the transparent film substrate 10 may have an organic material layer or an organic-inorganic composite material layer as the base layer 12.
- the organic material layer or the organic-inorganic composite material layer can act as an easy adhesion layer or a stress buffer layer.
- the underlayer 12 may be composed of one layer or may be a laminated structure of two or more layers.
- the base layer 12 of the transparent film substrate can also have a function as an optical adjustment layer.
- a middle refractive index layer made of SiOx (x 1.8 to 2.0)
- a high refractive index layer made of niobium oxide, and a low refractive index layer made of SiO 2 are laminated in this order.
- the configuration of the optical adjustment layer is not limited to such a three-layer configuration. Further, the film thickness of each layer can be appropriately set in consideration of the refractive index of the material and the like.
- the film forming method can form a homogeneous film with few impurities, the film forming speed is large and the productivity is high.
- the sputtering method is desirable because of its excellent point.
- metal, metal oxide, or metal carbide can be used as the sputtering target.
- the substrate surface may be subjected to a surface treatment.
- a surface treatment means for example, there is a method of increasing the adhesion force by giving the substrate surface electrical polarity. Specific examples include corona discharge and plasma treatment.
- a transparent electrode layer 20 made of ITO is formed on the transparent film substrate 10.
- the transparent electrode layer 20 is preferably formed by sputtering.
- the film thickness of the transparent electrode layer is not particularly limited and is appropriately set according to the required resistance value and the like.
- the thickness of the transparent electrode layer 20 is preferably 10 nm to 35 nm, and more preferably 15 nm to 30 nm.
- the ITO transparent electrode layer formed on the transparent film substrate by the sputtering method is an amorphous film in an as-deposited state immediately after the film formation.
- the amorphous transparent electrode layer 20 preferably includes low resistance grains 22 in the amorphous phase 21.
- a crystal having a crystallization rate of 30% or less is defined as amorphous. The crystallization rate is determined from the ratio of the area occupied by the crystal grains in the observation field during microscopic observation.
- the tin oxide concentration of the amorphous transparent electrode layer is 6.5% by mass or more and less than 16% by mass with respect to the total of indium oxide and tin oxide.
- the tin oxide concentration of the amorphous transparent electrode layer is preferably 6.5% by mass to 8% by mass.
- the tin oxide concentration of the amorphous transparent electrode layer is preferably larger than 8% by mass and smaller than 16% by mass, larger than 8% by mass and 14% by mass. % Or less, more preferably 9% by mass to 12% by mass.
- the amorphous transparent electrode layer 20 preferably has a large number of regions having a large current value on the applied voltage surface when a bias voltage is applied. More specifically, when a bias voltage of 0.1 V is applied, the number of regions where the current value on the applied voltage surface is 50 nA or more is preferably 50 / ⁇ m 2 or more.
- the current on the applied voltage surface is measured by using a scanning probe microscope equipped with a conductive cantilever, bringing the conductive cantilever into contact with the applied voltage surface, and scanning the measurement region while monitoring the current flowing into the cantilever.
- a two-dimensional current distribution (current image) is obtained.
- the portion where the current is large is low resistance. That is, it can be said that the current image (current value distribution) represents the distribution of resistance.
- the obtained current image is binarized at a threshold value of 50 nA, and a continuous region in which the area of a current amount of 50 nA or more (low resistance region) is 100 nm 2 or more is regarded as one low resistance grain.
- a threshold value of 50 nA a current amount of 50 nA or more
- a continuous region in which the area of a current amount of 50 nA or more (low resistance region) is 100 nm 2 or more is regarded as one low resistance grain.
- the amorphous transparent electrode layer 20 before crystallization (annealing) by heating is in a state where the low resistance grains 22 are buried in the high resistance amorphous phase 21.
- the distribution of the low resistance grains can be evaluated. As the density of the region (low resistance grain) where the current value on the applied voltage surface of the amorphous transparent electrode layer is large is large, the activation energy required for crystallization tends to decrease and the crystallization time tends to be shortened.
- the density of the region where the amount of current is 50 nA or more is preferably 50 / ⁇ m 2 or more, more preferably 80 / ⁇ m 2 or more, further preferably 100 / ⁇ m 2 or more, and most preferably 120 / ⁇ m 2 or more.
- the upper limit of the density of the low resistance grains is not particularly limited.
- the density of the low-resistance grains in the amorphous transparent electrode layer is generally 1000 / ⁇ m 2 or less, preferably 500 / ⁇ m. 2 or less, more preferably 400 / ⁇ m 2 or less.
- the transparent electrode layer 20 is formed on the transparent film substrate 10 by a roll-to-roll method using a winding type sputtering apparatus.
- the power source used for sputtering film formation is not particularly limited, and a DC power source, an MF power source, an RF power source, or the like is used.
- the power source used for the sputter deposition of the transparent electrode layer is preferably a DC power source or an MF power source, and particularly preferably a DC power source.
- the use of a DC power source can increase the low-resistance grain density in the transparent electrode layer with a short time of pre-sputtering.
- the sputter target it is desirable to use a composite sintered body in which tin oxide is dissolved in indium oxide.
- the content of tin oxide in the target is preferably 6.5% by mass or more and less than 16% by mass with respect to the total of indium oxide and tin oxide.
- the content of tin oxide in the target is selected within the above range so that the tin oxide concentration of the amorphous transparent electrode layer is within the above range.
- the sputtering film forming conditions for the transparent electrode layer are not particularly limited as long as the low-resistance grain density of the as-deposited material is within the above range.
- the low resistance grain density is increased by performing pre-sputtering before starting the film formation of the transparent electrode layer, increasing the power source power density during film formation, increasing the substrate temperature, and the like. More specifically, before the start of film, 2.0 W / cm 2 or more, more preferably carried out pre-sputtering at 3.0 W / cm 2 or more power power density; power power density during casting 2 0.0 W / cm 2 or more, more preferably 3.0 W / cm 2 or more; the heating temperature (substrate temperature) during film formation is 100 ° C. to 150 ° C., more preferably 100 ° C. to 120 ° C .; Alternatively, by combining these conditions, an amorphous transparent electrode layer having a low resistance grain density of 50 particles / ⁇ m 2 or more is formed.
- the moisture pressure in the chamber is preferably 1 ⁇ 10 ⁇ 3 Pa or less, more preferably 8 ⁇ 10 ⁇ 4 Pa or less, and 6 ⁇ 10 ⁇ 4 Pa or less. More preferably.
- the time required for evacuation increases exponentially as the ultimate pressure decreases. Therefore, if the water pressure before the start of film formation is set too small, the pre-process of film formation (with the film substrate in the chamber) The time required from the introduction to the start of film formation) becomes longer, which can be a factor for reducing productivity. Therefore, the moisture pressure in the chamber by vacuum evacuation before the start of film formation is preferably 2 ⁇ 10 ⁇ 4 Pa or more.
- the moisture pressure in the chamber before the start of film formation and during film formation can be measured by quadrupole mass spectrometry (Qmass).
- pre-sputtering when pre-sputtering is performed before starting the film formation of the transparent electrode layer, it is preferable to perform vacuum evacuation before the pre-sputtering so that the moisture pressure in the chamber is within the above range.
- an inorganic insulating layer such as silicon oxide as the underlayer 12 and the transparent electrode layer 20 are continuously formed using a sputtering film forming apparatus including a plurality of chambers, before the inorganic insulating layer is formed.
- evacuation so that the water pressure in the chamber is within the above range.
- pre-sputtering means that before the ITO transparent electrode layer is formed, sputter discharge is performed on a portion that does not become a product on the transparent film substrate.
- base layer 12 such as silicon oxide
- discharge is performed before the ITO transparent electrode layer is formed.
- the pressure in the chamber is equal to the pressure during transparent electrode layer deposition or from the viewpoint of exhaust removal of impurities on the target.
- a lower pressure is preferable.
- the optimum amount of oxygen introduced during pre-sputtering varies depending on the oxidation state of the target surface and the like. Therefore, it is preferable that the oxygen partial pressure is set so that the crystallization time after the formation of the transparent electrode layer is shortened according to the properties of the target.
- the power source power density at the time of pre-sputtering is preferably equal to or higher than the power source power density at the time of forming the transparent electrode layer.
- the power density at the time of pre-sputtering is preferably 1 to 10 times, more preferably 1.5 to 5 times, and further preferably 2 to 4 times the power density at the time of forming the transparent electrode layer.
- a transparent electrode layer After pre-sputtering at a high power density, a transparent electrode layer is formed at a power density equal to or lower than that to increase the density of low-resistance grains while suppressing damage to the film substrate due to film formation. it can. Therefore, an amorphous transparent electrode layer having a short crystallization time and a low resistivity after crystallization can be obtained.
- pre-sputtering is not particularly limited, it is generally performed within the range of room temperature (about 20 ° C.) to 150 ° C. Note that pre-sputtering may be performed at a temperature lower than room temperature (for example, while cooling the film forming roll).
- the pre-sputtering time can be appropriately set according to the condition of the target surface, pre-sputtering temperature, power density, and the like, but is preferably 3 minutes or more, and more preferably 5 minutes or more.
- a transparent electrode layer is formed while introducing an inert gas such as argon and oxygen into the chamber.
- the film forming pressure after introducing the process gas is preferably 0.2 Pa to 0.6 Pa.
- the amount of introduction of process gas such as argon or oxygen at the time of forming the transparent electrode layer is set in consideration of the balance with the chamber volume, film forming pressure, film forming power density and the like.
- the introduction amount of an inert gas such as argon is preferably 200 sccm to 1000 sccm, more preferably 250 sccm to 500 sccm.
- the amount of oxygen gas introduced is preferably 1 sccm to 10 sccm, more preferably 2 sccm to 5 sccm.
- Water partial pressure of the transparent electrode layer formation time in the chamber 3 ⁇ less preferably 10 -3 Pa, 2 ⁇ 10 -3 Pa or less is more preferable.
- the smaller the moisture pressure during film formation the shorter the crystallization time.
- the water pressure during film formation it is necessary to reduce the water pressure before the start of film formation, and the time required for evacuation tends to be long.
- the moisture pressure during film formation is kept small, it is difficult to increase the size of the device or the types of film substrates that can be used are limited (it is difficult to use films with a high water content). There is. Therefore, the water pressure during film formation is preferably 3 ⁇ 10 ⁇ 4 Pa or more, more preferably 5 ⁇ 10 ⁇ 4 Pa or more.
- the power density at the time of film formation is not particularly limited as long as spatter discharge can occur, and is, for example, an arbitrary range of 0.4 W / cm 2 or more. And can.
- the film forming power density of the transparent electrode layer is preferably 2 W / cm 2 or more, and more preferably 2.5 W / cm 2 or more.
- the film forming power density is preferably 10 W / cm 2 or less from the viewpoint of suppressing film forming damage. If the power density is excessively high, the crystallization speed increases, but the resistivity after crystallization may not be sufficiently lowered due to the influence of film-forming damage.
- the power density during film formation may be less than 2 W / cm 2.
- the power density during film formation may be 0.4 W / cm 2 to 0.8 W. Even at about / cm 2 , an amorphous transparent electrode layer having a high density of low-resistance grains and a short time required for crystallization can be obtained.
- the substrate temperature at the time of forming the transparent electrode layer is higher, the density of the low-resistance particles is increased and the crystallization time tends to be shortened. Therefore, the substrate temperature is preferably 20 ° C. or higher, and more preferably 30 ° C. or higher.
- the substrate temperature is the temperature of the film substrate during film formation. When pre-sputtering is performed before the transparent electrode layer is formed, or when the film forming power density is 2 W / cm 2 or more, the density of 50 low-resistance grains is 50 even when forming at room temperature without heating during film formation. / ⁇ m 2 or more.
- the film formation roll and the film substrate are heated by sputtering discharge, so that the substrate temperature may rise to about 50 ° C. If the power density at the time of pre-sputtering is increased or the pre-sputtering time is lengthened, the density of the low-resistance grains is 50 particles / ⁇ m 2 or more even when the substrate temperature is lower than 20 ° C. can do.
- the substrate temperature at the time of forming the transparent electrode layer is 100 ° C. or higher, the density of the low-resistance grains further increases and the crystallization time tends to be further shortened.
- the substrate temperature during film formation of the transparent electrode layer is preferably 100 ° C. or less, and more preferably 90 ° C. or less. As described above, in the present invention, it is possible to form a transparent electrode layer that can be crystallized in a short time without excessively increasing the substrate temperature by performing pre-sputtering or increasing the film forming power density. .
- an amorphous transparent electrode layer is formed on a transparent film substrate by sputtering to obtain a substrate with a transparent electrode.
- a transparent electrode layer capable of crystallization in a short time is formed without excessive evacuation or high-temperature heating. Therefore, the process window of the film forming conditions is wide, and variations in characteristics within the film forming surface are suppressed, so that a large-area substrate with a transparent electrode can be obtained.
- the resistivity of the amorphous transparent electrode layer is preferably in the range of about 5 ⁇ 10 ⁇ 4 ⁇ ⁇ cm to 9 ⁇ 10 ⁇ 4 ⁇ ⁇ cm, and preferably 6 ⁇ 10 ⁇ 4 ⁇ ⁇ cm to 8 ⁇ 10 ⁇ 4. More preferably, ⁇ ⁇ cm.
- the carrier density of the amorphous transparent electrode layer is preferably about 3 ⁇ 10 ⁇ 20 / cm 3 to 5 ⁇ 10 ⁇ 20 / cm 3 . As the tin oxide concentration in the ITO film increases, the carrier density in the film tends to increase.
- the substrate with a transparent electrode of the present invention having an amorphous transparent electrode layer on a transparent film substrate is preferably reduced in resistance by crystallization of the transparent electrode layer.
- Asdepo's amorphous transparent electrode layer is mostly made of amorphous ITO.
- the resistance of the transparent electrode layer is reduced.
- an amorphous transparent electrode layer is converted into a crystalline transparent electrode layer by annealing a substrate with a transparent electrode by heating in the presence of oxygen.
- the “heating annealing” in the above means a process in which heat from a heat source is positively applied to the transparent electrode for a certain period of time, such as ITO crystallization or heating during electrode formation.
- the temperature of the heat annealing for crystallization is preferably 180 ° C. or lower, and more preferably 160 ° C. or lower.
- the time required for crystallization is short. Specifically, when heat annealing is performed at 150 ° C., the time required to complete crystallization is preferably 30 minutes or less. In the present invention, the time required to complete the crystallization of the amorphous transparent electrode layer may be adjusted to 20 minutes or less, 15 minutes or less, 10 minutes or less, or 5 minutes or less by adjusting the film forming conditions. it can. Whether or not the crystallization is completed is evaluated by a change in resistance value before and after immersion when the substrate with a transparent electrode is immersed in 7% hydrochloric acid at room temperature for 30 seconds.
- the resistance after immersion is 1.3 times or less of the resistance before immersion, crystallization is considered complete.
- the acid treatment is performed under the above conditions, the amorphous ITO is completely dissolved and removed. If the crystallization is not sufficient, the undissolved crystal part remains in an island shape and is electrically insulated. Increase significantly.
- the magnitude of the crystallization speed can be judged by the crystallization time as described above, but more strictly, it is evaluated by the activation energy necessary for crystallization.
- the activation energy for crystallizing the amorphous transparent electrode layer is preferably 1.3 eV or less, more preferably 1.1 eV or less, and 1.0 eV or less. More preferably.
- the activation energy tends to decrease as the density of the low-resistance particles in the amorphous transparent electrode layer increases. The smaller the activation energy, the shorter the crystallization time.
- k A ⁇ exp ( ⁇ E / RT), which is a relational expression between the rate constant and the temperature.
- k is a rate constant
- E is an activation energy
- A is a constant
- R is a gas constant
- T is an absolute temperature.
- the activation energy E can be obtained from the slope of the straight line (Arrhenius plot).
- ln represents a natural logarithm.
- the activation energy E is calculated by obtaining the reaction rate constant k at three temperatures of 130 ° C., 140 ° C., and 150 ° C. and performing an Arrhenius plot.
- x the reaction rate
- t the elapsed time from the start of the reaction.
- the resistance decreases with crystallization, and when the crystallization is completely completed, the temporal change in resistance is completed. That is, the amount of change in resistance reflects the amount of amorphous material that has changed into crystals, and the time change in the crystallization process can be examined by examining the time change in resistance during the heat annealing. Therefore, the reaction rate constant k is obtained by monitoring the amount of change in resistance instead of the reaction rate (crystallization rate) x.
- the resistance is an average value R h of the resistance value R0 before annealing and the resistance value RC after annealing.
- the present invention by forming an amorphous transparent electrode layer having a large density of low-resistance grains on the transparent film substrate, even when the tin oxide content in the film is larger than 8% by mass, Crystallization in a short time becomes possible. Moreover, since the tin oxide content in the film is large, the carrier density in the film is high, and the resistance of the transparent electrode layer after crystallization is lowered. That is, according to the present invention, a low-resistance substrate with a transparent electrode can be obtained with high productivity. In the present invention, a transparent electrode layer that can be crystallized in a short time can be obtained even when the water pressure before film formation is 2 ⁇ 10 ⁇ 4 Pa or more. Therefore, the total productivity including film formation to ITO heat crystallization is improved.
- the resistivity of the transparent electrode layer after crystallization is preferably 3.0 ⁇ 10 ⁇ 4 ⁇ cm or less, more preferably 2.7 ⁇ 10 ⁇ 4 ⁇ cm or less. More preferably, it is 2.5 ⁇ 10 ⁇ 4 ⁇ cm or less.
- the substrate with a transparent electrode of the present invention can be used as a transparent electrode for a display, a light emitting element, a photoelectric conversion element, etc., and is suitably used as a transparent electrode for a touch panel. Especially, since the transparent electrode layer after crystallization has low resistance, it is preferably used for a capacitive touch panel.
- the sheet resistance of the transparent electrode layer was measured by four-probe pressure contact measurement using a low resistivity meter Loresta GP (MCP-T710, manufactured by Mitsubishi Chemical Corporation).
- the resistivity of the transparent electrode layer was calculated by the product of the sheet resistance value and the film thickness.
- the resistivity after crystallization was measured after taking out the sample after crystallization from the oven and cooling it to room temperature.
- Heating temperature Arrhenius plot (horizontal axis: 1 / RT, vertical axis: ln (1 / k)) from reaction rate constant k and heating temperature at 130 ° C, 140 ° C, 150 ° C, respectively, and the slope of the straight line Activation energy E was designated.
- the number of low resistance regions is measured by a scanning probe microscope system (NanoNaviReal, manufactured by SII Nanotechnology, scanner model number: FS20N) equipped with a scanning probe microscope unit (Nanocute) and a measurement control unit (NanoNavi probe station).
- Current image measurement using a 30 nm rhodium-coated conductive cantilever (SI-DF3R, manufactured by SII Nanotechnology, spring constant: 1.6 N / m) and evaluation of the low resistance region from the distribution of the current image Went.
- the substrate with a transparent electrode was cut into a 5 mm square, and the ITO film surface and the sample holder were made conductive through a copper tape. After bringing the probe into contact with the sample, a bias voltage of 1 V was applied from the holder, and the range of 2 ⁇ m 2 was scanned to remove static electricity. Next, with the probe kept in contact, the applied voltage was changed to 0.1 V, the area of 1 ⁇ m 2 was scanned near the center of the area where static electricity was removed, and a shape image and a current image were obtained by two-screen measurement. Obtained. The measurement was performed in a room temperature environment. Detailed measurement conditions are as follows.
- Measurement mode AFM Deflection amount: -1mm Scanning frequency: 1.08Hz I gain: 0.45 P gain: 0.11 A gain: 0 DIF sensitivity: 40.00 mV / nm Resolution (X ⁇ Y): 256 ⁇ 256 Image quality: Standard
- FIG. 6 is a result of binarizing the current image of the first embodiment.
- a continuous region in which the area of the portion where the current value is 50 nm or more (the white portion in FIG. 5) is 100 nm 2 or more is regarded as one low-resistance grain. The number was counted. From FIG. 6, the number of low resistance grains can be read as 51 / ⁇ m 2 .
- Example 1 A silicon oxide layer and a transparent electrode layer were formed on a PET film substrate having a glass transition temperature of 80 ° C. on which hard coat layers were formed on both sides using a roll-to-roll type sputtering apparatus.
- the film was transported in the film forming apparatus and evacuated until the water pressure in the chamber reached 4 ⁇ 10 ⁇ 4 Pa. At this time, evacuation took 2 hours.
- the substrate temperature was 40 ° C.
- Pre-sputtering was performed for 15 minutes at a power density of 3.0 W / cm 2 using a DC power source under conditions of an internal pressure of 0.3 Pa and a moisture pressure of 1 ⁇ 10 ⁇ 3 Pa.
- the oxygen flow rate was changed to 2.0 sccm, and sputtering film formation was performed at a power density of 0.6 W / cm 2 of a DC power source to form an ITO transparent electrode layer on the silicon oxide layer.
- the film thickness of the obtained transparent electrode layer was 26 nm.
- the substrate temperature during film formation was determined by pasting a thermolabel (TEMP-PLATE, manufactured by IP Giken) on a transparent film substrate in advance, and reading the maximum temperature of the thermolabel after film formation.
- the thermo label selected and stuck the area
- the film thickness of the transparent electrode layer is a value obtained by observing the cross section with a transmission electron microscope (TEM). The water pressure before and during film formation was measured using a quadrupole mass spectrometer.
- Example 2 Pre-sputtering before forming the transparent electrode layer was not performed, and the oxygen flow rate during film formation of the transparent electrode layer was 4.0 sccm and the power density was 3.0 W / cm 2 . Other than that was carried out similarly to Example 1, and produced the board
- Example 3 After performing the pre-sputtering for 15 minutes before forming the transparent electrode layer, the ITO transparent electrode layer was formed under the same conditions as the pre-sputtering. Other than that was carried out similarly to Example 1, and produced the board
- Example 4 The degassing temperature before film formation and the substrate temperature during film formation were 120 ° C. Other than that was carried out similarly to Example 3, and produced the board
- Example 5 The degassing temperature before film formation and the substrate temperature during film formation were 120 ° C. Other than that was carried out similarly to Example 1, and produced the board
- Example 1 A substrate with a transparent electrode was produced in the same manner as in Example 1 except that pre-sputtering was not performed before forming the transparent electrode layer.
- the film thickness of the obtained transparent electrode layer was 26 nm.
- Example 2 A substrate with a transparent electrode was produced in the same manner as in Example 5 except that pre-sputtering was not performed before forming the transparent electrode layer.
- the film thickness of the obtained transparent electrode layer was 26 nm.
- Table 1 shows the film forming conditions of the transparent electrode layers of the above Examples and Comparative Examples, the characteristics of the amorphous film after film formation, the crystallization conditions (crystallization time and activation energy), and the characteristics after crystallization.
- the annealing time required for crystallization depends on the density of the low resistance grains, and that the crystallization can be performed in a shorter time as the number of the low resistance grains in the amorphous film is larger. Specifically, it can be seen that if the low resistance grain density is 50 particles / ⁇ m 2 or more, crystallization is completed in 30 minutes or less. It can also be seen that the activation energy required for crystallization at that time is 1.3 eV or less. That is, it can be seen that when the amorphous transparent electrode layer of the as-deposited film after deposition contains many low-resistance grains, the activation energy E for crystallization is small and crystallization is possible in a short time.
- Example 1 From the comparison between Example 1 and Comparative Example 1, it can be seen that the number of low-resistance grains is increased and the crystallization rate is increased by performing pre-sputtering before ITO film formation. In addition, it can be seen from the comparison between Example 2 and Comparative Example 1 that the same effect as that of pre-sputtering can also be obtained by forming the transparent electrode layer at a high power density. From the comparison between Example 1 and Example 2 and Example 3, it can be seen that, after pre-sputtering, the film acceleration is further increased by film formation at a high power density.
- Example 1 and Example 5 From the comparison between Example 1 and Example 5 and the comparison between Example 3 and Example 4, it can be seen that the crystallization rate is further increased by increasing the substrate temperature at the time of forming the transparent electrode layer.
- pre-sputtering and high power are used rather than increasing the substrate temperature (film formation temperature). It can be seen that the film acceleration at the density can increase the crystal acceleration more effectively.
- the number of low-resistance grains is increased by a combination of film formation conditions such as pre-sputtering before film formation of the transparent electrode layer, power density increase during film formation, and substrate temperature rise. It can be seen that the crystallization time can be further shortened.
- Comparative Example 2 and Comparative Example 3 require a longer time for crystallization than Examples 1-5. From these results, the shortening of the crystallization time of the transparent electrode layer according to the present invention is due to a mechanism different from the conventionally known shortening of the crystallization time by reducing the water pressure, which improves the productivity and reduces the resistance. It can be seen that there is an advantage over the prior art in both.
- Example 6 A silicon oxide layer and a transparent electrode layer were formed on a PET film substrate having a glass transition temperature of 80 ° C. on which hard coat layers were formed on both sides using a roll-to-roll type sputtering apparatus.
- the film forming roll temperature (Preset temperature) ⁇ 20 ° C., chamber internal pressure 0.2 Pa, moisture pressure 1 ⁇ 10 ⁇ 3 Pa
- pre-sputtering was performed for 180 minutes at a power density of 5.0 W / cm 2 using an MF power source.
- sputtering was performed under the same conditions as in pre-sputtering to form an ITO transparent electrode layer on the silicon oxide layer.
- the film thickness of the obtained transparent electrode layer was 26 nm
- the resistivity was 6.0 ⁇ 10 ⁇ 4 ⁇ ⁇ cm
- the number of low-resistance grains per 1 ⁇ m 2 was 56.
- Example 6 From the results of Example 6 above, even when the tin oxide content is 8% by mass or less, it is possible to form an amorphous transparent electrode layer having low resistance grains of 50 / ⁇ m 2 or more, and within 30 minutes. It can be seen that crystallization is possible in time.
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Abstract
Description
透明フィルム基板としては、可視光領域で無色透明なものが利用される。透明フィルム基板の材料は、例えば、ポリエチレンテレフタレート(PET)やポリブチレンテレフテレート(PBT)やポリエチレンナフタレート(PEN)等のポリエステル樹脂やシクロオレフィン系樹脂、ポリカーボネート樹脂、セルロース系樹脂等の汎用樹脂が好ましい。これらの汎用樹脂からなる透明フィルムのガラス転移温度は、一般に50℃~150℃程度である。なお、透明ポリイミド等の樹脂は、200℃以上の高いガラス転移温度を持つが、このような超耐熱性の樹脂からなるフィルムは、非常に高価である。そのため、透明電極付き基板の製造コストを削減する観点から、透明フィルムの材料は、上記のような汎用樹脂が好ましい。中でも、ポリエチレンレフタレートやシクロオレフィン系樹脂が好ましく用いられる。
透明フィルム基板10上には、ITOからなる透明電極層20が形成される。透明電極層20は、スパッタ法により製膜されることが好ましい。透明電極層の膜厚は特に制限されず、必要とされる抵抗値等に応じて適宜に設定される。透明電極付き基板がタッチパネルの位置検出電極に用いられる場合、透明電極層20の膜厚は、10nm~35nmが好ましく、15nm~30nmがより好ましい。
透明フィルム基板上にアモルファス透明電極層を備える本発明の透明電極付き基板は、透明電極層の結晶化により低抵抗化されることが好ましい。アズデポのアモルファス透明電極層は大部分がアモルファスのITOからなる。このアモルファスITOが結晶に変化することで、透明電極層が低抵抗化される。例えば、透明電極付き基板を、酸素存在下で加熱アニールすることにより、アモルファス透明電極層が結晶質透明電極層に転換される。上記における「加熱アニール」とは、ITOの結晶化や電極形成時の加熱等、熱源による熱を透明電極に対して積極的に一定時間加える処理を意味する。フィルム基板の耐熱性の観点から、結晶化のための加熱アニールの温度は、180℃以下が好ましく、160℃以下がより好ましい。
透明電極層のシート抵抗は、低抵抗率計ロレスタGP(MCP‐T710、三菱化学社製)を用いて四探針圧接測定により測定した。透明電極層の抵抗率は、シート抵抗の値と膜厚との積により算出した。なお、結晶後の抵抗率は、結晶化が終了したサンプルをオーブンから取り出し、室温まで冷却した後に測定した。
図2に示すように、アニール前の透明電極付き基板100の透明電極層20側の面の向かい合う2辺に平行電極を取り付け、アニール中の抵抗測定を行った。平行電極を取り付ける際、電極間距離Dと電極を取り付けた辺の長さLとを等しくすることにより、抵抗値からシート抵抗を計算できる状態とした。抵抗の時間変化が無くなった時の抵抗値RCとの差が2Ω/□以内になった時間を結晶化完了時間tcとした。例えば、図3(実施例1、加熱温度150℃)では、抵抗の時間変化が無くなった時の抵抗値RCは100Ω/□、結晶化完了時間tCは15分であることが読み取れる。
アモルファス透明電極層を結晶化する際の活性化エネルギーEは、非晶質透明電極層付き基板を所定温度で加熱アニールして結晶化した際の反応速度定数kの温度依存性から算出した。各加熱温度について、横軸に加熱時間、縦軸に透明電極層の表面抵抗をプロットし、表面抵抗値が、初期値(測定開始時)と終端値(結晶化が完全に進行し、結晶化度がほぼ100%となった状態)との平均値となった時間tを求めた。この時間tにおいて反応率が50%であるとみなして、式: 反応率=1-exp(kt) に、反応率=0.5を代入し、各加熱温度における反応速度定数kを算出した。
低抵抗領域の数の測定は、走査型プローブ顕微鏡ユニット(Nanocute)および測定制御ユニット(NanoNaviプローブステーション)を備える走査型プローブ顕微鏡システム(NanoNaviReal、SIIナノテクノロジー製、スキャナ型番:FS20N)により、接触面に30nmのロジウムコートが施された導電性カンチレバー(SI-DF3R、SIIナノテクノロジー製、ばね定数:1.6N/m)を用いて電流像測定を行い、電流像の分布から低抵抗領域の評価を行った。
測定モード:AFM
たわみ量:-1mm
走査周波数:1.08Hz
Iゲイン:0.45
Pゲイン:0.11
Aゲイン:0
DIF感度:40.00mV/nm
解像度(X×Y):256×256
画質:標準
アニールを行う前の透明電極層に含まれる結晶成分の総量は、アモルファス成分を完全にエッチングし、残った結晶粒の面積を計算することで評価した。エッチング条件としては、室温で1.7%の塩酸に90秒浸漬し、その後流水洗浄を行った。このサンプルの表面を走査型電子顕微鏡で撮影し、画像から残った結晶成分の量を求めた。
両面にハードコート層が形成されたガラス転移温度80℃のPETフィルム基板上に、ロール・トゥ・ロール方式のスパッタ装置を用いて、シリコン酸化物層および透明電極層を製膜した。
透明電極層製膜前のプレスパッタを行わず、透明電極層製膜時の酸素流量を4.0sccm、パワー密度を3.0W/cm2とした。それ以外は実施例1と同様にして透明電極付き基板を作製した。得られた透明電極層の膜厚は26nmであった。
透明電極層製膜前に15分間のプレスパッタを行った後、プレスパッタと同じ条件でITO透明電極層の製膜を行った。それ以外は実施例1と同様にして透明電極付き基板を作製した。得られた透明電極層の膜厚は26nmであった。
製膜前の脱ガス温度、および製膜時の基板温度を120℃とした。それ以外は実施例3と同様にして透明電極付き基板を作製した。得られた透明電極層の膜厚は26nmであった。
製膜前の脱ガス温度、および製膜時の基板温度を120℃とした。それ以外は実施例1と同様にして透明電極付き基板を作製した。得られた透明電極層の膜厚は26nmであった。
透明電極層製膜前のプレスパッタを行わなかったこと以外は実施例1と同様にして透明電極付き基板を作製した。得られた透明電極層の膜厚は26nmであった。
透明電極層製膜前のプレスパッタを行わなかったこと以外は実施例5と同様にして透明電極付き基板を作製した。得られた透明電極層の膜厚は26nmであった。
製膜前に、チャンバーの水分圧が1×10-4Paとなるまで真空排気を行った。透明電極層製膜時の水分圧は2×10-4Paまで低下していた。それ以外は、比較例2と同様にして透明電極付き基板を作製した。得られた透明電極層の膜厚は26nmであった。ただし、比較例3において、製膜前にチャンバー内の水分圧を1×10-4とするために要した時間は、30時間であった。なお、比較例3において、アモルファス透明電極層を製膜後、150℃で加熱アニールを行った際、加熱開始から30分後では結晶化は完了しておらず、抵抗率は4.4×10-4Ω・cmであった。
両面にハードコート層が形成されたガラス転移温度80℃のPETフィルム基板上に、ロール・トゥ・ロール方式のスパッタ装置を用いて、シリコン酸化物層および透明電極層を製膜した。
Claims (19)
- 透明フィルム基板上にアモルファス透明電極層を備える透明電極付き基板であって、
前記アモルファス透明電極層は、酸化スズ含有量が8質量%より大きく16質量%より小さいアモルファスのインジウム-スズ複合酸化物からなり、かつ、0.1Vのバイアス電圧が印加された場合に、加電圧面における電流値が50nA以上の連続した面積100nm2以上の領域を50個/μm2以上有する、透明電極付き基板。 - 前記アモルファス透明電極層は、150℃で加熱した場合に、結晶化に要する時間が30分以下である、請求項1に記載の透明電極付き基板。
- 前記アモルファス透明電極層は、結晶化のための活性化エネルギーが1.3eV以下である、請求項1または2に記載の透明電極付き基板。
- 前記アモルファス透明電極層は、150℃で30分加熱処理された後の抵抗率が1.5×10-4~3.0×10-4Ωcmである、請求項1~3のいずれか1項に記載の透明電極付き基板。
- 前記アモルファス透明電極層の膜厚が10nm~35nmである、請求項1~4のいずれか1項に記載の透明電極付き基板。
- 透明フィルム基板上にアモルファス透明電極層を備える透明電極付き基板であって、
前記アモルファス透明電極層は、
膜厚が10nm~35nmであり、
酸化スズ含有量が8質量%より大きく16質量%より小さいアモルファスのインジウム-スズ複合酸化物からなり、かつ、
結晶化のための活性化エネルギーが1.3eV以下である、
透明電極付き基板。 - 請求項1~6のいずれか1項に記載の透明電極付き基板を製造する方法であって、
透明フィルム基板上に、スパッタ法により、アモルファスのインジウム-スズ複合酸化物からなる透明電極層が製膜される透明電極層製膜工程を有し、
前記透明導電層製膜工程において、酸化スズ含有量が8質量%より大きく16質量%より小さい酸化インジウムと酸化スズの複合酸化物ターゲットが用いられ、製膜時の電源パワー密度が2.0W/cm2以上である、透明電極付き基板の製造方法。 - 請求項1~6のいずれか1項に記載の透明電極付き基板を製造する方法であって、
透明フィルム基板上に、スパッタ法により、アモルファスのインジウム-スズ複合酸化物からなる透明電極層が製膜される透明電極層製膜工程を有し、
前記透明導電層製膜工程において、酸化スズ含有量が8質量%より大きく16質量%より小さい酸化インジウムと酸化スズの複合酸化物ターゲットが用いられ、透明電極層の製膜開始前に、電源パワー密度が2.0W/cm2以上でプレスパッタが行われる、透明電極付き基板の製造方法。 - 前記プレスパッタ時の電源パワー密度が、透明電極層の製膜時の電源パワー密度以上である、請求項8に記載の透明電極付き基板の製造方法。
- 透明電極層の製膜時の電源パワー密度が2.0W/cm2以上である、請求項8または9に記載の透明電極付き基板の製造方法。
- チャンバー内の水分圧が2×10-4Pa~1×10-3Paとなるまで真空排気が行われた後、前記透明電極層製膜工程が行われる、請求項7~10のいずれか1項に記載の透明電極付き基板の製造方法。
- 透明電極層の成膜時のチャンバー内の水分圧が、3×10-4Pa~3×10-3Paである、請求項7~11のいずれか1項に記載の透明電極付き基板の製造方法。
- 透明フィルム基板上に、抵抗率が1.5×10-4~3.0×10-4Ωcmである結晶質透明電極層を備える透明電極付き基板を製造する方法であって、
請求項1~6のいずれか1項に記載の透明電極付き基板を加熱することにより、前記アモルファス透明電極層が結晶化されることを特徴とする、透明電極付き基板の製造方法。 - 透明フィルム基板上に、抵抗率が1.5×10-4~3.0×10-4Ωcmである結晶質透明電極層を備える透明電極付き基板を製造する方法であって、
請求項7~12のいずれか1項に記載の方法により得られた透明電極付き基板を加熱することにより、前記アモルファス透明電極層が結晶化されることを特徴とする、透明電極付き基板の製造方法。 - 透明フィルム基板上にアモルファス透明電極層を備える透明電極付き基板を製造する方法であって、
透明フィルム基板上に、スパッタ法により、アモルファスのインジウム-スズ複合酸化物からなる透明電極層が製膜される透明電極層製膜工程を有し、
前記透明導電層製膜工程において、酸化スズ含有量が8質量%より大きく16質量%より小さい酸化インジウムと酸化スズの複合酸化物ターゲットが用いられ、透明電極層の製膜開始前に、電源パワー密度が2.0W/cm2以上でプレスパッタが行われ、透明電極層の製膜時の電源パワー密度が2.0W/cm2以上である、透明電極付き基板の製造方法。 - 透明フィルム基板上にアモルファス透明電極層を備える透明電極付き基板であって、
前記アモルファス透明電極層は、酸化スズ含有量が6.5質量%~8質量%であるアモルファスのインジウム-スズ複合酸化物からなり、かつ、0.1Vのバイアス電圧が印加された場合に、加電圧面における電流値が50nA以上の連続した面積100nm2以上の領域を50個/μm2以上有する、透明電極付き基板。 - 前記アモルファス透明電極層は、150℃で加熱した場合に、結晶化に要する時間が30分以下である、請求項16に記載の透明電極付き基板。
- 前記アモルファス透明電極層は、結晶化のための活性化エネルギーが1.3eV以下である、請求項16または17に記載の透明電極付き基板。
- 前記アモルファス透明電極層は、150℃で30分加熱処理された後の抵抗率が1.5×10-4~3.0×10-4Ωcmである、請求項16~18のいずれか1項に記載の透明電極付き基板。
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