WO2013127188A1 - 像素单元驱动电路、像素单元驱动方法及像素单元 - Google Patents

像素单元驱动电路、像素单元驱动方法及像素单元 Download PDF

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Publication number
WO2013127188A1
WO2013127188A1 PCT/CN2012/084010 CN2012084010W WO2013127188A1 WO 2013127188 A1 WO2013127188 A1 WO 2013127188A1 CN 2012084010 W CN2012084010 W CN 2012084010W WO 2013127188 A1 WO2013127188 A1 WO 2013127188A1
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Prior art keywords
thin film
film transistor
driving
source
pixel unit
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PCT/CN2012/084010
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English (en)
French (fr)
Inventor
青海刚
祁小敬
高永益
Original Assignee
京东方科技集团股份有限公司
成都京东方光电科技有限公司
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Application filed by 京东方科技集团股份有限公司, 成都京东方光电科技有限公司 filed Critical 京东方科技集团股份有限公司
Priority to US13/994,934 priority Critical patent/US9240141B2/en
Publication of WO2013127188A1 publication Critical patent/WO2013127188A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3258—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the voltage across the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G09G2300/0861—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0233—Improving the luminance or brightness uniformity across the screen
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/04—Maintaining the quality of display appearance
    • G09G2320/043—Preventing or counteracting the effects of ageing
    • G09G2320/045—Compensation of drifts in the characteristics of light emitting or modulating elements

Definitions

  • Pixel unit driving circuit Pixel unit driving method, and pixel unit
  • the present invention relates to the field of organic light emitting display, and more particularly to a pixel unit driving circuit, a pixel unit driving method, and a pixel unit. Background technique
  • the AMOLED Active Matrix Organic Light Emitting Diode
  • the AMOLED is capable of emitting light by a current generated when a driving TFT (Thin Film Transistor) is saturated, because different widths are input when the same gray scale voltage is input.
  • the value voltage produces different drive currents, causing current inconsistencies.
  • Vth crystal tube threshold voltage
  • Vth also drifts, so the brightness uniformity of the conventional 2T1C circuit has been poor.
  • the conventional 2T1C pixel unit driving circuit is shown in Figure 1.
  • the circuit contains only two TFTs, T1 is used as a switch, and DTFT is used for pixel driving.
  • the conventional 2T1C pixel unit driving circuit is also relatively simple to operate.
  • the control timing diagram of the 2T1C pixel unit driving circuit is as shown in FIG. 2. When the scanning level Vscan of the scanning line Scan output is low, T1 is turned on, and the data line Data is The upper gray scale voltage charges the capacitor C. When the scan level is high, T1 is turned off, and the capacitor C is used to store the gray scale voltage.
  • the driving current formula of the 2T1C pixel unit driving circuit includes Vth.
  • the Vth of the TFTs at different positions of the manufactured panel is greatly different, resulting in a large difference.
  • the driving current of the OLED is different under the same gray scale voltage, so the brightness of the panel at different positions of the driving scheme may be different, and the brightness uniformity is poor.
  • the OLED material gradually ages, resulting in an increase in the threshold voltage of the OLED, and at the same current, the luminous efficiency of the OLED material decreases, and the brightness of the panel decreases.
  • a main object of the present invention is to provide a pixel unit driving circuit and a pixel unit driving method And a pixel unit to improve the brightness unevenness of the OLED panel and the degradation of the aging brightness of the material.
  • the present invention provides a pixel unit driving circuit for driving an OLED, the pixel unit driving circuit including a driving thin film transistor, a matching thin film transistor, a first switching element, a storage capacitor, and a driving control unit;
  • the OLED is connected to and connected to the second end of the storage capacitor through the first switching element, and the drain is connected to the driving power source;
  • the matching thin film transistor has a gate and a drain connected to a gate of the driving thin film transistor, and a source connected to a source of the driving thin film transistor through the driving control unit;
  • the second end of the storage capacitor is also connected to the data line through the drive control unit.
  • the driving control unit includes a second switching element and a third switching element; a source of the matching thin film transistor is connected to a source of the driving thin film transistor through the second switching element;
  • the second end of the storage capacitor is connected to the data line through the third switching element.
  • a source of the driving thin film transistor is connected to a cathode of the OLED; a drain of the driving thin film transistor is connected to a low level output end of the driving power source;
  • the driving thin film transistor and the matching thin film transistor are p-type thin film transistors.
  • the first switching element is a first thin film transistor
  • the second switching element is a second thin film transistor
  • the third switching element is a third thin film transistor
  • the first thin film transistor has a gate connected to the first control line, a drain connected to the second end of the storage capacitor, and a source connected to a source of the driving thin film transistor;
  • the second thin film transistor has a gate connected to the second control line, a drain connected to a source of the matching thin film transistor, and a source connected to a source of the driving thin film transistor;
  • the third thin film transistor has a gate connected to the second control line, a drain connected to the data line, and a source connected to the second end of the storage capacitor;
  • the first thin film transistor, the second thin film transistor, and the third thin film transistor are all p-type thin film transistors.
  • a source of the driving thin film transistor is connected to an anode of the OLED; a drain of the driving thin film transistor is connected to a high level output end of the driving power source;
  • the driving thin film transistor and the matching thin film transistor are n-type thin film transistors.
  • the first switching element is a first thin film transistor
  • the second switching element is a second thin film transistor
  • the third switching element is a third thin film transistor
  • the first thin film transistor has a gate connected to the first control line, a drain connected to the second end of the storage capacitor, and a source connected to a source of the driving thin film transistor;
  • the second thin film transistor has a gate connected to the second control line, a drain connected to a source of the matching thin film transistor, and a source connected to a source of the driving thin film transistor;
  • the third thin film transistor has a gate connected to the second control line, a source connected to the data line, and a drain connected to the second end of the storage capacitor;
  • the first thin film transistor, the second thin film transistor, and the third thin film transistor are n-type thin film transistors.
  • the present invention also provides a pixel unit driving method, which is applied to the above pixel unit driving circuit, and the pixel unit driving method includes the following steps:
  • Pixel charging step the driving control unit controls the storage capacitor to be charged until the gate potential of the driving thin film transistor rises to match the source potential of the matching thin film transistor only to match the threshold voltage of the thin film transistor, at which time the matching thin film transistor is turned off.
  • driving the OLED light-emitting display step driving the OLED light-emitting display step: the first switching element turns on a connection between a source of the driving thin film transistor and a second end of the storage capacitor, and the driving thin film transistor is turned on, The driving control unit controls the gate of the driving thin film transistor to be in a floating state such that the threshold voltage of the matching thin film transistor compensates for the threshold voltage of the driving thin film transistor.
  • a buffering step is further included between the pixel charging step and the driving OLED light emitting display step: the driving control unit disconnects the data line from the second end of the storage capacitor, and disconnects the driving thin film transistor The connection between the source and the source of the matching thin film transistor.
  • the present invention also provides a pixel unit including an OLED and the above pixel unit driving circuit; the pixel unit driving circuit is connected to a cathode of the OLED;
  • the anode of the OLED is connected to a high level output of the driving power source.
  • the present invention also provides a pixel unit including an OLED and the above pixel unit driving circuit; the pixel unit driving circuit is connected to an anode of the OLED; compared with the prior art, the present invention utilizes two identical in the same pixel Designed TFT electrical matching principle, compensating for the threshold voltage of OLED driving transistor, and using voltage feedback mechanism to compensate
  • the threshold voltage of the OLED illumination caused by aging of the OLED material rises, and the problem of uneven brightness of the OLED panel and reduced brightness of the aging of the material is improved.
  • 1 is a circuit diagram of a conventional 2T1C pixel unit driving circuit
  • 2 is a control timing chart of the conventional 2T1C pixel unit driving circuit
  • FIG. 3 is a circuit diagram of a pixel unit driving circuit according to a first embodiment of the present invention.
  • FIG. 4 is a circuit diagram of a pixel unit driving circuit according to a second embodiment of the present invention.
  • FIG. 5 is a circuit diagram of a pixel unit driving circuit according to a third embodiment of the present invention.
  • FIG. 6 is a circuit diagram of a pixel unit driving circuit according to a fourth embodiment of the present invention.
  • FIG. 7 is a circuit diagram of a pixel unit driving circuit according to a fifth embodiment of the present invention.
  • FIG. 8 is a circuit diagram of a pixel unit driving circuit according to a sixth embodiment of the present invention.
  • FIG. 9 is a timing chart of signals in operation of a pixel unit driving circuit according to a third embodiment of the present invention.
  • FIG. 10A is an equivalent circuit diagram of a pixel unit driving circuit according to a third embodiment of the present invention in a first period of time
  • FIG. 10B is an equivalent circuit diagram of the pixel unit driving circuit in the second period of time according to the third embodiment of the present invention.
  • FIG. 10C is an equivalent circuit diagram of the pixel unit driving circuit in the third period of time according to the third embodiment of the present invention.
  • Figure 11 is a timing chart showing signals of a pixel unit driving circuit in accordance with a sixth embodiment of the present invention. detailed description
  • the pixel unit driving circuit is configured to drive an OLED, including a driving thin film transistor DTFT, a matching thin film transistor MTFT, and a first switching element.
  • OLED including a driving thin film transistor DTFT, a matching thin film transistor MTFT, and a first switching element.
  • the driving thin film transistor DTFT has a gate connected to the first end of the storage capacitor Cs, and a source connected to the second end of the storage capacitor Cs through the first switching element 11 and having a low drain and a driving power source Level output connection;
  • the matching thin film transistor MTFT has a gate and a drain connected to a gate of the driving thin film transistor DTFT, and a source is connected to a source of the driving thin film transistor DTFT through the driving control unit 12;
  • the second end of the storage capacitor Cs is connected to the data line through the drive control unit 12; the data line outputs a data voltage Vdata;
  • the driving thin film transistor DTFT and the matching thin film transistor MTFT are p-type thin film transistors
  • the OLED the anode is connected to a high level output end of the driving power source, and the cathode is connected to a source of the driving thin film transistor DTFT;
  • the output voltage of the high-level output terminal of the driving power source is VDD, and the output voltage of the low-level output terminal of the driving power source is VSS;
  • point G is a node connected to the first end of the storage capacitor Cs
  • point P is a node connected to the second end of the storage capacitor Cs.
  • the pixel unit driving circuit of the first embodiment of the present invention When the pixel unit driving circuit of the first embodiment of the present invention is in operation, in the first period of time, the connection between the second end of the storage capacitor Cs and the data line, since the MTFT is diode-connected, the MTFT is turned on; VDD The storage capacitor Cs is charged by the OLED and the MTFT, and the potential of the G point (ie, the node connected to the gate of the DTFT) is continuously increased.
  • the drive control unit 12 turns off the source of the MTFT and The connection between the source of the DTFT and the connection between the second end of the storage capacitor Cs and the data line is broken.
  • the actual MTFT is also turned off, and the DTFT is also turned off, in a working stop state, to avoid unnecessary switching due to switching.
  • + VDD - Voled - Vdata) Vdata + Vth_oled + 1 Vthm
  • K is the current coefficient of the DTFT
  • the current I and the threshold voltage Vthd of the DTFT have no relationship, so that the uniformity of the current can be improved to achieve uniform brightness; while the calculation formula of the current I includes Vth-oled, and the OLED is extended with the use time.
  • the aging efficiency of the material decreases, Vth-oled rises, and the rise of Vth-oled increases the operating current accordingly, thus improving the panel brightness reduction caused by material aging.
  • FIG. 4 a circuit diagram of a pixel unit driving circuit according to a second embodiment of the present invention.
  • the pixel unit drive circuit according to the second embodiment of the present invention is a pixel unit drive circuit according to the first embodiment of the present invention.
  • the driving control unit 12 includes a second switching element 122 and a third switching element 123;
  • a source of the matching thin film transistor MTFT passes through the second switching element 122 and the driving a source connection of the moving thin film transistor DTFT;
  • a second end of the storage capacitor Cs is connected to the data line through the third switching element 123;
  • the output voltage of the high-level output terminal of the driving power source is VDD, and the output voltage of the low-level output terminal of the driving power source is VSS;
  • point G is a node connected to the first end of the storage capacitor
  • point P is a node connected to the second end of the storage capacitor.
  • FIG. 5 a circuit diagram of a pixel unit driving circuit according to a third embodiment of the present invention.
  • the pixel unit drive circuit according to the third embodiment of the present invention is a pixel unit drive circuit according to the second embodiment of the present invention.
  • the first switching element is a first thin film transistor labeled T1
  • the second switching element 122 is a second thin film transistor labeled T2.
  • the third switching element 123 is a third thin film transistor labeled T3;
  • the first thin film transistor T1 has a gate connected to a first control line outputting the first control signal S1, a drain connected to a second end of the storage capacitor Cs, and a source and a source of the driving thin film transistor DTFT Connection
  • the second thin film transistor T2 has a gate connected to a second control line outputting the second control signal S2, a drain connected to a source of the matching thin film transistor MTFT, and a source and a source of the driving thin film transistor DTFT Connection
  • the third thin film transistor T3 has a gate connected to the second control line, a drain connected to the data line, and a source connected to the second end of the storage capacitor;
  • the first thin film transistor T1, the second thin film transistor ⁇ 2, the third thin film transistor ⁇ 3, the matching thin film transistor MTFT, and the driving thin film transistor DTFT are all p-type thin film transistors;
  • the output voltage of the high-level output terminal of the driving power source is VDD, and the output voltage of the low-level output terminal of the driving power source is VSS;
  • point G is a node connected to the first end of the storage capacitor
  • point P is a node connected to the second end of the storage capacitor.
  • the pixel unit driving circuit is configured to drive an OLED, including a driving thin film transistor DTFT, a matching thin film transistor MTFT, and a first switching element. 61, a storage capacitor Cs and a drive control unit 62;
  • the driving thin film transistor DTFT has a gate connected to the first end of the storage capacitor Cs, a source connected to the anode of the OLED, and connected to the second end of the storage capacitor Cs through the first switching element 61, and leaking The pole is connected to the high level output of the driving power source;
  • the matching thin film transistor MTFT has a gate and a drain connected to a gate of the driving thin film transistor DTFT, and a source is connected to a source of the driving thin film transistor DTFT through the driving control unit 62;
  • the second end of the storage capacitor Cs is further connected to the data line through the driving control unit 62; the data line outputs a data voltage Vdata; the driving thin film transistor DTFT and the matching thin film transistor MTFT are n-type thin film transistors;
  • the output voltage of the high level output terminal of the driving power source is VDD, and the output voltage of the low level output terminal of the driving power source is VSS.
  • FIG. 7 is a circuit diagram of a pixel unit driving circuit according to a fifth embodiment of the present invention.
  • a pixel unit driving circuit according to a fifth embodiment of the present invention is a pixel unit driving circuit according to a fourth embodiment of the present invention.
  • the driving control unit 62 includes a second switching element 622 and a third switching element 623;
  • a source of the matching thin film transistor MTFT is connected to a source of the driving thin film transistor DTFT through the second switching element 622;
  • the second end of the storage capacitor Cs is connected to the data line through the third switching element 623;
  • the output voltage of the high level output terminal of the driving power source is VDD, and the output voltage of the low level output terminal of the driving power source is VSS.
  • a circuit diagram of a pixel unit driving circuit according to a sixth embodiment of the present invention is a pixel unit driving circuit according to a fifth embodiment of the present invention.
  • the first switching element 61 is a first thin film transistor labeled T1
  • the second switching element 622 is a second labeled T2.
  • the third switching element 623 is a third thin film transistor labeled T3
  • the first thin film transistor T1 has a gate connected to the first control line, and a drain connected to the second end of the storage capacitor Cs a source connected to a source of the driving thin film transistor DTFT;
  • the second thin film transistor T2 has a gate connected to the second control line, a drain connected to a source of the matching thin film transistor MTFT, and a source connected to a source of the driving thin film transistor DTFT;
  • the third film The transistor T3 has a gate connected to the second control line, a source connected to the data line, and a drain connected to the second end of the storage capacitor Cs;
  • the first thin film transistor T1, the second thin film transistor T2, and the third thin film transistor ⁇ 3 are all n-type thin film transistors;
  • the output voltage of the high-level output of the driving power source is VDD, and the output voltage of the low-level output terminal of the driving power source is vss.
  • FIG. 10A is an equivalent circuit diagram of the pixel unit driving circuit of the third embodiment in a first period of time
  • FIG. 10B is an equivalent circuit diagram of the pixel unit driving circuit of the third embodiment in a second period of time
  • FIG. 10C is an equivalent circuit diagram of the pixel unit driving circuit of the third embodiment in a third period of time
  • both T2 and ⁇ 3 are turned on, and T1 is turned off. Since ⁇ 3 is turned on, Vdata (for the pixel unit driving circuit, a large Vdata voltage is required, and general Vdata is required.
  • Vth-oled VDD-Vth- oled- 1 Vthm
  • -Vdata Vthd- DTFT Wide value
  • Vthm is the threshold voltage of the MTFT
  • Vth-oled is the threshold voltage of the OLED illumination
  • Vg is the potential of the G point (the node connected to the first end of the storage capacitor)
  • Vp is the P point (with the a potential of a node connected to the second end of the storage capacitor;
  • K is the current coefficient of the DTFT
  • the current I and the threshold voltage Vthd of the DTFT have no relationship, so that the uniformity of the current can be improved to achieve uniform brightness; while the calculation formula of the current I includes Vth-oled, and the OLED is extended with the use time.
  • the aging efficiency of the material decreases, Vth-oled rises, and the rise of Vth oled increases the operating current accordingly, thus improving the panel brightness reduction caused by material aging.
  • the pixel unit driving circuit of the sixth embodiment of the present invention converts all the TFTs into n-type TFTs, and The anode moves to the cathode and the corresponding timing levels are inverted, but the process is the same.
  • the most characteristic feature of the pixel unit driving circuit of the present invention is to compensate the threshold voltage of the OLED driving transistor by utilizing the principle that the two TFTs of the same design are matched in the same pixel (in the same pixel, two identical designs) Due to the close proximity of the TFTs, even under the existing immature process conditions, their process environments are very consistent. Therefore, the electrical differences caused by the process are very small and can be regarded as equivalent, that is, the width of the matching thin film transistor.
  • the value voltage Vthm is the same as the threshold voltage Vthd of the driving thin film transistor DTFT), and at the same time, the voltage feedback mechanism is used to compensate for the threshold voltage rise of the OLED light emission caused by the aging of the OLED material.
  • the present invention also provides a pixel unit driving method, which is applied to the above pixel unit driving circuit, and the pixel unit driving method includes the following steps:
  • Pixel charging step the driving control unit controls the storage capacitor to be charged until the gate potential of the driving thin film transistor rises to match the source potential of the matching thin film transistor only to match the threshold voltage of the thin film transistor, at which time the matching thin film transistor is turned off.
  • driving the OLED light-emitting display step driving the OLED light-emitting display step: the first switching element turns on the connection between the source of the driving thin film transistor and the second end of the storage capacitor, the driving thin film transistor is turned on, the driving The control unit controls the gate of the driving thin film transistor to be in a floating state such that the threshold voltage of the matching thin film transistor compensates for the threshold voltage of the driving thin film transistor.
  • a buffering step is further included between the pixel charging step and the driving OLED light emitting display step: the driving control unit disconnects the data line from the second end of the storage capacitor, and disconnects the driving thin film transistor The connection between the source and the source of the matching thin film transistor.
  • the present invention further provides a pixel unit including an OLED and the pixel unit driving circuit of the first embodiment, the second embodiment or the third embodiment;
  • the pixel unit driving circuit includes a driving thin film transistor whose source is connected to a cathode of the OLED, a drain of the driving thin film transistor is connected to a low level output end of the driving power source, an anode of the OLED and the driving The high level output of the power supply is connected.
  • the present invention further provides a pixel unit including an OLED and the pixel unit driving circuit of the fourth embodiment, the fifth embodiment or the sixth embodiment;
  • the pixel unit driving circuit includes a source of a driving thin film transistor connected to an anode of the OLED, and a drain of the driving thin film transistor is connected to a high level output end of the driving power source, a cathode of the OLED and the driving The low level output of the power supply is connected.
  • the source S and the drain g of the above various thin film transistors are manufactured in the same process, and are interchangeably named. Change the name according to the direction of the voltage.
  • the types of the transistors in the same pixel circuit may be the same or different, and it is only necessary to adjust the timing high and low levels of the corresponding gate-on signal source according to the characteristics of its own threshold voltage.
  • the preferred way is that the types of transistors that require the same gate-on signal source are the same.
  • all of the thin film transistors are of the same type (including a thin film transistor as a switching element, a driving thin film transistor, and a matching thin film transistor), and are all n-type thin film transistors or p-type thin film transistors.

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Abstract

一种像素单元驱动电路、像素单元驱动方法以及像素单元，可以改善OLED面板亮度不均匀性和材料老化亮度降低的问题。像素单元驱动电路包括驱动薄膜晶体管（DTFT）、匹配薄膜晶体管（MTFT）、第一开关元件（11）、存储电容（Cs）和驱动控制单元（12）；驱动薄膜晶体管（DTFT），栅极与存储电容（Cs）的第一端连接，源极通过第一开关元件（11）与存储电容（Cs）的第二端连接，漏极与驱动电源连接；匹配薄膜晶体管（MTFT），栅极和漏极与驱动薄膜晶体管（DTFT）的栅极连接，源极通过驱动控制单元（12）与驱动薄膜晶体管（DTFT）的源极连接；存储电容（Cs）的第二端还通过驱动控制单元（12）与数据线连接。

Description

像素单元驱动电路、 像素单元驱动方法及像素单元 技术领域
本发明涉及有机发光显示领域， 尤其涉及一种像素单元驱动电路、 像 素单元驱动方法以及像素单元。 背景技术
AMOLED ( Active Matrix Organic Light Emitting Diode , 有源矩阵有 机发光二极体 )能够发光是由驱动 TFT (薄膜晶体管 )在饱和状态时产生的 电流所驱动， 因为输入相同的灰阶电压时， 不同的阔值电压会产生不同的驱 动电流， 造成电流的不一致性。 LTPS (低温多晶硅）制造工艺上 Vth (晶体 管阔值电压） 的均匀性非常差， 同时 Vth也有漂移， 如此传统的 2T1C电路 亮度均匀性一直很差。
传统的 2T1C像素单元驱动电路如图 1所示， 电路只含有两个 TFT, T1 用作开关， DTFT用于像素驱动。传统的 2T1C像素单元驱动电路操作也比较 简单，对该 2T1C像素单元驱动电路的控制时序图如图 2所示，当扫描线 Scan 输出的扫描电平 Vscan为低时， T1导通，数据线 Data上的灰阶电压对电容 C 充电， 当扫描电平为高时， T1截止， 电容 C用来保存灰阶电压。 由于 VDD (驱动电源高电平输出端输出的电压）较高，因此 DTFT处于饱和状态， OLED 的驱动电流 I=K (Vsg- 1 Vth I)2 = K (VDD - Vdata- 1 Vth |)2 , Vsg是 DTFT的源极 和栅极的电压差值， Vdata为数据线 Data上的灰阶电压， K是一个与晶体管 尺寸和载流子迁移率有关的常数，一旦 TFT尺寸和工艺确定，Κ确定。该 2T1C 像素单元驱动电路的驱动电流公式中包含了 Vth, 如前所述， 由于 LTPS工艺 的不成熟， 即便是同样的工艺参数， 制造出来的面板不同位置的 TFT的 Vth 也有较大差异， 导致了同一灰阶电压下 OLED的驱动电流不一样， 因此该驱 动方案下的面板不同位置亮度会有差异， 亮度均一性差。 同时随着 OLED面 板使用的延长， OLED材料逐渐老化， 导致 OLED发光的阔值电压上升， 同 样的电流下， OLED材料发光效率下降， 面板亮度降低。 发明内容
本发明的主要目的在于提供一种像素单元驱动电路、 像素单元驱动方法 以及像素单元，以改善 OLED面板亮度不均匀性和材料老化亮度降低的问题。 为了达到上述目的， 本发明提供了一种像素单元驱动电路， 用于驱动 OLED, 所述像素单元驱动电路包括驱动薄膜晶体管、 匹配薄膜晶体管、 第一 开关元件、 存储电容和驱动控制单元；
所述驱动薄膜晶体管， 栅极与所述存储电容的第一端连接， 源极与所述
OLED 连接并通过所述第一开关元件与所述存储电容的第二端连接， 漏极与 驱动电源连接；
所述匹配薄膜晶体管， 栅极和漏极与所述驱动薄膜晶体管的栅极连接， 源极通过所述驱动控制单元与所述驱动薄膜晶体管的源极连接；
所述存储电容的第二端还通过所述驱动控制单元与数据线连接。
在一个实施例中，所述驱动控制单元包括第二开关元件和第三开关元件； 所述匹配薄膜晶体管的源极通过所述第二开关元件与所述驱动薄膜晶体 管的源极连接；
所述存储电容的第二端通过所述第三开关元件与所述数据线连接。
在一个示例中， 所述驱动薄膜晶体管的源极与所述 OLED的阴极连接； 所述驱动薄膜晶体管的漏极与驱动电源的低电平输出端连接；
所述驱动薄膜晶体管和所述匹配薄膜晶体管为 p型薄膜晶体管。
在该示例中， 所述第一开关元件为第一薄膜晶体管， 所述第二开关元件 为第二薄膜晶体管， 所述第三开关元件是第三薄膜晶体管；
所述第一薄膜晶体管， 栅极与第一控制线连接， 漏极与所述存储电容的 第二端连接， 源极与所述驱动薄膜晶体管的源极连接；
所述第二薄膜晶体管， 栅极与第二控制线连接， 漏极与所述匹配薄膜晶 体管的源极连接， 源极与所述驱动薄膜晶体管的源极连接；
所述第三薄膜晶体管， 栅极与所述第二控制线连接， 漏极与所述数据线 连接， 源极与所述存储电容的第二端连接；
所述第一薄膜晶体管、 所述第二薄膜晶体管和所述第三薄膜晶体管都是 p型薄膜晶体管。
在另一示例中， 所述驱动薄膜晶体管的源极与所述 OLED的阳极连接； 所述驱动薄膜晶体管的漏极与驱动电源的高电平输出端连接；
所述驱动薄膜晶体管和所述匹配薄膜晶体管为 n型薄膜晶体管。 在该另一示例中， 所述第一开关元件为第一薄膜晶体管， 所述第二开关 元件为第二薄膜晶体管， 所述第三开关元件为第三薄膜晶体管；
所述第一薄膜晶体管， 栅极与第一控制线连接， 漏极与所述存储电容的 第二端连接， 源极与所述驱动薄膜晶体管的源极连接；
所述第二薄膜晶体管， 栅极与第二控制线连接， 漏极与所述匹配薄膜晶 体管的源极连接， 源极与所述驱动薄膜晶体管的源极连接；
所述第三薄膜晶体管， 栅极与第二控制线连接， 源极与数据线连接， 漏 极与存储电容的第二端连接；
所述第一薄膜晶体管、 所述第二薄膜晶体管和所述第三薄膜晶体管为 n 型薄膜晶体管。
本发明还提供了一种像素单元驱动方法， 其应用于上述的像素单元驱动 电路， 所述像素单元驱动方法包括以下步骤：
像素充电步骤： 驱动控制单元控制存储电容被充电， 直至驱动薄膜晶体 管的栅极电位上升到与匹配薄膜晶体管的源极电位只相差匹配薄膜晶体管的 阔值电压， 此时所述匹配薄膜晶体管截止， 并且所述驱动薄膜晶体管也截止； 驱动 OLED发光显示步骤： 第一开关元件导通所述驱动薄膜晶体管的源 极与所述存储电容的第二端的连接， 所述驱动薄膜晶体管导通， 所述驱动控 制单元控制所述驱动薄膜晶体管的栅极处于悬空状态， 以使得所述匹配薄膜 晶体管的阔值电压补偿所述驱动薄膜晶体管的阔值电压。
在一个实施例中， 在像素充电步骤和驱动 OLED发光显示步骤之间还包 括緩冲步骤： 所述驱动控制单元断开数据线与存储电容的第二端的连接， 并 断开所述驱动薄膜晶体管的源极与所述匹配薄膜晶体管的源极之间的连接。
本发明还提供了一种像素单元，包括 OLED和上述的像素单元驱动电路； 所述像素单元驱动电路与所述 OLED的阴极连接；
所述 OLED的阳极与驱动电源的高电平输出端连接。
本发明还提供了一种像素单元，包括 OLED和上述的像素单元驱动电路； 所述像素单元驱动电路与所述 OLED的阳极连接； 与现有技术相比，本发明利用同一像素内两个相同设计的 TFT电性较匹 配的原理， 补偿 OLED驱动晶体管的阔值电压， 同时利用电压回授机制补偿 OLED材料老化引起的 OLED发光的阔值电压上升， 改善了 OLED面板亮度 不均匀性和材料老化亮度降低的问题。 附图说明
图 1是传统的 2T1C像素单元驱动电路的电路图；
图 2是对该传统的 2T1C像素单元驱动电路的控制时序图；
图 3是本发明第一实施例所述的像素单元驱动电路的电路图；
图 4是本发明第二实施例所述的像素单元驱动电路的电路图；
图 5是本发明第三实施例所述的像素单元驱动电路的电路图；
图 6是本发明第四实施例所述的像素单元驱动电路的电路图；
图 7是本发明第五实施例所述的像素单元驱动电路的电路图；
图 8是本发明第六实施例所述的像素单元驱动电路的电路图；
图 9是本发明第三实施例所述的像素单元驱动电路工作时各信号的时序 图；
图 10A是本发明第三实施例所述的像素单元驱动电路在第一时间段的等 效电路图；
图 10B是本发明第三实施例所述的像素单元驱动电路在第二时间段的等 效电路图；
图 10C是本发明第三实施例所述的像素单元驱动电路在第三时间段的等 效电路图；
图 11 是本发明第六实施例所述的像素单元驱动电路工作时各信号的时 序图。 具体实施方式
下面将结合本发明实施例中的附图， 对本发明实施例中的技术方案进行 清楚、 完整地描述， 显然， 所描述的实施例仅仅是本发明一部分实施例， 而 不是全部的实施例。 基于本发明中的实施例， 本领域普通技术人员在没有作 出创造性劳动前提下所获得的所有其他实施例 , 都属于本发明保护的范围。
如图 3 所示， 本发明第一实施例所述的像素单元驱动电路， 用于驱动 OLED, 包括驱动薄膜晶体管 DTFT、 匹配薄膜晶体管 MTFT、 第一开关元件 11、 存储电容 Cs和驱动控制单元 12;
所述驱动薄膜晶体管 DTFT, 栅极与所述存储电容 Cs的第一端连接， 源 极通过所述第一开关元件 11与所述存储电容 Cs的第二端连接， 漏极与驱动 电源的低电平输出端连接；
所述匹配薄膜晶体管 MTFT, 栅极和漏极与所述驱动薄膜晶体管 DTFT 的栅极连接，源极通过所述驱动控制单元 12与所述驱动薄膜晶体管 DTFT的 源极连接；
所述存储电容 Cs的第二端通过所述驱动控制单元 12与数据线连接； 所述数据线输出数据电压 Vdata;
所述驱动薄膜晶体管 DTFT和所述匹配薄膜晶体管 MTFT为 p型薄膜晶 体管；
所述 OLED, 阳极与所述驱动电源的高电平输出端连接， 阴极与所述驱 动薄膜晶体管 DTFT的源极连接；
所述驱动电源的高电平输出端的输出电压为 VDD, 所述驱动电源的低电 平输出端的输出电压为 VSS;
其中， G点是与所述存储电容 Cs的第一端连接的节点， P点是与所述存 储电容 Cs的第二端连接的节点。
本发明该第一实施例所述的像素单元驱动电路在工作时，在第一时间段， 储电容 Cs的第二端与数据线之间的连接， 由于 MTFT为二极管连接， 因此 MTFT开启； VDD通过 OLED和 MTFT对存储电容 Cs充电， G点（即与 DTFT 的栅极连接的节点）电位不断上升， 当 G点电位上升到与 MTFT的源极的电 位只相差 MTFT的阔值电压 Vthm时， MTFT关闭， 由于 Vthm=Vthd, 因此 DTFT也关闭； 而 OLED两端的电压差也会随着 OLED发光的损耗而降低为 Vth oled, 因而此时 Vg=VDD-Vth— oled- 1 Vthm | , 存储电容 Cs 两端的电压 Vc=Vg-Vp= VDD-Vth oled - 1 Vthm | -Vdata;其中， Vthd是 DTFT的阔值电压， Vthm是 MTFT的阔值电压， Vth oled是 OLED发光的阔值电压， Vg是 G 点（与所述存储电容的第一端连接的节点）的电位， Vp是 P点（与所述存储 电容的第二端连接的节点） 的电位；
在第二时间段， 即緩冲阶段，所述驱动控制单元 12断开 MTFT的源极与 DTFT 的源极之间的连接并断开存储电容 Cs 的第二端与数据线之间的连接, 实际 MTFT也是截止的， DTFT也截止， 处于工作停止状态， 以避免因为开 关的切换产生不必要的干扰信号； 此时存储电容 Cs 两端的电压依然不变， Vc=Vg-Vp= VDD-Vth oled- 1 Vthm | -Vdata;
在第三时间段， 所述第一开关元件 11导通所述存储电容 Cs的第二端与 所述驱动薄膜晶体管 DTFT 的源极的连接， 由于 P点电位由 Vdata跳变至 VDD-Voled ( Voled为此灰阶下 OLED的工作电压， 与 Vth— oled并不一致）， 而 DTFT的栅极处于悬空状态 , 因此 Vg的电压跳变为 Vg= VDD-Vth oled- I Vthm I +VDD-Voled-Vdata , 此时， DTFT 的源极和栅极之间的电压差 Vsg= VDD-Voled- Vg=VDD-Voled-(VDD-Vth_oled- 1 Vthm | + VDD-Voled- Vdata) =Vdata+ Vth_oled+ 1 Vthm | - VDD , DTFT工作， 流过 DTFT的电流 I=K(Vsg- I Vthd I ) 2= K(Vdata+Vth_oled+ 1 Vthm | -VDD- 1 Vthd | ) 2。 由于 Vthm=Vthd, 因此， 流过 DTFT的电流 I=K(Vdata+ Vth— oled- VDD) 2, OLED开始发光， 直 到下一帧；
其中， K为 DTFT的电流系数；
W
Κ =。οχ Χ μ Χ ; μ、 Cox、 W . J分别为 DTFT的载流子迁移率， 栅绝缘层单位面积电容、 沟道宽度、 沟道长度；
可以发现电流 I和 DTFT的阔值电压 Vthd没有关系了， 如此可以改善电 流的均匀性， 达到亮度的均匀； 而同时电流 I的计算公式中包含了 Vth— oled, 随着使用时间的延长， OLED材料老化发光效率下降， Vth— oled会上升， 而 Vth— oled 的上升使工作电流相应增大， 如此改善了材料老化导致的面板亮度 降低。
如图 4所示， 本发明第二实施例所述的像素单元驱动电路的电路图。 本 发明第二实施例所述的像素单元驱动电路是基于本发明第一实施例所述的像 素单元驱动电路。
在本发明第二实施例所述的像素单元驱动电路中， 所述驱动控制单元 12 包括第二开关元件 122和第三开关元件 123 ;
所述匹配薄膜晶体管 MTFT的源极通过所述第二开关元件 122与所述驱 动薄膜晶体管 DTFT的源极连接；
所述存储电容 Cs的第二端通过所述第三开关元件 123 与所述数据线连 接；
所述驱动电源的高电平输出端的输出电压为 VDD, 所述驱动电源的低电 平输出端的输出电压为 VSS;
其中， G点是与所述存储电容的第一端连接的节点， P点是与所述存储 电容的第二端连接的节点。
如图 5所示， 本发明第三实施例所述的像素单元驱动电路的电路图。 本 发明第三实施例所述的像素单元驱动电路是基于本发明第二实施例所述的像 素单元驱动电路。
在本发明第三实施例所述的像素单元驱动电路中， 所述第一开关元件为 标号为 T1的第一薄膜晶体管， 所述第二开关元件 122为标号为 T2的第二薄 膜晶体管、 所述第三开关元件 123为标号为 T3的第三薄膜晶体管；
所述第一薄膜晶体管 T1 , 栅极与输出第一控制信号 S1的第一控制线连 接，漏极与所述存储电容 Cs的第二端连接，源极与所述驱动薄膜晶体管 DTFT 的源极连接；
所述第二薄膜晶体管 T2, 栅极与输出第二控制信号 S2的第二控制线连 接， 漏极与所述匹配薄膜晶体管 MTFT的源极连接， 源极与所述驱动薄膜晶 体管 DTFT的源极连接；
所述第三薄膜晶体管 T3 , 栅极与第二控制线连接， 漏极与所述数据线连 接， 源极与所述存储电容的第二端连接；
所述第一薄膜晶体管 Tl、 所述第二薄膜晶体管 Τ2、 所述第三薄膜晶体 管 Τ3、所述匹配薄膜晶体管 MTFT和所述驱动薄膜晶体管 DTFT都是 p型薄 膜晶体管；
所述驱动电源的高电平输出端的输出电压为 VDD, 所述驱动电源的低电 平输出端的输出电压为 VSS;
其中， G点是与所述存储电容的第一端连接的节点， P点是与所述存储 电容的第二端连接的节点。
如图 6 所示， 本发明第四实施例所述的像素单元驱动电路， 用于驱动 OLED, 包括驱动薄膜晶体管 DTFT、 匹配薄膜晶体管 MTFT、 第一开关元件 61、 存储电容 Cs和驱动控制单元 62;
所述驱动薄膜晶体管 DTFT, 栅极与所述存储电容 Cs的第一端连接， 源 极与 OLED的阳极连接并通过所述第一开关元件 61与所述存储电容 Cs的第 二端连接， 漏极与驱动电源的高电平输出端连接；
所述匹配薄膜晶体管 MTFT, 栅极和漏极与所述驱动薄膜晶体管 DTFT 的栅极连接，源极通过所述驱动控制单元 62与所述驱动薄膜晶体管 DTFT的 源极连接；
所述存储电容 Cs的第二端还通过所述驱动控制单元 62与数据线连接； 所述数据线输出数据电压 Vdata; 所述驱动薄膜晶体管 DTFT和所述匹配薄膜晶体管 MTFT为 n型薄膜晶 体管；
所述驱动电源的高电平输出端的输出电压为 VDD, 所述驱动电源的低电 平输出端的输出电压为 VSS。
如图 7所示， 本发明第五实施例所述的像素单元驱动电路的电路图。 本 发明第五实施例所述的像素单元驱动电路是基于本发明第四实施例所述的像 素单元驱动电路。
在本发明第五实施例所述的像素单元驱动电路中， 所述驱动控制单元 62 包括第二开关元件 622和第三开关元件 623;
所述匹配薄膜晶体管 MTFT的源极通过所述第二开关元件 622与所述驱 动薄膜晶体管 DTFT的源极连接；
所述存储电容 Cs的第二端通过所述第三开关元件 623 与所述数据线连 接；
所述驱动电源的高电平输出端的输出电压为 VDD, 所述驱动电源的低电 平输出端的输出电压为 VSS。
如图 8所示， 本发明第六实施例所述的像素单元驱动电路的电路图。 本 发明第六实施例所述的像素单元驱动电路是基于本发明第五实施例所述的像 素单元驱动电路。
在本发明第六实施例所述的像素单元驱动电路中， 所述第一开关元件 61 为标号为 T1的第一薄膜晶体管， 所述第二开关元件 622为标号为 T2的第二 薄膜晶体管， 所述第三开关元件 623为标号为 T3的第三薄膜晶体管； 所述第一薄膜晶体管 T1 , 栅极与第一控制线连接， 漏极与所述存储电容 Cs的第二端连接， 源极与所述驱动薄膜晶体管 DTFT的源极连接；
所述第二薄膜晶体管 T2, 栅极与第二控制线连接， 漏极与所述匹配薄膜 晶体管 MTFT的源极连接， 源极与所述驱动薄膜晶体管 DTFT的源极连接； 所述第三薄膜晶体管 T3 , 栅极与第二控制线连接， 源极与数据线连接， 漏极与存储电容 Cs的第二端连接；
所述第一薄膜晶体管 Tl、 所述第二薄膜晶体管 Τ2和所述第三薄膜晶体 管 Τ3都是 η型薄膜晶体管；
所述驱动电源的高电平输出端的输出电压为 VDD, 所述驱动电源的低电 平输出端的输出电压为 vss。
下面结合如图 5所示的本发明第三实施例所述的像素单元驱动电路对其 工作过程进行介绍：
如图 9所示， 该第三实施例所述的像素单元驱动电路工作时， 第一控制 信号 Sl、 第二控制信号 S2和所述数据线的输出信号 Vdata的时序图；
图 10A是该第三实施例所述的像素单元驱动电路在第一时间段的等效电 路图；
图 10B是该第三实施例所述的像素单元驱动电路在第二时间段的等效电 路图；
图 10C是该第三实施例所述的像素单元驱动电路在第三时间段的等效电 路图；
如图 10A所示， 在第一时间段， 即开始阶段， T2、 Τ3均导通， T1截止， 由于 Τ3导通， 因此 Vdata (对于该像素单元驱动电路， 需要较大的 Vdata电 压， 一般 Vdata的变动范围应大于 VDD )输入； 由于 MTFT为二极管连接， 因此 MTFT导通； VDD通过 OLED和 MTFT对存储电容 Cs充电， G点（即 与 DTFT的栅极连接的节点）电位不断上升， 当 G点电位上升到与 MTFT的 源极的电位只相差 MTFT的阔值电压 Vthm时， MTFT截止，由于 Vthm=Vthd, 因此 DTFT也截止； 而 OLED两端的电压差也会随着 OLED发光的损耗而降 低为 Vth— oled , 因而此时 Vg=VDD- Vth— oled- 1 Vthm | , 存储电容 Cs两端的电 压 Vc=Vg- Vp= VDD- Vth— oled - 1 Vthm | -Vdata; 其中， Vthd是 DTFT的阔值电 压， Vthm是 MTFT的阔值电压， Vth— oled是 OLED发光的阔值电压， Vg是 G点（与所述存储电容的第一端连接的节点）的电位， Vp是 P点（与所述存 储电容的第二端连接的节点） 的电位；
如图 10B所示， 在第二时间段， 即緩冲阶段， Tl、 Τ2、 Τ3均截止，实际 MTFT也是截止的， DTFT也截止， 处于工作停止状态， 以避免因为开关的 切换产生不必要的干扰信号； 此时存储电容 Cs 两端的电压依然不变， Vc=Vg-Vp= VDD-Vth oled- 1 Vthm | -Vdata;
如图 10C所示， 在第三时间段， T1导通， T2、 Τ3截止， 由于 Ρ点电位 并不一致）， 而 DTFT 的栅极处于悬空状态， 因此 Vg 的电压跳变为 Vg= VDD-Vth oled- 1 Vthm | +VDD-Voled- Vdata,此时， DTFT的源极和栅极之间的 电 压 差 Vsg=VDD-Voled-Vg=VDD-Voled-(VDD-Vth— oled- | Vthm卜 VDD- Voled-Vdata)=Vdata+Vth_oled+ 1 Vthm | -VDD, DTFT导通，流过 DTFT的电流 I=K(Vsg- | Vthd | )2= K(Vdata+ Vth_oled+ 1 Vthm | - VDD- 1 Vthd | f 。 由 于 Vthm=Vthd , 因此， 流过 DTFT的电流 I =K(Vdata+ Vth oled- VDD) 2 , OLED 开始发光， 直到下一帧；
其中， K为 DTFT的电流系数；
W
Κ =。οχ Χ μ Χ ; μ、 Cox、 W . J分别为 DTFT的载流子迁移率， 栅绝缘层单位面积电容、 沟道宽度、 沟道长度；
可以发现电流 I和 DTFT的阔值电压 Vthd没有关系了， 如此可以改善电 流的均匀性， 达到亮度的均匀； 而同时电流 I的计算公式中包含了 Vth— oled, 随着使用时间的延长， OLED材料老化发光效率下降， Vth— oled会上升， 而 Vth oled 的上升使工作电流相应增大， 如此改善了材料老化导致的面板亮度 降低。
如图 11所示， 本发明第六实施例所述的像素单元驱动电路在工作时， 第 一控制信号 Sl、 第二控制信号 S2和所述数据线的输出信号 Vdata的时序图。
本发明第六实施例所述的像素单元驱动电路与本发明第三实施例所述的 像素单元驱动电路相比， 只是将所有的 TFT转换为 n型 TFT , 并将 OLED的 阳极移至阴极， 相应的时序电平反相， 然而工作过程是一样的。
本发明所述的像素单元驱动电路的最大特点是利用同一像素内两个相同 设计的 TFT电性较匹配的原理， 补偿 OLED驱动晶体管的阔值电压（在同一 个像素内部， 两个相同设计的 TFT由于相互的位置非常接近， 即使在现有的 不成熟的工艺条件下， 它们的工艺环境也非常一致， 因此工艺上引起的电性 差异非常小， 可以视为等同， 即匹配薄膜晶体管的阔值电压 Vthm与驱动薄 膜晶体管 DTFT的阔值电压 Vthd相同）， 同时利用电压回授机制补偿 OLED 材料老化引起的 OLED发光的阔值电压上升。
本发明还提供了一种像素单元驱动方法， 其应用于上述的像素单元驱动 电路， 所述像素单元驱动方法包括以下步骤：
像素充电步骤： 驱动控制单元控制存储电容被充电， 直至驱动薄膜晶体 管的栅极电位上升到与匹配薄膜晶体管的源极电位只相差匹配薄膜晶体管的 阔值电压， 此时所述匹配薄膜晶体管截止， 并且所述驱动薄膜晶体管截止； 驱动 OLED发光显示步骤： 第一开关元件导通所述驱动薄膜晶体管的源 极与所述存储电容的第二端的连接， 所述驱动薄膜晶体管导通， 所述驱动控 制单元控制所述驱动薄膜晶体管的栅极处于悬空状态， 以使得所述匹配薄膜 晶体管的阔值电压补偿所述驱动薄膜晶体管的阔值电压。
在一个实施例中， 在像素充电步骤和驱动 OLED发光显示步骤之间还包 括緩冲步骤： 所述驱动控制单元断开数据线与存储电容的第二端的连接， 并 断开所述驱动薄膜晶体管的源极与所述匹配薄膜晶体管的源极之间的连接。
本发明还提供了一种像素单元， 包括 OLED和该第一实施例、 该第二实 施例或该第三实施例所述的像素单元驱动电路；
所述像素单元驱动电路包括的驱动薄膜晶体管的源极与所述 OLED的阴 极连接， 所述驱动薄膜晶体管的漏极与驱动电源的低电平输出端连接， 所述 OLED的阳极与所述驱动电源的高电平输出端连接。
本发明还提供了一种像素单元， 包括 OLED和该第四实施例、 该第五实 施例或该第六实施例所述的像素单元驱动电路；
所述像素单元驱动电路包括的驱动薄膜晶体管的源极与所述 OLED的阳 极连接， 所述驱动薄膜晶体管的漏极与驱动电源的高电平输出端连接， 所述 OLED的阴极与所述驱动电源的低电平输出端连接。 需要说明的是， 上述各种薄膜晶体管（包括作为开关元件的薄膜晶体管、 驱动薄膜晶体管以及匹配薄膜晶体管） 的源极 S和漏极 g的制作工艺相同， 名称上是可以互换的， 其可根据电压的方向在名称上改变。 而且， 同一像素 电路中各个晶体管的类型可以相同， 也可以不同， 只需根据其自身阔值电压 的特点， 调整相应的栅极开启信号源的时序高低电平即可。 当然， 优选的方 式为， 需要相同栅极开启信号源的晶体管的类型相同。 更为优选的， 同一像 素电路中， 所有薄膜晶体管的类型相同 （包括作为开关元件的薄膜晶体管、 驱动薄膜晶体管以及匹配薄膜晶体管），均为 n型薄膜晶体管或 p型薄膜晶体 管。
以上说明对本发明而言只是说明性的， 而非限制性的， 本领域普通技术 人员理解， 在不脱离所附权利要求所限定的精神和范围的情况下， 可做出许 多修改、 变化或等效， 但都将落入本发明的保护范围内。

Claims

权 利 要 求 书
1、 一种像素单元驱动电路， 用于驱动 0LED, 所述像素单元驱动电路包 括驱动薄膜晶体管、 匹配薄膜晶体管、 第一开关元件、 存储电容和驱动控制 单元；
所述驱动薄膜晶体管， 栅极与所述存储电容的第一端连接， 源极与所述 OLED 连接并通过所述第一开关元件与所述存储电容的第二端连接， 漏极与 驱动电源连接；
所述匹配薄膜晶体管， 栅极和漏极与所述驱动薄膜晶体管的栅极连接， 源极通过所述驱动控制单元与所述驱动薄膜晶体管的源极连接；
所述存储电容的第二端还通过所述驱动控制单元与数据线连接。
2、 如权利要求 1所述的像素单元驱动电路， 其中， 所述驱动控制单元包 括第二开关元件和第三开关元件；
所述匹配薄膜晶体管的源极通过所述第二开关元件与所述驱动薄膜晶体 管的源极连接；
所述存储电容的第二端通过所述第三开关元件与所述数据线连接。
3、 如权利要求 1或 2所述的像素单元驱动电路， 其中，
所述驱动薄膜晶体管的源极与所述 OLED的阴极连接；
所述驱动薄膜晶体管的漏极与驱动电源的低电平输出端连接；
所述驱动薄膜晶体管和所述匹配薄膜晶体管为 p型薄膜晶体管。
4、 如权利要求 3所述的像素单元驱动电路， 其中， 所述第一开关元件为 第一薄膜晶体管， 所述第二开关元件为第二薄膜晶体管， 所述第三开关元件 是第三薄膜晶体管；
所述第一薄膜晶体管， 栅极与第一控制线连接， 漏极与所述存储电容的 第二端连接， 源极与所述驱动薄膜晶体管的源极连接；
所述第二薄膜晶体管， 栅极与第二控制线连接， 漏极与所述匹配薄膜晶 体管的源极连接， 源极与所述驱动薄膜晶体管的源极连接；
所述第三薄膜晶体管， 栅极与所述第二控制线连接， 漏极与所述数据线 连接， 源极与所述存储电容的第二端连接；
所述第一薄膜晶体管、 所述第二薄膜晶体管和所述第三薄膜晶体管都是 p型薄膜晶体管。
5、 如权利要求 1或 2所述的像素单元驱动电路， 其中，
所述驱动薄膜晶体管的源极与所述 OLED的阳极连接；
所述驱动薄膜晶体管的漏极与驱动电源的高电平输出端连接；
所述驱动薄膜晶体管和所述匹配薄膜晶体管为 n型薄膜晶体管。
6、 如权利要求 5所述的像素单元驱动电路， 其中，
所述第一开关元件为第一薄膜晶体管， 所述第二开关元件为第二薄膜晶 体管， 所述第三开关元件为第三薄膜晶体管；
所述第一薄膜晶体管， 栅极与第一控制线连接， 漏极与所述存储电容的 第二端连接， 源极与所述驱动薄膜晶体管的源极连接；
所述第二薄膜晶体管， 栅极与第二控制线连接， 漏极与所述匹配薄膜晶 体管的源极连接， 源极与所述驱动薄膜晶体管的源极连接；
所述第三薄膜晶体管， 栅极与第二控制线连接， 源极与数据线连接， 漏 极与存储电容的第二端连接；
所述第一薄膜晶体管、 所述第二薄膜晶体管和所述第三薄膜晶体管为 n 型薄膜晶体管。
7、 一种像素单元驱动方法， 其应用于如权利要求 1所述的像素单元驱动 电路， 所述像素单元驱动方法包括以下步骤：
像素充电步骤： 驱动控制单元控制存储电容被充电， 直至驱动薄膜晶体 管的栅极电位上升到与匹配薄膜晶体管的源极电位只相差匹配薄膜晶体管的 阔值电压， 此时所述匹配薄膜晶体管截止， 并且所述驱动薄膜晶体管截止； 驱动 OLED发光显示步骤： 第一开关元件导通所述驱动薄膜晶体管的源 极与所述存储电容的第二端的连接， 所述驱动薄膜晶体管导通， 所述驱动控 制单元控制所述驱动薄膜晶体管的栅极处于悬空状态， 以使得所述匹配薄膜 晶体管的阔值电压补偿所述驱动薄膜晶体管的阔值电压。
8、 如权利要求 7所述的像素单元驱动方法， 其中， 在像素充电步骤和驱 动 OLED发光显示步骤之间还包括緩冲步骤： 所述驱动控制单元断开数据线 与存储电容的第二端的连接， 并断开所述驱动薄膜晶体管的源极与所述匹配 薄膜晶体管的源极之间的连接。
9、一种像素单元， 包括 OLED和如权利要求 3或 4所述的像素单元驱动 电路； 其中，
所述像素单元驱动电路与所述 OLED的阴极连接；
所述 OLED的阳极与驱动电源的高电平输出端连接。
10、 一种像素单元， 包括 OLED和如权利要求 5或 6所述的像素单元驱 动电路；
所述像素单元驱动电路与所述 OLED的阳极连接；
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