WO2013083007A1 - 衬底、衬底的制作方法和使用方法 - Google Patents
衬底、衬底的制作方法和使用方法 Download PDFInfo
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- WO2013083007A1 WO2013083007A1 PCT/CN2012/085310 CN2012085310W WO2013083007A1 WO 2013083007 A1 WO2013083007 A1 WO 2013083007A1 CN 2012085310 W CN2012085310 W CN 2012085310W WO 2013083007 A1 WO2013083007 A1 WO 2013083007A1
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- substrate
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- cut channel
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- 239000000758 substrate Substances 0.000 title claims abstract description 92
- 238000000034 method Methods 0.000 title claims abstract description 43
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 16
- 239000000463 material Substances 0.000 claims description 8
- 229910052594 sapphire Inorganic materials 0.000 claims description 7
- 239000010980 sapphire Substances 0.000 claims description 7
- 238000004140 cleaning Methods 0.000 claims description 5
- 238000005530 etching Methods 0.000 claims description 4
- 238000003698 laser cutting Methods 0.000 claims description 4
- 229910010271 silicon carbide Inorganic materials 0.000 claims description 4
- XLOMVQKBTHCTTD-UHFFFAOYSA-N zinc oxide Inorganic materials [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 claims description 4
- 239000011521 glass Substances 0.000 claims description 3
- 229910003465 moissanite Inorganic materials 0.000 claims description 3
- 229910052710 silicon Inorganic materials 0.000 claims description 3
- 239000010703 silicon Substances 0.000 claims description 3
- 238000005520 cutting process Methods 0.000 abstract description 13
- 230000015572 biosynthetic process Effects 0.000 description 4
- 239000007789 gas Substances 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 3
- 229910002601 GaN Inorganic materials 0.000 description 2
- 238000011109 contamination Methods 0.000 description 2
- 238000001312 dry etching Methods 0.000 description 2
- 239000010409 thin film Substances 0.000 description 2
- KZBUYRJDOAKODT-UHFFFAOYSA-N Chlorine Chemical compound ClCl KZBUYRJDOAKODT-UHFFFAOYSA-N 0.000 description 1
- ZAMOUSCENKQFHK-UHFFFAOYSA-N Chlorine atom Chemical compound [Cl] ZAMOUSCENKQFHK-UHFFFAOYSA-N 0.000 description 1
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 229910052801 chlorine Inorganic materials 0.000 description 1
- 239000000460 chlorine Substances 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 239000000356 contaminant Substances 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000003344 environmental pollutant Substances 0.000 description 1
- 229910052732 germanium Inorganic materials 0.000 description 1
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 1
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000005693 optoelectronics Effects 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 231100000719 pollutant Toxicity 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
- 238000005019 vapor deposition process Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0095—Post-treatment of devices, e.g. annealing, recrystallisation or short-circuit elimination
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
Definitions
- a pre-cut channel is formed on the passive side of the initial substrate prior to forming the LED device or integrated circuit device.
- a process of depositing a thin film in a process of forming an LED device or an integrated circuit device forms a stress on the substrate, which stress causes the substrate to be in the process of forming the cut trench It is easier to break, which not only causes a large number of LED devices to be scrapped, but also reduces the yield of LED devices or integrated circuit devices, and also increases the cost of LED devices or integrated circuit devices.
- embodiments of the present invention provide a substrate having opposite active and passive surfaces, the active surface being used to form an LED device or an integrated circuit device, and the passive surface has a plurality of a pre-cut channel arranged in a two-dimensional direction for releasing stress on the substrate during a process of forming the LED device or integrated circuit device, the position of the pre-cut channel being The position of the LED device or integrated circuit device to be formed corresponds.
- a plurality of pre-cut channels 101 are formed on the passive surface of the substrate 10.
- a portion of the pre-cut channels are arranged in parallel along the X direction in the figure, and another portion of the pre-cut channels are arranged in parallel along the Y direction in the figure (the Y direction is perpendicular to the X direction).
- the pre-cut channel divides the passive side of the substrate 10 into a plurality of regions, and the corresponding substrate of each region is used to form an LED device or an integrated circuit device.
- the depth of the pre-cut channel 101 ranges from 1/4 to 7/8 of the thickness of the substrate 10.
- the thickness of the pre-cut channel 101 may range from 1/4 of the thickness of the substrate 10. /2, 2/3, 7/8, etc., and specific values can be specifically set by those skilled in the art depending on the size of the substrate 10 and the size of the LED device or integrated circuit device.
- the position of the pre-cut channel 101 should correspond to the location of the LED device or integrated circuit device to be formed.
- the material of the substrate 10 may be one or more of sapphire, ZnO, SiC, Si or glass. After the above substrate is formed, it can be used in the fabrication process of an LED device or an integrated circuit device. Since a pre-cut channel is formed on the substrate, for an LED device or an integrated circuit device manufacturer, as long as the substrate is purchased, the LED device is performed. Or the manufacture of integrated circuits, and then directly carry out the splitting process, without the need to purchase process equipment such as thinning and cutting, which not only saves process steps, but also reduces equipment investment and reduces the cost of LED devices. Since the pre-cut channel can release the LED device or the integrated circuit device forms a stress on the substrate during fabrication, thereby improving the yield of the LED device.
- the present invention also provides a method of fabricating a substrate, comprising: providing an initial substrate having oppositely disposed active and passive faces, the active surface being used to form an LED device or an integrated circuit device The passive surface is used to form a pre-cut channel;
- the material of the initial substrate according to the embodiment of the present invention may be a material such as sapphire, silicon nitride or ZnO, or may be a material such as silicon or germanium.
- the size of the initial substrate is the same as in the prior art.
- the pre-cut channel has a depth ranging from 1/4 to 7/8 of the thickness of the initial substrate.
- the method for fabricating the pre-cut channel includes: one or more of etching, mechanical dicing, and laser cutting.
- the pre-cut channel is formed by a dry etching method, and the dry etching may be an ICP or RIE process, and the etching gas may be one of chlorine gas, CHC12, CHC13 or The mixing, of course, the gas used may also be other chlorine-containing plasma gases.
- the method of mechanical dicing or laser cutting is the same as that of the prior art, and is well known to those skilled in the art and will not be described in detail herein.
- the method further includes: a step of cleaning the passive surface and the pre-cut channel of the substrate.
- the cleaning is mainly for removing contaminants such as particles formed in the passive surface and the pre-cutting channel of the substrate during the formation of the pre-cut channel, preventing the above-mentioned pollutants from polluting subsequent processes, affecting LED devices or integrating The yield of the circuit device.
- the present invention also provides a method of using a substrate which is a substrate on which a pre-cut channel is formed on a passive surface. First providing a substrate on which a pre-cut channel is formed on a passive surface, then forming an LED device or an integrated circuit device on the substrate, and then performing a splicing step along the pre-cut channel to divide the substrate into multiple LED devices or integrated circuit devices due to LED devices or sets After the circuit device chip is formed, the conventional thinning and cutting steps are not required, but the splitting step is directly performed, thereby reducing damage to the LED device or the integrated circuit device chip, and improving the yield of the LED device or the integrated circuit device.
- the substrate on which the pre-cut channel is formed it is only necessary to purchase the substrate on which the pre-cut channel is formed, and perform the corresponding LED device or integrated circuit device chip fabrication process, after the LED device or the integrated circuit device chip is formed, directly Performing the lobes reduces the process steps and costs of the LED device or integrated circuit device manufacturer, and further improves the yield of the LED device or integrated circuit device because the pre-cut channel has the effect of reducing stress on the substrate.
- the substrate of the embodiment of the present invention has a relatively disposed active surface and a passive surface, wherein the active surface is used to form an LED device or an integrated circuit device, and the passive surface has a plurality of pre-cut channels, and the pre-cutting Channels are used to relieve stress on the substrate during a process of forming the LED device or integrated circuit device, the position of the pre-cut channel corresponding to the location of the LED device or integrated circuit device to be formed, in the LED device After the integrated circuit device is formed, the thinning and cutting steps are not required, and the splitting can be directly performed along the pre-cut channel to divide the substrate into a plurality of LED devices or semiconductor devices, thereby reducing the LED device or the integrated circuit. Damage to the device, improve the yield of the LED chip after cutting, increase the output of the LED device or the integrated circuit device, and reduce the cost of the LED device or the integrated circuit device;
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Dicing (AREA)
- Led Devices (AREA)
Abstract
一种衬底(10)、衬底(10)的制作方法和使用方法。衬底(10)的被动面形成有预切割通道(101),在形成LED器件或集成电路器件的过程中,预切割通道(101)可以将衬底(10)上的应力释放,从而减小或消除衬底上(10)的应力,有利于提高LED器件的良率。上述形成有预切割通道(101)的衬底(10)在LED器件或集成电路器件形成后,可以直接进行裂片,无需进行减薄、切割步骤,从而减少工艺步骤,简化工艺流程,提高LED器件的成品率,提高LED器件的产量,降低LED器件的成本。
Description
本申请要求于 2011 年 12 月 9 日提交中国专利局、 申请号为 201110410054.1、 发明名称为 "衬底、 衬底的制作方法和使用方法 "的中国专 利申请的优先权, 其全部内容通过引用结合在本申请中。
技术领域
本发明涉及集成电路或 LED器件制造工艺领域, 特别涉及用于制作集成 电路器件或 LED器件的衬底、 衬底的制作方法和使用方法。
背景技术
发光二极管 (LED, Light Emitting Diode )是能够将电能转换为可见光的 光电器件。现有的利用氮化镓为代表的 ΙΠ- V族化合物半导体由于具有带隙宽、 发光效率高、 电子饱和漂移速度高、 化学性质稳定等特点在高亮度蓝、 绿光发 光二极管等光电器件领域具有巨大的应用潜力, 引起了人们的广泛关注。
现有技术通常是在衬底(材质可以为蓝宝石等)上采用气相沉积的方法形 成发光层, 然后通过减薄、 切割、 裂片等多个工艺步骤, 将蓝宝石衬底分为多 个 LED器件(也称为芯片单元, die ) 。 在申请号为 201010620248.X的中国 专利申请中可以发现更多关于现有的 LED芯片及其制作方法的信息。
在实际中,发现形成有发光层的衬底经过减薄、切割和裂片后获得的 LED 器件的成品率 (yield )较低, 高质量 LED器件的产量较少, 成本较高。
发明内容
本发明实施例解决的问题是提供了一种衬底、 衬底的制作方法和使用方 法, 所述衬底的被动面形成有预切割通道, 在形成 LED器件或集成电路器件 的过程中, 所述预切割通道可以将衬底上的应力释放,从而减小或消除衬底上 的应力, 有利于提高 LED器件的良率。 并且上述形成有预切割通道的衬底在 LED 器件或集成电路器件形成后, 可以直接进行裂片, 无需进行减薄、 切割 步骤,从而减少工艺步骤, 筒化工艺流程,提高 LED器件的成品率、提高 LED 器件的产量, 降低 LED器件的成本。
为解决上述问题, 本发明实施例提供了一种衬底, 所述衬底具有相对设置 的主动面和被动面, 所述主动面用于形成 LED器件或集成电路器件, 所述被 动面具有多条预切割通道, 所述预切割通道用于在形成所述 LED器件或集成
电路器件的工艺过程中释放所述衬底上的应力,所述预切割通道的位置与即将 形成的 LED器件或集成电路器件的位置对应。
可选地, 所述预切割通道的深度范围为所述衬底厚度 1/4~7/8。
可选地, 所述衬底的材质为蓝宝石、 ZnO、 SiC、 硅、 玻璃中的一种或者 其中的组合。
相应地, 本发明还提供一种衬底的制作方法, 包括: 提供初始衬底, 所述 初始衬底具有相对设置的主动面和被动面, 所述主动面用于形成 LED器件或 集成电路器件, 所述被动面用于形成预切割通道;
在形成所述 LED器件或集成电路器件之前, 在所述初始衬底的被动面形 成预切割通道。
可选地, 所述预切割通道的深度范围为所述初始衬底的厚度的 1/4~7/8。 可选地, 所述预切割通道的制作方法包括: 刻蚀、 机械划片、 激光切割中 的一种或多种。
可选地, 在所述预切割通道形成之后、 形成所述 LED器件或集成电路器 件之前, 还包括: 对所述衬底的被动面和预切割通道进行清洁的步骤。
相应地, 本发明还提供一种衬底的使用方法, 在所述主动面形成 LED器 件或集成电路器件后, 沿所述预切割通道进行裂片步骤,将所述衬底分为多个 LED器件或集成电路器件。
与现有技术相比, 本发明实施例具有以下优点:
本发明实施例所述衬底具有相对设置的主动面和被动面,所述主动面用于 形成 LED器件或集成电路器件, 所述被动面具有多条预切割通道, 所述预切 割通道用于在形成所述 LED器件或集成电路器件的工艺过程中释放所述衬底 上的应力, 所述预切割通道的位置与即将形成的 LED器件或集成电路器件的 位置对应, 在 LED器件或集成电路器件形成后, 无需进行减薄、 切割步骤, 而可以直接沿所述预切割通道进行裂片即可以将衬底分为多个 LED器件或半 导体器件, 从而减小对 LED器件或集成电路器件的损伤, 提高 LED芯片切割 后的成品率、 提高 LED器件或集成电路器件的产量, 降低 LED器件或集成电 路器件的成本;
进一步优化地,在预切割通道形成后, 对衬底的被动面和预切割通道进行
清洗,以减少预切割通道形成过程中在衬底的被动面和预切割通道中造成的污 染, 提高 LED器件或集成电路器件的良率。
附图说明
图 1是本发明的衬底的被动面的结构示意图。
具体实施方式
现有的衬底在气相沉积工艺后的减薄切割过程切割会对 LED器件或集成 电路器件造成损伤, 使得 LED器件或集成电路器件的良率较低。 经过研究发 现, 由于衬底本身材质硬度较大(通常为蓝宝石、 碳化硅等材质), 在减薄切 割的过程中, 衬底容易破裂, LED 器件容易受到损伤。 并且由于衬底在形成 LED 器件或集成电路器件的过程中沉积薄膜的工艺 (比如形成 GaN 薄膜的 MOCVD工艺 )等在衬底上形成了应力, 该应力使得衬底在形成切割沟槽的过 程中更加容易破裂, 不仅会造成大量的 LED器件报废, 降低了 LED器件或集 成电路器件的良率, 也提高了 LED器件或集成电路器件的成本。
为了解决上述问题, 本发明实施例提供了一种衬底, 所述衬底具有相对设 置的主动面和被动面, 所述主动面用于形成 LED器件或集成电路器件, 所述 被动面具有多条沿二维方向排布的预切割通道,所述预切割通道用于在形成所 述 LED器件或集成电路器件的工艺过程中释放所述衬底上的应力, 所述预切 割通道的位置与即将形成的 LED器件或集成电路器件的位置对应。
具体地,请参考图 1所示的本发明一个实施例的衬底的被动面的结构示意 图。 衬底 10的被动面上形成多条预切割通道 101。 作为一个实施例, 一部分 预切割通道沿图中 X方向平行排布, 另一部分预切割通道沿图中 Y方向 (所 述 Y方向垂直于 X方向)平行排布。 所述预切割通道将衬底 10的被动面分为 多个区域, 每个区域对应的衬底用于形成 LED器件或集成电路器件。 所述预 切割通道 101的深度范围为所述衬底 10的厚度的 1/4~7/8, 例如, 所述预切割 通道 101的厚度范围可以为衬底 10的厚度的 1/4、 1/2、 2/3、 7/8等, 具体的数 值本领域技术人员可以根据衬底 10的尺寸、以及 LED器件或集成电路器件的 尺寸进行具体的设置。 所述预切割通道 101的位置应与要形成的 LED器件或 集成电路器件的位置对应。
所述衬底 10的材质可以为蓝宝石、 ZnO、 SiC、 Si或玻璃中的一种或多种。
上述衬底形成后, 可以用于 LED器件或集成电路器件的制作工艺, 由于衬底 上形成了预切割通道, 对于 LED器件或集成电路器件制造厂而言, 只要购买 上述衬底, 进行 LED器件或集成电路的制造, 然后直接进行裂片工艺, 无需 购买减薄、 切割等工艺设备, 不仅节约了工艺步骤, 也减少了设备投资, 降低 了 LED器件的成本。 由于预切割通道可以释放 LED器件或集成电路器件制作 过程中在衬底上形成应力, 从而提高了 LED器件的良率。
相应地, 本发明还提供一种衬底的制作方法, 包括: 提供初始衬底, 所述 初始衬底具有相对设置的主动面和被动面, 所述主动面用于形成 LED器件或 集成电路器件, 所述被动面用于形成预切割通道;
在形成所述 LED器件或集成电路器件之前, 在所述初始衬底的被动面形 成预切割通道。
本发明实施例所述的初始衬底的材质可以为蓝宝石、 氮化硅或 ZnO等材 质, 也可以为硅、 锗等材质。 所述初始衬底的尺寸与现有技术相同。 作为一个 实施例, 所述预切割通道的深度范围为所述初始衬底的厚度的 1/4~7/8。
所述预切割通道的制作方法包括: 刻蚀、机械划片、 激光切割中的一种或 多种。 作为一个实施例, 所述预切割通道的制作方法为干法刻蚀方法, 所述干 法刻蚀可以为 ICP或 RIE工艺, 采用的刻蚀气体可以为氯气、 CHC12、 CHC13 中的一种或其混合, 当然, 采用的气体也可以为其他的含氯等离子体的气体。 所述机械划片或激光切割的方法与现有技术相同,作为本来能够与技术人员的 公知技术, 在此不作详细的说明。
作为本发明的又一实施例, 在所述预切割通道形成之后、 形成所述 LED 器件或集成电路器件之前,还包括: 对所述衬底的被动面和预切割通道进行清 洁的步骤。所述清洁主要是为了将形成所述预切割通道过程中在衬底的被动面 和预切割通道中形成的颗粒等污染物去除,防止上述污染物对后续的工艺造成 污染, 影响 LED器件或集成电路器件的良率。
相应地, 本发明还提供一种衬底的使用方法, 所述衬底为被动面上形成有 预切割通道的衬底。 首先提供所述被动面上形成有预切割通道的衬底, 然后在 所述衬底上形成 LED器件或集成电路器件, 接着沿所述预切割通道进行裂片 步骤, 将所述衬底分为多个 LED器件或集成电路器件, 由于在 LED器件或集
成电路器件芯片形成后无需进行传统的减薄、切割等步骤, 而是直接进行裂片 步骤, 因而减少了对 LED器件或集成电路器件芯片的损伤, 提高了 LED器件 或集成电路器件的良率。 对于 LED器件或集成电路器件的制造厂商, 只需要 采购上述形成有预切割通道的衬底, 进行相应的 LED器件或集成电路器件芯 片的制作工艺, 在 LED器件或集成电路器件芯片形成后, 直接进行裂片, 减 少了 LED器件或集成电路器件制造厂商的工艺步骤和成本, 并且, 由于上述 预切割通道具有减少衬底上的应力的作用, 也进一步提高了 LED器件或集成 电路器件的良率。
综上, 本发明实施例所述衬底具有相对设置的主动面和被动面, 所述主动 面用于形成 LED器件或集成电路器件, 所述被动面具有多条预切割通道, 所 述预切割通道用于在形成所述 LED器件或集成电路器件的工艺过程中释放所 述衬底上的应力, 所述预切割通道的位置与即将形成的 LED器件或集成电路 器件的位置对应, 在 LED器件或集成电路器件形成后, 无需进行减薄、 切割 步骤, 而可以直接沿所述预切割通道进行裂片即可以将衬底分为多个 LED器 件或半导体器件, 从而减小对 LED器件或集成电路器件的损伤, 提高 LED芯 片切割后的成品率、 提高 LED器件或集成电路器件的产量, 降低 LED器件或 集成电路器件的成本;
进一步优化地, 在预切割通道形成后,对衬底的被动面和预切割通道进行 清洗,以减少预切割通道形成过程中在衬底的被动面和预切割通道中造成的污 染, 提高 LED器件或集成电路器件的良率。
虽然本发明己以较佳实施例披露如上,但本发明并非限定于此。任何本领 域技术人员, 在不脱离本发明的精神和范围内, 均可作各种更动与修改, 因此 本发明的保护范围应当以权利要求所限定的范围为准。
Claims
1. 一种衬底, 其特征在于, 所述衬底具有相对设置的主动面和被动面, 所述 主动面用于形成 LED器件或集成电路器件,所述被动面具有多条预切割通道, 所述预切割通道用于在形成所述 LED器件或集成电路器件的工艺过程中释放 所述衬底上的应力, 所述预切割通道的位置与即将形成的 LED器件或集成电 路器件的位置对应。
2. 如权利要求 1所述的衬底, 其特征在于,所述预切割通道的深度范围为所 述衬底厚度 1/4~7/8。
3. 如权利要求 1所述的衬底,其特征在于,所述衬底的材质为蓝宝石、 ZnO、 SiC、 硅、 玻璃中的一种或者其中的组合。
4. 如权利要求 1所述的衬底的制作方法,其特征在于, 包括:提供初始衬底, 所述初始衬底具有相对设置的主动面和被动面, 所述主动面用于形成 LED器 件或集成电路器件, 所述被动面用于形成预切割通道;
在形成所述 LED器件或集成电路器件之前, 在所述初始衬底的被动面形 成预切割通道。
5. 如权利要求 4所述的衬底的制作方法, 其特征在于, 所述预切割通道的深 度范围为所述初始衬底的厚度的 1/4~7/8。
6. 如权利要求 4所述的衬底的制作方法, 其特征在于, 所述预切割通道的制 作方法包括: 刻蚀、 机械划片、 激光切割中的一种或多种。
7. 如权利要求 4所述的衬底的制作方法, 其特征在于,在所述预切割通道形 成之后、 形成所述 LED器件或集成电路器件之前, 还包括: 对所述衬底的被 动面和预切割通道进行清洁的步骤。
8. 如权利要求 1 所述的衬底的使用方法, 其特征在于, 在所述主动面形成 LED 器件或集成电路器件后, 沿所述预切割通道进行裂片步骤, 将所述衬底 分为多个 LED器件或集成电路器件。
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JPH10125958A (ja) * | 1997-10-20 | 1998-05-15 | Nichia Chem Ind Ltd | 窒化ガリウム系化合物半導体チップの製造方法 |
JP2000294521A (ja) * | 1999-04-09 | 2000-10-20 | Daido Steel Co Ltd | 電子素子の製造方法 |
CN101207174A (zh) * | 2006-12-18 | 2008-06-25 | 斯尔瑞恩公司 | 氮化物半导体衬底及其制造方法 |
CN102104091A (zh) * | 2010-12-03 | 2011-06-22 | 中国科学院苏州纳米技术与纳米仿生研究所 | 基于硬质衬底的led芯片的分离方法 |
CN202395025U (zh) * | 2011-12-09 | 2012-08-22 | 光达光电设备科技(嘉兴)有限公司 | 衬底 |
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JPH10125958A (ja) * | 1997-10-20 | 1998-05-15 | Nichia Chem Ind Ltd | 窒化ガリウム系化合物半導体チップの製造方法 |
JP2000294521A (ja) * | 1999-04-09 | 2000-10-20 | Daido Steel Co Ltd | 電子素子の製造方法 |
CN101207174A (zh) * | 2006-12-18 | 2008-06-25 | 斯尔瑞恩公司 | 氮化物半导体衬底及其制造方法 |
CN102104091A (zh) * | 2010-12-03 | 2011-06-22 | 中国科学院苏州纳米技术与纳米仿生研究所 | 基于硬质衬底的led芯片的分离方法 |
CN202395025U (zh) * | 2011-12-09 | 2012-08-22 | 光达光电设备科技(嘉兴)有限公司 | 衬底 |
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