WO2013004188A1 - Solar cell, system, and manufacturing method thereof - Google Patents

Solar cell, system, and manufacturing method thereof Download PDF

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Publication number
WO2013004188A1
WO2013004188A1 PCT/CN2012/078233 CN2012078233W WO2013004188A1 WO 2013004188 A1 WO2013004188 A1 WO 2013004188A1 CN 2012078233 W CN2012078233 W CN 2012078233W WO 2013004188 A1 WO2013004188 A1 WO 2013004188A1
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WIPO (PCT)
Prior art keywords
layer
sub
cell
band gap
solar cell
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PCT/CN2012/078233
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French (fr)
Chinese (zh)
Inventor
毕京锋
林桂江
吴志浩
宋明辉
洪灵愿
林素慧
熊伟平
梁兆暄
刘建庆
吴志强
林志东
方妍妍
王良均
余金中
丁杰
戴江南
陈长清
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厦门市三安光电科技有限公司
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Priority claimed from CN2011101896126A external-priority patent/CN102222734B/en
Priority claimed from CN201110219051XA external-priority patent/CN102244134B/en
Priority claimed from CN201110223521XA external-priority patent/CN102244151A/en
Priority claimed from CN2011102345440A external-priority patent/CN102412337A/en
Application filed by 厦门市三安光电科技有限公司 filed Critical 厦门市三安光电科技有限公司
Publication of WO2013004188A1 publication Critical patent/WO2013004188A1/en
Priority to US14/147,498 priority Critical patent/US9318643B2/en
Priority to US14/147,596 priority patent/US20140116494A1/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
    • H01L31/068Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
    • H01L31/0687Multiple junction or tandem solar cells
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
    • H01L31/068Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
    • H01L31/0687Multiple junction or tandem solar cells
    • H01L31/06875Multiple junction or tandem solar cells inverted grown metamorphic [IMM] multiple junction solar cells, e.g. III-V compounds inverted metamorphic multi-junction cells
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/544Solar cells from Group III-V materials

Definitions

  • the invention belongs to the field of solar cells, and in particular relates to a solar cell, a system, and a manufacturing method thereof.
  • the III-V compound semiconductor-based multi-junction solar cell which has the advantages of high temperature resistance, strong radiation resistance, good temperature characteristics, etc., and has become a price-insensitive space photovoltaic.
  • the mainstream technology of power supply In recent years, with the development of concentrating photovoltaic technology, ⁇ - ⁇ family semiconductor solar cells have attracted more and more attention due to their high photoelectric conversion efficiency.
  • the concentrating photovoltaic technology saves solar cell wafers on a large scale by concentrating a large area of sunlight, concentrating it, and irradiating it onto a relatively small solar photovoltaic cell to generate electricity.
  • the device utilizes a large-area, inexpensive concentrating device to replace expensive and tightly-charged battery chips, thereby achieving the goal of greatly reducing the cost of solar photovoltaic power generation, and enabling solar photovoltaic power generation to compete with conventional energy sources. Therefore, concentrating photovoltaic technology based on I I I-V compound semiconductor multi-junction solar cells has become a promising photovoltaic technology.
  • the InGaP/GaAs/Ge triple junction solar cell is a relatively mature and efficient II IV compound semiconductor multi-junction solar cell.
  • the cell constants of the sub-cells of this type of solar cell are basically matched, and the band gap width is from top to bottom.
  • InGaP is ⁇ 1.86eV
  • GaAs is ⁇ 1.42eV
  • Ge is ⁇ 0. 78eV
  • AMI. 5 conversion efficiency
  • Emcore The inverted structure GalnP/GaAs/InGaAs multi-junction solar cell invented by the company is also considered to be a promising battery structure.
  • the GalnP/GaAs/InGaAs multi-junction solar cell has an conversion efficiency of 32% in the case of AMO and lsun, and its conversion efficiency can also be achieved under high-concentration conditions (500 X, AMI.5). More than 40%.
  • the GalnP top cell absorbs sunlight having a photon energy greater than 1.83 eV, that is, a spectral short-wavelength region of the wavelength ⁇ ⁇ ⁇ leg;
  • the GaAs cell absorbs sunlight having a photon energy greater than 1.42 eV, that is, the wavelength ⁇ 2 ⁇ 873 The spectral mid-wave region of the leg;
  • the Ge bottom cell absorbs sunlight with a photon energy greater than 0.66 eV, ie a long-wavelength region in the spectrum of the wavelength ⁇ 3 ⁇ 1879 leg.
  • the compound semiconductor solar cell is generally epitaxially epitaxially grown on a substrate such as Ge, Si or GaAs by a vapor phase epitaxy technique or a liquid phase epitaxy technique, and then a solar cell chip is prepared by using an epitaxial wafer of a well-structured solar cell.
  • a method for achieving re-use of an inverted structure multi-junction solar cell substrate comprising the steps of: (1) providing a growth substrate; (2) depositing a layer of Si0 2 on the surface of the growth substrate. a mask layer, forming a patterned substrate; (3) epitaxially growing a sacrificial layer on the patterned substrate, the sacrificial layer enclosing the entire SiO 2 mask pattern; (4) epitaxial growth on the sacrificial layer a buffer layer; (5) epitaxially growing a semiconductor material layer sequence of the inverted solar cell on the buffer layer; (6) bonding the semiconductor material layer sequence of the inverted solar cell to the support substrate; (7) using wet etching selectivity
  • the Si0 2 mask layer is etched away; (8) The sacrificial layer is selectively etched away by wet etching, and the substrate is stripped.
  • the material of the growth substrate is Ge or GaAs.
  • the patterns of the SiO 2 mask layers formed in the step (2) are unidirectionally parallel, or crisscrossed, or intersect each other.
  • the material of the semiconductor sacrificial layer in the step (3) is InGaP or AlGaAs.
  • the support substrate in the step (6) is a Si wafer.
  • the step (6) comprises the steps of: depositing a first metal bonding layer on the surface of the semiconductor material layer of the inverted solar cell; providing a Si epitaxial wafer to form a high doping layer on the surface thereof ( In) a GaAs cap layer; depositing a second metal bonding layer on the cap layer; bonding the semiconductor material layer sequence of the inverted solar cell and the Si wafer together by a bonding process.
  • the SiO 2 mask layer is selectively etched with hydrofluoric acid.
  • the SiO 2 mask layer is selectively etched with ammonium fluoride.
  • the sacrificial layer is etched by using a ratio of hydrochloric acid to phosphoric acid of 1:2 as a selective etching solution.
  • SiO 2 is used as a mask layer, followed by selective etching of the SiO 2 mask layer by wet etching to cause a large number of voids in the sacrificial layer, and a selective etching solution for removing the sacrificial layer is added.
  • the contact area of the sacrificial layer increases the corrosion rate of the sacrificial layer and reduces the difficulty of substrate peeling.
  • the separation of the inverted structure multi-junction solar cell from the substrate can be completed more simply, and the substrate can be reused, thereby reducing the production cost of the solar cell.
  • a structure and method of fabricating a four junction solar cell is presented. Because the Ge-bottom battery of the three-junction solar cell absorbs a large amount of low-energy photons, the photocurrent generated is much larger than that of the top cell and the middle cell. For a laminated battery, the efficiency of each sub-battery is the highest when the currents are equal, and the current mismatch will bring a composite loss of current and reduce the efficiency.
  • the flip-grown GalnP/GaAs/InGaAs triple junction solar cell can effectively solve the problem of current matching, but its late process is complicated and the absorption of low energy photons is weakened. Therefore, one of the effective methods for solving this problem is to insert a sub-cell with a junction band gap of about 1. OeV between the middle battery and the bottom battery, so that the obtained four-junction solar cell has a more matching current than the three-junction battery. , and the increase in the number of knots can further subdivide the solar spectrum and increase efficiency.
  • a high efficiency four-junction solar cell includes: an InP growth substrate; a first subcell formed on a growth substrate having a first energy band gap and a lattice constant matching the substrate lattice a second sub-battery formed on the first sub-cell and having a second energy band gap larger than the first energy band gap, the lattice constant matching the substrate lattice; a third sub-cell formed in the first a second sub-cell having a third energy band gap larger than a second energy band gap, the lattice constant matching the substrate lattice; a composition gradient layer formed on the third sub-cell and having a third ratio a fourth energy band gap having a large band gap; a fourth sub-cell formed on the compositionally graded layer and having a fifth band gap larger than the third band gap, a lattice constant and a substrate crystal Mismatch.
  • a method of fabricating an efficient four-junction solar cell comprising: providing an InP growth substrate; forming a first subcell having a first energy band gap, crystal on the growth substrate a lattice constant matching the substrate; forming a second subcell on the first subcell having a second energy band gap greater than a first energy band gap, the lattice constant matching the substrate lattice; Forming, on the second sub-cell, a third sub-cell having a third energy band gap larger than a second energy band gap, wherein a lattice constant is lattice-matched with the substrate; forming a component on the third sub-cell a graded layer having a fourth band gap larger than a third band gap; forming a fourth subcell having a fifth band gap larger than the third band gap on the compositionally graded layer , the lattice constant is mismatched with the substrate lattice.
  • an InGaAs first subcell having a lattice matching of an InP substrate and a band gap of 0.72 to 0.76 eV is formed on the substrate; forming a lattice match with the InP substrate on the first subcell; a second sub-cell having a band gap of 0.9 - 1. 1 eV, and an InP third sub-cell having a band gap of 1.31 eV; AlSb z A Sl _ z is formed on the three sub-cells, and the layer distribution ratio of the layer is lattice-matched from the InP substrate, and the energy band gap is AlSb around 1.9 eV. . 44 As.
  • the four-junction solar cell adopts a forward growth structure to facilitate device preparation; the sub-cells have a band gap arrangement suitable, and the lattices of the bottom three sub-cells are perfectly matched with the substrate; and the composition is graded by AlSb z A Sl _ z , , can control the threading dislocation density of the top InGaP sub-cell within 10 6 cm - 2 to minimize the efficiency loss of the sub-cell Chemical.
  • Some embodiments provide a method of fabricating another solar cell, comprising: providing a growth substrate; stacking a semiconductor material layer sequence on the growth substrate, which in turn comprises a ⁇ - ⁇ compound solar cell material layer, a contact layer And sacrificial layer; ⁇ completely etching the sacrificial layer by wet etching, etching stops on the surface of the contact layer, exposing the surface of the contact layer; depositing a first electrode on the surface of the contact layer, defining an electrode pattern, etching away the electrode a contact layer; a second electrode is fabricated.
  • Some embodiments provide a method for fabricating another high efficiency four-junction solar cell, comprising the steps of: providing a double-sided polished substrate for semiconductor epitaxial growth; forming a first sub-cell on the front side of the substrate, having a band gap; forming a gradation buffer layer over the first sub-cell having a second band gap greater than the first band gap; forming a second sub-cell above the gradation buffer layer; a third band gap of the gap; forming a third sub-cell on the back surface of the substrate, which is flip-chip growth, having a fourth band gap smaller than the first band gap; forming a first portion under the third sub-cell A four-cell battery, which is flip-chip grown, has a fifth band gap smaller than the fourth band gap; and a back contact layer is epitaxially formed under the fourth sub-cell.
  • the double-sided polished substrate is preferably a p- ⁇ n substrate.
  • the n-type ion-forming emitter region is implanted on the front side of the germanium-type substrate with the substrate itself as a base region to constitute the first sub-cell.
  • the double-sided polished substrate has a thickness of less than or equal to 200 microns.
  • the n-type ion-forming emitter region is implanted on the front side of the ⁇ -type substrate with the substrate itself as a base region to constitute the first sub-cell.
  • the graded buffer layer is a multilayer structure, the material of which is IG ai — x P.
  • the second band gap is 1.
  • the first band gap is 1. 3 - 1. 5 eV; the second band gap is 1. 5 ⁇ 1. 8 eV; The e.g., the fifth band gap is 0. 6 - 0. 9 eV.
  • the second subcell is composed of a p-type InAlAs base region and an n-type InAsAs emitter region
  • the third subcell is composed of a p-type InGaAsP base region and an n-type InGaAsP emitter region, wherein the The three subcells are composed of a p-type InGaAsP base region and an n-type InGaAsP
  • the fourth subcell is composed of a p-type InGaAs base region and an n-type InGaAs emitter region.
  • an efficient four-junction solar cell comprising: a double-sided polished substrate; a first sub-cell formed by ion implantation of a substrate, having a first band gap; and a graded buffer layer formed on the first a second sub-cell having a second band gap greater than the first band gap; a second sub-cell formed above the graded buffer layer and having a third band gap greater than the second band gap; the third sub-battery, flip-chip growth
  • a fourth band gap having a smaller than the first band gap is formed on the back surface of the substrate; and the fourth sub-cell is flip-chip grown under the third sub-cell and has a fifth band gap smaller than the fourth band gap.
  • the double-sided polished substrate is a p-InP substrate. In some embodiments, the double-sided polished substrate has a thickness of less than or equal to 200 microns.
  • the graded buffer layer is a multilayer structure, the material of which is IG ai — x P.
  • the second band gap is 1. 8 ⁇ 2, the first band gap is 1. 3 - 1. 5 eV; the second band gap is 1. 5 - 1. 8 eV; The e.g., the fifth band gap is 0. 6 ⁇ 0. 9 eV.
  • the second subcell is composed of a P-type InAlAs base region and an n-type InAlAs emitter region;
  • the third subcell is composed of a p-type InGaAsP base region and an n-type InGaAsP emitter region;
  • the subcell is composed of a p-type InGaAsP base region and an n-type InGaAsP;
  • the fourth subcell is composed of a p-type InGaAs base region and an n-type InGaAs emitter region.
  • sub-cells with different band gaps are epitaxially grown on both sides of the substrate in a high-to-low order, which does not match the first subcell lattice.
  • a second subcell is grown above, a gradient buffer layer is used between the first and second subcells to slowly release stress, reducing dislocation density;
  • third and fourth subcell growth lattice matching the first subcell below the band gap of each sub-battery is reasonably configured to broaden the spectral absorption range of the solar cell, and a high-efficiency four-junction solar cell with current matching and high lattice quality is formed.
  • 1 to 7 are schematic views showing a manufacturing process of an inverted solar cell according to a preferred embodiment of the present invention.
  • FIGS. 8-10 are top plan views of a SiO 2 mask pattern in various preferred embodiments of the present invention.
  • Figure 11 is a graph showing the band gap of certain binary materials and the lattice constant of the associated binary material.
  • Figure 12 is a side cross-sectional view of a high efficiency four junction solar cell in accordance with a preferred embodiment of the present invention.
  • 13 to 14 are schematic views showing a conventional manufacturing process of the I I I-V solar cell.
  • FIG. 15 to FIG. 19 are schematic views showing a manufacturing process of a solar cell according to a preferred embodiment of the present invention.
  • Figure 20 is a schematic view showing the structure of a high efficiency four-junction solar cell according to a preferred embodiment of the present invention.
  • 21 to 32 are schematic diagrams showing a manufacturing process of a high efficiency four-junction solar cell according to a preferred embodiment of the present invention.
  • the reference numerals in the figure include: 100: patterned substrate; 101: growth substrate; 102: Si0 2 mask layer; 103: sacrificial layer; 104: pore; 200: GaAs buffer layer; 201: inverted solar cell semiconductor material layer sequence 300: support substrate; 301: p-type S i piece; 302: p-type GaAs cap layer; 303: first bonding metal layer; 304: second bonding metal layer; 2001: growing village bottom; 2100: first Subcell; 2101: first sub-battery backfield layer; 2102: first subcell base; 2103: first subcell emissive layer; 2104: first subcell window layer; 2200: second subcell; 2201: Two sub-battery back field layer; 2202: second sub-battery base; 2203: second sub-battery emission layer; 2204: second sub-battery window layer; 2300: third sub-battery; 2301: third sub-battery back-field layer 2302: third sub-batter
  • the cost of substrates in the photovoltaic industry usually accounts for 30-50% of the total cost of solar cells, which is one of the main factors for the high price of solar cells.
  • the conventional substrate stripping process is characterized by selective etching between a sacrificial layer and a buffer layer and a substrate under a specific etching liquid. In the etching process, the etching liquid selectively etches only the sacrificial layer without corroding.
  • the buffer layer and the substrate are used to achieve separation of the substrate from the battery.
  • a conventional substrate stripping process usually requires a certain degree of force on the battery structure, so that the contact area of the selective etching liquid and the sacrificial layer can be gradually increased during the etching process. Since the battery structural material is brittle, the applied force will cause a certain degree of damage to the battery structure, and thus it is difficult to apply on a large scale.
  • the photocurrent generated by the Ge bottom cell of the triple junction solar cell is much larger than that of the top cell and the middle cell.
  • the efficiency of each subcell is equal when the currents of the subcells are equal, and the current mismatch will cause a composite loss of current. , Reduce efficiency.
  • One of the main methods to solve this problem is to insert a junction between the middle cell and the bottom cell to match the Ge substrate and the GaAs material, and the band gap is about 1.
  • Patent application No. CN200910223615 discloses a four-junction solar cell in which a flip-chip structure is grown on a GaAs substrate, specifically using a GaAs or Ge substrate; forming a lattice match with the substrate on the substrate
  • the first sub-cell having a band gap of 1. 9 eV; a lattice matching of the substrate is formed on the first sub-cell, and the band gap is 1.35-1.
  • the cell gap is greater than the substrate, the band gap is 0. 9-1. 1 eV is formed on the first sub-cell.
  • Nearby InGaAs a third sub-cell; forming a second graded interlayer having a compositional gradation on the third sub-cell; forming a lattice constant on the second graded interlayer greater than the third sub-cell material, and having a band gap of 0. 6-0.
  • InGaAs fourth subcell near 8eV.
  • the four-junction solar cell structure requires a flip-chip growth method for subsequent device fabrication, which requires stripping of the substrate, which increases the difficulty of device fabrication and leads to lower yield.
  • the four-junction solar cell has two junctions. The cell's crystal lattice does not match the substrate, which inevitably introduces threading dislocations in the two junction cells, reducing the efficiency of the overall cell.
  • the use of two additional gradient layers also increases the growth time too much. , greatly increase production costs.
  • Some embodiments provide a method of fabricating an inverted solar cell, which mainly includes a patterned substrate forming process, a semiconductor material layer sequence forming process of an inverted solar cell, a supporting substrate bonding process, and a growth substrate stripping process. The details will be described below with reference to Figs. 1 to 7 .
  • a growth substrate 101 is selected, which may be a Ge substrate or a GaAs substrate. In the present embodiment, GaAs is selected as the growth substrate 101.
  • the S i0 2 mask layer 102 is formed on the growth substrate 101 to form a patterned substrate 100.
  • the specific process is as follows: using a PECVD deposited on the GaAs substrate 101 S i0 2 mask layer of a thickness of the legs 100 102, a semiconductor lithographic process to produce a photoresist mask pattern on the mask layer 102 S i0 2 Then, the S i0 2 mask layer is selectively etched away by wet etching, and hydrofluoric acid or ammonium fluoride or the like can be used as the etching solution.
  • hydrofluoric acid is selected as an etching solution, which is first selectively etched for 30 seconds, then rinsed with deionized water for 10 minutes, and finally subjected to a photoresist removal process to form a S i0 2 mask pattern on the GaAs substrate.
  • the S0O 2 mask is uniformly distributed on the surface of the growth substrate 101 to expose the surface of the partially grown substrate.
  • the pattern of the S i0 2 mask may be parallel in one direction, crisscrossed or crossed.
  • the S00 2 mask 102 is in a unidirectional parallel pattern
  • FIG. 9 shows the S i0 2 mask 102 in a crisscross pattern
  • FIG. 10 shows the S00 2 mask 102 intersecting each other. Graphics.
  • a sacrificial layer 103 is epitaxially grown on the patterned substrate 100.
  • Ga is selected. . 5 In. 5 P as the material of the sacrificial layer 103
  • the specific process is as follows: The patterned GaAs substrate 100 is cleaned and loaded into the M0CVD reaction chamber to control the reaction chamber pressure of 300 Torr, the epitaxial growth rate is 1 A/s, first at 750 ° Bake for 10 minutes at C, then cool down to 650 °C, and form a layer of Ga using a lateral epitaxial growth process. . 5 In. 5 P sacrificial layer 103 having a thickness of 150 nm. As shown in Figure 2, Ga. . 5 In. The 5 P sacrificial layer 103 surrounds the entire S i0 2 mask layer 102.
  • a buffer layer 200 is epitaxially formed on the sacrificial layer 103.
  • GaAs is selected as the material of the buffer layer 200, and the specific process thereof is as follows: The pressure of the M0CVD reaction chamber is adjusted to 30 Torr, and the molar flow ratio of the five-three-group reaction source is 40, in Ga. . 5 In. A GaAs buffer layer 200 is grown on the 5 P sacrificial layer 103.
  • a semiconductor material layer sequence of the inverted solar cell is epitaxially grown on the sacrificial layer 103.
  • the solar cell can be a single junction or a multi junction, and in this embodiment an inverted triple junction solar cell is selected. As shown in FIG.
  • Ga is epitaxially grown on the GaAs buffer layer 200 by a conventional M0CVD epitaxial process. . 5 In. . 5 P/GaAs /Ga. . 7 In. 3 As inverted semiconductor material layer sequence 201 of a triple junction solar cell.
  • a support substrate 300 for supporting the semiconductor material layer of the solar cell is prepared.
  • the support 300 may select a material having better heat dissipation, such as a Si sheet or a ceramic substrate.
  • the p-type Si wafer 301 is selected as a supporting substrate, and a highly doped P-type GaAs cap layer 302 is epitaxially formed on the surface thereof by M0CVD.
  • the p-type GaAs cap layer 302 has a doping concentration of 1 X l O'Vcm 3 and a surface roughness of 3 nm.
  • the semiconductor material layer sequence of the inverted solar cell is bonded to the support substrate.
  • a metal bonding layer is respectively formed on the surface of the semiconductor material layer sequence 201 of the inverted solar cell and the surface of the p-type GaAs cap layer 302.
  • the semiconductor material layer sequence of the supporting substrate 300 and the inverted solar cell is performed by a bonding process.
  • 201 is bonded together.
  • the material of the bonding layer is a conductive material and can be selected from materials such as gold, gold-tin alloy, and indium. In the present embodiment, gold is selected as the bonding layer.
  • the specific process is as follows: Using a metal evaporation process, first in Ga. . 5 In. . 5 P /GaAs /Ga.
  • a S inverted triple junction solar cell semiconductor material layer sequence 201 surface evaporation of a layer of 400 leg thick Au as the first metal bonding layer 303; then a layer of 400 legs thick on the surface of the P-type GaAs cap layer 302 Au is used as the second metal bonding layer 304; finally, the substrate 300 and Ga are supported by the Au-Au bonding process. . 5 In. . 5 P/GaA S /Ga. . 7 In.
  • the 3 As inverted triple junction solar cell semiconductor material layer sequence 201 is bonded together. As shown in FIG. 5, a side cross-sectional view of the solar cell after the bonding process is completed.
  • the patterned growth substrate 100 is stripped, which includes removing the S00 2 mask layer 102 and the sacrificial layer 103. ⁇ selectively etching the S i0 2 mask layer 102 and the sacrificial layer 103 by a wet etching process, wherein the etching solution of the S i0 2 mask layer 102 may use hydrofluoric acid or ammonium fluoride, etc., the etching solution of the sacrificial layer 103 Concentrated hydrochloric acid or a mixture of hydrochloric acid and phosphoric acid can be used.
  • hydrofluoric acid is selected as the etching solution of the S i0 2 mask layer 102
  • the mixed solution of hydrochloric acid and phosphoric acid is the etching solution of the sacrificial layer 103.
  • the specific process is as follows: First, selective etching is performed using 20% hydrofluoric acid.
  • the S i0 2 mask layer 102 as shown in FIG. 6, makes Ga. . 5 In.
  • a large number of pores 104 are formed in the 5 P sacrificial layer 103; then, Ga is selectively etched using a hydrochloric acid to phosphoric acid volume ratio of 1:2 as a selective etching solution. . 5 In.
  • the GaAs substrate 101 can be completely peeled off.
  • the surface is cleaned with deionized water, and the surface of the substrate is blown dry with a nitrogen gun to be used again.
  • S i0 2 is used as a mask layer, and then the S i0 2 mask layer is selectively etched by wet etching to cause a lot of voids in the sacrificial layer, and a selective etching solution for sacrificing the sacrificial layer is added and sacrificed.
  • the contact area of the layer improves the corrosion rate of the sacrificial layer, reduces the difficulty of substrate stripping, enables reuse of the substrate, and reduces the production cost of the solar cell.
  • the S i piece is used as the supporting substrate, which has the characteristics of good heat dissipation, low cost, and easy processing of the late chip.
  • Forming an (In) GaAs cap layer on the surface of the S i piece, and then using it for metal bonding process with the inverted structure multi-junction solar cell, which is advantageous for bonding uniformity and reducing stress at the interface to the battery The impact of improving the yield.
  • Figure 11 is a graph showing the band gap of certain binary materials and the lattice constant of the binary material. The band gap and lattice constant of the ternary material are on a line drawn between typical associated binary materials.
  • the ternary material AlGaAs is located between the GaAs point and the AlAs point on the graph, wherein the band gap of the ternary material is between 1.42 eV of GaAs and 2.16 eV of AlAs, depending on the relative amount of individual components. Therefore, depending on the required band gap, the material composition of the ternary material can be appropriately selected for growth.
  • FIG. 12 is a schematic structural view of a high efficiency four-junction solar cell according to a preferred embodiment of the present invention, including an InP growth substrate 2001, a first sub-cell 2100, a second sub-cell 2200, a third sub-cell 2300, and a fourth sub-cell 2400. Each of the junction cells is connected by tunneling junctions 2501, 2502, 2503.
  • a first sub-cell 2100 having a lattice match with the growth substrate and having a band gap of about 0.74 is formed on the growth substrate 2001.
  • the first subcell includes a back field layer 2101, a base region 2102, an emissive layer 2103, and a window layer 2104.
  • p-type InP is selected as the growth substrate 2001, p-type In. . 53 Ga. 47 As the base 2102 of the first sub-cell 2100, n-type In. . 53 Ga. 47 As an emission layer 2103 of the first sub-cell 2100, n-type InP serves as a window layer 2104.
  • the material of the back field layer 2101 is p-type InGaAsP, and the group distribution ratio of the InGaAsP satisfies the lattice constant and the substrate is matched, and the band gap is between 0.9 and 1.1 eV.
  • n-type InP window layer 2104 In 4v As / p ++ "53 Ga.” -. In 4v As, constituting the tunneling junction 2501, for "53 Ga.”.
  • the first sub-cell 2100 is connected to the second sub-cell 2200.
  • a second sub-cell 200 having a lattice gap of 1.0 eV is formed on the tunnel junction 2501 to be lattice-matched to the growth substrate.
  • the second subcell includes a back field layer 2201, a base region 2202, an emission layer 2203, and a window layer 2204.
  • p-type InP is selected as the back field layer 2201
  • p-type InxGa ⁇ ASyP is used as the base region 2202
  • n-type ⁇ n ⁇ is used as the emission layer 2203
  • the n-type InP is used as the window layer 2204.
  • the choice of X, y ensures that the lattice constant of the InxdASyP ⁇ material is the same as that of the substrate, and the band gap is around 1.0 eV.
  • a series of n++-InGaAsP/p++-InGaAsP is deposited on the top n-type InP window layer 2204 of the second sub-cell 2200 to form a tunnel junction 2502 for connecting the second sub-cell 2200 to the third sub-cell 2300.
  • the InGaAsP group distribution ratio satisfies the lattice constant matching with the substrate lattice, and the band gap is around 1.0 eV.
  • a third subcell 2300 having a lattice matching of 1.31 eV is formed on the tunneling junction 2502.
  • the third subcell includes a back field layer 2301, a base region 2302, an emissive layer 2303, and a window layer 2304.
  • p-type AlInAs is selected as the back field layer 2301
  • p-type InP is used as the base region 2302
  • n-type InP is used as the emission layer 2303
  • n-type AlInAs is used as the window layer 2304.
  • the group distribution ratio of the AlInAs back field layer 2301 is matched with the substrate, and the band gap is 1.47 eV.
  • the A1 component is preferably 0.48 and the In composition is 0.52.
  • the group assignment of the window layer is the same as that of the backfield layer 2301.
  • a series of n++-AlInAs/p++-AlInAs is deposited on the top window layer 2304 of the third sub-cell 2300 to form a tunnel junction.
  • the group distribution ratio of this layer is the same as that of the back field layer 2301.
  • a graded layer 2600 is formed on the tunnel junction 2503 with a band gap greater than that of the third subcell 2300.
  • the p-type AlSb z A S l _ z is selected as the gradation layer 2600, the group distribution ratio is lattice-matched from the InP substrate, and the energy band gap is 1. 9 eV in the vicinity of AlSb. . 44 As. 56 gradually changes to AlAs, and the change mode can be step change or linear change.
  • a fourth sub-cell 2400 having a band gap of about 1.88 eV is formed on the composition grade layer 2600.
  • the third subcell includes a back field layer 2401, a base region 2402, an emissive layer 2403, and a window layer 2404.
  • p-type Al lnP is selected as the back field layer 2401
  • p-type is used as the InGaP base region 2402
  • n-type InGaP is used as the emission layer 2403
  • n-type Al InP is used as the window layer 2404.
  • a fourth sub-cell top window layer 2401 is covered with a GaAs contact layer 2700 as a cap layer to form an efficient four-junction solar cell.
  • the present embodiment proposes an InP lining.
  • a four-junction solar cell structure is realized on the bottom.
  • the four-junction solar cell adopts a forward growth structure to facilitate device preparation; the sub-cells have a band gap arrangement suitable, and the lattices of the bottom three sub-cells are perfectly matched with the substrate; and the composition is graded by AlSb z A S l _ z , , can control the threading dislocation density of the top InGaP sub-cell within 10 6 cm -2 , so that the efficiency loss of the sub-cell is reduced.
  • Some embodiments provide a process for preparing a high power concentrating multi-junction solar cell comprising sub-cells 2100, 2200, 2300, 2400 and a process of forming layers between the sub-cells.
  • the lattice constant and electrical properties in the semiconductor structure are controlled according to appropriate growth temperatures and times and by the use of appropriate chemical compositions and dopants.
  • a vapor deposition method such as M0CVD and MBE can be used, but M0CVD is preferably selected as the growth technique of the present embodiment.
  • the specific preparation process of the embodiment comprises the following steps: In the first step, an InP growth substrate 001 is provided.
  • the InP substrate 2001 with a (001) side 9 degree angle was cleaned and placed in an organometallic chemical vapor deposition chamber, first baked at 750 °C for 10 minutes.
  • a first sub-cell 2100 having a band gap of about 0.74 eV is epitaxially grown on the p-type InP substrate 2001 by MOCVD.
  • the singularity of the band gap is 0. 9-1. 1 eV
  • the band gap is 0. 9-1. 1 eV
  • Between the thickness is about 20 nm; then p-type In is grown. . 53 Ga. 47
  • emissive layer 2104 having a doping concentration of 2 ⁇ 10 18 cm - 3 thickness is about 100 nm; Finally, an n-type InP window layer 2104 is grown with a doping concentration of 1 ⁇ 10 18 cm - 3 and a thickness of about 50 nm.
  • a tunnel junction 2501 is grown on the n-type InGaAsP window layer 104 on top of the first sub-cell 2100.
  • an n-type In which is about 15 nm thick and doped with a concentration of lxl O 1 ' cm- 3 is grown. . 53 Ga. 47 A S layer, then a thickness of about 15 nm, a doping concentration of 1 10" cm- 3 of p-type In. 53 Ga.. 47 As layer.
  • the band gap is a second sub-electricity near the OeV. Pool 2200.
  • Mr. Long p-type InP back field layer 2201 which has a thickness of about 20 nm; further grows a p-type InGaAs base region 2202 having a doping concentration of 1 x 10" cm- 3 and a thickness of 3 ⁇ m; and then growing n-type InGaAs
  • the emission layer 2203 has a doping concentration of 1 x 10 18 cm - 3 and a thickness of 100 nm.
  • an n-type InP window layer 2204 is grown with a doping concentration of 1 ⁇ 10 18 cm- 3 and a thickness of 50 nm.
  • a tunneling junction 2502 is grown on the top n-type InP window layer 2204 of the second sub-cell 2200.
  • the distribution ratio of the InGaAsP group of the two layers is matched to the lattice of the substrate, and the band gap is 1. 0 eV. .
  • a third sub-cell 2300 having a band gap of 1.31 eV is epitaxially grown on the tunnel junction 2502 to form a lattice match with the substrate.
  • the p-type AlInAs back field layer 2301 with a thickness of 20 nm is used.
  • the group distribution ratio of the AlInAs back field layer 2301 is matched with the substrate.
  • the band gap is 1.47 eV, and the A1 component is preferably 0.48.
  • the In composition is 0.52; the P-type InP base region 2302 is further grown to have a thickness of 1 ⁇ m and a doping concentration of 1 ⁇ 10" cm - 3 ; then an n-type InP emitter layer is grown.
  • the thickness is 100 nm, the doping concentration is 2 x l0 18 cm- 3 ; finally, the n-type AlInAs window layer 2304 is grown, the group distribution ratio of the layer is the same as the back field layer 2301, and the thickness thereof is 50 nm, doping concentration It is 1 X 10 18 cm_ 3 .
  • the junction 2503 is tunneled over the top n-type AlInAs window layer 2304 of the third sub-cell 2300. Mr. long thickness is
  • the 10" cm- 3 p-type AlInAs layer has a group distribution ratio similar to that of the back field layer 2301.
  • the compositionally graded layer 2600 is epitaxially grown on the tunnel junction 2503.
  • the p-type AlSbxAsl-x graded layer 2600 was grown so that the group distribution ratio of the layer was lattice-matched from the InP substrate, and the band gap was AlSb around 1.9 eV. . 4 4As. 56 changes gradually to AlAs, and the change mode can be step change, linear change, etc., and the change rate of Sb component is 8%/m.
  • each step is 250 nm.
  • a fourth sub-cell 2400 having a band gap of about 1.88 eV is epitaxially grown on the composition-graded layer 2600.
  • n-type GaAs contact layer 2700 is epitaxially grown on the top n-type AllnP window layer 2404 of the fourth sub-cell 2400 to complete the growth of the entire four-junction solar cell structure.
  • the GalnP/GalnAs/Ge multijunction solar cell is taken as an example.
  • the fabrication process is generally as follows: In the M0CVD system, GalnP/GalnAs/ is grown. After the GalnP top cell emitter in the Ge multijunction solar cell, a layer of GaAs cap is grown. GaAs contact layer is the outermost extension The layer, before etching the n-electrode, etches a portion of GaAs to expose the fresh GaAs surface, ensuring the adhesion and ohmic contact properties of the metal electrode in contact with GaAs. Therefore, GaAs-like growth is relatively thick, greater than 0.5 micron; in addition, etching the GaAs contact layer makes the surface more uneven and rough, affecting the photoelectric conversion efficiency.
  • a growth substrate 01 is selected to enter the MOCVD system, and the growth liner is The III-V compound solar cell material layer 02, the contact layer 03, and the sacrificial layer 05 are epitaxially grown on the surface of the bottom 01.
  • the growth substrate is preferably germanium (Ge), but may also be gallium arsenide (GaAs) or other suitable material.
  • the III-V compound solar cell can be a single junction or multi junction solar cell.
  • the single junction cell may have a battery material layer 02 of gallium arsenide (GaAs), indium gallium phosphide (GaInP), indium gallium arsenide (GalnAs), indium gallium arsenide (GalnAsP) or any other suitable III-V. Group compounds are formed.
  • the material layer 02 of the multi-junction solar cell can be formed by any suitable combination of the lattice constants and band gap requirements of the III-group elements listed in the periodic table, and the sub-cells are connected by a ⁇ -penetration junction.
  • Contact layer 03 is a cap layer that achieves good ohmic contact with the electrodes.
  • the material can be Ga(In)As and has a thickness between 50 and 150 legs.
  • the sacrificial layer 05 is used to protect the contact layer and has a thickness of 100 - 1000 legs.
  • the material is selected according to the material of the contact layer to selectively etch away the sacrificial layer and stop at the surface of the contact layer.
  • a GalnP/GalnAs/Ge multijunction solar cell is selected as the ⁇ -V compound solar cell, and gallium arsenide (GaAs) is selected as the contact layer 03, and indium gallium phosphide (GalnP) is used as the sacrificial layer 05.
  • GaAs gallium arsenide
  • GaNP indium gallium phosphide
  • the thickness of the GaAs contact layer 03 is 100 nm
  • the thickness of the GalnP contact layer 05 is 500 nm.
  • the sacrificial layer 05 is completely etched by wet etching, and the etching stops on the surface of the contact layer 03 to expose the surface of the contact layer 03.
  • the etchant should be selected to etch the sacrificial layer and not to etch the contact layer.
  • the GalnP contact layer 05 is etched with HC1 and stopped on the surface of the GaAs contact layer 03.
  • a layer of AuGe is first deposited as a first electrode 04 on the surface of the contact layer 03 exposed in the previous step, and then an electrode pattern is defined, and the electrode is removed by a mask and etching.
  • the contact layer exposes a portion of the surface of the solar cell material layer 02.
  • the GaAs contact layer 03 can be selectively etched using a mixture of citric acid and hydrogen peroxide.
  • an anti-reflection film 06 is vapor-deposited on the surface of the exposed solar cell material layer 02.
  • the specific method is as follows: First, an anti-reflection film is deposited on the surface of the exposed solar cell material layer 02 and the surface of the first electrode 04, and then the photoresist is used to cover the portion outside the electrode, and concentrated hydrofluoric acid is used. The solution etches the anti-reflection film over the electrode and finally removes the photoresist. Thereafter, a second electrode was fabricated in accordance with the structure of a specific III-V compound solar cell.
  • a GaAs cap layer is grown, and a GalnP sacrificial layer is grown on the GaAs cap layer, and the first electrode is wet etched.
  • the sacrificial layer GalnP is removed and stopped on the surface of the GaAs layer. Since the etching of the GalnP solution does not etch the GaAs layer, the GaAs contact layer can be maintained. Atomic level flatness improves photoelectric conversion efficiency.
  • the GaAs contact layer absorbs light
  • the GaAs contact layer needs to be removed after the first electrode is completed, and in the present invention, the GaAs contact layer can be grown thin due to the protection of the GalnP sacrificial layer, so that GaAs is removed.
  • the contact layer is used, the lateral etching is small, and the reliability of the first electrode is ensured, so that the AuGe line width can be made smaller, the shading area is reduced, and the photoelectric conversion efficiency is improved.
  • the structure of an efficient four-junction solar cell includes a first sub-cell 4100, a second sub-cell 4200, a third sub-battery 4300, and a fourth sub-battery 4400. They are connected by tunneling junctions 4501, 4502, and 4503.
  • the first sub-cell 4100 has a growth substrate 4001 as a base region 4120, and an n-type ion-forming emitter region 4130 is formed on the front surface of the p-type substrate to form the first sub-cell, the band gap of which is 1. 3 - 1.5 eV.
  • Four-junction The order of the batteries from bottom to top is: fourth sub-cell, third sub-cell, first sub-cell, second sub-cell.
  • the growth substrate 4001 is double-sided polished and has a thickness of less than or equal to 200 microns.
  • a P-type, 200 micron thick InP substrate having a doping concentration of 2 X 10" cm - 3 to 5 X 10" cm - 3 is preferred as the base of the first sub-cell 4100.
  • Area 4120. Phosphorus is diffused on the front surface of the substrate 001 to form an n-type emitter region 4130 of the first subcell, thereby obtaining a first subcell 4100 having a band gap of 1.35 eV and a diffusion thickness of preferably 100 nm.
  • a p-type ⁇ n ⁇ is epitaxially grown on the back surface of the growth substrate (ie, the surface of the first sub-cell base region 4120) as the back field layer 4110 of the first sub-cell having a thickness of 100 nm and a doping concentration of 1 ⁇ 10 18 .
  • An n-type ⁇ n ⁇ is epitaxially grown on the surface of the emitter region 4130 as a first sub-cell window layer 4140 having a thickness of 25 nm and a doping concentration of about 1 ⁇ 10 18 cm -3 .
  • a tunneling junction 4501 is formed on the first sub-cell window layer 4140 for connecting the first sub-cell 4100 to the second sub-cell 4200.
  • the material is preferably p++_InGaP/n++-InGaP, the thickness is 50 nm, and the doping concentration is as high as 2 x 10" cm- 3 .
  • a graded buffer layer 4600 is formed over the tunnel junction with a band gap of 1.5 - 1.8 eV, and the group distribution ratio is changed from lattice matching with the first subcell to lattice matching with the second subcell.
  • the material is preferably P-type InGaP, which comprises a 6-layer structure each having a thickness of 250 nm and a doping concentration of about 1 x 10 18 cm -3 , wherein the percentage of Ga is increased from 0 to 0.28.
  • the back field layer 4210 of the second subcell is formed over the graded buffer layer.
  • the material is a P-type InGaP having a thickness of 50 nm and a doping concentration of 1 to 2 ⁇ 10 18 cm - 3 .
  • the second sub-cell is formed on the back field layer 4210 with a band gap of 1.8 - 2. 0 eV, which is the top cell of the four-junction solar cell.
  • P-type In is preferable. . 4 Al. 6 As as base 4220
  • n-type In. . 4 Al. 6 As as the emission layer 4230 the band gap is 1.92 eV.
  • the base region 4220 has a thickness of 2 micrometers and a graded doping method with a concentration of 1.5 ⁇ 10" cm - 3 to 5 X 10"cm" 3
  • the emitter region 4230 has a thickness of 100 nm and a doping concentration of about 2 > ⁇ 10 18 cm - 3.
  • the second sub-cell window layer 240 is formed on the emitter region 4230, and the material thereof is preferably InAlAsP.
  • a tunneling junction 4502 is formed on a lower surface of the back field layer 4110 of the first battery for connecting the third battery to the first sub-electric Pool.
  • the material is preferably P++_InP / n++-InP, has a thickness of 50 nm, and has a doping concentration of up to 1 ⁇ 10" cm -3 .
  • the second sub-battery is formed on the tunneling junction 4502, and has a band gap of 0.9 to 1. 2 eV.
  • n-type InP is preferably used as the material of the window layer 4340, and has a thickness of 40 nm and a doping concentration of about 1 ⁇ 10 18 cm - 3 ; n-type InGaAsP and p-type InGaAsP are selected as the region 4320 and the emitter region, respectively.
  • the band gap is 1 eV
  • the base region 4320 has a thickness of 3 ⁇ m
  • the doping concentration is 5 ⁇ 10" cm - 3
  • the emitter region 4330 has a thickness of 100 nm
  • the doping concentration is 2 ⁇ 10 18 cm- 3
  • InP is selected as the material of the back field layer 310, the thickness is 50 nm, and the doping concentration is l ⁇ 2 x l 0 18 cm - 3 .
  • a tunneling junction 4503 is formed below the back field layer of the third subcell for connecting the fourth subcell to the third subcell.
  • p++/n++-GaAs is preferred. . 5 Sb. 5.
  • the fourth sub-battery is formed under the tunnel junction 4503, and has a band gap of 0.6-0.9 nV, which is the bottom battery of the four-junction solar cell.
  • n-type InP is preferably used as the material of the window layer 4440, and has a thickness of 40 nm and a doping concentration of about 1 ⁇ 10 18 cm ⁇ 3 ; n-type In is selected. . 53 Ga.
  • the band gap is 0. 6 eV
  • the base region 4420 has a thickness of 2 ⁇ m
  • the doping concentration is 2 ⁇ 10" cm - 3 ⁇ 5 ⁇ 10" cm - 3
  • the emitter region 4430 has a thickness of 200 nm, and its doping concentration is 1 x 10 18 cm - 3 ⁇ 2 ⁇ 10 18 cm - 3
  • InP is selected as the material of the back field layer 4410, the thickness is 50 nm, doping concentration It is 1 ⁇ 2 ⁇ 10 18 cm- 3 .
  • a layer of heavily doped n++-InAlAsP is deposited over the top cell (ie, the second subcell 4200) as a capping layer 4700 over the second subcell having a thickness of 500 nm and a doping concentration of 1 ⁇ 10" cm- 3
  • a layer of InP is extended as a back contact layer 4800 under the bottom cell (ie, the fourth sub-cell) to form a four-junction solar cell.
  • the sub-cells having different band gaps are epitaxially grown on both sides of the substrate in a high-to-low order on the double-sided polishing substrate, and the first subcell lattice is not
  • a matching second subcell is grown above, a gradient buffer layer is used between the first and second subcells to slowly release stress, reducing dislocation density; third and fourth subcells matching the first subcell lattice Growing below, the band gap of each sub-battery is reasonably configured to broaden the spectral absorption range of the solar cell, forming a highly efficient four-junction solar cell with current matching and high lattice quality.
  • Other embodiments provide a process for preparing a high-concentration multi-junction solar cell including sub-cells 4100, 4200, 4300, 4400 and a process of forming layers between the sub-cells.
  • the lattice constant and electrical properties in the semiconductor structure are controlled according to appropriate growth temperatures and times and by the use of appropriate chemical compositions and dopants.
  • Vapor deposition methods such as Techniques such as MOCVD and MBE, but M0CVD is preferred as the growth technique of the present invention.
  • the specific preparation process includes the following steps: In the first step, a double-sided polished substrate 4001 is provided. In this embodiment, a double-sided polished InP substrate having a p-type thickness of 200 ⁇ m is selected, and the doping concentration thereof is 1 ⁇ 10 17 cm - 3 to 5 X 10 17 cm - 3 .
  • a first sub-battery 4100 is formed with a band gap of 1.3 to 1.5 eV.
  • the growth substrate 4001 itself is used as the base region 4120, and phosphorus is diffused on the front surface of the substrate 4001 to form an n-type emitter region 4130, thereby obtaining a first subcell having a band gap of 1.35 eV, diffusion.
  • the thickness is preferably 100 nm.
  • An n-type ⁇ n ⁇ is grown on the emitter region 4130 as a window layer 4140 having a thickness of 25 nm and a doping concentration of about 1 ⁇ 10 18 cm -3 .
  • heavily doped p++-InGaP/n++-InGaP is epitaxially grown over the first subcell as a tunneling junction 4501 having a thickness of 50 nm and a doping concentration of up to 2 ⁇ 10" cm- 3 , for connecting the first sub-battery to the second sub-battery.
  • a graded buffer layer 4600 is formed over the tunnel junction 4501 with a band gap of 1.5 to 1.8 eV.
  • the graded buffer layer 4600 comprises a 6-layer structure, each layer having a thickness of 250 nm, and a p-type InGaP is selected as the material thereof, wherein the percentage of Ga is increased from 0 to 0.28, and the doping concentration is about lx 10 18 . Cm- 3 .
  • a second subcell is epitaxially grown over the graded buffer layer with a band gap of 1.8 to 2 eV.
  • the specifics are as follows: epitaxially growing a p-type InGaP as a back field layer 4210 of the second sub-cell, having a thickness of 50 nm and a doping concentration of 1 ⁇ 2 X 10 18 cm - 3 ; The p-type In is epitaxially grown over the back field layer 4210 of the subcell. . 4 Al.
  • the band gap is 1.92 eV, the thickness is 2 micrometers, and the gradient is doped with a concentration of 1 ⁇ 5 x l0"cm- 3 ; epitaxial growth is performed over the base region 4220 of the second subcell.
  • the type of In. 4 Al.. 6 As is an emitter region 4230 having a thickness of 100 nm and a doping concentration of about 2 x 10 18 cm- 3 ; epitaxially growing a window layer 4240 as a second subcell over the emitter region 230,
  • the material thereof is preferably InAlAsP.
  • heavily doped n-type InAlAsP is epitaxially grown over the window layer 4240 as a capping layer 4700 having a thickness of 500 nm and a doping concentration of 1 ⁇ 10" cm - 3 .
  • a p-type ⁇ n ⁇ is epitaxially grown on the back surface of the green substrate 4001 as the back field layer 4110 of the first sub-cell, and has a thickness of 100 nm and a doping concentration of 1 to 2 ⁇ 10 18 . Cm- 3 .
  • P++-InP/n++-InP is epitaxially grown under the first sub-battery back field layer 4110 as a tunnel junction 4502 having a thickness of 50 nm and a doping concentration of up to 2 ⁇ 10" cm- 3 , for connecting the third sub-battery to the first sub-battery.
  • a third sub-cell is epitaxially grown under the tunnel junction 4502 with a band gap of 0.9-1.2 eV.
  • the specifics are as follows: Epitaxially growing a layer of n-type InP under the tunneling junction 4502 as a window layer 4340 of the third sub-cell, having a thickness of 40 nm, a doping concentration of about 1 ⁇ 10 18 cm- 3 ; in the window layer 4340
  • the epitaxial growth emitter region 4330 and the base region 4320 are epitaxially grown, and n-type InGaAsP and p-type InGaAsP are selected as the base region 4320 and the emitter region 4330, respectively, and the thickness of the base region is 3 micron, doping concentration is 5 x 10" cm- 3 , the thickness of the emitter is 100 nm, the doping concentration is 2 > ⁇ 10 18 cm - 3 ; a layer of InP is epitaxially grown below the base region as the third sub- The
  • heavily doped p++ GaA S is epitaxially grown under the third subcell. . 5 Sb. . 5 /n++-GaAs. . 5 Sb. 5 as a tunnel junction 4503 having a thickness of 50 nm and a doping concentration of up to 2 x 10" cm- 3 for connecting the fourth subcell to the third subcell.
  • a fourth sub-cell is epitaxially grown under the tunnel junction 4503 with a band gap of 0.6-0.9 eV.
  • the specifics are as follows: An n-type InP is epitaxially grown under the tunnel junction 4503 as a window layer 4440 of the third sub-cell, having a thickness of 40 nm, a doping concentration of about 1 10 18 cm- 3 ; under the window layer 4440 Epitaxial growth emitter region 4430 and base region 4420 are selected as n-type In, respectively. . 53 Ga. 47 As and p-type p-In. . 53 Ga.
  • the base region 4420 and the emitter region 4430 has a thickness of 2 ⁇ m, a doping concentration of 2 10 17 cm - 3 to 5 10" cm - 3 , and an emitter region thickness of 4200 legs, and the doping concentration is 1 10 18 cm - 3 ⁇ 2 10 18 cm- 3 ; epitaxially growing a layer of InP as the back field layer 4410 of the third subcell under the base region, having a thickness of 50 nm and a doping concentration of 1 ⁇ 10 18 cm - 3 ⁇ 2 ⁇ 10 18 cm- 3 .
  • a layer of InP is epitaxially grown under the back field layer 410 of the fourth sub-cell as a back contact layer.
  • the surface of the sample can be subjected to anti-reflection vapor deposition, metal electrode preparation and other post-processes to complete the required solar cell.
  • In 0 . 4 Al 0 . 6 As (l.92 eV) / InP (l.35 eV) / InGaAsP (Pb) prepared by double-sided growth on a double-sided polished InP substrate ( 1 eV) /Instance. 53 Ga opposition. 4v As (0.6 eV) four-junction solar cell, which effectively broadens the absorption spectrum range and increases the current matching between the individual junction cells.

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Abstract

A manufacturing method of a solar cell comprises: forming a first sub-cell on a first surface of a substrate, the first sub-cell having a first band gap; forming a gradient buffer layer on the first sub-cell, the gradient buffer layer having a second band gap greater than the first band gap; forming a second sub-cell on the gradient buffer layer, the second sub-sell having a third band gap greater than the second band gap; forming a third sub-cell on a second surface of the substrate, the third sub-cell having a fourth band gap smaller than the first band gap; forming a fourth sub-cell below the third sub-cell, the fourth sub-cell having a fifth band gap smaller than the fourth band gap; and forming a back contact layer below the fourth sub-cell in an epitaxial way.

Description

太阳能电池, ***, 及其制作方法  Solar cell, system, and manufacturing method thereof
相关申请 Related application
本申请主张如下优先权: 中国发明专利申请号 201110189612. 6 , 题为 "一种倒置太阳能 电池制作方法", 于 2011年 7月 7曰提交; 中国发明专利申请号 201110219051. X, 题为 "一 种高效四结太阳能电池及其制作方法", 于 2011 年 8 月 2 曰提交; 中国发明专利申请号 201110223521. X, 题为 "一种太阳能电池的制作方法" , 于 2011年 8月 5 曰提交; 中国发明 专利申请号 201110234544. 0 , 题为 "一种高效四结太阳能电池及其制作方法" , 于 2011年 8 月 16 曰提交。 上述申请的全部内容通过引用结合在本申请中。  This application claims the following priority: Chinese Invention Patent Application No. 201110189612. 6 , entitled "An Inverted Solar Cell Manufacturing Method", submitted on July 7, 2011; Chinese Invention Patent Application No. 201110219051. X, entitled "One High-efficiency four-junction solar cell and its manufacturing method", filed on August 2, 2011; Chinese invention patent application number 201110223521. X, entitled "How to make a solar cell", submitted on August 5, 2011 China Invention Patent Application No. 201110234544. 0, entitled "A High Efficiency Four-junction Solar Cell and Its Manufacturing Method", submitted on August 16, 2011. The entire contents of the above application are incorporated herein by reference.
技术领域 Technical field
本发明属于太阳能电池领域, 具体涉及一种太阳能电池, ***, 及其制作方法。  The invention belongs to the field of solar cells, and in particular relates to a solar cell, a system, and a manufacturing method thereof.
背景技术 Background technique
由于煤、 石油等不可再生能源的逐渐枯竭及其不断造成的环境恶化, 人类迫切需要使用 绿色能源为人们解决所面临的巨大问题。 利用光电转换技术制造的太阳能电池可将太阳能直 接转换为电能, 这在很大程度上减少了人们生产生活对煤炭、 石油及天然气的依赖, 成为利 用绿色能源的最有效方式之一。 虽然在大规模应用和工业生产中硅基太阳能电池占据主导地 位, 然而单结太阳电池只能吸收特定光谱范围的太阳光, 其转换效率不高。 如果用不同带隙 宽度 Eg的材料制备成多结太阳电池, 并将这些材料按 Eg大小从上到下叠合起来, 就构成多结叠 层太阳电池。 让它们分别选择性地吸收和转换太阳光谱的不同子域, 就可以大幅度提高太阳 电池的光电转换效率。 Due to the gradual depletion of non-renewable energy sources such as coal and oil and the resulting environmental degradation, human beings urgently need to use green energy to solve the huge problems they face. Solar cells fabricated using photoelectric conversion technology can directly convert solar energy into electrical energy, which greatly reduces the dependence of people's production and life on coal, oil and natural gas, and is one of the most effective ways to use green energy. Although silicon-based solar cells dominate in large-scale applications and industrial production, single-junction solar cells can only absorb sunlight in a specific spectral range, and their conversion efficiency is not high. If the prepared materials with different band gaps E g into a multi-junction solar cell, and the size of these materials by E g stacked together from top to bottom, constitute multi-junction tandem solar cells. By selectively absorbing and transforming different sub-domains of the solar spectrum, the photoelectric conversion efficiency of the solar cell can be greatly improved.
目前世界上研究最广泛和最深入的是 III-V族化合物半导体基多结太阳电池,它同时具有 耐高温性能、 抗辐射能力强、 温度特性好等优点, 已经成为对价格不敏感的空间光伏电源的 主流技术。 近些年来, 随着聚光光伏技术的发展, πι-ν族合物半导体太阳能电池因其高光电 转换效率而越来越受到关注。 聚光光伏技术通过将一块面积较大的太阳光进行高倍率聚光、 浓缩后照射到一个面积比较小的太阳能光伏电池上发电, 从而大规模节约太阳能电池晶片。 该装置利用大面积、 便宜的聚光装置来代替昂贵而且供应紧张的电池芯片, 进而达到大幅度 降低太阳能光伏发电成本的目的, 使太阳能光伏发电具有跟常规能源竟争的能力。 因此基于 I I I-V族化合物半导体多结太阳能电池的聚光光伏技术已经成为很有巿场前景的光伏技术。  At present, the most extensive and in-depth research in the world is the III-V compound semiconductor-based multi-junction solar cell, which has the advantages of high temperature resistance, strong radiation resistance, good temperature characteristics, etc., and has become a price-insensitive space photovoltaic. The mainstream technology of power supply. In recent years, with the development of concentrating photovoltaic technology, πι-ν family semiconductor solar cells have attracted more and more attention due to their high photoelectric conversion efficiency. The concentrating photovoltaic technology saves solar cell wafers on a large scale by concentrating a large area of sunlight, concentrating it, and irradiating it onto a relatively small solar photovoltaic cell to generate electricity. The device utilizes a large-area, inexpensive concentrating device to replace expensive and tightly-charged battery chips, thereby achieving the goal of greatly reducing the cost of solar photovoltaic power generation, and enabling solar photovoltaic power generation to compete with conventional energy sources. Therefore, concentrating photovoltaic technology based on I I I-V compound semiconductor multi-junction solar cells has become a promising photovoltaic technology.
InGaP/GaAs /Ge三结太阳能电池是目前较成熟高效的 I I I-V族化合物半导体多结太阳能 电池, 该类型太阳能电池的各个子电池的晶格常数基本匹配, 且带隙宽度从上而下分别是: InGaP为〜 1. 86eV, GaAs为〜 1. 42eV, Ge为〜 0. 78eV, 可以较有效利用太阳光谱, 其转换效 率(AMI. 5)已高达 32% (美国光谱实验室), 而在聚光条件下, 其效率为 41. 6%。 另外, Emcore 公司发明的倒置结构 GalnP/GaAs/InGaAs多结太阳能电池也被认为是一个很有应用前景的电 池结构。 使用带隙匹配的设计, 在 AMO, lsun情况下倒置结构 GalnP/GaAs/InGaAs多结太阳 能电池实现了 32%的转换效率, 高倍聚光条件( 500 X , AMI.5)下其转换效率也可以大于 40%。 The InGaP/GaAs/Ge triple junction solar cell is a relatively mature and efficient II IV compound semiconductor multi-junction solar cell. The cell constants of the sub-cells of this type of solar cell are basically matched, and the band gap width is from top to bottom. : InGaP is ~ 1.86eV, GaAs is ~ 1.42eV, Ge is ~ 0. 78eV, can use solar spectrum more effectively, its conversion efficiency (AMI. 5) has been as high as 32% (American Spectroscopic Laboratory), and 6%。 Under concentrating conditions, the efficiency was 41.6%. In addition, Emcore The inverted structure GalnP/GaAs/InGaAs multi-junction solar cell invented by the company is also considered to be a promising battery structure. Using a band-gap matching design, the GalnP/GaAs/InGaAs multi-junction solar cell has an conversion efficiency of 32% in the case of AMO and lsun, and its conversion efficiency can also be achieved under high-concentration conditions (500 X, AMI.5). More than 40%.
对于上述三结太阳能电池来说, GalnP顶电池吸收光子能量大于 1.83eV的太阳光, 即波长 λ ό Ο腿的光谱短波区; GaAs中电池吸收光子能量大于 1.42eV的太阳光, 即波长 λ2<873腿 的光谱中波区; Ge底电池吸收光子能量大于 0.66eV的太阳光, 即波长 λ 3<1879腿的光谱中长 波区。 For the above three-junction solar cell, the GalnP top cell absorbs sunlight having a photon energy greater than 1.83 eV, that is, a spectral short-wavelength region of the wavelength λ Ο Ο leg; the GaAs cell absorbs sunlight having a photon energy greater than 1.42 eV, that is, the wavelength λ 2 <873 The spectral mid-wave region of the leg; the Ge bottom cell absorbs sunlight with a photon energy greater than 0.66 eV, ie a long-wavelength region in the spectrum of the wavelength λ 3 <1879 leg.
化合物半导体太阳电池一般釆用气相外延技术或者液相外延技术在 Ge、 Si或 GaAs等衬 底上依次外延太阳电池各层结构, 然后利用外延好结构的太阳电池外延片制备成太阳电池芯 片。  The compound semiconductor solar cell is generally epitaxially epitaxially grown on a substrate such as Ge, Si or GaAs by a vapor phase epitaxy technique or a liquid phase epitaxy technique, and then a solar cell chip is prepared by using an epitaxial wafer of a well-structured solar cell.
发明内容 Summary of the invention
在一方面,提出一种实现倒置结构多结太阳能电池衬底重复利用的方法,其包括如下步骤: (1)提供一生长衬底; (2)在所述生长衬底表面沉积一层 Si02掩膜层, 形成图形化衬底; (3) 在图形化衬底上外延生长一层牺牲层, 所述牺牲层将整个 Si02掩膜图形包围起来; (4)在牺 牲层上外延生长一缓冲层; (5) 在缓冲层上外延生长倒置太阳能电池的半导体材料层序列; (6)将前述倒置太阳能电池的半导体材料层序列与支撑基板键合; (7)釆用湿法蚀刻选择性 腐蚀掉 Si02掩膜层; (8)釆用湿法蚀刻选择性腐蚀掉牺牲层, 剥离衬底。 In one aspect, a method for achieving re-use of an inverted structure multi-junction solar cell substrate is provided, comprising the steps of: (1) providing a growth substrate; (2) depositing a layer of Si0 2 on the surface of the growth substrate. a mask layer, forming a patterned substrate; (3) epitaxially growing a sacrificial layer on the patterned substrate, the sacrificial layer enclosing the entire SiO 2 mask pattern; (4) epitaxial growth on the sacrificial layer a buffer layer; (5) epitaxially growing a semiconductor material layer sequence of the inverted solar cell on the buffer layer; (6) bonding the semiconductor material layer sequence of the inverted solar cell to the support substrate; (7) using wet etching selectivity The Si0 2 mask layer is etched away; (8) The sacrificial layer is selectively etched away by wet etching, and the substrate is stripped.
在一些实施例中, 生长衬底的材料为 Ge或 GaAs。 在一些实施例中, 所述步骤( 2 ) 中形成 的 Si02掩膜层的图形为单方向平行, 或者纵横交错, 或者彼此交叉。 在一些实施例中, 所述 步骤(3) 中半导体牺牲层的材料为 InGaP或 AlGaAs。 在一些实施例中, 所述步骤( 6 ) 中的支 撑基板为 Si片。 在一些实施例中, 所述步骤(6)包括如下步骤: 在倒置太阳能电池的半导体 材料层表面沉积一第一金属键合层; 提供一 Si外延片, 在其表面形成一层高掺杂(In)GaAs覆 盖层; 在覆盖层上沉积一第二金属键合层; 通过键合工艺将倒置太阳能电池的半导体材料层 序列和 Si片粘结在一起。 在一些实施例中, 所述步骤(7) 中釆用氢氟酸选择性腐蚀掉 Si02掩 膜层。 在一些实施例中, 所述步骤(7) 中釆用氟化铵选择性腐蚀掉 Si02掩膜层。 在一些实施 例中, 所述步骤 ) 中釆用盐酸与磷酸体积比 1: 2作为选择性蚀刻液, 蚀刻牺牲层。 In some embodiments, the material of the growth substrate is Ge or GaAs. In some embodiments, the patterns of the SiO 2 mask layers formed in the step (2) are unidirectionally parallel, or crisscrossed, or intersect each other. In some embodiments, the material of the semiconductor sacrificial layer in the step (3) is InGaP or AlGaAs. In some embodiments, the support substrate in the step (6) is a Si wafer. In some embodiments, the step (6) comprises the steps of: depositing a first metal bonding layer on the surface of the semiconductor material layer of the inverted solar cell; providing a Si epitaxial wafer to form a high doping layer on the surface thereof ( In) a GaAs cap layer; depositing a second metal bonding layer on the cap layer; bonding the semiconductor material layer sequence of the inverted solar cell and the Si wafer together by a bonding process. In some embodiments, in the step (7), the SiO 2 mask layer is selectively etched with hydrofluoric acid. In some embodiments, in the step (7), the SiO 2 mask layer is selectively etched with ammonium fluoride. In some embodiments, in the step), the sacrificial layer is etched by using a ratio of hydrochloric acid to phosphoric acid of 1:2 as a selective etching solution.
在一些实施例中, 釆用 Si02作掩膜层, 随后通过湿法蚀刻选择性腐蚀掉 Si02掩膜层使得牺 牲层内产生很多孔隙, 增加了用于去除牺牲层的选择性蚀刻液与牺牲层的接触面积, 提高了 牺牲层的腐蚀速率, 降低了衬底剥离的难度。 In some embodiments, SiO 2 is used as a mask layer, followed by selective etching of the SiO 2 mask layer by wet etching to cause a large number of voids in the sacrificial layer, and a selective etching solution for removing the sacrificial layer is added. The contact area of the sacrificial layer increases the corrosion rate of the sacrificial layer and reduces the difficulty of substrate peeling.
根据本发明的一些实施例,可以更为简单地完成倒置结构多结太阳能电池与衬底的分离, 实现衬底的重复利用, 从而降低太阳能电池的生产成本。 在另一方面, 提出了一种四结太阳能电池的结构和制造方法。 因三结太阳能电池的 Ge底 电池大量吸收低能光子, 产生的光电流要远大于顶电池和中电池。 而对于叠层电池, 各个子 电池的电流相等时效率才会最高, 电流不匹配会带来电流的复合损失, 降低效率。 倒装生长 的 GalnP/GaAs/InGaAs三结太阳能电池能够有效解决电流匹配的问题,但是其后期工艺复杂, 且对低能光子的吸收有所减弱。 因此, 解决这个问题的有效方法之一是在中电池和底电池之 间再***一结带隙为 1. OeV左右的子电池, 这样获得的四结太阳能电池, 比三结电池时电流 更加匹配, 并且结数的增加可以更加细分太阳光谱, 增加效率。 According to some embodiments of the present invention, the separation of the inverted structure multi-junction solar cell from the substrate can be completed more simply, and the substrate can be reused, thereby reducing the production cost of the solar cell. In another aspect, a structure and method of fabricating a four junction solar cell is presented. Because the Ge-bottom battery of the three-junction solar cell absorbs a large amount of low-energy photons, the photocurrent generated is much larger than that of the top cell and the middle cell. For a laminated battery, the efficiency of each sub-battery is the highest when the currents are equal, and the current mismatch will bring a composite loss of current and reduce the efficiency. The flip-grown GalnP/GaAs/InGaAs triple junction solar cell can effectively solve the problem of current matching, but its late process is complicated and the absorption of low energy photons is weakened. Therefore, one of the effective methods for solving this problem is to insert a sub-cell with a junction band gap of about 1. OeV between the middle battery and the bottom battery, so that the obtained four-junction solar cell has a more matching current than the three-junction battery. , and the increase in the number of knots can further subdivide the solar spectrum and increase efficiency.
在一些实施例中, 一种高效四结太阳能电池包括: InP 生长衬底; 一第一子电池, 形成 于生长衬底上, 其具有第一能带隙, 晶格常数与衬底晶格匹配; 一第二子电池, 形成于第一 子电池的, 且具有比第一能带隙大的第二能带隙, 晶格常数与衬底晶格匹配; 一第三子电池, 形成于第二子电池上, 且具有比第二能带隙大的第三能带隙, 晶格常数与衬底晶格匹配; 一 组分渐变层, 形成于第三子电池上, 且具有比第三能带隙大的第四能带隙; 一第四子电池, 形成于组分渐变层上, 且具有比所述第三能带隙大的第五能带隙, 晶格常数与衬底晶格失配。  In some embodiments, a high efficiency four-junction solar cell includes: an InP growth substrate; a first subcell formed on a growth substrate having a first energy band gap and a lattice constant matching the substrate lattice a second sub-battery formed on the first sub-cell and having a second energy band gap larger than the first energy band gap, the lattice constant matching the substrate lattice; a third sub-cell formed in the first a second sub-cell having a third energy band gap larger than a second energy band gap, the lattice constant matching the substrate lattice; a composition gradient layer formed on the third sub-cell and having a third ratio a fourth energy band gap having a large band gap; a fourth sub-cell formed on the compositionally graded layer and having a fifth band gap larger than the third band gap, a lattice constant and a substrate crystal Mismatch.
在另一方面, 提供了一种高效四结太阳能电池的制造方法, 其包括: 提供一 InP生长衬 底; 在所述生长衬底上形成第一子电池, 其具有第一能带隙, 晶格常数与衬底晶格匹配; 在 所述第一子电池上形成第二子电池, 其具有比第一能带隙大的第二能带隙, 晶格常数与衬底 晶格匹配; 在所述第二子电池上形成第三子电池, 其具有比第二能带隙大的第三能带隙, 晶 格常数与衬底晶格匹配; 在所述第三子电池上形成组分渐变层, 其具有比第三能带隙大的第 四能带隙; 在所述组分渐变层上形成第四子电池, 其具有比所述第三能带隙大的第五能带隙, 晶格常数与衬底晶格失配。  In another aspect, a method of fabricating an efficient four-junction solar cell is provided, comprising: providing an InP growth substrate; forming a first subcell having a first energy band gap, crystal on the growth substrate a lattice constant matching the substrate; forming a second subcell on the first subcell having a second energy band gap greater than a first energy band gap, the lattice constant matching the substrate lattice; Forming, on the second sub-cell, a third sub-cell having a third energy band gap larger than a second energy band gap, wherein a lattice constant is lattice-matched with the substrate; forming a component on the third sub-cell a graded layer having a fourth band gap larger than a third band gap; forming a fourth subcell having a fifth band gap larger than the third band gap on the compositionally graded layer , the lattice constant is mismatched with the substrate lattice.
举例来说, 在所述衬底上形成与 InP衬底晶格匹配, 带隙为 0.72 ~ 0.76 eV的 InGaAs第一 子电池; 在所述的第一子电池上形成与 InP衬底晶格匹配, 带隙为 0.9 - 1. 1 eV附近的 In a^ASyP^第二子电池; 在所述的第二子电池上形成带隙为 1. 31eV的 InP第三子电池; 在所 述的第三子电池上形成 AlSbzASl_z,渐变层, 该层的组分配比从与 InP衬底晶格匹配, 能带隙为 1.9eV附近的 AlSb。.44As。.56逐渐变到 AlAs; 在所述的 In组分渐变的 InGaP层上形成晶格常数大于 衬底, 带隙为 1.8— 2. 0 eV的 In。.485Ga。.515P第四子电池。 For example, an InGaAs first subcell having a lattice matching of an InP substrate and a band gap of 0.72 to 0.76 eV is formed on the substrate; forming a lattice match with the InP substrate on the first subcell; a second sub-cell having a band gap of 0.9 - 1. 1 eV, and an InP third sub-cell having a band gap of 1.31 eV; AlSb z A Sl _ z is formed on the three sub-cells, and the layer distribution ratio of the layer is lattice-matched from the InP substrate, and the energy band gap is AlSb around 1.9 eV. . 44 As. 56 is gradually changed to AlAs; In on the In composition of the In composition is graded on the InGaP layer to form an In which has a lattice constant larger than that of the substrate and a band gap of 1.8 to 2.0 eV. . 485 Ga. . 515 P fourth sub-battery.
不同于在 Ge衬底上形成 InGaP/GaAs/InGaNAs/Ge四结太阳能电池和在 GaAs衬底上形成具 有两个变质层的四结倒置变质多结太阳能电池的技术,一些实施例提出在 InP衬底上实现四结 太阳能电池结构。 此四结太阳能电池釆用正向生长结构, 便于器件制备; 各子电池能带隙排 列适合, 以及底部三个子电池的晶格与衬底完全匹配等优点; 并通过组分渐变的 AlSbzASl_z, , 可将顶上 InGaP子电池的穿透位错密度控制在 106 cm- 2量级以内, 使该子电池的效率损失最小 化。 Unlike the technique of forming an InGaP/GaAs/InGaNAs/Ge four-junction solar cell on a Ge substrate and forming a four-junction inverted metamorphic multi-junction solar cell having two altered layers on a GaAs substrate, some embodiments are proposed in the InP lining A four-junction solar cell structure is realized on the bottom. The four-junction solar cell adopts a forward growth structure to facilitate device preparation; the sub-cells have a band gap arrangement suitable, and the lattices of the bottom three sub-cells are perfectly matched with the substrate; and the composition is graded by AlSb z A Sl _ z , , can control the threading dislocation density of the top InGaP sub-cell within 10 6 cm - 2 to minimize the efficiency loss of the sub-cell Chemical.
一些实施例提供另外一种太阳能电池的制作方法, 其包括: 提供一生长衬底; 在所述生 长衬底上层叠半导体材料层序列, 其依次包括 πι-ν族化合物太阳能电池材料层、接触层和牺 牲层; 釆用湿法蚀刻法完全蚀刻牺牲层, 蚀刻停止在接触层的表面, 露出接触层的表面; 在 接触层表面上蒸镀一第一电极, 定义电极图形, 蚀刻掉电极之外的接触层; 制作一第二电极。  Some embodiments provide a method of fabricating another solar cell, comprising: providing a growth substrate; stacking a semiconductor material layer sequence on the growth substrate, which in turn comprises a πι-ν compound solar cell material layer, a contact layer And sacrificial layer; 完全 completely etching the sacrificial layer by wet etching, etching stops on the surface of the contact layer, exposing the surface of the contact layer; depositing a first electrode on the surface of the contact layer, defining an electrode pattern, etching away the electrode a contact layer; a second electrode is fabricated.
一些实施例提供另外一种高效四结太阳能电池的制备方法, 其包括如下步骤: 提供一双 面抛光衬底, 用于半导体外延生长; 在所述衬底正面形成第一子电池, 其具有第一带隙; 在 所述第一子电池上方形成渐变缓冲层, 其具有大于第一带隙的第二带隙; 在所述的渐变缓冲 层上方形成第二子电池; 其具有大于第二带隙的第三带隙; 在所述衬底的背面形成第三子电 池, 其为倒装生长, 具有小于第一带隙的第四带隙; 在所述的第三子电池的下方形成第四子 电池, 其为倒装生长, 具有小于第四带隙的第五带隙; 在所述的第四子电池的下方外延形成 背接触层。  Some embodiments provide a method for fabricating another high efficiency four-junction solar cell, comprising the steps of: providing a double-sided polished substrate for semiconductor epitaxial growth; forming a first sub-cell on the front side of the substrate, having a band gap; forming a gradation buffer layer over the first sub-cell having a second band gap greater than the first band gap; forming a second sub-cell above the gradation buffer layer; a third band gap of the gap; forming a third sub-cell on the back surface of the substrate, which is flip-chip growth, having a fourth band gap smaller than the first band gap; forming a first portion under the third sub-cell A four-cell battery, which is flip-chip grown, has a fifth band gap smaller than the fourth band gap; and a back contact layer is epitaxially formed under the fourth sub-cell.
在一些实施例中, 所述双面抛光衬底优选为 ρ-ΙηΡ衬底。 在一些实施例中, 以衬底本身作 为基区, 在 Ρ型衬底正面注入 η型离子形成发射区, 构成所述第一子电池。 在一些实施例中, 所述双面抛光衬底的厚度小于或等于 200微米。 在一些实施例中, 以衬底本身作为基区, 在 Ρ 型衬底正面注入 η型离子形成发射区, 构成所述第一子电池。 在一些实施例中, 所述渐变缓冲 层为多层结构, 其材料是 I Gai_xP。 在一些实施例中, 所述第一带隙为 1. 3 - 1. 5 eV; 所述第 二带隙为 1. 5 ~ 1. 8 eV; 所述第三带隙为 1. 8 ~ 2 eV; 所述第四带隙为 0. 9 ~ 1. 2 eV; 所述第 五带隙为 0. 6 - 0. 9 eV。 在一些实施例中, 所述第二子电池由 p型 InAlAs基区和 n型 InA lAs发 射区构成, 所述第三子电池由 p型 InGaAsP基区和 n型 InGaAsP发射区构成, 所述第三子电池由 p 型 InGaAsP基区和 n型 InGaAsP构成, 所述第四子电池由 p型 InGaAs基区和 n型 InGaAs发射区构 成。 In some embodiments, the double-sided polished substrate is preferably a p-Ιn substrate. In some embodiments, the n-type ion-forming emitter region is implanted on the front side of the germanium-type substrate with the substrate itself as a base region to constitute the first sub-cell. In some embodiments, the double-sided polished substrate has a thickness of less than or equal to 200 microns. In some embodiments, the n-type ion-forming emitter region is implanted on the front side of the Ρ-type substrate with the substrate itself as a base region to constitute the first sub-cell. In some embodiments, the graded buffer layer is a multilayer structure, the material of which is IG aix P. The second band gap is 1. 8 ~ 2, the first band gap is 1. 3 - 1. 5 eV; the second band gap is 1. 5 ~ 1. 8 eV; The e.g., the fifth band gap is 0. 6 - 0. 9 eV. In some embodiments, the second subcell is composed of a p-type InAlAs base region and an n-type InAsAs emitter region, and the third subcell is composed of a p-type InGaAsP base region and an n-type InGaAsP emitter region, wherein the The three subcells are composed of a p-type InGaAsP base region and an n-type InGaAsP, and the fourth subcell is composed of a p-type InGaAs base region and an n-type InGaAs emitter region.
根据一些实施例, 提供了一种高效四结太阳能电池, 包括: 双面抛光衬底; 第一子电池, 由衬底离子注入形成, 具有一第一带隙; 渐变缓冲层, 形成于第一子电池上方, 具有一大于 第一带隙的第二带隙; 第二子电池, 形成于渐变缓冲层上方, 具有一大于第二带隙的第三带 隙; 第三子电池, 倒装生长于所述衬底的背面, 具有一小于第一带隙的第四带隙; 第四子电 池, 倒装生长于第三子电池下方, 具有一小于第四带隙的第五带隙。  According to some embodiments, an efficient four-junction solar cell is provided, comprising: a double-sided polished substrate; a first sub-cell formed by ion implantation of a substrate, having a first band gap; and a graded buffer layer formed on the first a second sub-cell having a second band gap greater than the first band gap; a second sub-cell formed above the graded buffer layer and having a third band gap greater than the second band gap; the third sub-battery, flip-chip growth A fourth band gap having a smaller than the first band gap is formed on the back surface of the substrate; and the fourth sub-cell is flip-chip grown under the third sub-cell and has a fifth band gap smaller than the fourth band gap.
在一些实施例中, 所述双面抛光衬底是 p-InP衬底。 在一些实施例中, 所述双面抛光衬底 的厚度小于或等于 200 微米。 在一些实施例中, 所述渐变缓冲层为多层结构, 其材料是 I Gai_xP。 在一些实施例中, 所述第一带隙为 1. 3 - 1. 5 eV; 所述第二带隙为 1. 5 - 1. 8 eV; 所述第三带隙为 1. 8 ~ 2 eV; 所述第四带隙为 0. 9 ~ 1. 2 eV; 所述第五带隙为 0. 6 ~ 0. 9 eV。 在一些实施例中, 所述第二子电池由 P型 InAlAs基区和 n型 InAlAs发射区构成; 所述第三子电 池由 p型 InGaAsP基区和 n型 InGaAsP发射区构成; 所述第三子电池由 p型 InGaAsP基区和 n型 InGaAsP构成; 所述第四子电池由 p型 InGaAs基区和 n型 InGaAs发射区构成。 In some embodiments, the double-sided polished substrate is a p-InP substrate. In some embodiments, the double-sided polished substrate has a thickness of less than or equal to 200 microns. In some embodiments, the graded buffer layer is a multilayer structure, the material of which is IG aix P. The second band gap is 1. 8 ~ 2, the first band gap is 1. 3 - 1. 5 eV; the second band gap is 1. 5 - 1. 8 eV; The e.g., the fifth band gap is 0. 6 ~ 0. 9 eV. In some embodiments, the second subcell is composed of a P-type InAlAs base region and an n-type InAlAs emitter region; the third subcell is composed of a p-type InGaAsP base region and an n-type InGaAsP emitter region; The subcell is composed of a p-type InGaAsP base region and an n-type InGaAsP; the fourth subcell is composed of a p-type InGaAs base region and an n-type InGaAs emitter region.
根据一些实施例: 在双面抛光衬底上, 采用双面生长的方法, 将带隙不同的子电池按照 由高到低的顺序外延生长于衬底两面, 与第一子电池晶格不匹配的第二子电池生长于上方, 在第一和第二子电池之间使用了渐变缓冲层来缓慢释放应力, 降低位错密度; 与第一子电池 晶格匹配的第三、 四子电池生长于下方, 合理配置了各子电池的带隙, 拓宽太阳能电池的光 谱吸收范围, 形成了电流匹配, 高晶格质量的高效四结太阳能电池。  According to some embodiments: on a double-sided polished substrate, sub-cells with different band gaps are epitaxially grown on both sides of the substrate in a high-to-low order, which does not match the first subcell lattice. a second subcell is grown above, a gradient buffer layer is used between the first and second subcells to slowly release stress, reducing dislocation density; third and fourth subcell growth lattice matching the first subcell Below, the band gap of each sub-battery is reasonably configured to broaden the spectral absorption range of the solar cell, and a high-efficiency four-junction solar cell with current matching and high lattice quality is formed.
本发明一些实施例的其它特征和优点将在随后的说明书中阐述, 并且, 部分地从说明书 中变得显而易见, 或者通过实施本发明而了解。 本发明的一些实施例目的和其他优点可通过 在说明书、 权利要求书以及附图中所特别指出的结构来实现和获得。  Other features and advantages of some embodiments of the invention will be set forth in the description in the description. The objectives and other advantages of the invention are realized and attained by the <RTIgt;
附图说明 DRAWINGS
附图用来提供对本发明的进一步理解, 并且构成说明书的一部分, 与本发明的实施例一 起用于解释本发明, 并不构成对本发明的限制。 此外, 附图数据是描述概要, 不一定是按比 例绘制,  The drawings are intended to provide a further understanding of the invention, and are intended to be a part of the description of the invention. Further, the drawing data is a summary of the description, and is not necessarily drawn to scale.
图 1 ~图 7为本发明优选实施例一种倒置太阳能电池制作过程的示意图。  1 to 7 are schematic views showing a manufacturing process of an inverted solar cell according to a preferred embodiment of the present invention.
图 8 -图 10为本发明各优选实施例中 Si02掩膜图形的俯视示意图。 8-10 are top plan views of a SiO 2 mask pattern in various preferred embodiments of the present invention.
图 11是表示某些二元材料的能带隙和所属二元材料的晶格常数的曲线图。  Figure 11 is a graph showing the band gap of certain binary materials and the lattice constant of the associated binary material.
图 12是本发明优选实施例一种高效四结太阳能电池的側面剖视图。  Figure 12 is a side cross-sectional view of a high efficiency four junction solar cell in accordance with a preferred embodiment of the present invention.
图 13 -图 14为 I I I-V族太阳能电池的一种传统的制作工艺的示意图。  13 to 14 are schematic views showing a conventional manufacturing process of the I I I-V solar cell.
图 15 ~图 19为本发明优选实施例的一种太阳能电池的制作过程的示意图。  15 to FIG. 19 are schematic views showing a manufacturing process of a solar cell according to a preferred embodiment of the present invention.
图 20是本发明优选实施例一种高效四结太阳能电池的结构示意图.  Figure 20 is a schematic view showing the structure of a high efficiency four-junction solar cell according to a preferred embodiment of the present invention.
图 21 ~图 32是本发明优选实施例一种高效四结太阳能电池的制作流程示意图。  21 to 32 are schematic diagrams showing a manufacturing process of a high efficiency four-junction solar cell according to a preferred embodiment of the present invention.
图中标号包括: 100: 图形化村底; 101 : 生长衬底; 102: Si02掩膜层; 103: 牺牲层; 104: 孔隙; 200: GaAs缓冲层; 201: 倒置太阳能电池半导体材料层序列; 300: 支撑基板; 301 : p 型 S i片; 302: p型 GaAs覆盖层; 303: 第一键合金属层; 304: 第二键合金属层; 2001: 生长 村底; 2100: 第一子电池; 2101 : 第一子电池背场层; 2102: 第一子电池基区; 2103: 第一子 电池发射层; 2104: 第一子电池窗口层; 2200:第二子电池; 2201 : 第二子电池背场层; 2202: 第二子电池基区; 2203: 第二子电池发射层; 2204: 第二子电池窗口层; 2300: 第三子电池; 2301: 第三子电池背场层; 2302: 第三子电池基区; 2303: 第三子电池发射层; 2304: 第三 子电池窗口层; 2400: 第四子电池; 2401: 第四子电池背场层; 2402: 第四子电池基区; 2403: 更正页 (细则第 91条) 第四子电池发射层; 2404 : 第四子电池窗口层; 2501 , 2502 , 2503: 隧穿结; 2600: 组分渐 变层; 2700: GaAs接触层; 01 : 生长衬底; 02 : 太阳能电池材料层; 03: GaAs接触层 ; 04: 第一电极; 05 : Ga lnP牺牲层; 06 : 减反射膜; 4001 : 生长衬底; 4100: 第一子电池; 4110: 第一子电池背场层; 4120: 第一子电池基区; 4130: 第一子电池发射区; 4140: 第一子电池 窗口层; 4200: 第二子电池; 4210: 第二子电池背场层; 4220: 第二子电池基区; 4230: 第 二子电池发射区; 4240: 第二子电池窗口层; 4300: 第三子电池; 4310: 第三子电池背场层; 4320: 第三子电池基区; 4330: 第三子电池发射区; 4340: 第三子电池窗口层; 4400: 第四 子电池; 4410: 第四子电池背场层; 4420: 第四子电池基区; 4430: 第四子电池发射区; 440: 第四子电池窗口层; 4501 , 4502 , 4503: 隧穿结; 4600: 渐变缓冲层; 4700: 盖帽层; 4800: 第四子电池背接触层。 The reference numerals in the figure include: 100: patterned substrate; 101: growth substrate; 102: Si0 2 mask layer; 103: sacrificial layer; 104: pore; 200: GaAs buffer layer; 201: inverted solar cell semiconductor material layer sequence 300: support substrate; 301: p-type S i piece; 302: p-type GaAs cap layer; 303: first bonding metal layer; 304: second bonding metal layer; 2001: growing village bottom; 2100: first Subcell; 2101: first sub-battery backfield layer; 2102: first subcell base; 2103: first subcell emissive layer; 2104: first subcell window layer; 2200: second subcell; 2201: Two sub-battery back field layer; 2202: second sub-battery base; 2203: second sub-battery emission layer; 2204: second sub-battery window layer; 2300: third sub-battery; 2301: third sub-battery back-field layer 2302: third sub-battery base; 2303: third sub-cell emitting layer; 2304: third sub-cell window layer; 2400: fourth sub-cell; 2401: fourth sub-battery back-field layer; 2402: fourth sub- Battery base; 2403: Correction page (Article 91) Fourth sub-cell emissive layer; 2404: fourth sub-cell window layer; 2501, 2502, 2503: tunneling junction; 2600: compositionally graded layer; 2700: GaAs contact layer; 01: growth substrate; 02: solar cell material Layer; 03: GaAs contact layer; 04: first electrode; 05: Ga lnP sacrificial layer; 06: anti-reflection film; 4001: growth substrate; 4100: first sub-cell; 4110: first sub-battery back field layer; 4120: first sub-battery base; 4130: first sub-cell emission area; 4140: first sub-cell window layer; 4200: second sub-battery; 4210: second sub-battery back-field layer; 4220: second sub-battery Base region; 4230: second sub-cell emission region; 4240: second sub-cell window layer; 4300: third sub-cell; 4310: third sub-battery back-field layer; 4320: third sub-battery base; 4330: Three sub-cell emission area; 4340: third sub-cell window layer; 4400: fourth sub-cell; 4410: fourth sub-battery back-field layer; 4420: fourth sub-battery base; 4430: fourth sub-cell emission area; 440: fourth sub-cell window layer; 4501, 4502, 4503: tunneling junction; 4600: gradient buffer layer; 4700 : Cap layer; 4800: Fourth sub-battery back contact layer.
具体实施方式 detailed description
在光伏产业中衬底的成本通常占太阳能电池总成本的 30 ~ 50% , 成为太阳能电池价格昂 贵的主要因素之一。 传统的衬底剥离工艺是单纯利用牺牲层与缓冲层和衬底之间在特定蚀刻 液下具有选择性腐蚀的特点, 在腐蚀过程中蚀刻液只对牺牲层进行选择性腐蚀, 而并不腐蚀 缓冲层和衬底, 从而达到衬底与电池相分离的目的。 由于选择性蚀刻液与牺牲层的接触面积 有限, 传统衬底剥离工艺中通常需要对电池结构施加一定程度的力, 使得腐蚀过程中选择性 刻蚀液与牺牲层接触面积能够逐渐增加, 然而, 由于电池结构材料是脆性的, 所施加的力将 会对电池结构造成一定程度的损伤, 因此难以大规模应用。  The cost of substrates in the photovoltaic industry usually accounts for 30-50% of the total cost of solar cells, which is one of the main factors for the high price of solar cells. The conventional substrate stripping process is characterized by selective etching between a sacrificial layer and a buffer layer and a substrate under a specific etching liquid. In the etching process, the etching liquid selectively etches only the sacrificial layer without corroding. The buffer layer and the substrate are used to achieve separation of the substrate from the battery. Due to the limited contact area between the selective etching solution and the sacrificial layer, a conventional substrate stripping process usually requires a certain degree of force on the battery structure, so that the contact area of the selective etching liquid and the sacrificial layer can be gradually increased during the etching process. Since the battery structural material is brittle, the applied force will cause a certain degree of damage to the battery structure, and thus it is difficult to apply on a large scale.
三结太阳能电池的 Ge 底电池处产生的光电流要远大于顶电池和中电池, 而对于叠层电 池, 各个子电池的电流相等时效率才会最高, 电流不匹配会带来电流的复合损失, 降低效率。 目前解决这个问题的一个主要方法之一是在中电池和底电池之间再***一结与 Ge 衬底和 GaAs材料晶格匹配,带隙为 1. OeV左右的 InGaNAs子电池,从而获得 InGaP/GaAs / InGaNAs /Ge 四结太阳能电池, 这样可以使电流比三结电池时更加匹配, 并且结数的增加可以更加细分太 阳光谱, 增加效率。 然而由于 N原子在 InGaAs材料中的固溶度很低, 存在高缺陷密度, 光生 载流子的寿命和扩散长度过短, 难以达到太阳能电池所需的高质量要求, 导致 InGaP/GaAs / InGaNAs /Ge四结太阳能电池的效率反而要远低于三结电池。  The photocurrent generated by the Ge bottom cell of the triple junction solar cell is much larger than that of the top cell and the middle cell. For the stacked cell, the efficiency of each subcell is equal when the currents of the subcells are equal, and the current mismatch will cause a composite loss of current. , Reduce efficiency. One of the main methods to solve this problem is to insert a junction between the middle cell and the bottom cell to match the Ge substrate and the GaAs material, and the band gap is about 1. OeV of the InGaNAs subcell, thereby obtaining InGaP/ GaAs / InGaNAs /Ge four-junction solar cells, which make the current match more than the three-junction battery, and the increase in the number of junctions can further subdivide the solar spectrum and increase efficiency. However, due to the low solid solubility of N atoms in InGaAs materials, the high defect density, the lifetime and diffusion length of photogenerated carriers are too short, and it is difficult to achieve the high quality requirements of solar cells, resulting in InGaP/GaAs / InGaNAs / The efficiency of the Ge four-junction solar cell is much lower than that of the three-junction battery.
专利申请号为 CN200910223615. X专利申请公开案提出了在 GaAs衬底上生长倒装结构的 四结太阳能电池, 具体为使用 GaAs或 Ge衬底; 在所述衬底上形成与衬底晶格匹配, 带隙为 1. 9 eV 附近的 InGaP 第一子电池; 在所述的第一子电池上形成与衬底晶格匹配, 带隙为 1. 35-1. 45 eV附近的 GaAs 第二子电池; 在所述的第二子电池上形成组分渐变的第一经分级 夹层; 在所述第一经分级夹层上形成晶格常数大于衬底, 带隙为 0. 9-1. 1 eV附近的 InGaAs 第三子电池; 在所述的第三子电池上形成组分渐变的第二经分级夹层; 在所述第二经分级夹 层上形成晶格常数大于第三子电池材料, 带隙为 0. 6-0. 8eV附近的 InGaAs第四子电池。该四 结太阳能电池结构由于釆用了倒装生长方式, 后续的器件制备需要剥离衬底, 这增加了器件 制备的难度, 并导致较低的良率, 另外该四结太阳能电池中有两结子电池的晶格与衬底是不 匹配的, 这不可避免地会在这两结子电池中引入穿透位错, 降低整体电池的效率, 另外两层 渐变层的使用也过多地增加了生长时间, 大大提高生产成本。 Patent application No. CN200910223615. The patent application publication discloses a four-junction solar cell in which a flip-chip structure is grown on a GaAs substrate, specifically using a GaAs or Ge substrate; forming a lattice match with the substrate on the substrate The first sub-cell having a band gap of 1. 9 eV; a lattice matching of the substrate is formed on the first sub-cell, and the band gap is 1.35-1. The cell gap is greater than the substrate, the band gap is 0. 9-1. 1 eV is formed on the first sub-cell. Nearby InGaAs a third sub-cell; forming a second graded interlayer having a compositional gradation on the third sub-cell; forming a lattice constant on the second graded interlayer greater than the third sub-cell material, and having a band gap of 0. 6-0. InGaAs fourth subcell near 8eV. The four-junction solar cell structure requires a flip-chip growth method for subsequent device fabrication, which requires stripping of the substrate, which increases the difficulty of device fabrication and leads to lower yield. In addition, the four-junction solar cell has two junctions. The cell's crystal lattice does not match the substrate, which inevitably introduces threading dislocations in the two junction cells, reducing the efficiency of the overall cell. The use of two additional gradient layers also increases the growth time too much. , greatly increase production costs.
以下将结合附图及实施例来详细说明本发明的实施方式, 借此对本发明如何应用技术手 段来解决技术问题, 并达成技术效果的实现过程能充分理解并据以实施。 需要说明的是, 只 要不构成冲突, 本发明中的各个实施例以及各实施例中的各个特征可以相互结合, 所形成的 技术方案均在本发明的保护范围之内。  The embodiments of the present invention will be described in detail below with reference to the accompanying drawings and embodiments, by which the technical aspects of the present invention are applied to solve the technical problems, and the implementation of the technical effects can be fully understood and implemented. It should be noted that the various embodiments of the present invention and the various features of the various embodiments may be combined with each other, and the technical solutions formed are all within the scope of the present invention.
一些实施例提供一种倒置太阳能电池的制作方法, 主要包括图形化衬底形成工艺、倒置太 阳能电池的半导体材料层序列形成工艺, 支撑衬底键合工艺, 生长衬底剥离工艺。 下面结合 图 1〜图 7 , 进行详细说明。 第一步, 选择一生长衬底 101 , 该衬底可为 Ge衬底或 GaAs衬底。 在本实施例中, 选择 GaAs作为生长衬底 101。  Some embodiments provide a method of fabricating an inverted solar cell, which mainly includes a patterned substrate forming process, a semiconductor material layer sequence forming process of an inverted solar cell, a supporting substrate bonding process, and a growth substrate stripping process. The details will be described below with reference to Figs. 1 to 7 . In the first step, a growth substrate 101 is selected, which may be a Ge substrate or a GaAs substrate. In the present embodiment, GaAs is selected as the growth substrate 101.
第二步, 在生长衬底 101上制作 S i02掩膜层 102 , 形成图形化衬底 100。 其具体工艺如下: 在 GaAs衬底 101上使用 PECVD沉积一层 100腿厚的 S i02掩膜层 102 ,使用半导体光刻工艺在 S i02 掩膜层 102 上制作出光刻胶掩膜图形, 然后使用湿法蚀刻选择性腐蚀掉 S i02掩膜层, 蚀刻液 可使用氢氟酸或氟化铵等。 本实施例选择氢氟酸作为蚀刻液, 首先选择性腐蚀 30秒, 接着用 去离子水冲洗 10分钟, 最后经过光刻胶去除工艺, 完成在 GaAs衬底上形成 S i02掩膜图形。 如 图 1所示, S i02掩膜均匀地分布在生长衬底 101的表面上, 暴露出部分生长衬底的表面。 S i02 掩膜的图形可为单方向平行, 纵横交错或者彼此交叉。 如图 8所示, S i02掩膜 102呈单方向 平行的图形, 图 9所示为 S i02掩膜 102呈纵横交错的图形, 图 10所示为 S i02掩膜 102呈彼此 交叉的图形。 In the second step, the S i0 2 mask layer 102 is formed on the growth substrate 101 to form a patterned substrate 100. The specific process is as follows: using a PECVD deposited on the GaAs substrate 101 S i0 2 mask layer of a thickness of the legs 100 102, a semiconductor lithographic process to produce a photoresist mask pattern on the mask layer 102 S i0 2 Then, the S i0 2 mask layer is selectively etched away by wet etching, and hydrofluoric acid or ammonium fluoride or the like can be used as the etching solution. In this embodiment, hydrofluoric acid is selected as an etching solution, which is first selectively etched for 30 seconds, then rinsed with deionized water for 10 minutes, and finally subjected to a photoresist removal process to form a S i0 2 mask pattern on the GaAs substrate. As shown in FIG. 1, the S0O 2 mask is uniformly distributed on the surface of the growth substrate 101 to expose the surface of the partially grown substrate. The pattern of the S i0 2 mask may be parallel in one direction, crisscrossed or crossed. As shown in FIG. 8, the S00 2 mask 102 is in a unidirectional parallel pattern, and FIG. 9 shows the S i0 2 mask 102 in a crisscross pattern, and FIG. 10 shows the S00 2 mask 102 intersecting each other. Graphics.
第三步, 在图形化衬底 100上外延生长一层牺牲层 103。 在本实施例中选择 Ga。.5In。.5P作为 牺牲层 103的材料, 其具体工艺如下: 将图形化 GaAs衬底 100清洗干净, 并装入 M0CVD 反应 室, 控制反应室压强 300 Torr , 外延生长速率 lA/s , 首先在 750 °C下烘烤 10分钟, 接着降 温至 650 °C , 运用横向外延生长工艺形成一层 Ga。.5In。.5P牺牲层 103 , 其厚度为 150 nm。 如图 2所示, Ga。.5In。.5P牺牲层 103将整个 S i02掩膜层 102包围起来。 In the third step, a sacrificial layer 103 is epitaxially grown on the patterned substrate 100. In this embodiment, Ga is selected. . 5 In. 5 P as the material of the sacrificial layer 103, the specific process is as follows: The patterned GaAs substrate 100 is cleaned and loaded into the M0CVD reaction chamber to control the reaction chamber pressure of 300 Torr, the epitaxial growth rate is 1 A/s, first at 750 ° Bake for 10 minutes at C, then cool down to 650 °C, and form a layer of Ga using a lateral epitaxial growth process. . 5 In. 5 P sacrificial layer 103 having a thickness of 150 nm. As shown in Figure 2, Ga. . 5 In. The 5 P sacrificial layer 103 surrounds the entire S i0 2 mask layer 102.
第四步, 在牺牲层 103 上外延形成一层缓冲层 200。 在本实施例中选择 GaAs作为缓冲层 200的材料, 其具体工艺如下: 调整 M0CVD反应室压强为 30 Torr , 五三族反应源摩尔流量比 为 40 , 在 Ga。.5In。.5P牺牲层 103上生长一层 GaAs缓冲层 200。 第五步, 在牺牲层 103 上外延生长倒置太阳能电池的的半导体材料层序列。 太阳能电池 可为单结或多结, 在本实施例中选择倒置三结太阳能电池。 如图 3所示, 运用传统 M0CVD外延 工艺继续在 GaAs缓冲层 200 上外延生长 Ga。.5In。.5P/GaAs /Ga。.7In。.3As倒置三结太阳能电池的半 导体材料层序列 201。 In the fourth step, a buffer layer 200 is epitaxially formed on the sacrificial layer 103. In the present embodiment, GaAs is selected as the material of the buffer layer 200, and the specific process thereof is as follows: The pressure of the M0CVD reaction chamber is adjusted to 30 Torr, and the molar flow ratio of the five-three-group reaction source is 40, in Ga. . 5 In. A GaAs buffer layer 200 is grown on the 5 P sacrificial layer 103. In the fifth step, a semiconductor material layer sequence of the inverted solar cell is epitaxially grown on the sacrificial layer 103. The solar cell can be a single junction or a multi junction, and in this embodiment an inverted triple junction solar cell is selected. As shown in FIG. 3, Ga is epitaxially grown on the GaAs buffer layer 200 by a conventional M0CVD epitaxial process. . 5 In. . 5 P/GaAs /Ga. . 7 In. 3 As inverted semiconductor material layer sequence 201 of a triple junction solar cell.
第六步, 准备一支撑基板 300 , 用于支撑太阳能电池的半导体材料层。 支撑 300可选择散 热性较好的材料,如 S i片或陶瓷基板等。本实施例选择 p型 S i片 301做为支撑基板,应用 M0CVD 在其表面上外延形成一层高掺杂的 P型 GaAs覆盖层 302。 p型 GaAs覆盖层 302 的掺杂浓度为 1 X l O'Vcm3, 表面粗糙度 3 nm。 In the sixth step, a support substrate 300 for supporting the semiconductor material layer of the solar cell is prepared. The support 300 may select a material having better heat dissipation, such as a Si sheet or a ceramic substrate. In this embodiment, the p-type Si wafer 301 is selected as a supporting substrate, and a highly doped P-type GaAs cap layer 302 is epitaxially formed on the surface thereof by M0CVD. The p-type GaAs cap layer 302 has a doping concentration of 1 X l O'Vcm 3 and a surface roughness of 3 nm.
第七步, 将倒置太阳能电池的半导体材料层序列与支撑基板键合。 首先, 分别在倒置太 阳能电池的半导体材料层序列 201的表面和 p型 GaAs覆盖层 302表面各形成一金属键合层;然 后, 通过键合工艺将支撑基板 300与倒置太阳能电池的半导体材料层序列 201粘结在一起。 键合层的材料为导电材料, 可以从金、 金锡合金、 铟等材料中选择, 在本实施例中, 选择金 作为键合层。 具体工艺如下: 使用金属蒸镀工艺, 首先在 Ga。.5In。.5P /GaAs /Ga。.7In。.3AS倒置三 结太阳能电池的半导体材料层序列 201表面蒸镀一层 400腿厚的 Au作为第一金属键合层 303; 接着在 P型 GaAs覆盖层 302表面蒸镀一层 400腿厚的 Au作为第二金属键合层 304; 最后, 通过 Au-Au键合工艺, 把支撑基板 300和 Ga。.5In。.5P/GaAS /Ga。.7In。.3As倒置三结太阳能电池半导体材 料层序列 201粘结在一起。 如图 5所示, 为完成键合工艺后的太阳能电池的侧面剖视图。 In the seventh step, the semiconductor material layer sequence of the inverted solar cell is bonded to the support substrate. First, a metal bonding layer is respectively formed on the surface of the semiconductor material layer sequence 201 of the inverted solar cell and the surface of the p-type GaAs cap layer 302. Then, the semiconductor material layer sequence of the supporting substrate 300 and the inverted solar cell is performed by a bonding process. 201 is bonded together. The material of the bonding layer is a conductive material and can be selected from materials such as gold, gold-tin alloy, and indium. In the present embodiment, gold is selected as the bonding layer. The specific process is as follows: Using a metal evaporation process, first in Ga. . 5 In. . 5 P /GaAs /Ga. . 7 In. 3 A S inverted triple junction solar cell semiconductor material layer sequence 201 surface evaporation of a layer of 400 leg thick Au as the first metal bonding layer 303; then a layer of 400 legs thick on the surface of the P-type GaAs cap layer 302 Au is used as the second metal bonding layer 304; finally, the substrate 300 and Ga are supported by the Au-Au bonding process. . 5 In. . 5 P/GaA S /Ga. . 7 In. The 3 As inverted triple junction solar cell semiconductor material layer sequence 201 is bonded together. As shown in FIG. 5, a side cross-sectional view of the solar cell after the bonding process is completed.
第八步, 剥离图形化生长衬底 100 , 其包括去除 S i02掩膜层 102和牺牲层 103。 釆用湿法 蚀刻工艺选择性腐蚀掉 S i02掩膜层 102和牺牲层 103,其中 S i02掩膜层 102的蚀刻液可使用氢 氟酸或氟化铵等, 牺牲层 103的蚀刻液可使用浓盐酸或盐酸与磷酸的混合液等。 本实施例选 择氢氟酸作为 S i02掩膜层 102蚀刻液, 盐酸与磷酸的混合液为牺牲层 103的蚀刻液, 其具体 工艺如下: 首先,使用 20%的氢氟酸选择性腐蚀掉 S i02掩膜层 102 ,如图 6所示,使得 Ga。.5In。.5P 牺牲层 103内产生很多孔隙 104; 然后, 使用盐酸与磷酸体积比 1: 2作为选择性蚀刻液, 选 择性腐蚀掉 Ga。.5In。.5P牺牲层 103 , GaAs衬底 101即可被完整地剥离下来。对于剥离下来的 GaAs 衬底, 使用去离子水对表面进行清洗, 再用氮***吹干衬底表面, 即可再次被使用。 In an eighth step, the patterned growth substrate 100 is stripped, which includes removing the S00 2 mask layer 102 and the sacrificial layer 103.选择性 selectively etching the S i0 2 mask layer 102 and the sacrificial layer 103 by a wet etching process, wherein the etching solution of the S i0 2 mask layer 102 may use hydrofluoric acid or ammonium fluoride, etc., the etching solution of the sacrificial layer 103 Concentrated hydrochloric acid or a mixture of hydrochloric acid and phosphoric acid can be used. In this embodiment, hydrofluoric acid is selected as the etching solution of the S i0 2 mask layer 102, and the mixed solution of hydrochloric acid and phosphoric acid is the etching solution of the sacrificial layer 103. The specific process is as follows: First, selective etching is performed using 20% hydrofluoric acid. The S i0 2 mask layer 102, as shown in FIG. 6, makes Ga. . 5 In. A large number of pores 104 are formed in the 5 P sacrificial layer 103; then, Ga is selectively etched using a hydrochloric acid to phosphoric acid volume ratio of 1:2 as a selective etching solution. . 5 In. 5 P sacrificial layer 103, the GaAs substrate 101 can be completely peeled off. For the detached GaAs substrate, the surface is cleaned with deionized water, and the surface of the substrate is blown dry with a nitrogen gun to be used again.
本实施例釆用 S i02作掩膜层, 随后通过湿法蚀刻选择性腐蚀掉 S i02掩膜层使得牺牲层内产 生很多孔隙, 增加了用于去除牺牲层的选择性蚀刻液与牺牲层的接触面积, 提高了牺牲层的 腐蚀速率, 降低了衬底剥离的难度, 可实现衬底的重复利用, 降低太阳能电池的生产成本。 In this embodiment, S i0 2 is used as a mask layer, and then the S i0 2 mask layer is selectively etched by wet etching to cause a lot of voids in the sacrificial layer, and a selective etching solution for sacrificing the sacrificial layer is added and sacrificed. The contact area of the layer improves the corrosion rate of the sacrificial layer, reduces the difficulty of substrate stripping, enables reuse of the substrate, and reduces the production cost of the solar cell.
进一步地, 本实施例釆用 S i片为支撑基板, 具有散热性好、 成本低、 易于后期芯片加工 的特点。 在 S i片表面形成一层 (In) GaAs覆盖层, 然后将其用于与倒置结构多结太阳能电池 间的金属键合工艺, 有利于键合的均匀性, 减小界面处的应力对电池的影响, 提高成品率。 图 11是表示某些二元材料的能带隙和所述二元材料的晶格常数的曲线图。 三元材料的能 带隙和晶格常数位于在典型的相关联二元材料之间绘制的线上。例如三元材料 AlGaAs在曲线 图上位于 GaAs点与 AlAs点之间,其中三元材料的能带隙位于 GaAs的 1.42 eV与 AlAs的 2.16 eV之间, 视个别成分的相对量而定。 因此, 根据所需的能带隙, 可适当地选择三元材料的材 料成分以供生长。 Further, in this embodiment, the S i piece is used as the supporting substrate, which has the characteristics of good heat dissipation, low cost, and easy processing of the late chip. Forming an (In) GaAs cap layer on the surface of the S i piece, and then using it for metal bonding process with the inverted structure multi-junction solar cell, which is advantageous for bonding uniformity and reducing stress at the interface to the battery The impact of improving the yield. Figure 11 is a graph showing the band gap of certain binary materials and the lattice constant of the binary material. The band gap and lattice constant of the ternary material are on a line drawn between typical associated binary materials. For example, the ternary material AlGaAs is located between the GaAs point and the AlAs point on the graph, wherein the band gap of the ternary material is between 1.42 eV of GaAs and 2.16 eV of AlAs, depending on the relative amount of individual components. Therefore, depending on the required band gap, the material composition of the ternary material can be appropriately selected for growth.
图 12 是本发明优选实施例一种高效四结太阳能电池的结构示意图, 包括 InP 生长衬底 2001、 第一子电池 2100、 第二子电池 2200、 第三子电池 2300、 第四子电池 2400, 各结子电 池之间通过隧穿结 2501、 2502、 2503连接。  12 is a schematic structural view of a high efficiency four-junction solar cell according to a preferred embodiment of the present invention, including an InP growth substrate 2001, a first sub-cell 2100, a second sub-cell 2200, a third sub-cell 2300, and a fourth sub-cell 2400. Each of the junction cells is connected by tunneling junctions 2501, 2502, 2503.
在生长衬底 2001上形成与生长衬底晶格匹配, 带隙在 0.74左右的第一子电池 2100。 第 一子电池包括背场层 2101, 基区 2102, 发射层 2103, 窗口层 2104。 在本实施例中, 选择 p 型 InP作为生长衬底 2001, p型 In。.53Ga。.47As作为第一子电池 2100的基区 2102, n型 In。.53Ga。.47As 作为第一子电池 2100 的发射层 2103, n型 InP作为窗口层 2104。 背场层 2101 的材料为 p型 InGaAsP, 该 InGaAsP的组分配比满足晶格常数与衬底匹配, 能带隙在 0.9-1.1 eV之间。 A first sub-cell 2100 having a lattice match with the growth substrate and having a band gap of about 0.74 is formed on the growth substrate 2001. The first subcell includes a back field layer 2101, a base region 2102, an emissive layer 2103, and a window layer 2104. In the present embodiment, p-type InP is selected as the growth substrate 2001, p-type In. . 53 Ga. 47 As the base 2102 of the first sub-cell 2100, n-type In. . 53 Ga. 47 As an emission layer 2103 of the first sub-cell 2100, n-type InP serves as a window layer 2104. The material of the back field layer 2101 is p-type InGaAsP, and the group distribution ratio of the InGaAsP satisfies the lattice constant and the substrate is matched, and the band gap is between 0.9 and 1.1 eV.
在 第 一 子 电 池 2100 顶 部 n 型 InP 窗 口 层 2104 上 沉 积 一 系 列 n++-In„.53Ga„.4vAs /p++-In„.53Ga„.4vAs , 构成隧穿结 2501, 用于将第一子电池 2100连接至第二子 电池 2200。 Deposited on the first series of n ++ top subcell 2100 n-type InP window layer 2104 - In 4v As / p ++ "53 Ga." -. In 4v As, constituting the tunneling junction 2501, for "53 Ga.". The first sub-cell 2100 is connected to the second sub-cell 2200.
在隧穿结 2501上形成与生长衬底晶格匹配, 带隙为 1.0 eV附近的第二子电池 200。 第二 子电池包括背场层 2201, 基区 2202, 发射层 2203, 窗口层 2204。 在本实施例中, 选择 p型 InP 作为背场层 2201, p型 InxGa^ASyP 作为基区 2202, n型 Ιη^^Α^Ρ^作为发射层 2203, η型 InP 作为窗口层 2204。 其中 X, y的选择保证 InxdASyP^材料的晶格常数与衬底相同, 带隙为 1.0 eV附近。  A second sub-cell 200 having a lattice gap of 1.0 eV is formed on the tunnel junction 2501 to be lattice-matched to the growth substrate. The second subcell includes a back field layer 2201, a base region 2202, an emission layer 2203, and a window layer 2204. In the present embodiment, p-type InP is selected as the back field layer 2201, p-type InxGa^ASyP is used as the base region 2202, n-type Ιn^^^^^^ is used as the emission layer 2203, and the n-type InP is used as the window layer 2204. The choice of X, y ensures that the lattice constant of the InxdASyP^ material is the same as that of the substrate, and the band gap is around 1.0 eV.
在第二子电池 2200顶部 n型 InP窗口层 2204上沉积一系列 n++-InGaAsP/p++-InGaAsP, 构成隧穿结 2502, 用于将第二子电池 2200连接至第三子电池 2300。 InGaAsP组分配比满足 晶格常数与衬底晶格匹配, 带隙为 1.0 eV附近。  A series of n++-InGaAsP/p++-InGaAsP is deposited on the top n-type InP window layer 2204 of the second sub-cell 2200 to form a tunnel junction 2502 for connecting the second sub-cell 2200 to the third sub-cell 2300. The InGaAsP group distribution ratio satisfies the lattice constant matching with the substrate lattice, and the band gap is around 1.0 eV.
在隧穿结 2502上形成与生长衬底晶格匹配, 带隙为 1.31 eV的第三子电池 2300。 第三子 电池包括背场层 2301,基区 2302,发射层 2303,窗口层 2304。在本实施例中,选择 p型 AlInAs 作为背场层 2301, p型 InP作为基区 2302, n型 InP作为发射层 2303, n型 AlInAs作为窗口 层 2304。 所述 AlInAs背场层 2301 的组分配比满足晶格常数与衬底匹配, 能带隙为 1.47eV 附近, 优先选取 A1组分为 0.48, In组分为 0.52。 窗口层的组分配比与背场层 2301相同。  A third subcell 2300 having a lattice matching of 1.31 eV is formed on the tunneling junction 2502. The third subcell includes a back field layer 2301, a base region 2302, an emissive layer 2303, and a window layer 2304. In the present embodiment, p-type AlInAs is selected as the back field layer 2301, p-type InP is used as the base region 2302, n-type InP is used as the emission layer 2303, and n-type AlInAs is used as the window layer 2304. The group distribution ratio of the AlInAs back field layer 2301 is matched with the substrate, and the band gap is 1.47 eV. The A1 component is preferably 0.48 and the In composition is 0.52. The group assignment of the window layer is the same as that of the backfield layer 2301.
在第三子电池 2300顶部窗口层 2304上沉积一系列 n++-AlInAs/p++-AlInAs,构成隧穿结 A series of n++-AlInAs/p++-AlInAs is deposited on the top window layer 2304 of the third sub-cell 2300 to form a tunnel junction.
2503,用于将第三子电池 2300连接至第四子电池 2400。该层的组分配比与背场层 2301相同。 在隧穿结 2503上形成渐变层 2600 , 其带隙大于第三子电池 2300的带隙。 在本实施例中, 选择 p型 AlSbzAS l_z作为渐变层 2600 , 组分配比从与 InP衬底晶格匹配, 能带隙为 1. 9eV附近的 AlSb。.44As。.56逐渐变到 AlAs , 变化方式可为阶梯变化、 线性变化等方式。 2503, for connecting the third sub-battery 2300 to the fourth sub-battery 2400. The group distribution ratio of this layer is the same as that of the back field layer 2301. A graded layer 2600 is formed on the tunnel junction 2503 with a band gap greater than that of the third subcell 2300. In the present embodiment, the p-type AlSb z A S l _ z is selected as the gradation layer 2600, the group distribution ratio is lattice-matched from the InP substrate, and the energy band gap is 1. 9 eV in the vicinity of AlSb. . 44 As. 56 gradually changes to AlAs, and the change mode can be step change or linear change.
在组分渐变层 2600上形成带隙为 1. 88 eV左右的第四子电池 2400。 第三子电池包括背场 层 2401 , 基区 2402 , 发射层 2403 , 窗口层 2404。 在本实施例中, 选择 p型 Al lnP作为背场 层 2401 , p型作为 InGaP基区 2402 , n型 InGaP作为发射层 2403 , n型 Al InP作为窗口层 2404。  A fourth sub-cell 2400 having a band gap of about 1.88 eV is formed on the composition grade layer 2600. The third subcell includes a back field layer 2401, a base region 2402, an emissive layer 2403, and a window layer 2404. In the present embodiment, p-type Al lnP is selected as the back field layer 2401, p-type is used as the InGaP base region 2402, n-type InGaP is used as the emission layer 2403, and n-type Al InP is used as the window layer 2404.
在第四子电池顶部窗口层 2401上覆盖一 GaAs接触层 2700 , 作为盖帽层, 构成高效四结 太阳能电池。  A fourth sub-cell top window layer 2401 is covered with a GaAs contact layer 2700 as a cap layer to form an efficient four-junction solar cell.
不同于在 Ge衬底上形成 InGaP/GaAs / InGaNAs /Ge四结太阳能电池和在 GaAs衬底上形成具 有两个变质层的四结倒置变质多结太阳能电池的技术,本实施例提出在 InP衬底上实现四结太 阳能电池结构。 此四结太阳能电池釆用正向生长结构, 便于器件制备; 各子电池能带隙排列 适合, 以及底部三个子电池的晶格与衬底完全匹配等优点; 并通过组分渐变的 AlSbzAS l_z, , 可 将顶上 InGaP子电池的穿透位错密度控制在 106 cm- 2量级以内, 使该子电池的效率损失减小。 Unlike the technique of forming an InGaP/GaAs/InGaNAs/Ge four-junction solar cell on a Ge substrate and forming a four-junction inverted metamorphic multi-junction solar cell having two altered layers on a GaAs substrate, the present embodiment proposes an InP lining. A four-junction solar cell structure is realized on the bottom. The four-junction solar cell adopts a forward growth structure to facilitate device preparation; the sub-cells have a band gap arrangement suitable, and the lattices of the bottom three sub-cells are perfectly matched with the substrate; and the composition is graded by AlSb z A S l _ z , , can control the threading dislocation density of the top InGaP sub-cell within 10 6 cm -2 , so that the efficiency loss of the sub-cell is reduced.
一些实施例提供一种高倍聚光多结太阳能电池的制备工艺, 其包括子电池 2100、 2200、 2300、 2400及各子电池之间各层的形成工艺。 根据适当的生长温度和时间且通过使用适当地 化学成分和掺杂剂, 来控制半导体结构中的晶格常数和电性质。 可以使用气相沉积方法如 M0CVD和 MBE等技术, 但优先选取 M0CVD作为本实施例的生长技术。  Some embodiments provide a process for preparing a high power concentrating multi-junction solar cell comprising sub-cells 2100, 2200, 2300, 2400 and a process of forming layers between the sub-cells. The lattice constant and electrical properties in the semiconductor structure are controlled according to appropriate growth temperatures and times and by the use of appropriate chemical compositions and dopants. A vapor deposition method such as M0CVD and MBE can be used, but M0CVD is preferably selected as the growth technique of the present embodiment.
实施例具体制备工艺包括如下步骤: 第一步, 提供一 InP生长衬底 001。 将(001 ) 面 9 度偏角的 InP衬底 2001清洗干净, 并装入有机金属化学气相沉积反应室, 首先在 750 °C下烘 烤 10分钟。 载气釆用氢气, In、 Ga、 Al源釆用 TMIn、 TMG、 TMA有机金属源, P、 As、 Sb源 釆用 PH3、 AsH3 、 SbH3。  The specific preparation process of the embodiment comprises the following steps: In the first step, an InP growth substrate 001 is provided. The InP substrate 2001 with a (001) side 9 degree angle was cleaned and placed in an organometallic chemical vapor deposition chamber, first baked at 750 °C for 10 minutes. Hydrogen for carrier gas, TM, TMG, TMA organic metal source for In, Ga, and Al sources, and PH3, AsH3, and SbH3 for P, As, and Sb sources.
下一步, 用 MOCVD的方法在 p型 InP衬底 2001 上外延生长形成与衬底晶格匹配, 带隙在 0. 74eV附近的第一子电池 2100。 其具体工艺如下: 将温度降到 600 °C , 先生长 p型 InGaAsP 背场层 2101 , 该 InGaAsP的组分配比满足晶格常数与衬底匹配, 能带隙在 0. 9-1. 1 eV之间, 厚度约为 20纳米; 再生长 p型 In。.53Ga。.47As基区 2102 , 其掺杂浓度为 1 10" cm-3, 厚度约为 3 微米; 然后生长 n型 In。.53Ga。.47As发射层 2104 , 其掺杂浓度为 2 χ 1018 cm- 3, 厚度约为 100纳米; 最后生长 n型 InP窗口层 2104 , 其掺杂浓度为 1 χ 1018 cm- 3, 厚度约为 50纳米。 Next, a first sub-cell 2100 having a band gap of about 0.74 eV is epitaxially grown on the p-type InP substrate 2001 by MOCVD. The singularity of the band gap is 0. 9-1. 1 eV, the band gap is 0. 9-1. 1 eV Between the thickness is about 20 nm; then p-type In is grown. . 53 Ga. 47 As base region 2102 having a doping concentration of 1 10" cm- 3 and a thickness of about 3 μm; then growing an n-type In. 53 Ga.. 47 As emissive layer 2104 having a doping concentration of 2 χ 10 18 cm - 3 , thickness is about 100 nm; Finally, an n-type InP window layer 2104 is grown with a doping concentration of 1 χ 10 18 cm - 3 and a thickness of about 50 nm.
下一步, 在第一子电池 2100顶部的 n型 InGaAsP窗口层 104上生长隧穿结 2501。 首先生长 厚度约 15纳米, 掺杂浓度为 l x l O1' cm- 3的 n型 In。.53Ga。.47AS层, 然后生长厚度约 15纳米, 掺 杂浓度为 1 10" cm— 3的 p型 In。.53Ga。.47As层。 Next, a tunnel junction 2501 is grown on the n-type InGaAsP window layer 104 on top of the first sub-cell 2100. First, an n-type In which is about 15 nm thick and doped with a concentration of lxl O 1 ' cm- 3 is grown. . 53 Ga. 47 A S layer, then a thickness of about 15 nm, a doping concentration of 1 10" cm- 3 of p-type In. 53 Ga.. 47 As layer.
下一步, 在隧穿结 2501上外延生长形成与衬底晶格匹配, 带隙为 l. OeV附近的第二子电 池 2200。 先生长 p型 InP背场层 2201, 其厚度约为 20纳米; 再生长 p型 InGaAs基区 2202, 其, 掺杂浓度为 1 x 10" cm-3, 厚度为 3微米; 然后生长 n型 InGaAs发射层 2203, 其掺杂浓度为 1 x l018 cm- 3, 厚度为 100 纳米, 这两层的 InGaAsP组分配比满足晶格常数与衬底晶格匹配, 带 隙为 1. 0 eV附近; 最后生长 n型 InP窗口层 2204, 其掺杂浓度为 1 χ 1018cm- 3, 厚度为 50纳米。 Next, epitaxial growth is performed on the tunnel junction 2501 to form a lattice match with the substrate, and the band gap is a second sub-electricity near the OeV. Pool 2200. Mr. Long p-type InP back field layer 2201, which has a thickness of about 20 nm; further grows a p-type InGaAs base region 2202 having a doping concentration of 1 x 10" cm- 3 and a thickness of 3 μm; and then growing n-type InGaAs The emission layer 2203 has a doping concentration of 1 x 10 18 cm - 3 and a thickness of 100 nm. The distribution ratio of the two layers of the InGaAsP group satisfies the lattice constant and the substrate lattice matching, and the band gap is 1. 0 eV; Finally, an n-type InP window layer 2204 is grown with a doping concentration of 1 χ 10 18 cm- 3 and a thickness of 50 nm.
下一步,在第二子电池 2200顶部 n型 InP窗口层 2204上生长隧穿结 2502,这两层的 InGaAsP 组分配比满足晶格常数与衬底晶格匹配, 带隙为 1. 0 eV附近。 生长厚度为 15纳米, 掺杂浓 度为 1 x 10" cm- 3的 n型 InGaAsP层, 然后生长厚度为 15 纳米, 掺杂浓度为 1 χ 10" cm- 3的 p型 InGaAsP层。 Next, a tunneling junction 2502 is grown on the top n-type InP window layer 2204 of the second sub-cell 2200. The distribution ratio of the InGaAsP group of the two layers is matched to the lattice of the substrate, and the band gap is 1. 0 eV. . Grown in the thickness of 15 nm and a doping concentration of 1 x 10 "cm- n-type InGaAsP layer 3, and then grown to a thickness of 15 nm and a doping concentration of 10 1 χ" cm- p-type InGaAsP layer 3.
下一步, 在隧穿结 2502上外延生长形成与衬底晶格匹配, 带隙为 1. 31 eV的第三子电池 2300。 先生长厚度为 20纳米的 p型 AlInAs背场层 2301, 该 AlInAs背场层 2301的组分配比满 足晶格常数与衬底匹配, 能带隙在 1.47 eV附近, 优先选取 A1组分为 0.48, In组分为 0.52; 再生长 P型 InP基区 2302, 其厚度为 1微米, 掺杂浓度为 1 χ 10" cm- 3; 然后生长 n型 InP发射层Next, a third sub-cell 2300 having a band gap of 1.31 eV is epitaxially grown on the tunnel junction 2502 to form a lattice match with the substrate. The p-type AlInAs back field layer 2301 with a thickness of 20 nm is used. The group distribution ratio of the AlInAs back field layer 2301 is matched with the substrate. The band gap is 1.47 eV, and the A1 component is preferably 0.48. The In composition is 0.52; the P-type InP base region 2302 is further grown to have a thickness of 1 μm and a doping concentration of 1 χ 10" cm - 3 ; then an n-type InP emitter layer is grown.
2303, 其厚度为 100纳米, 掺杂浓度为 2 x l018 cm- 3; 最后生长 n型 AlInAs窗口层 2304, 该层 的组分配比同背场层 2301, 其厚度为 50纳米, 掺杂浓度为 1 X 1018 cm_32303, the thickness is 100 nm, the doping concentration is 2 x l0 18 cm- 3 ; finally, the n-type AlInAs window layer 2304 is grown, the group distribution ratio of the layer is the same as the back field layer 2301, and the thickness thereof is 50 nm, doping concentration It is 1 X 10 18 cm_ 3 .
下一步, 在第三子电池 2300的顶部 n型 AlInAs窗口层 2304上隧穿结 2503。 先生长厚度为 Next, the junction 2503 is tunneled over the top n-type AlInAs window layer 2304 of the third sub-cell 2300. Mr. long thickness is
15纳米, 掺杂浓度为 1 X 10" cm- 3的 n型 AlInAs层, 然后生长厚度为 15纳米, 掺杂浓度为 1 χ15 nm, doped with an n-type AlInAs layer of 1 X 10" cm- 3 , then grown to a thickness of 15 nm with a doping concentration of 1 χ
10" cm— 3的 ρ型 AlInAs层, 其组分配比与同背场层 2301—样。 The 10" cm- 3 p-type AlInAs layer has a group distribution ratio similar to that of the back field layer 2301.
下一步, 在隧穿结 2503上外延生长组分渐变层 2600。 生长 p型 AlSbxAsl-x渐变层 2600, 使该层的组分配比从与 InP衬底晶格匹配, 能带隙为 1.9 eV附近的 AlSb。.44As。.56逐渐变到 AlAs, 变化方式可为阶梯变化、 线性变化等方式, Sb组分的变化率为 8%/m。 当变化方式为阶梯型变 化时, 每生长 250纳米为一阶梯。 Next, the compositionally graded layer 2600 is epitaxially grown on the tunnel junction 2503. The p-type AlSbxAsl-x graded layer 2600 was grown so that the group distribution ratio of the layer was lattice-matched from the InP substrate, and the band gap was AlSb around 1.9 eV. . 4 4As. 56 changes gradually to AlAs, and the change mode can be step change, linear change, etc., and the change rate of Sb component is 8%/m. When the variation is a stepwise change, each step is 250 nm.
下一步, 在组分渐变层 2600上外延生长带隙为 1.88 eV左右的第四子电池 2400。 先生长 厚度为 20纳米, 掺杂浓度为 1 X 1018cm- 3的 p型 AllnP背场层 2401; 再生长厚度为 500纳米, 掺 杂浓度为 1 X 1017cm- 3的 p型 InGaP基区 2402;然后生长厚度为 100纳米,掺杂浓度为 2 χ 1018cm- 3 的 n型 InGaP发射层 2403; 最后生长厚度为 50纳米, 掺杂浓度 1 χ 1018cm- 3的 n型 AllnP窗口层Next, a fourth sub-cell 2400 having a band gap of about 1.88 eV is epitaxially grown on the composition-graded layer 2600. Mr. Pn AllnP back field layer 2401 with a thickness of 20 nm and a doping concentration of 1×10 18 cm- 3 ; a p-type InGaP group with a thickness of 500 nm and a doping concentration of 1×10 17 cm- 3 Zone 2402; then growing an n-type InGaP emitter layer 2403 having a thickness of 100 nm and a doping concentration of 2 χ 10 18 cm- 3 ; a final growth thickness of 50 nm, an n-type AllnP having a doping concentration of 1 χ 10 18 cm- 3 Window layer
2404。 2404.
下一步,在第四子电池 2400的顶部 n型 AllnP窗口层 2404上外延生长重掺杂的 n型 GaAs 接触层 2700, 完成整个四结太阳能电池结构的生长。  Next, a heavily doped n-type GaAs contact layer 2700 is epitaxially grown on the top n-type AllnP window layer 2404 of the fourth sub-cell 2400 to complete the growth of the entire four-junction solar cell structure.
图 13〜图 14为 III-V族太阳能电池的一种传统的制作工艺,以 GalnP/GalnAs/Ge多结太 阳能电池为例, 其制作工艺一般如下: 在 M0CVD***中, 生长完 GalnP/GalnAs/Ge多结太阳 能电池中的 GalnP顶电池发射极后, 紧接着生长一层 GaAs盖帽层。 GaAs接触层为外延最外 层, 在做 n电极前先要蚀刻一部分 GaAs以露出新鲜的 GaAs表面, 保证金属电极与 GaAs接触 的黏附性和欧姆接触性质。 所以 GaAs—般生长比较厚, 大于 0.5微米; 另外, 蚀刻 GaAs接 触层, 会使表面较为不平, 粗糙, 影响光电转化效率。 13 to FIG. 14 are a conventional fabrication process of a III-V solar cell. The GalnP/GalnAs/Ge multijunction solar cell is taken as an example. The fabrication process is generally as follows: In the M0CVD system, GalnP/GalnAs/ is grown. After the GalnP top cell emitter in the Ge multijunction solar cell, a layer of GaAs cap is grown. GaAs contact layer is the outermost extension The layer, before etching the n-electrode, etches a portion of GaAs to expose the fresh GaAs surface, ensuring the adhesion and ohmic contact properties of the metal electrode in contact with GaAs. Therefore, GaAs-like growth is relatively thick, greater than 0.5 micron; in addition, etching the GaAs contact layer makes the surface more uneven and rough, affecting the photoelectric conversion efficiency.
对比于图 13〜图 14,另外一些实施例提供一种太阳能电池的制作方法,其包括如下步骤: 首先, 如图 15所示, 选择一生长衬底 01, 进入 M0CVD***中, 在该生长衬底 01的表面上外 延生长 III-V族化合物太阳能电池材料层 02、接触层 03和牺牲层 05。生长衬底优选为锗(Ge), 但也可以为砷化镓(GaAs)或其它合适的材料。  Referring to FIG. 13 to FIG. 14, other embodiments provide a method for fabricating a solar cell, which includes the following steps. First, as shown in FIG. 15, a growth substrate 01 is selected to enter the MOCVD system, and the growth liner is The III-V compound solar cell material layer 02, the contact layer 03, and the sacrificial layer 05 are epitaxially grown on the surface of the bottom 01. The growth substrate is preferably germanium (Ge), but may also be gallium arsenide (GaAs) or other suitable material.
III-V族化合物太阳能电池可为单结或多结太阳能电池。 单结电池其电池材料层 02 可为 由砷化镓(GaAs)、 磷化铟镓(GaInP)、 砷化铟镓(GalnAs)、 磷砷化铟镓(GalnAsP)或任何其它 合适的 III-V族化合物形成。 多结太阳能电池的材料层 02可由周期表中所列举的 III ~ 族 元素的符合晶格常数和能带隙要求的任何合适组合形成, 各子电池间通过遂穿结连结。  The III-V compound solar cell can be a single junction or multi junction solar cell. The single junction cell may have a battery material layer 02 of gallium arsenide (GaAs), indium gallium phosphide (GaInP), indium gallium arsenide (GalnAs), indium gallium arsenide (GalnAsP) or any other suitable III-V. Group compounds are formed. The material layer 02 of the multi-junction solar cell can be formed by any suitable combination of the lattice constants and band gap requirements of the III-group elements listed in the periodic table, and the sub-cells are connected by a 遂-penetration junction.
接触层 03为盖帽层, 实现与电极的良好的欧姆接触, 材料可为 Ga(In)As, 厚度在 50 ~ 150腿间。 牺牲层 05用于保护接触层, 其厚度可为 100 - 1000腿, 其材料根据接触层的材料 进行选择, 实现选择性蚀刻掉牺牲层, 停止在接触层表面。  Contact layer 03 is a cap layer that achieves good ohmic contact with the electrodes. The material can be Ga(In)As and has a thickness between 50 and 150 legs. The sacrificial layer 05 is used to protect the contact layer and has a thickness of 100 - 1000 legs. The material is selected according to the material of the contact layer to selectively etch away the sacrificial layer and stop at the surface of the contact layer.
在本优选实施中,选择 GalnP/GalnAs/Ge多结太阳能电池作为 ΠΙ-V族化合物太阳能电池, 选择砷化镓 (GaAs)作为接触层 03, 磷化铟镓 (GalnP)作为牺牲层 05。 GaAs接触层 03的厚度 为 100 nm, GalnP接触层 05的厚度为 500 nm。  In the preferred embodiment, a GalnP/GalnAs/Ge multijunction solar cell is selected as the ΠΙ-V compound solar cell, and gallium arsenide (GaAs) is selected as the contact layer 03, and indium gallium phosphide (GalnP) is used as the sacrificial layer 05. The thickness of the GaAs contact layer 03 is 100 nm, and the thickness of the GalnP contact layer 05 is 500 nm.
下一步, 如图 16所示, 釆用湿法蚀刻法完全蚀刻牺牲层 05, 蚀刻停止在接触层 03的表 面, 露出接触层 03的表面。 蚀刻液的选择应是针对牺牲层进行蚀刻, 而无法蚀刻接触层。 在 本优选实施中, 釆用 HC1蚀刻 GalnP接触层 05, 停止在 GaAs接触层 03的表面。  Next, as shown in Fig. 16, the sacrificial layer 05 is completely etched by wet etching, and the etching stops on the surface of the contact layer 03 to expose the surface of the contact layer 03. The etchant should be selected to etch the sacrificial layer and not to etch the contact layer. In the preferred embodiment, the GalnP contact layer 05 is etched with HC1 and stopped on the surface of the GaAs contact layer 03.
下一步, 如图 17〜图 18, 先在上一步骤中露出的接触层 03的表面上蒸镀一层 AuGe作为 第一电极 04, 接着定义电极图形, 釆用光罩、 蚀刻去除电极之外的接触层, 露出太阳能电池 材料层 02 的部分表面。 在本优选实施中, 可釆用柠檬酸和双氧水的混合液进行选择性蚀刻 GaAs接触层 03。  Next, as shown in FIG. 17 to FIG. 18, a layer of AuGe is first deposited as a first electrode 04 on the surface of the contact layer 03 exposed in the previous step, and then an electrode pattern is defined, and the electrode is removed by a mask and etching. The contact layer exposes a portion of the surface of the solar cell material layer 02. In the preferred embodiment, the GaAs contact layer 03 can be selectively etched using a mixture of citric acid and hydrogen peroxide.
下一步, 如图 19所示, 在露出的太阳能电池材料层 02的表面上蒸镀一减反射膜 06。 其 具体方法如下: 先在在露出的太阳能电池材料层 02的表面和第一电极 04的表面上蒸镀一层 减反射膜, 接着用光刻胶盖住电极外的部分, 用浓氢氟酸溶液蚀刻电极上方的减反射膜, 最 后去掉光刻胶。 其后, 根据具体 III-V族化合物太阳能电池的结构, 制作第二电极。  Next, as shown in Fig. 19, an anti-reflection film 06 is vapor-deposited on the surface of the exposed solar cell material layer 02. The specific method is as follows: First, an anti-reflection film is deposited on the surface of the exposed solar cell material layer 02 and the surface of the first electrode 04, and then the photoresist is used to cover the portion outside the electrode, and concentrated hydrofluoric acid is used. The solution etches the anti-reflection film over the electrode and finally removes the photoresist. Thereafter, a second electrode was fabricated in accordance with the structure of a specific III-V compound solar cell.
在本实施例中, 生长完 III-V族化合物太阳能电池材料层后, 紧接着生长一层 GaAs 盖帽 层, 在该 GaAs盖帽层上生长一层 GalnP牺牲层, 在做第一电极前湿法蚀刻掉牺牲层 GalnP, 停止在 GaAs层表面, 因为该蚀刻 GalnP的溶液不会蚀刻 GaAs层, 所以 GaAs接触层可以保持 原子级的平整度, 提高光电转化效率。 In this embodiment, after the III-V compound solar cell material layer is grown, a GaAs cap layer is grown, and a GalnP sacrificial layer is grown on the GaAs cap layer, and the first electrode is wet etched. The sacrificial layer GalnP is removed and stopped on the surface of the GaAs layer. Since the etching of the GalnP solution does not etch the GaAs layer, the GaAs contact layer can be maintained. Atomic level flatness improves photoelectric conversion efficiency.
另外, 因为 GaAs接触层会吸光, 所以在做完第一电极后需要把 GaAs接触层去除掉, 而 本发明中由于有 GalnP牺牲层的保护, GaAs接触层可以生长得很薄, 使得在去除 GaAs接触 层时, 侧向蚀刻较小, 在保证第一电极的可靠性的同时, 使得 AuGe线宽可以做得更小, 减少 遮光面积, 提高光电转化效率。  In addition, since the GaAs contact layer absorbs light, the GaAs contact layer needs to be removed after the first electrode is completed, and in the present invention, the GaAs contact layer can be grown thin due to the protection of the GalnP sacrificial layer, so that GaAs is removed. When the contact layer is used, the lateral etching is small, and the reliability of the first electrode is ensured, so that the AuGe line width can be made smaller, the shading area is reduced, and the photoelectric conversion efficiency is improved.
如图 20所示,按照一些实施例的一种高效四结太阳能电池的结构,包括第一子电池 4100、 第二子电池 4200、 第三子电池 4300、 第四子电池 4400, 各结子电池之间通过隧穿结 4501、 4502、 4503连接。 其中, 第一子电池 4100以生长衬底 4001本身作为基区 4120, 在 p型衬底 正面注入 n型离子形成发射区 4130, 构成所述第一子电池, 其带隙为 1. 3 - 1.5 eV。 四结子 电池从下到上的排列顺序为: 第四子电池, 第三子电池, 第一子电池, 第二子电池。  As shown in FIG. 20, the structure of an efficient four-junction solar cell according to some embodiments includes a first sub-cell 4100, a second sub-cell 4200, a third sub-battery 4300, and a fourth sub-battery 4400. They are connected by tunneling junctions 4501, 4502, and 4503. The first sub-cell 4100 has a growth substrate 4001 as a base region 4120, and an n-type ion-forming emitter region 4130 is formed on the front surface of the p-type substrate to form the first sub-cell, the band gap of which is 1. 3 - 1.5 eV. Four-junction The order of the batteries from bottom to top is: fourth sub-cell, third sub-cell, first sub-cell, second sub-cell.
生长衬底 4001为双面抛光, 厚度小于或等小 200微米。 在本实施例中, 优先选用 P型、 厚度为 200微米的 InP衬底, 其掺杂浓度为在 2 X 10" cm— 3 ~ 5 X 10" cm—3, 作为第一子电池 4100 的基区 4120。 在衬底 001的正表面扩散磷形成第一子电池的 n型发射区 4130, 从而获得第一 子电池 4100, 其带隙为 1. 35 eV, 扩散厚度优选值为 100 nm。 在生长衬底的背面 (即第一子 电池基区 4120的表面)外延生长一层 p型 ΙηΑΙΡ作为第一子电池的背场层 4110, 其厚度为 100 nm, 掺杂浓度为 1 X 1018cm- 3~ 2 X 1018cm- 3。 在发射区 4130的表面上外延生长一层 n型 ΙηΑΙΡ作 为第一子电池窗口层 4140, 厚度为 25 nm, 掺杂浓度在 1 χ 1018 cm- 3左右。 The growth substrate 4001 is double-sided polished and has a thickness of less than or equal to 200 microns. In this embodiment, a P-type, 200 micron thick InP substrate having a doping concentration of 2 X 10" cm - 3 to 5 X 10" cm - 3 is preferred as the base of the first sub-cell 4100. Area 4120. Phosphorus is diffused on the front surface of the substrate 001 to form an n-type emitter region 4130 of the first subcell, thereby obtaining a first subcell 4100 having a band gap of 1.35 eV and a diffusion thickness of preferably 100 nm. A p-type ΙnΑΙΡ is epitaxially grown on the back surface of the growth substrate (ie, the surface of the first sub-cell base region 4120) as the back field layer 4110 of the first sub-cell having a thickness of 100 nm and a doping concentration of 1×10 18 . Cm- 3 ~ 2 X 10 18 cm- 3 . An n-type ΙnΑΙΡ is epitaxially grown on the surface of the emitter region 4130 as a first sub-cell window layer 4140 having a thickness of 25 nm and a doping concentration of about 1 χ 10 18 cm -3 .
隧穿结 4501形成于第一子电池窗口层 4140上, 用于将第一子电池 4100连接至第二子电 池 4200。 在本实施例中, 其材料优选为 p++_InGaP /n++-InGaP, 厚度是 50 nm, 掺杂浓度高 达 2 x 10" cm— 3A tunneling junction 4501 is formed on the first sub-cell window layer 4140 for connecting the first sub-cell 4100 to the second sub-cell 4200. In the present embodiment, the material is preferably p++_InGaP/n++-InGaP, the thickness is 50 nm, and the doping concentration is as high as 2 x 10" cm- 3 .
渐变缓冲层 4600形成于隧穿结上方, 其带隙为 1.5 - 1.8 eV, 组分配比从与第一子电池 晶格匹配渐变至与第二子电池晶格匹配。 在本实施例中, 其材料优选 P型 InGaP, 包含 6层结 构, 每层厚度为 250 nm, 掺杂浓度大约为 1 x 1018 cm- 3, 其中 Ga的百分含量从 0增长到 0.28。 A graded buffer layer 4600 is formed over the tunnel junction with a band gap of 1.5 - 1.8 eV, and the group distribution ratio is changed from lattice matching with the first subcell to lattice matching with the second subcell. In the present embodiment, the material is preferably P-type InGaP, which comprises a 6-layer structure each having a thickness of 250 nm and a doping concentration of about 1 x 10 18 cm -3 , wherein the percentage of Ga is increased from 0 to 0.28.
第二子电池的背场层 4210形成于渐变缓冲层上方。 在本实施例中, 其材料为 P型 InGaP, 其厚度为 50 nm, 掺杂浓度为 1 ~ 2 χ 1018 cm- 3The back field layer 4210 of the second subcell is formed over the graded buffer layer. In this embodiment, the material is a P-type InGaP having a thickness of 50 nm and a doping concentration of 1 to 2 χ 10 18 cm - 3 .
第二子电池形成于背场层 4210上, 其带隙为 1.8 - 2. 0 eV, 为本四结太阳能电池的顶电 池。 在本实施例中, 优选 P型 In。.4Al。.6As作为基区 4220, n型 In。.4Al。.6As作为发射层 4230, 其 带隙为 1.92 eV。 其中基区 4220的厚度为 2微米, 釆用渐变掺杂方式, 浓度 1.5 χ 10" cm- 3 ~ 5 X 10" cm"3; 发射区 4230 的厚度为 100 nm, 掺杂浓度大约 2 >< 1018 cm- 3。 第二子电池窗口层 240形成于发射区 4230上, 其材料优选 InAlAsP。 The second sub-cell is formed on the back field layer 4210 with a band gap of 1.8 - 2. 0 eV, which is the top cell of the four-junction solar cell. In the present embodiment, P-type In is preferable. . 4 Al. 6 As as base 4220, n-type In. . 4 Al. 6 As as the emission layer 4230, the band gap is 1.92 eV. The base region 4220 has a thickness of 2 micrometers and a graded doping method with a concentration of 1.5 χ 10" cm - 3 to 5 X 10"cm"3; the emitter region 4230 has a thickness of 100 nm and a doping concentration of about 2 >< 10 18 cm - 3. The second sub-cell window layer 240 is formed on the emitter region 4230, and the material thereof is preferably InAlAsP.
隧穿结 4502形成于第一电池的背场层 4110的下表面, 用于将第三电池连接至第一子电 池。 在本实施例中, 其材料优选为 P++_InP /n++-InP, 厚度为 50 nm, 掺杂浓度高达 1 χ 10" cm— 3A tunneling junction 4502 is formed on a lower surface of the back field layer 4110 of the first battery for connecting the third battery to the first sub-electric Pool. In the present embodiment, the material is preferably P++_InP / n++-InP, has a thickness of 50 nm, and has a doping concentration of up to 1 χ 10" cm -3 .
第三子电池倒装形成于隧穿结 4502上,其带隙为 0. 9 ~ 1. 2 eV。其具体结构: 窗口层 4340 形成于隧穿结 4502的下方, 发射区 4330形成于窗口层 4340的下方, 基区 4320形成于发射 区 4330的下方, 背场层 4310形成于基区 4320下方。 在本实施例中, 优选 n型 InP作为窗口层 4340的材料, 其厚度为 40 nm, 掺杂浓度大约 1 χ 1018 cm- 3; 选择 n型 InGaAsP和 p型 InGaAsP分 别作为区 4320和发射区 4330 , 其带隙为 1 eV, 基区 4320的厚度为 3微米, 掺杂浓度为 5 χ 10" cm—3, 发射区 4330的厚度为 100 nm, 其掺杂浓度为 2 χ 1018 cm-3; 选择 InP作为背场层 310 的材料, 厚度为 50 nm, 掺杂浓度为 l ~ 2 x l 018 cm- 3The second sub-battery is formed on the tunneling junction 4502, and has a band gap of 0.9 to 1. 2 eV. The specific structure: a window layer 4340 is formed under the tunneling junction 4502, an emitter region 4330 is formed below the window layer 4340, a base region 4320 is formed below the emitter region 4330, and a back field layer 4310 is formed under the base region 4320. In the present embodiment, n-type InP is preferably used as the material of the window layer 4340, and has a thickness of 40 nm and a doping concentration of about 1 χ 10 18 cm - 3 ; n-type InGaAsP and p-type InGaAsP are selected as the region 4320 and the emitter region, respectively. 4330, the band gap is 1 eV, the base region 4320 has a thickness of 3 μm, the doping concentration is 5 χ 10" cm - 3 , the emitter region 4330 has a thickness of 100 nm, and the doping concentration is 2 χ 10 18 cm- 3 ; InP is selected as the material of the back field layer 310, the thickness is 50 nm, and the doping concentration is l ~ 2 x l 0 18 cm - 3 .
隧穿结 4503形成于第三子电池的背场层的下方, 用于将第四子电池连接至第三子电池。 在本实施例中, 优选 p++/n++-GaAs。.5Sb。.5作为隧穿结 4503的材料, 其厚度为 50 nm的 InP, 掺 杂浓度为 l ~ 2 x l 018 cm- 3A tunneling junction 4503 is formed below the back field layer of the third subcell for connecting the fourth subcell to the third subcell. In the present embodiment, p++/n++-GaAs is preferred. . 5 Sb. 5. As a tunneling junction material 4503 having a thickness of 50 nm of InP, doping concentration of l ~ 2 xl 0 18 cm- 3 .
第四子电池倒装形成于隧穿结 4503下方, 其带隙为 0. 6 - 0. 9 eV, 为本四结太阳能电池 的底电池。 其具体结构: 第四子电池的窗口层 4440形成于隧穿结 4503的下方, 发射区 4430 形成于窗口层 4440的下方, 基区 4420形成于发射区 4430的下方, 背场层 4410形成于基区 4420下方。 在本实施例中, 优选 n型 InP作为窗口层 4440的材料, 其厚度为 40 nm, 掺杂浓度 大约 1 X 1018 cm- 3; 选择 n型 In。.53Ga。.47As和 p型 In。.53Ga。.47As分别做为基区 4420和发射区 4430 , 其带隙为 0. 6 eV, 基区 4420的厚度为 2微米, 掺杂浓度为 2 χ 10" cm- 3 ~ 5 χ 10" cm- 3, 发射区 4430的厚度为 200 nm, 其掺杂浓度为 1 x 1018 cm- 3 ~ 2 χ 1018 cm- 3; 选择 InP作为背场层 4410的 材料, 厚度为 50 nm, 掺杂浓度为 1 ~ 2 χ 1018 cm- 3The fourth sub-battery is formed under the tunnel junction 4503, and has a band gap of 0.6-0.9 nV, which is the bottom battery of the four-junction solar cell. The specific structure: a window layer 4440 of the fourth sub-cell is formed under the tunneling junction 4503, an emitter region 4430 is formed under the window layer 4440, a base region 4420 is formed under the emitter region 4430, and a back-field layer 4410 is formed at the base. Below area 4420. In the present embodiment, n-type InP is preferably used as the material of the window layer 4440, and has a thickness of 40 nm and a doping concentration of about 1×10 18 cm −3 ; n-type In is selected. . 53 Ga. 47 As and p type In. . 53 Ga. 47 As, respectively, as the base region 4420 and the emitter region 4430, the band gap is 0. 6 eV, the base region 4420 has a thickness of 2 μm, and the doping concentration is 2 χ 10" cm - 3 ~ 5 χ 10" cm - 3 , the emitter region 4430 has a thickness of 200 nm, and its doping concentration is 1 x 10 18 cm - 3 ~ 2 χ 10 18 cm - 3 ; InP is selected as the material of the back field layer 4410, the thickness is 50 nm, doping concentration It is 1 ~ 2 χ 10 18 cm- 3 .
在顶电池 (即第二子电池 4200 ) 的上方沉积一层重掺杂 n++-InAlAsP作为盖帽层 4700 位 于第二子电池上方, 其厚度为 500 nm, 掺杂浓度为 1 χ 10" cm- 3; 在底电池 (即第四子电池) 的下方外延一层 InP作为背接触层 4800 , 构成四结太阳能电池。 A layer of heavily doped n++-InAlAsP is deposited over the top cell (ie, the second subcell 4200) as a capping layer 4700 over the second subcell having a thickness of 500 nm and a doping concentration of 1 χ 10" cm- 3 A layer of InP is extended as a back contact layer 4800 under the bottom cell (ie, the fourth sub-cell) to form a four-junction solar cell.
在本实施中, 在双面抛光衬底上, 釆用双面生长的方法, 将带隙不同的子电池按照由高 到低的顺序外延生长于衬底两面, 与第一子电池晶格不匹配的第二子电池生长于上方, 在第 一和第二子电池之间使用了渐变缓冲层来缓慢释放应力, 降低位错密度; 与第一子电池晶格 匹配的第三、 四子电池生长于下方, 合理配置了各子电池的带隙, 拓宽太阳能电池的光谱吸 收范围, 形成了电流匹配, 高晶格质量的高效四结太阳能电池。  In the present embodiment, on the double-sided polished substrate, the sub-cells having different band gaps are epitaxially grown on both sides of the substrate in a high-to-low order on the double-sided polishing substrate, and the first subcell lattice is not A matching second subcell is grown above, a gradient buffer layer is used between the first and second subcells to slowly release stress, reducing dislocation density; third and fourth subcells matching the first subcell lattice Growing below, the band gap of each sub-battery is reasonably configured to broaden the spectral absorption range of the solar cell, forming a highly efficient four-junction solar cell with current matching and high lattice quality.
另一些实施例提供一种高倍聚光多结太阳能电池的制备工艺, 其包括子电池 4100、 4200、 4300、 4400及各子电池之间各层的形成工艺。 根据适当的生长温度和时间且通过使用适当地 化学成分和掺杂剂, 来控制半导体结构中的晶格常数和电性质。 可以使用气相沉积方法如 MOCVD和 MBE等技术, 但优先选取 M0CVD作为本发明的生长技术。 Other embodiments provide a process for preparing a high-concentration multi-junction solar cell including sub-cells 4100, 4200, 4300, 4400 and a process of forming layers between the sub-cells. The lattice constant and electrical properties in the semiconductor structure are controlled according to appropriate growth temperatures and times and by the use of appropriate chemical compositions and dopants. Vapor deposition methods such as Techniques such as MOCVD and MBE, but M0CVD is preferred as the growth technique of the present invention.
具体制备工艺包括如下步骤: 第一步, 提供一双面抛光衬底 4001。 在本实施例中, 选用 p 型厚度为 200微米的双面抛光的 InP衬底, 其掺杂浓度为在 1 X 1017cm- 3~5 X 1017cm- 3The specific preparation process includes the following steps: In the first step, a double-sided polished substrate 4001 is provided. In this embodiment, a double-sided polished InP substrate having a p-type thickness of 200 μm is selected, and the doping concentration thereof is 1 × 10 17 cm - 3 to 5 X 10 17 cm - 3 .
下一步, 形成第一子电池 4100, 其带隙为 1.3~1.5 eV。 如图 21〜图 23所示, 以生长衬 底 4001本身作为基区 4120, 在衬底 4001正表面扩散磷形成 n型发射区 4130, 从而获得第一 子电池, 其带隙为 1.35 eV, 扩散厚度优选值为 100 nm。 在发射区 4130上面生长 n型 ΙηΑΙΡ 作为窗口层 4140, 其厚度为 25 nm, 掺杂浓度在 1 χ 1018 cm- 3左右。 Next, a first sub-battery 4100 is formed with a band gap of 1.3 to 1.5 eV. As shown in FIG. 21 to FIG. 23, the growth substrate 4001 itself is used as the base region 4120, and phosphorus is diffused on the front surface of the substrate 4001 to form an n-type emitter region 4130, thereby obtaining a first subcell having a band gap of 1.35 eV, diffusion. The thickness is preferably 100 nm. An n-type Ιn 生长 is grown on the emitter region 4130 as a window layer 4140 having a thickness of 25 nm and a doping concentration of about 1 χ 10 18 cm -3 .
下一步, 如图 24所示, 在第一子电池上方外延生长重掺杂的 p++-InGaP /n++-InGaP作为 隧穿结 4501, 其厚度是 50 nm, 掺杂浓度高达 2 χ 10" cm- 3, 用于将第一子电池连接至第二子 电池。 Next, as shown in FIG. 24, heavily doped p++-InGaP/n++-InGaP is epitaxially grown over the first subcell as a tunneling junction 4501 having a thickness of 50 nm and a doping concentration of up to 2 χ 10" cm- 3 , for connecting the first sub-battery to the second sub-battery.
下一步,如图 25所示,在隧穿结 4501上方形成渐变缓冲层 4600,其带隙为 1.5 ~ 1.8 eV。 在本实施例中, 渐变缓冲层 4600包含 6层结构, 每层厚度为 250 nm, 选择 p型 InGaP作为其 材料, 其中 Ga的百分含量从 0增长到 0.28, 掺杂浓度大约为 l x 1018 cm- 3Next, as shown in FIG. 25, a graded buffer layer 4600 is formed over the tunnel junction 4501 with a band gap of 1.5 to 1.8 eV. In this embodiment, the graded buffer layer 4600 comprises a 6-layer structure, each layer having a thickness of 250 nm, and a p-type InGaP is selected as the material thereof, wherein the percentage of Ga is increased from 0 to 0.28, and the doping concentration is about lx 10 18 . Cm- 3 .
下一步, 如图 26所示, 在渐变缓冲层上方外延生长第二子电池, 其带隙为 1.8~2 eV。 其具体如下: 在渐变缓冲层上方外延生长一层 p型 InGaP作为第二子电池的背场层 4210, 其厚 度为 50 nm, 掺杂浓度为 1 ~2 X 1018 cm- 3; 在第二子电池的背场层 4210 上方外延生长 p型 In。.4Al。.6As作为基区 4220, 带隙为 1.92 eV, 厚度为 2微米, 釆用渐变掺杂方式, 浓度 1 ~ 5 x l0"cm— 3; 在第二子电池的基区 4220上方外延生长 n型 In。.4Al。.6As作为发射区 4230, 其厚度 为 lOO nm, 掺杂浓度大约 2 x l018cm- 3; 在发射区 230上方外延生长作为第二子电池的窗口层 4240, 其材料优选用 InAlAsP。 Next, as shown in Fig. 26, a second subcell is epitaxially grown over the graded buffer layer with a band gap of 1.8 to 2 eV. The specifics are as follows: epitaxially growing a p-type InGaP as a back field layer 4210 of the second sub-cell, having a thickness of 50 nm and a doping concentration of 1 ~ 2 X 10 18 cm - 3 ; The p-type In is epitaxially grown over the back field layer 4210 of the subcell. . 4 Al. 6 As the base region 4220, the band gap is 1.92 eV, the thickness is 2 micrometers, and the gradient is doped with a concentration of 1 ~ 5 x l0"cm- 3 ; epitaxial growth is performed over the base region 4220 of the second subcell. The type of In. 4 Al.. 6 As is an emitter region 4230 having a thickness of 100 nm and a doping concentration of about 2 x 10 18 cm- 3 ; epitaxially growing a window layer 4240 as a second subcell over the emitter region 230, The material thereof is preferably InAlAsP.
下一步, 如图 27所示, 在窗口层 4240上方外延生长重掺杂 n型 InAlAsP作为盖帽层 4700, 厚度为 500 nm, 掺杂浓度为 1 χ 10" cm- 3Next, as shown in FIG. 27, heavily doped n-type InAlAsP is epitaxially grown over the window layer 4240 as a capping layer 4700 having a thickness of 500 nm and a doping concentration of 1 χ 10" cm - 3 .
下一步, 如图 28所示, 在生衬底 4001 的背面外延生长一层 p型 ΙηΑΙΡ作为第一子电池的 背场层 4110, 其厚度为 100 nm, 掺杂浓度为 1 ~ 2 χ 1018cm— 3Next, as shown in FIG. 28, a p-type ΙnΑΙΡ is epitaxially grown on the back surface of the green substrate 4001 as the back field layer 4110 of the first sub-cell, and has a thickness of 100 nm and a doping concentration of 1 to 2 χ 10 18 . Cm- 3 .
下一步, 如图 29所示, 在第一子电池背场层 4110下方外延生长 P++-InP/n++- InP作为 隧穿结 4502, 其厚度为 50 nm, 掺杂浓度高达 2 χ 10"cm-3, 用于将第三子电池连接至第一子 电池。 Next, as shown in FIG. 29, P++-InP/n++-InP is epitaxially grown under the first sub-battery back field layer 4110 as a tunnel junction 4502 having a thickness of 50 nm and a doping concentration of up to 2 χ 10" cm- 3 , for connecting the third sub-battery to the first sub-battery.
下一步,如图 30所示,在隧穿结 4502下方倒装外延生长第三子电池,其带隙为 0.9-1.2 eV。 其具体如下: 在隧穿结 4502下方外延生长一层 n型 InP作为第三子电池的窗口层 4340, 其厚度为 40 nm, 掺杂浓度大约 1 χ 1018 cm- 3; 在窗口层 4340的下方外延生长发射区 4330和 基区 4320, 分别选用 n型 InGaAsP和 p型 InGaAsP作为基区 4320和发射区 4330, 基区的厚度为 3微米, 掺杂浓度为 5 x 10" cm-3, 发射区的厚度为 100 nm, 掺杂浓度为 2 >< 1018cm- 3; 在基区 的下方外延生长一层 InP作为第三子电池的背场层 4310, 其厚度为 50腿, 掺杂浓度为 1 x 1018 cm ~ 2 χ 10 cm 。 Next, as shown in FIG. 30, a third sub-cell is epitaxially grown under the tunnel junction 4502 with a band gap of 0.9-1.2 eV. The specifics are as follows: Epitaxially growing a layer of n-type InP under the tunneling junction 4502 as a window layer 4340 of the third sub-cell, having a thickness of 40 nm, a doping concentration of about 1 χ 10 18 cm- 3 ; in the window layer 4340 The epitaxial growth emitter region 4330 and the base region 4320 are epitaxially grown, and n-type InGaAsP and p-type InGaAsP are selected as the base region 4320 and the emitter region 4330, respectively, and the thickness of the base region is 3 micron, doping concentration is 5 x 10" cm- 3 , the thickness of the emitter is 100 nm, the doping concentration is 2 >< 10 18 cm - 3 ; a layer of InP is epitaxially grown below the base region as the third sub- The back field layer 4310 of the battery has a thickness of 50 legs and a doping concentration of 1 x 10 18 cm to 2 χ 10 cm.
下 一步 , 如 图 31 所示 , 在第 三 子 电 池 下方 外延生长重掺杂 的 p++ GaAS。.5Sb。.5/n++-GaAs。.5Sb。.5作为隧穿结 4503其厚度为 50 nm, 掺杂浓度高达 2 x l0"cm- 3, 用 于将第四子电池连接至第三子电池。 Next, as shown in Fig. 31, heavily doped p++ GaA S is epitaxially grown under the third subcell. . 5 Sb. . 5 /n++-GaAs. . 5 Sb. 5 as a tunnel junction 4503 having a thickness of 50 nm and a doping concentration of up to 2 x 10" cm- 3 for connecting the fourth subcell to the third subcell.
下一步,如图 32所示,在隧穿结 4503下方倒装外延生长第四子电池,其带隙为 0.6-0.9 eV。 其具体如下: 在隧穿结 4503下方外延生长一层 n型 InP作为第三子电池的窗口层 4440, 其厚度为 40 nm, 掺杂浓度大约 1 1018cm- 3; 在窗口层 4440的下方外延生长发射区 4430和 基区 4420, 分别选用 n型 In。.53Ga。.47As和 p型 p-In。.53Ga。.47As作为基区 4420和发射区 4430, 基区 的厚度为 2微米, 掺杂浓度为 2 1017cm- 3~ 5 10"cm- 3, 发射区的厚度为 4200腿, 掺杂浓度 为 1 1018 cm- 3 ~ 2 1018 cm-3; 在基区的下方外延生长一层 InP作为第三子电池的背场层 4410, 其厚度为 50 nm, 掺杂浓度为 1 χ 1018cm- 3~ 2 χ 1018cm- 3Next, as shown in FIG. 32, a fourth sub-cell is epitaxially grown under the tunnel junction 4503 with a band gap of 0.6-0.9 eV. The specifics are as follows: An n-type InP is epitaxially grown under the tunnel junction 4503 as a window layer 4440 of the third sub-cell, having a thickness of 40 nm, a doping concentration of about 1 10 18 cm- 3 ; under the window layer 4440 Epitaxial growth emitter region 4430 and base region 4420 are selected as n-type In, respectively. . 53 Ga. 47 As and p-type p-In. . 53 Ga. 47 As the base region 4420 and the emitter region 4430, the base region has a thickness of 2 μm, a doping concentration of 2 10 17 cm - 3 to 5 10" cm - 3 , and an emitter region thickness of 4200 legs, and the doping concentration is 1 10 18 cm - 3 ~ 2 10 18 cm- 3 ; epitaxially growing a layer of InP as the back field layer 4410 of the third subcell under the base region, having a thickness of 50 nm and a doping concentration of 1 χ 10 18 cm - 3 ~ 2 χ 10 18 cm- 3 .
下一步, 如图 20所示, 在第四子电池的背场层 410的下方外延生长一层 InP作为背接触 层。 最后, 可在样品表面进行减反膜蒸镀, 金属电极的制备等后期工艺, 完成所需要的太阳 能电池。  Next, as shown in Fig. 20, a layer of InP is epitaxially grown under the back field layer 410 of the fourth sub-cell as a back contact layer. Finally, the surface of the sample can be subjected to anti-reflection vapor deposition, metal electrode preparation and other post-processes to complete the required solar cell.
在本实施例中, 在双面抛光的 InP衬底上釆用双面生长的方法外延制备的 In0.4Al0.6As(l.92eV)/InP(l.35 eV) /InGaAsP (1 eV) /In„.53Ga„.4vAs (0.6 eV)四结太阳能电池, 能 够有效地拓宽吸收光谱范围, 增加各结子电池之间的电流匹配。 In the present embodiment, In 0 . 4 Al 0 . 6 As (l.92 eV) / InP (l.35 eV) / InGaAsP (Pb) prepared by double-sided growth on a double-sided polished InP substrate ( 1 eV) /In„. 53 Ga„. 4v As (0.6 eV) four-junction solar cell, which effectively broadens the absorption spectrum range and increases the current matching between the individual junction cells.
很明显地, 本发明的说明不应理解为仅仅限制在上述实施例, 而是包括利用本发明构思 的全部实施方式。  It is apparent that the description of the present invention should not be construed as being limited to the above-described embodiments, but rather to all embodiments that utilize the inventive concept.

Claims

杈利 要 求 profit requirements
1. 一种太阳能电池制作方法, 包括如下步骤: 1. A solar cell manufacturing method, including the following steps:
在一衬底第一面形成第一子电池, 其具有第一带隙; Forming a first sub-cell having a first band gap on a first surface of a substrate;
在所述第一子电池上方形成渐变缓冲层, 其具有大于第一带隙的第二带隙; Forming a graded buffer layer above the first sub-cell having a second band gap greater than the first band gap;
在所述的渐变缓冲层上方形成第二子电池,其具有大于第二带隙的第三带隙; A second sub-cell is formed above the graded buffer layer, which has a third band gap greater than the second band gap;
在所述衬底的第二面形成第三子电池, 其具有小于第一带隙的第四带隙; forming a third sub-cell on the second side of the substrate having a fourth band gap smaller than the first band gap;
在所述的第三子电池的下方形成第四子电池, 其具有小于第四带隙的第五带隙; 在所述的第四子电池的下方外延形成背接触层。 A fourth sub-cell is formed below the third sub-cell, which has a fifth band gap smaller than the fourth band gap; a back contact layer is epitaxially formed below the fourth sub-cell.
2. 根据权利要求 1所述的一种太阳能电池的制作方法, 其特征在于: 所述衬底是双面抛 光 p-InP衬底, 用于双面半导体外延生长; 所述第三及第四子电池为倒装生长。 2. The manufacturing method of a solar cell according to claim 1, characterized in that: the substrate is a double-sided polished p-InP substrate, used for double-sided semiconductor epitaxial growth; the third and fourth The sub-battery is grown flip-chip.
3. 根据权利要求 2所述的一种太阳能电池的制作方法, 其特征在于: 以衬底本身作为基 区, 在 P型衬底正面注入 n型离子形成发射区, 构成所述第一子电池。 3. The manufacturing method of a solar cell according to claim 2, characterized in that: the substrate itself is used as the base region, n-type ions are injected on the front side of the P-type substrate to form an emission region, and the first sub-cell is formed. .
4. 根据权利要求 2所述的一种太阳能电池的制作方法, 其特征在于: 所述渐变缓冲层为 多层结构, 其材料是 InxGai_xP, 所述双面抛光 p-InP衬底的厚度小于或等于 200微米。 4. The manufacturing method of a solar cell according to claim 2, characterized in that: the gradient buffer layer has a multi-layer structure, and its material is InxGai_xP , and the double-sided polished p-InP The thickness of the substrate is less than or equal to 200 microns.
5. 根据权利要求 1 所述的一种太阳能电池的制作方法, 其特征在于: 所述第一带隙为 5. The method of manufacturing a solar cell according to claim 1, characterized in that: the first band gap is
1.3~1.5 eV; 所述第二带隙为 1.5-1.8 eV; 所述第三带隙为 1.8 ~ 2 eV; 所述第四带隙为 0.9 ~ 1.2 eV; 所述第五带隙为 0.6 ~ 0.9 eV。 1.3~1.5 eV; the second band gap is 1.5-1.8 eV; the third band gap is 1.8~2 eV; the fourth band gap is 0.9~1.2 eV; the fifth band gap is 0.6~ 0.9 eV.
6. 根据权利要求 1所述的一种太阳能电池制作方法, 还包括: 6. A solar cell manufacturing method according to claim 1, further comprising:
(1)在一生长衬底表面沉积一层 Si02掩膜层, 形成图形化衬底; (1) Deposit a Si0 2 mask layer on the surface of a growth substrate to form a patterned substrate;
(2)在图形化衬底上外延生长一层牺牲层将 Si02掩膜层图形包围起来; (2) Epitaxially grow a sacrificial layer on the patterned substrate to surround the Si0 2 mask layer pattern;
(3)在牺牲层上外延生长一缓冲层; (3) Epitaxially grow a buffer layer on the sacrificial layer;
(4)在缓冲层上外延生长太阳能电池的半导体材料层序列; (4) Epitaxially growing the semiconductor material layer sequence of the solar cell on the buffer layer;
( 5 )将前述太阳能电池的半导体材料层序列与一支撑基板键合; (5) Bonding the semiconductor material layer sequence of the aforementioned solar cell to a supporting substrate;
(6)选择性腐蚀掉 Si02掩膜层; (6) Selectively etch away the Si02 mask layer;
(7)选择性腐蚀掉牺牲层, 剥离衬底。 (7) Selectively etch away the sacrificial layer and peel off the substrate.
7. 根据权利要求 6所述的一种太阳能电池制作方法, 其特征在于: 所述步骤(1) 中形 成的 Si02掩膜层的图形为单方向平行, 或者纵横交错, 或者彼此交叉。 7. A solar cell manufacturing method according to claim 6, characterized in that: the pattern of the SiO2 mask layer formed in step (1) is parallel in one direction, or crisscrossed, or crosses each other.
8. 根据权利要求 6所述的一种太阳能电池制作方法, 其特征在于: 所述步骤(2) 中半 导体牺牲层的材料为 InGaP或 AlGaAs。 8. A solar cell manufacturing method according to claim 6, characterized in that: the material of the semiconductor sacrificial layer in step (2) is InGaP or AlGaAs.
9. 根据权利要求 6所述的一种太阳能电池制作方法, 其特征在于: 所述步骤(5) 中的 支撑基板为 Si片。 9. A solar cell manufacturing method according to claim 6, characterized in that: the supporting substrate in step (5) is a Si chip.
10.根据权利要求 6所述的一种太阳能电池制作方法, 其特征在于: 所述步骤(5 )包括 如下步骤: 10. A solar cell manufacturing method according to claim 6, characterized in that: the step (5) includes the following steps:
在太阳能电池的半导体材料层表面沉积一第一金属键合层; Deposit a first metal bonding layer on the surface of the semiconductor material layer of the solar cell;
提供一 S i外延片, 在其表面形成一层高掺杂覆盖层; Provide an Si epitaxial wafer, and form a highly doped covering layer on its surface;
在覆盖层上沉积一第二金属键合层; depositing a second metal bonding layer on the cover layer;
通过键合工艺将倒置太阳能电池的半导体材料层序列和 S i片粘结在一起; The semiconductor material layer sequence of the inverted solar cell and the Si chip are bonded together through a bonding process;
其中, 覆盖层的材料为 InGaAs或 GaAs。 Among them, the material of the covering layer is InGaAs or GaAs.
11.根据权利要求 6所述的一种太阳能电池制作方法, 其特征在于: 所述步骤(6 ) 中釆 用氢氟酸或氟化铵选择性腐蚀掉 S i02掩膜层; 所述步骤(7 ) 中釆用盐酸与磷酸体积比 1: 1 作为选择性蚀刻液, 蚀刻牺牲层。 11. A solar cell manufacturing method according to claim 6, characterized in that: in the step (6), hydrofluoric acid or ammonium fluoride is used to selectively etch away the SiO2 mask layer; the step (6) 7) Use hydrochloric acid and phosphoric acid in a volume ratio of 1:1 as a selective etching solution to etch the sacrificial layer.
12.根据权利要求 6所述的一种太阳能电池制作方法, 其中半导体材料层序列包括 III- V 族化合物太阳能电池材料层、 接触层和牺牲层; 还包括如下步骤: 釆用湿法蚀刻法完全蚀刻 牺牲层, 蚀刻停止在接触层的表面, 露出接触层的表面; 在接触层表面上蒸镀一第一电极, 定义电极图形, 蚀刻掉电极之外的接触层; 制作第二电极。 12. A solar cell manufacturing method according to claim 6, wherein the semiconductor material layer sequence includes a III-V compound solar cell material layer, a contact layer and a sacrificial layer; further comprising the following steps: using a wet etching method to completely Etch the sacrificial layer, stop etching on the surface of the contact layer, and expose the surface of the contact layer; evaporate a first electrode on the surface of the contact layer, define the electrode pattern, and etch away the contact layer outside the electrode; make a second electrode.
13.根据权利要求 12所述的太阳能电池的制作方法, 其特征在于: 所述 III- V族化合物太 阳能电池为 Ga lnP/Ga lnAs /Ge三结太阳能电池; 所述接触层的材料为 GaAs ; 所述接触层的厚 度为 50 ~ 150 nm; 所述牺牲层的材料为 Ga lnP; 所述牺牲层的厚度为 100 - 1000 nm。 13. The manufacturing method of a solar cell according to claim 12, characterized in that: the III-V compound solar cell is a GalnP/GalnAs/Ge triple junction solar cell; the material of the contact layer is GaAs; The thickness of the contact layer is 50 ~ 150 nm; the material of the sacrificial layer is GalnP; the thickness of the sacrificial layer is 100 - 1000 nm.
14.根据权利要求 13所述的太阳能电池的制作方法, 还包括: 在被蚀刻掉接触层的太阳 能电池材料层表面上蒸镀一减反射膜。 14. The method of manufacturing a solar cell according to claim 13, further comprising: evaporating an anti-reflection film on the surface of the solar cell material layer from which the contact layer has been etched.
15.根据权利要求 1 所述的太阳能电池的制作方法形成的一种高效四结太阳能电池, 包 括: 一双面抛光衬底; 第一子电池, 由所述衬底正表面注入离子形成, 具有一第一带隙; 渐 变缓冲层, 形成于第一子电池上方, 具有一大于第一带隙的第二带隙; 第二子电池, 形成于 渐变缓冲层上方, 具有一大于第二带隙的第三带隙; 第三子电池, 倒装生长于所述衬底的背 面, 具有一小于第一带隙的第四带隙; 第四子电池, 倒装生长于第三子电池下方, 具有一小 于第四带隙的第五带隙。 15. A high-efficiency four-junction solar cell formed by the solar cell manufacturing method according to claim 1, comprising: a double-sided polished substrate; a first sub-cell formed by injecting ions into the front surface of the substrate, having a first band gap; a gradient buffer layer, formed above the first sub-cell, having a second band gap larger than the first band gap; a second sub-battery, formed above the gradient buffer layer, having a second band gap larger than the first band gap; The third band gap; The third sub-cell, flip-chip grown on the back side of the substrate, has a fourth band gap smaller than the first band gap; The fourth sub-cell, flip-chip grown below the third sub-cell, Having a fifth band gap less than the fourth band gap.
16.根据权利要求 1所述的太阳能电池的制作方法形成的一种高效四结太阳能电池,其特 征在于: 所述第二子电池由 p型 InAlAs基区和 n型 InAlAs发射区构成; 所述第三子电池由 型 InGaAsP基区和 n型 InGaAsP发射区构成; 所述第三子电池由 p型 InGaAsP基区和 n型 InGaAsP构成; 所述第四子电池由 p型 InGaAs基区和 n型 InGaAs发射区构成。 16. A high-efficiency four-junction solar cell formed by the solar cell manufacturing method according to claim 1, characterized in that: the second sub-cell is composed of a p-type InAlAs base region and an n-type InAlAs emitter region; The third sub-battery is composed of a p-type InGaAsP base region and an n-type InGaAsP emitter region; the third sub-battery is composed of a p-type InGaAsP base region and n-type InGaAsP; the fourth sub-battery is composed of a p-type InGaAs base region and an n-type InGaAsP InGaAs emission region composition.
17.根据权利要求 1所述的一种太阳能电池制作方法,其中生长衬底为 InP; 第一, 第二, 第三子电池晶格常数与衬底晶格匹配; 在所述第三子电池上形成组分渐变层; 在所述组分渐 变层上形成第四子电池, 其晶格常数与衬底晶格失配。 17. A solar cell manufacturing method according to claim 1, wherein the growth substrate is InP; the lattice constants of the first, second and third sub-cells match the substrate lattice; in the third sub-cell forming a gradient layer of components on the A fourth sub-cell is formed on the variable layer, and its lattice constant does not match the substrate lattice.
18.根据权利要求 17所述的太阳能电池的制作方法形成的太阳能电池, 其特征在于: 所 述第一子电池由 InGaAs发射极层和基极层组成; 所述第二子电池由 InxGa^ASyP^发射极层和 基极层组成, 其中 X , y的选择使 I^Ga ASyP^材料的晶格常数与衬底相同; 所述第三子电池由 InP发射极层和基极层组成; 所述第四子电池由 InGaP发射极层和基极层组成。 18. The solar cell formed by the method of manufacturing a solar cell according to claim 17, characterized in that: the first sub-cell is composed of an InGaAs emitter layer and a base layer; the second sub-cell is composed of InGaAsyP ^The emitter layer and the base layer are composed, wherein the selection of The fourth sub-cell is composed of an InGaP emitter layer and a base layer.
19.根据权利要求 18所述的太阳能电池, 其特征在于: 所述第一子电池具有 0. 72 - 0. 76 eV的带隙, 第二子电池具有 0. 9 ~ 1. 1 eV的带隙, 第三子电池具有 1. 31 eV的带隙, 第四子 电池具有 1. 8 ~ 2. 0 eV的带隙。 19. The solar cell according to claim 18, characterized in that: the first sub-cell has a band gap of 0.72-0.76 eV, and the second sub-cell has a band gap of 0.9~1.1 eV The third sub-cell has a band gap of 1. 31 eV, and the fourth sub-cell has a band gap of 1. 8 ~ 2. 0 eV.
20.根据权利要求 16所述的太阳能电池, 其特征在于: 所述组分渐变层经过组分配比变 化, 在一侧上与生长衬底晶格匹配且另一侧上与第四子电池的晶格匹配; 所述组分渐变层为 AlSbzAS l-z,层, 其组分配比从 AlSb。.44As。,56逐渐变到 AlAs。 20. The solar cell according to claim 16, characterized in that: the composition gradient layer is lattice matched with the growth substrate on one side and matched with the fourth sub-cell on the other side through changes in composition ratio. Lattice matching; The composition gradient layer is AlSb z A S l - z , and the composition ratio of the layer is from AlSb. . 44 As. , 56 gradually changes to AlAs.
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