WO2012000370A1 - 增强芯片焊点可靠性的方法、印刷电路板及电子设备 - Google Patents

增强芯片焊点可靠性的方法、印刷电路板及电子设备 Download PDF

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Publication number
WO2012000370A1
WO2012000370A1 PCT/CN2011/075322 CN2011075322W WO2012000370A1 WO 2012000370 A1 WO2012000370 A1 WO 2012000370A1 CN 2011075322 W CN2011075322 W CN 2011075322W WO 2012000370 A1 WO2012000370 A1 WO 2012000370A1
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WIPO (PCT)
Prior art keywords
chip
circuit board
printed circuit
solder
solder joint
Prior art date
Application number
PCT/CN2011/075322
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English (en)
French (fr)
Inventor
路·戴维
Original Assignee
华为终端有限公司
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Filing date
Publication date
Application filed by 华为终端有限公司 filed Critical 华为终端有限公司
Priority to EP11800115.5A priority Critical patent/EP2549530A4/en
Publication of WO2012000370A1 publication Critical patent/WO2012000370A1/zh
Priority to US13/728,775 priority patent/US20130128485A1/en

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    • H—ELECTRICITY
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    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K13/00—Apparatus or processes specially adapted for manufacturing or adjusting assemblages of electric components
    • H05K13/04—Mounting of components, e.g. of leadless components
    • H—ELECTRICITY
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/563—Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
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    • H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H01L23/293—Organic, e.g. plastic
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    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/181—Printed circuits structurally associated with non-printed electric components associated with surface mounted components
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Definitions

  • the invention relates to a printed circuit board assembly (PCBA) processing, in particular to a method for enhancing chip solder joint reliability, a printed circuit board and an electronic device.
  • PCBA printed circuit board assembly
  • Multi-functionalization and miniaturization have become the main development trends and technical requirements for personal consumer electronic products such as mobile phones and wireless network cards; therefore, in order to enhance product functions and reduce product size, consumer electronics chip manufacturers are from 0.50 mm ( ⁇ : millimeter) pins.
  • the pitch chip size package (CSP: Chip Scale Packaging) is gradually developed to CSP of 0.40mm pitch or even 0.30mm pitch, and a three-dimensional assembly process such as Cas: Package On Package is used to utilize three-dimensional space.
  • CSP Chip Scale Packaging
  • Cas Package On Package
  • the thickness of printed circuit board PCB: Printed Circuit Board
  • PCB printed Circuit Board
  • An existing method for enhancing the reliability of chip solder joints is to fill the bottom of the chip with underfill glue after SMT, so that the gap between the chip and the PCB is filled with Underfill glue, thereby relying on the Underfill glue.
  • Epoxy buffers the impact of mechanical stress on the solder joint.
  • Underfill is a separate process. After solder paste printing, component placement and reflow processes, Underfill glue is preheated, dispensed and cured with on-line or off-line dispensing equipment and curing equipment, so Underfill is required. Preheating equipment, Underfill dispensing equipment and Underfill curing equipment, of which Underfill dispensing equipment is mainly manual and semi-automatic. Therefore, an existing method for enhancing the solder joint reliability mainly includes: printing solder paste, mounting chip, reflow soldering, preheating, and Underfill glue, and underfill glue curing.
  • the inventors found that: Due to the existing method of enhancing the solder joint reliability, the Underfill process is required, and the Underfill process is not compatible with the SMT process, so in order to complete the Underf il 1, it needs to be processed in the PCBA. After adding the equipment of Underf il 1, it not only increases the equipment cost, but also increases the process flow and reduces the manufacturing efficiency.
  • the embodiments of the present invention provide a method for enhancing solder joint reliability, a printed circuit board, and an electronic device, which do not require an Underfill process, thereby reducing equipment cost and improving manufacturing efficiency.
  • the embodiment of the invention provides a method for enhancing the reliability of a solder joint of a chip, which comprises: rubbing an epoxy flux onto a solder fillet of a chip or applying an epoxy flux to a corresponding pad of a solder fillet; Mounting the chip to the pad;
  • An embodiment of the present invention provides another method for enhancing solder joint reliability, comprising: printing a solder paste on a printed circuit board, the solder paste comprising an epoxy resin component;
  • the printed circuit board on which the chip and the solder paste are printed is subjected to reflow treatment to complete the curing of the epoxy resin.
  • Embodiments of the present invention provide a printed circuit board including a chip, the chip being externally soldered on the printed circuit board and the lower half of the chip being protected by an epoxy resin layer.
  • Another printed circuit board is provided, including a chip, a solder joint between the chip and the printed circuit board including a solder paste ball, and an epoxy protective layer formed on the surface of the solder paste ball.
  • the embodiment of the present invention provides another printed circuit board, including a chip, which is soldered to the printed circuit board by the method for enhancing the solder joint reliability provided by the embodiment of the present invention.
  • Embodiments of the present invention provide an electronic device including a printed circuit board, the printed circuit board including a chip, the chip being externally connected to the solder joint on the printed circuit board and the lower half of the chip Covered by an oxygen resin protective layer.
  • An embodiment of the present invention provides another electronic device, including a printed circuit board, the printed circuit board includes a chip, a solder joint between the chip and the printed circuit board includes a solder paste ball, and the solder paste ball A layer of epoxy resin is formed on the surface.
  • the embodiment of the present invention provides another electronic device, including a printed circuit board, the printed circuit board includes a chip, and the chip is soldered to the printed circuit board by using a method for enhancing chip solder joint reliability provided by the embodiment of the present invention. on.
  • FIG. 1 is a flow chart of a method for enhancing solder joint reliability according to an embodiment of the present invention
  • FIG. 2 is a schematic structural view of a solder joint of a chip on a PCB according to an embodiment of the present invention
  • FIG. 3 is another embodiment of the present invention
  • FIG. 4 is a flow chart of a method for enhancing solder joint reliability according to another embodiment of the present invention.
  • FIG. 5 is a schematic structural view of a solder joint of a chip on a PCB according to an embodiment of the present invention
  • Figure 6 is a schematic view showing the structure of a solder joint in one embodiment of the present invention.
  • FIG. 1 is a flowchart of a method for enhancing the reliability of the chip defect according to an embodiment of the present invention.
  • the embodiment describes the process of the POP.
  • the process of enhancing the reliability of the top chip solder joints including:
  • Epoxy Flux is applied to the solder fillet of the chip or Epoxy Flux is applied to the corresponding PCB pad of the solder fillet, and the chip is mounted on the pad.
  • Epoxy Flux is a composite material that combines the Flux removal pad OSP film or oxide layer, conducts heat, assists solder ball wetting and spreading, and epoxy resin composition, so that it can be soldered after soldering is completed.
  • An epoxy resin protective layer is formed around it to buffer mechanical stress and improve the mechanical strength of the solder joint when the solder joint is subjected to mechanical impact.
  • the chip may specifically be a ball grid array package chip or a CSP chip or any chip that needs to enhance the mechanical reliability of the solder joint.
  • Epoxy Flux can be applied to the soldering foot of the chip by Dipping method. Epoxy Flux can be applied to the PCB pad corresponding to the chip soldering foot by Jetting or Dispensing. Ways, etc.
  • the pads can be located on the underlying chip in the POP process flow.
  • Epoxy Flux cures under the same conditions as solder paste reflow, Epoxy Flux cures while the pad is reflowed.
  • FIG. 2 illustrates the structure of the solder joint of the chip on the PCB after using the technical solution provided by the embodiment.
  • the chip 202 has two solder joints 204 on the PCB 201; wherein, the outer portion of the solder joint 204 is The epoxy resin protective layer 203 is covered.
  • this embodiment uses Epoxy Flux instead of ordinary Flux. Since Epoxy Flux contains epoxy resin, epoxy resin can be formed around the solder joint after soldering. The protective layer, therefore, can absorb the mechanical stress to improve the mechanical strength of the solder joint when the solder joint is subjected to mechanical impact, so the Underfill process is not needed, so that the Underfill device is not required, thereby reducing the equipment cost, and since The Underfill process is required to reduce the process and increase manufacturing efficiency. At the same time, since only the epoxy protection layer needs to be formed around the solder joints, it is only necessary to use Epoxy Flux at the solder fillet position, which is a point-to-point process solution.
  • the Underfill process requires material savings and cost reduction when the pad is completely filled with the Underfill glue.
  • the chip since there is only Epoxy Flux at the solder joint position, the chip is disassembled and assembled when the chip fails to be repaired. Underfill glue-filled chips are convenient, so the success rate of rework can be improved.
  • Epoxy Flux can be applied to the soldering feet of the chip using fully automatic equipment, which is more consistent with Underfill manual dispensing and semi-automatic dispensing. Can improve product quality.
  • FIG. 3 illustrates a flow of a method for enhancing chip solder joint reliability according to another embodiment of the present invention, which describes a process for enhancing the reliability of an underlying chip solder joint in a POP process flow, or enhancing a non-POP process flow.
  • the pad is a conductor pattern corresponding to the position of the die pad on the PCB, or a conductor pattern corresponding to the position of the chip pad on the bottom chip surface of the POP assembly.
  • This embodiment includes :
  • solder paste Since there are other components on the PCB in addition to the chip, it is necessary to print solder paste for the soldering legs of other components, and since the embodiment of the present invention uses Epoxy Flux to complete the soldering of the soldering legs, the solder paste is not printed at the corresponding position of the soldering legs. .
  • Epoxy Flux is applied to the solder fillet of the chip or Epoxy Flux is applied to the pad corresponding to the solder fillet of the chip, and the chip is mounted on the PCB.
  • this embodiment uses Epoxy Flux instead of ordinary Flux. Since Epoxy Flux contains an epoxy resin component, an epoxy resin protective layer can be formed around the solder joint after soldering, so that when the solder joint is subjected to mechanical shock Can buffer mechanical stress and improve the mechanical strength of the solder joint, so there is no need to use the Underfill process, so there is no need to install Underfill In order to reduce equipment cost, and because the Underfill process is not required, the process flow can be reduced and the manufacturing efficiency can be improved. At the same time, since only the epoxy protective layer needs to be formed around the solder joint, it is only required to be used at the solder fillet position.
  • Epoxy Flux a point-to-point process solution, saves material and saves on cost compared to the Underfill process, which requires an Epoxy Flux at the solder joint location.
  • the chip fails to be repaired, the chip is easier to disassemble than the Underfill glue-filled chip, so the success rate of the repair can be improved.
  • the Epoxy Flux can be mounted on the soldering foot of the chip using fully automatic equipment, and Underfill manual Dispensing and semi-automatic dispensing are more consistent and can improve product quality.
  • this embodiment does not print solder paste at the corresponding position of the solder fillet, thus avoiding various kinds of solder paste and flux may be incompatible. problem.
  • the embodiment of the present invention is to embed Epoxy Flux onto the solder fillet of the chip, it is not necessary to print solder paste on the pad (the underlying chip in the POP process flow and the PCB in the PCB process, or in the non-POP process flow), so and may be applied to 0.5mm bitch 0.4mm bitch, it may be applied to 0.3mm bitch.
  • FIG. 4 illustrates a flow of a method for enhancing chip solder joint reliability according to another embodiment of the present invention, which describes a process for enhancing the reliability of an underlying chip solder joint in a POP process flow, or enhancing a non-POP process flow.
  • the process of reliability of chip solder joints on a PCB including:
  • solder paste on a PCB, the solder paste comprising an Epoxy component
  • the solder paste can be printed on the PCB to print the Epoxy onto the PCB.
  • the chip may specifically be a ball grid array package chip or a CSP chip.
  • Epoxy can be cured while reflowing the PCB, so that an epoxy protective layer can be formed around the solder joint after the reflow is completed, thus suffering from solder joints. When mechanically impacted, it can act to buffer mechanical stress and increase the mechanical strength of the solder joint.
  • FIG. 5 illustrates the structure of the solder joint of the chip on the PCB after using the technical solution provided by the embodiment.
  • the chip 502 has a solder joint 504 on the PCB 501; wherein, outside the solder joint 504 Both the portion and the lower half of the chip 502 are covered by an epoxy protective layer 503.
  • the specific structure of the solder joint 504 is as shown in FIG. 6.
  • the solder joint between the chip 601 and the PCB 602 includes a solder ball 603 and an epoxy protective layer 604 formed on the surface of the solder paste ball 603. .
  • the Epoxy component is added to the solder paste, and the conditions of the Epoxy curing are the same as those of the solder paste reflow, so that the Epoxy can be cured while the pad is being reflowed, so that after the reflow is completed,
  • An epoxy protective layer is formed around the solder joints, so that when the solder joint is subjected to a mechanical impact, the mechanical stress can be buffered to increase the mechanical strength of the solder joint, so that the Underfill process is not required, thereby eliminating the need for an Underfill device, thereby reducing Equipment costs are invested, and because the Underfill process is not required, process flow can be reduced and manufacturing efficiency can be improved.
  • An embodiment of the present invention provides a printed circuit board including a chip, wherein the chip is covered by an epoxy protective layer on the outside of the solder joint on the printed circuit board and the lower half of the chip;
  • the structure of the solder joint is shown in Figure 5.
  • Another embodiment of the present invention provides a printed circuit board including a chip, wherein a solder joint between the chip and the printed circuit board includes a solder paste ball and a layer of epoxy resin formed on the surface of the solder paste ball. Layer; The structure of the solder joint is shown in Figure 6.
  • the chip may be a ball grid array package chip, or a chip size package chip, or any chip that needs to enhance the mechanical reliability of the solder joint.
  • Still another embodiment of the present invention provides a printed circuit board including a chip that is soldered to a printed circuit board by the aforementioned method of enhancing chip solder joint reliability.
  • An embodiment of the present invention provides an electronic device including a printed circuit board including a chip, wherein the chip is epoxy on the outside of the solder joint on the printed circuit board and the lower half of the chip Covered with a resin protective layer.
  • Another embodiment of the present invention provides an electronic device including a printed circuit board including a chip, wherein a solder joint between the chip and the printed circuit board includes a solder paste ball, and a solder paste ball surface A layer of epoxy resin is formed.
  • Another embodiment of the present invention provides an electronic device including a printed circuit board including a chip soldered to the printed circuit board by the aforementioned method of enhancing chip solder joint reliability.
  • the electronic device provided by the embodiment of the present invention may be any device that needs to use a printed circuit board, such as a user equipment, a base station device, a computer, a storage device, etc., where the user equipment may be a mobile phone, an internet card, a fixed station, an access terminal, or the like.
  • the above storage medium may be a magnetic disk, an optical disk, or a read-only memory.
  • ROM Read-Only Memory
  • RAM Random Access Memory

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Description

增强芯片焊点可靠性的方法、 印刷电路板及电子设备 本申请要求于 2010 年 6 月 28 日提交中国专利局、 申请号为 201010213052.9, 发明名称为 "增强芯片焊点可靠性的方法、 印刷电路板及 电子设备" 的中国专利申请的优先权， 其全部内容通过引用结合在本申请 中。
技术领域
本发明涉及组装印刷电路板 ( PCBA: Printed Circuit Board Assembly ) 加工， 具体涉及增强芯片焊点可靠性的方法、 印刷电路板及电子设备。 背景技术
多功能化和小型化成为手机、 无线上网卡等个人消费电子产品的主要 发展趋势和技术需求； 因此为了增强产品功能以及减小产品体积， 消费电 子芯片厂商从 0.50 毫米 （匪： millimeter) 引脚间距 （pitch) 的芯片尺 寸封装（CSP: Chip Scale Packaging )逐步向 0.40mm pitch甚至 0.30mm pitch 的 CSP发展，同时推出立体组装工艺如层叠封装（POP: Package On Package) 芯片堆叠技术利用三维空间， 提高 PCBA 的布局密度， 印刷电路板（PCB: Printed Circuit Board )的厚度也由 1.20mm, 1. Oram向 0.8 Omm甚至 0.60mm 方向发展， 以满足小型化的需求。 芯片布局密度的提升、 焊球体积的减小 和 PCB厚度变薄带来的 PCBA组装强度的下降， 对高密表面贴装技术（ SMT: Surface Mounted Technology ) 组装工艺和焊点可靠性提出新的挑战， 尤 其在手机类产品中， 因为产品日常使用中需要经受跌落、 翻滚、 振动等场 景带来的机械应力沖击，对球栅阵列封装（球栅阵列封装： Bal 1 Grid Array ) /CSP类芯片的焊点机械可靠性要求很高， 需要通过一些工艺解决方案增强 焊点可靠性。
现有的一种增强芯片焊点可靠性的方法是在 SMT 之后采用底部填充 (Underfill )胶水对芯片的底部做填充， 使芯片与 PCB 之间的空隙充满 Underfill胶水，从而依靠 Underfill胶水中含有的环氧树脂緩沖机械应力 对焊点带来的沖击。 Underfill是一道单独的工序， 一般在锡膏印刷、 元器 件贴片和回流工序之后， 通过在线式或离线式的点胶设备和固化设备完成 Underfill 胶水的预热、 点胶和固化， 因此需要 Underfill 预热设备、 Underfill点胶设备和 Underfill 固化设备，其中 Underfill点胶设备主要 有手工和半自动两种。 因此现有的一种增强芯片焊点可靠性的方法主要包 括：印刷锡膏，贴装芯片，回流焊接，预热以及点 Underfill胶水， Underfill 胶水的固化。
同时， 由于现有的锡膏印刷方式无法满足 0.30腿 pitch的 CSP芯片高 密印刷的需求， 因此釆用的是 Dipping Flux的工艺解决方案， 但由于可靠 性的要求， Dipping Flux后还是需要釆用 Underf i 11保护的方案。
在对现有技术的研究中， 发明人发现： 由于现有的增强芯片焊点可靠 性的方法都需要 Underfill工艺， 而 Underfill工艺与 SMT工艺不兼容， 因此为了完成 Underf il 1 ,需要在 PCBA加工后增加 Underf il 1的相关设备， 不仅增加了设备成本投入， 还增加了工序流程， 降低了制造效率。
发明内容
本发明实施例提供了增强芯片焊点可靠性的方法、 印刷电路板及电子 设备， 不需要使用 Underfill 工艺， 从而降低设备成本投入， 提高制造效 率。
本发明实施例提供了一种增强芯片焊点可靠性的方法， 包括： 将环氧树脂助焊剂蘸到芯片的焊脚上或将环氧树脂助焊剂涂到芯片焊 脚对应的焊盘上， 将所述芯片贴装到焊盘；
对贴装了所述芯片的焊盘进行回流处理， 完成环氧树脂助焊剂的固化。 本发明实施例提供了另一种增强芯片焊点可靠性的方法， 包括： 在印刷电路板上印刷锡膏， 所述锡膏包括环氧树脂成分；
将芯片贴装到所述印刷了锡膏的印刷电路板；
对贴装了所述芯片和印刷了锡膏的印刷电路板进行回流处理， 完成环 氧树脂的固化。
本发明实施例提供了一种印刷电路板， 包括芯片， 所述芯片在所述印 刷电路板上的焊点的外部以及所述芯片的下半部分都被环氧树脂保护层所 本发明实施例提供了另一种印刷电路板， 包括芯片， 所述芯片与所述 印刷电路板之间的焊点包括锡膏球， 以及所述锡膏球表面形成的一层环氧 树脂保护层。 本发明实施例提供了另一种印刷电路板， 包括芯片， 所述芯片用本发 明实施例提供的增强芯片焊点可靠性的方法焊接在所述印刷电路板上。
本发明实施例提供了一种电子设备， 包括印刷电路板， 所述印刷电路 板包括芯片， 所述芯片在所述印刷电路板上的焊点的外部以及所述芯片的 下半部分都被环氧树脂保护层所覆盖。
本发明实施例提供了另一种电子设备， 包括印刷电路板， 所述印刷电 路板包括芯片， 所述芯片与所述印刷电路板之间的焊点包括锡膏球， 以及 所述锡膏球表面形成的一层环氧树脂保护层。
本发明实施例提供了另一种电子设备， 包括印刷电路板， 所述印刷电 路板包括芯片， 所述芯片用本发明实施例提供的增强芯片焊点可靠性的方 法焊接在所述印刷电路板上。
从本发明实施例提供的以上技术方案可以看出， 由于本发明实施例使 用环氧树脂助焊剂 （ Epoxy F lux )替代普通 Flux， 由于 Epoxy Fl ux含有环 氧树脂的成分， 从而在焊接完成后可以在焊点周围形成环氧树脂保护层， 因此在焊点遭受机械沖击时， 可以起到緩沖机械应力提高焊点机械强度的 作用， 因此不需要使用 Underf i l l工艺， 从而不需要配备 Underf i 1 1设备， 从而降低设备成本投入， 并且由于不需要使用 Underf i l l 工艺， 从而可以 减少工艺流程， 提高制造效率。
附图说明
为了更清楚地说明本发明实施例中的技术方案， 下面将对实施例描述 中所需要使用的附图作简单地介绍， 显而易见地， 下面描述中的附图仅仅 是本发明的一些实施例， 对于本领域普通技术人员来讲， 在不付出创造性 劳动性的前提下， 还可以根据这些附图获得其他的附图。
图 1为本发明一个实施例提供的增强芯片焊点可靠性的方法的流程图； 图 2为本发明一个实施例中芯片在 PCB上焊点的结构示意图； 图 3 为本发明另一个实施例提供的增强芯片焊点可靠性的方法的流程 图；
图 4 为本发明另一个实施例提供的增强芯片焊点可靠性的方法的流程 图；
图 5为本发明一个实施例中芯片在 PCB上焊点的结构示意图； 图 6为本发明一个实施例中焊点的结构示意图。
具体实施方式
下面将结合本发明实施例中的附图， 对本发明实施例中的技术方案进 行清楚、 完整地描述， 显然， 所描述的实施例仅仅是本发明一部分实施例， 而不是全部的实施例。 基于本发明中的实施例， 本领域普通技术人员在没 有作出创造性劳动前提下所获得的所有其他实施例， 都属于本发明保护的 范围。
先介绍本发明实施例提供的增强芯片焊点可靠性的方法， 图 1 描述了 本发明一个实施例提供的增强芯片烊点可靠性的方法的流程， 该实施例描 述的是 POP的工艺流程中增强顶层芯片焊点的可靠性的流程， 包括：
101、将 Epoxy Flux蘸到芯片的焊脚上或将 Epoxy Flux涂到芯片焊脚对 应的 PCB焊盘上， 将该芯片贴装到焊盘。
Epoxy Flux是一种复合材料， 既具有 Flux去除焊盘 OSP膜或氧化层， 传导热量， 辅助焊球润湿铺展的焊接功能， 又有环氧树脂的成分， 从而可 以在焊接完成后在焊点周围形成环氧树脂保护层， 在焊点遭受机械沖击时， 起到緩冲机械应力提高焊点机械强度的作用。 其中， 芯片具体可以是球栅 阵列封装芯片或 CSP芯片或任何需要增强焊点机械可靠性的芯片等。
其中， 将 Epoxy Flux蘸到芯片的焊脚上可以釆用浸蘸（ Dipping )方式， 将 Epoxy Flux涂到芯片焊脚对应的 PCB焊盘上可釆用点涂（ Jetting ) 方式 或喷洒 （Dispensing )方式等。
其中， 焊盘可以位于 POP工艺流程中底层芯片上。
102、 对贴装了芯片的焊盘进行回流处理， 完成 Epoxy Flux的固化。 由于 Epoxy Flux固化的条件与锡膏回流的条件相同， 因此在对焊盘进 行回流处理的同时可以完成 Epoxy Flux的固化。
图 2描述了使用本实施例提供的技术方案后， 芯片在 PCB上焊点的结 构， 如图 2所示， 芯片 202在 PCB 201上有两个焊点 204; 其中， 焊点 204 的外部被环氧树脂保护层 203所覆盖。
从上可知， 本实施例使用 Epoxy Flux替代普通 Flux, 由于 Epoxy Flux 含有环氧树脂的成分， 从而在焊接完成后可以在焊点周围形成环氧树脂保 护层， 因此在焊点遭受机械沖击时， 可以起到緩沖机械应力提高焊点机械 强度的作用， 因此不需要使用 Underfill工艺， 从而不需要配备 Underfill设 备， 从而降低设备成本投入， 并且由于不需要使用 Underfill工艺， 从而可 以减少工艺流程， 提高制造效率； 同时， 由于只需要在焊点周围形成环氧 树脂保护层， 因此只需要在焊脚位置使用 Epoxy Flux, 属于点对点的工艺 解决方案， 比 Underfill工艺需要在焊盘与芯片之间完全填充 Underfill胶水 相比，可以节约材料，降低成本； 同时， 由于只是在焊点位置有 Epoxy Flux, 因此在芯片故障需要返修时， 芯片的拆装都比 Underfill胶水填充的芯片要 方便， 因此可以提高返修成功率； 同时， 将 Epoxy Flux蘸到芯片的焊脚上 可以使用全自动设备完成， 与 Underfill手工点胶和半自动点胶相比一致性 更好， 可以提高产品品质。
图 3描述了本发明另一个实施例提供的增强芯片焊点可靠性的方法的 流程， 该实施例描述的是 POP的工艺流程中增强底层芯片焊点的可靠性、 或增强非 POP工艺流程中 PCB上芯片焊点的可靠性的流程，该实施例中焊 盘为 PCB上芯片焊脚对应位置的导体图形、或 POP组装中的底层芯片表面 芯片焊脚对应位置的导体图形， 该实施例包括：
301、 在 PCB上除芯片焊脚对应位置的其他位置印刷锡膏。
由于在 PCB上除了芯片外还有其他元件， 所以需要为其他元件的焊脚 印刷锡膏， 而由于本发明实施例使用 Epoxy Flux完成芯片焊脚的焊接， 因 此不在芯片焊脚对应位置印刷锡膏。
302、将 Epoxy Flux蘸到芯片的焊脚上或将 Epoxy Flux涂到芯片焊脚对 应的焊盘上， 将该芯片贴装到 PCB。
可以参照 301执行。
303、 对贴装了芯片的 PCB进行回流处理， 完成 Epoxy Flux的固化。 由于 Epoxy Flux固化的条件与锡膏回流的条件相同， 因此在对 PCB进 行回流处理的同时可以完成 Epoxy Flux的固化。
从上可知， 本实施例使用 Epoxy Flux替代普通 Flux, 由于 Epoxy Flux 含有环氧树脂的成分， 从而在焊接完成后可以在焊点周围形成环氧树脂保 护层， 因此在焊点遭受机械沖击时， 可以起到緩冲机械应力提高焊点机械 强度的作用， 因此不需要使用 Underfill工艺， 从而不需要配备 Underfill设 备， 从而降低设备成本投入， 并且由于不需要使用 Underfill工艺， 从而可 以减少工艺流程， 提高制造效率； 同时， 由于只需要在焊点周围形成环氧 树脂保护层， 因此只需要在焊脚位置使用 Epoxy Flux, 属于点对点的工艺 解决方案， 比 Underfill工艺需要在焊盘与芯片之间完全填充 Underfill胶水 相比，可以节约材料， P争低成本； 同时， 由于只是在焊点位置有 Epoxy Flux, 因此在芯片故障需要返修时， 芯片的拆装都比 Underfill胶水填充的芯片要 方便， 因此可以提高返修成功率； 同时， 将 Epoxy Flux蘸到芯片的焊脚上 可以使用全自动设备完成， 与 Underfill手工点胶和半自动点胶相比一致性 更好， 可以提高产品品质； 同时， 本实施例在芯片焊脚对应位置不会印刷 锡膏， 因此避免了锡膏与助焊剂可能不兼容导致的各种问题。
由于本发明实施例是将 Epoxy Flux蘸到芯片的焊脚上， 从而不需要在 焊盘 （ POP工艺流程中的底层芯片和 PCB、 或非 POP工艺流程中的 PCB ) 上印刷锡膏， 因此不仅可以应用于 0.5mm bitch和 0.4mm bitch,也可以应用 于 0.3mm bitch。
图 4描述了本发明另一个实施例提供的增强芯片焊点可靠性的方法的 流程， 该实施例描述的是 POP的工艺流程中增强底层芯片焊点的可靠性、 或增强非 POP工艺流程中 PCB上芯片焊点的可靠性的流程， 包括：
401、 在 PCB上印刷锡膏， 该锡膏包括 Epoxy成分；
在锡膏中添加 Epoxy成分后， 在 PCB上印刷锡膏， 就可以将 Epoxy印 刷到 PCB上；
402、 将芯片贴装到印刷了锡膏的 PCB;
其中， 芯片具体可以是球栅阵列封装芯片或 CSP芯片等。
403、 对贴装了芯片和印刷了锡膏的 PCB 进行回流处理， 完成 Epoxy 的固化。
由于 Epoxy固化的条件与锡膏回流的条件相同， 因此在对 PCB进行回 流处理的同时可以完成 Epoxy的固化， 从而在回流完成后可以在焊点周围 形成环氧树脂保护层， 因此在焊点遭受机械沖击时， 可以起到緩冲机械应 力提高焊点机械强度的作用。
图 5描述了使用本实施例提供的技术方案后， 芯片在 PCB上焊点的结 构， 如图 5所示， 芯片 502在 PCB 501上有焊点 504; 其中， 焊点 504的外 部以及芯片 502的下半部分都被环氧树脂保护层 503所覆盖。
其中， 焊点 504的具体结构如图 6所示， 芯片 601与 PCB 602之间的 焊点包括锡膏球（ solder ball ) 603 , 以及锡膏球 603表面形成的一层环氧树 脂保护层 604。
从上可知， 本实施例在锡膏中添加 Epoxy成分， 同时 Epoxy固化的条 件与锡膏回流的条件相同， 因此在对焊盘进行回流处理的同时可以完成 Epoxy的固化，从而在回流完成后可以在焊点周围形成环氧树脂保护层， 因 此在焊点遭受机械冲击时， 可以起到緩沖机械应力提高焊点机械强度的作 用， 因此不需要使用 Underfill工艺， 从而不需要配备 Underfill设备， 从而 降低设备成本投入， 并且由于不需要使用 Underfill工艺， 从而可以减少工 艺流程， 提高制造效率。
需要说明的是， 对于前述的各方法实施例， 为了简单描述， 故将其 都表述为一系列的动作组合， 但是本领域技术人员应该知悉， 本发明并 不受所描述的动作顺序的限制， 因为依据本发明， 某些步骤可以釆用其 他顺序或者同时进行。 其次， 本领域技术人员也应该知悉， 说明书中所 描述的实施例均属于优选实施例， 所涉及的动作和模块并不一定是本发 明所必须的。
本发明一个实施例提供了一种印刷电路板， 该印刷电路板包括芯片， 其中， 芯片在印刷电路板上的焊点的外部以及芯片的下半部分都被环氧树 脂保护层所覆盖； 该焊点的结构具体如图 5所示。
本发明另一个实施例提供了一种印刷电路板， 该印刷电路板包括芯片， 其中， 芯片与印刷电路板之间的焊点包括锡膏球以及锡膏球表面形成的一 层环氧树脂保护层； 该焊点的结构具体如图 6所示。
其中， 该芯片可以为球栅阵列封装芯片、 或芯片尺寸封装芯片、 或任 何需要增强焊点机械可靠性的芯片。
本发明的再一个实施例提供了一种印刷电路板， 该印刷电路板包括芯 片， 该芯片用前述增强芯片焊点可靠性的方法焊接在印刷电路板上。
本发明一个实施例提供了一种电子设备， 该电子设备包括印刷电路板， 该印刷电路板包括芯片， 其中， 芯片在印刷电路板上的焊点的外部以及芯 片的下半部分都被环氧树脂保护层所覆盖。 本发明另一个实施例提供了一种电子设备， 该电子设备包括印刷电路 板， 该印刷电路板包括芯片， 其中， 芯片与印刷电路板之间的焊点包括锡 膏球， 以及锡膏球表面形成的一层环氧树脂保护层。
本发明的另一个实施例提供了一种电子设备， 该电子设备包括印刷电 路板， 该印刷电路板包括芯片， 该芯片用前述增强芯片焊点可靠性的方法 焊接在印刷电路板上。
本发明实施例提供的电子设备可以是用户设备、 基站设备、 计算机、 存储设备等任何需要使用印刷电路板的设备， 其中用户设备可以是手机、 上网卡、 固定台、 接入终端等。
本领域普通技术人员可以理解实现上述实施例方法中的全部或部分流 程， 是可以通过计算机程序来指令相关的硬件来完成， 上述的程序可存储 于一计算机可读取存储介质中， 该程序在执行时， 可包括如上述各方法的 实施例的流程。 其中， 上述的存储介质可为磁碟、 光盘、 只读存储记忆体
( ROM: Read-Only Memory )或随机存储 i己忆体 （RAM: Random Access Memory ) 等。 实施例的说明只是用于帮助理解本发明的方法及其思想； 同时， 对于本领 域的一般技术人员， 依据本发明的思想， 在具体实施方式及应用范围上均 会有改变之处， 综上所述， 本说明书内容不应理解为对本发明的限制。

Claims

权利要求
1、 一种增强芯片焊点可靠性的方法， 其特征在于， 包括：
将环氧树脂助焊剂蘸到芯片的焊脚上或将环氧树脂助焊剂涂到芯片焊 脚对应的焊盘上， 将所述芯片贴装到焊盘；
对贴装了所述芯片的焊盘进行回流处理， 完成环氧树脂助焊剂的固化。
2、 如权利要求 1所述的增强芯片焊点可靠性的方法， 其特征在于， 所 述焊盘为印刷电路板上芯片焊脚对应位置的导体图形， 将环氧树脂助焊剂 蘸到芯片的焊脚上或将环氧树脂助焊剂涂到芯片对应的焊盘上前进一步包 括：
在所述印刷电路板上除芯片焊脚对应位置的其他位置印刷锡膏。
3、 如权利要求 1所述的增强芯片焊点可靠性的方法， 其特征在于， 所 述焊盘为层叠封装组装中的底层芯片表面芯片焊脚对应位置的导体图形。
4、 如权利要求 1至 3任一所述的增强芯片焊点可靠性的方法， 其特征 在于， 采用浸蘸方式将环氧树脂助烊剂蘸到所述芯片的焊脚上、 或采用点 涂方式将环氧树脂助焊剂涂到芯片焊脚对应的焊盘上、 或釆用喷洒方式将 环氧树脂助焊剂涂到芯片焊脚对应的焊盘上。
5、如权利要求 1至 3所述的增强芯片焊点可靠性的方法，其特征在于， 所述芯片为球栅阵列封装芯片或芯片尺寸封装芯片或需要增强焊点机械可 靠性的芯片。
6、 一种增强芯片焊点可靠性的方法， 其特征在于， 包括：
在印刷电路板上印刷锡膏， 所述锡膏包括环氧树脂成分；
将芯片贴装到所述印刷了锡膏的印刷电路板；
对贴装了所述芯片和印刷了锡膏的印刷电路板进行回流处理， 完成环 氧树脂的固化。
7、 如权利要求 6所述的增强芯片焊点可靠性的方法， 其特征在于， 所 述芯片为球栅阵列封装芯片或芯片尺寸封装芯片或需要增强焊点机械可靠 性的芯片。
8、 一种印刷电路板， 其特征在于， 包括芯片， 所述芯片在所述印刷电 路板上的焊点的外部以及所述芯片的下半部分都被环氧树脂保护层所覆 盖。
9、 一种印刷电路板， 其特征在于， 包括芯片， 所述芯片与所述印刷电 路板之间的焊点包括锡膏球， 以及所述锡膏球表面形成的一层环氧树脂保 护层。
10、 一种印刷电路板， 其特征在于， 包括芯片， 所述芯片用如权利要 求 1至 5任一项所述的方法焊接在所述印刷电路板上。
11、 一种印刷电路板， 其特征在于， 包括芯片和焊盘， 所述芯片用如 权利要求 6或 7所述的方法焊接在所述印刷电路板上。
12、 一种电子设备， 包括印刷电路板， 所述印刷电路板包括芯片， 所 述芯片在所述印刷电路板上的焊点的外部以及所述芯片的下半部分都被环 氧树脂保护层所覆盖。
13、 一种电子设备， 包括印刷电路板， 所述印刷电路板包括芯片， 所 述芯片与所述印刷电路板之间的焊点包括锡膏球， 以及所述锡膏球表面形 成的一层环氧树脂保护层。
14、 一种电子设备， 包括印刷电路板， 所述印刷电路板包括芯片， 所 述芯片用如权利要求 1至 5任一项所述的方法焊接在所述印刷电路板上。
15、 一种电子设备， 包括印刷电路板， 所述印刷电路板包括芯片， 所 述芯片用如权利要求 6或 7所述的方法焊接在所述印刷电路板上。
PCT/CN2011/075322 2010-06-28 2011-06-03 增强芯片焊点可靠性的方法、印刷电路板及电子设备 WO2012000370A1 (zh)

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