WO2011155162A1 - 多層配線基板および多層配線基板の製造方法 - Google Patents
多層配線基板および多層配線基板の製造方法 Download PDFInfo
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- WO2011155162A1 WO2011155162A1 PCT/JP2011/003106 JP2011003106W WO2011155162A1 WO 2011155162 A1 WO2011155162 A1 WO 2011155162A1 JP 2011003106 W JP2011003106 W JP 2011003106W WO 2011155162 A1 WO2011155162 A1 WO 2011155162A1
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- wiring board
- electrically insulating
- wiring
- insulating base
- base material
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
- H05K3/4053—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques
- H05K3/4069—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques for via connections in organic insulating substrates
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
- H05K3/4623—Manufacturing multilayer circuits by laminating two or more circuit boards the circuit boards having internal via connections between two or more circuit layers before lamination, e.g. double-sided circuit boards
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/096—Vertically aligned vias, holes or stacked vias
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/01—Tools for processing; Objects used during processing
- H05K2203/0191—Using tape or non-metallic foil in a process, e.g. during filling of a hole with conductive paste
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
- H05K3/0044—Mechanical working of the substrate, e.g. drilling or punching
- H05K3/0047—Drilling of holes
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
Definitions
- the present invention relates to a multilayer wiring board formed by connecting wiring circuits of at least two or more layers, and a method of manufacturing the same.
- a multilayer wiring board manufactured by a process as shown in FIGS. 11A to 11L has been conventionally proposed as a full-layer IVH structure resin multilayer board.
- FIG. 11A shows an electrically insulating base 1101.
- protective films 1102 are attached to both sides of the electrically insulating substrate 1101 by laminating on the electrically insulating substrate 1101.
- a through hole 1103 penetrating all of the electrically insulating base 1101 and the protective film 1102 is formed by a laser or the like.
- the through holes 1103 are filled with a conductive paste 1104 as a conductor, and the protective film 1102 is peeled off to obtain the state shown in FIG. 11E.
- the wiring material 1105 is adhered to the electrically insulating base 1101 through the heating and pressing process.
- the conductive paste 1104 is thermally cured, and electrical connection between the wiring material 1105 and the conductive paste 1104 is realized.
- the material 1110 is stacked and arranged.
- the wiring material 1110 is bonded to the electrically insulating base material 1109 through the heating and pressing process.
- the double-sided wiring board 1107 and the electrically insulating base 1109 are also bonded.
- the conductive paste 1108 is thermally cured in the same manner as shown in FIG. 11G, and the wiring material 1110 and the double-sided wiring board 1107 contact at high density via the conductive paste, and electrical connection is made. To be realized.
- a circuit material of the surface layer wiring material 1110 is formed by etching to obtain a four-layer wiring substrate 1112 having the wiring 1111 as shown in FIG. 11K.
- a four-layer wiring board is shown as a multilayer wiring board, but the number of layers of the wiring board is not limited to four, and the same steps are repeated, and wiring 1113 is shown as an example as shown in FIG. Can be obtained, and can be further multilayered.
- Patent Documents 1 and 2 are known as prior art documents related to the invention of this application.
- thermosetting resin of the electrically insulating base 1101 cures and shrinks in the heating and pressing process shown in FIG. 11G to generate internal stress, and in-plane dimensional shrinkage occurs. Do.
- the multilayer wiring board of the present invention comprises a wiring board for the inner layer having the wiring on both sides, an electrically insulating base material in which the through holes are filled with the conductive paste, and a wiring formed in the outermost layer.
- the wiring substrate and the electrically insulating base material are alternately stacked, and the wiring of the wiring substrate is disposed embedded in the electrically insulating base material at both ends of the conductive paste.
- FIG. 1A is a cross-sectional view showing a multilayer wiring board according to Embodiment 1 of the present invention.
- FIG. 1B is a cross-sectional view showing a multilayer wiring board according to Embodiment 1 of the present invention.
- FIG. 2A is a process sectional view showing a method of manufacturing a multilayer wiring board in the first embodiment of the present invention.
- FIG. 2B is a process sectional view showing the method of manufacturing the multilayer wiring board in the first embodiment of the present invention.
- FIG. 2C is a process sectional view showing the method of manufacturing the multilayer wiring board in the first embodiment of the present invention.
- FIG. 2D is a process sectional view showing the method for manufacturing the multilayer wiring board in the first embodiment of the present invention.
- FIG. 2E is a process sectional view showing the method of manufacturing the multilayer wiring board in the first embodiment of the present invention.
- FIG. 2F is a process sectional view showing the method of manufacturing the multilayer wiring board in the first embodiment of the present invention.
- FIG. 2G is a process sectional view showing the method for manufacturing the multilayer wiring board in the first embodiment of the present invention.
- FIG. 2H is a process sectional view showing the method of manufacturing the multilayer wiring board in the first embodiment of the present invention.
- FIG. 2I is a process sectional view showing the method of manufacturing the multilayer wiring board in the first embodiment of the present invention.
- FIG. 2J is a process sectional view showing the method of manufacturing the multilayer wiring board in the first embodiment of the present invention.
- FIG. 2K is a process sectional view showing the method of manufacturing the multilayer wiring board in the first embodiment of the present invention.
- FIG. 3A is a cross-sectional view showing the method of manufacturing the multilayer wiring board in the first embodiment of the present invention.
- FIG. 3B is a view showing a recognition mark of the multilayer wiring board in accordance with the first exemplary embodiment of the present invention.
- FIG. 3C is a diagram showing a recognition mark of the multilayer wiring board in the first embodiment of the present invention.
- FIG. 3D is a view showing the recognition mark of the multilayer wiring board in the first embodiment of the present invention.
- FIG. 3E is a figure which shows the recognition mark of the multilayer wiring board in Embodiment 1 of this invention.
- FIG. 3F is a view showing a recognition mark of the multilayer wiring board in accordance with the first exemplary embodiment of the present invention.
- FIG. 3G is a figure which shows the recognition mark of the multilayer wiring board in Embodiment 1 of this invention.
- FIG. 4A is a cross-sectional view showing the method of manufacturing the multilayer wiring board in the first embodiment of the present invention.
- FIG. 4B is a cross-sectional view showing the method of manufacturing the multilayer wiring board in the first embodiment of the present invention.
- FIG. 4C is a cross-sectional view showing the method of manufacturing the multilayer wiring board in the first embodiment of the present invention.
- FIG. 4D is a plan view showing the method for manufacturing the multilayer wiring board in the first embodiment of the present invention.
- FIG. 5A is a cross-sectional view showing the method of manufacturing the multilayer wiring board in the first embodiment of the present invention.
- FIG. 5B is a cross-sectional view showing the method of manufacturing the multilayer wiring board in the first embodiment of the present invention.
- FIG. 5C is a cross-sectional view showing the method of manufacturing the multilayer wiring board in the first embodiment of the present invention.
- FIG. 5D is a cross-sectional view showing the method of manufacturing the multilayer wiring board in the first embodiment of the present invention.
- FIG. 6A is a view showing a method for confirming the embeddability of the connection electrically insulating base material according to the first embodiment of the present invention.
- FIG. 6B is a diagram showing an example of an actual inspection coupon according to Embodiment 1 of the present invention.
- FIG. 6C is a diagram showing an example of a circuit for checking electrical connection in the first embodiment of the present invention.
- FIG. 7A is a cross-sectional view showing a multilayer wiring board in Embodiment 2 of the present invention.
- FIG. 7B is a cross-sectional view showing a multilayer wiring board in Embodiment 2 of the present invention.
- FIG. 8A is a process sectional view showing the method for manufacturing the multilayer wiring board in the second embodiment of the present invention.
- FIG. 8B is a process sectional view showing the method for manufacturing the multilayer wiring board in the second embodiment of the present invention.
- FIG. 8C is a process sectional view showing the method for manufacturing the multilayer wiring board in the second embodiment of the present invention.
- FIG. 8A is a process sectional view showing the method for manufacturing the multilayer wiring board in the second embodiment of the present invention.
- FIG. 8B is a process sectional view showing the method for manufacturing the multilayer wiring board in the second embodiment of the present invention.
- FIG. 8D is a process sectional view showing the method for manufacturing the multilayer wiring board in the second embodiment of the present invention.
- FIG. 8E is a process sectional view showing the method for manufacturing the multilayer wiring board in the second embodiment of the present invention.
- FIG. 8F is a process sectional view showing the method for manufacturing the multilayer wiring board in the second embodiment of the present invention.
- FIG. 8G is a process sectional view showing the method for manufacturing the multilayer wiring board in the second embodiment of the present invention.
- FIG. 8H is a process sectional view showing the method for manufacturing the multilayer wiring board in the second embodiment of the present invention.
- FIG. 8I is a process sectional view showing the method for manufacturing the multilayer wiring board in the second embodiment of the present invention.
- FIG. 8J is a process sectional view showing the method for manufacturing the multilayer wiring board in the second embodiment of the present invention.
- FIG. 8K is a process sectional view showing a method of manufacturing a multilayer wiring board in the second embodiment of the present invention.
- FIG. 8L is a process sectional view showing the method for manufacturing the multilayer wiring board in the second embodiment of the present invention.
- FIG. 8M is a process sectional view showing the method for manufacturing the multilayer wiring board in the second embodiment of the present invention.
- FIG. 8N is a process sectional view showing the method for manufacturing the multilayer wiring board in the second embodiment of the present invention.
- FIG. 9A is a cross-sectional view showing a multilayer wiring board in Embodiment 3 of the present invention.
- FIG. 9B is a cross-sectional view showing a multilayer wiring board in Embodiment 3 of the present invention.
- FIG. 10A is a process sectional view showing the method for manufacturing the multilayer wiring board in the third embodiment of the present invention.
- FIG. 10B is a process sectional view showing the method for manufacturing the multilayer wiring board in the third embodiment of the present invention.
- FIG. 10C is a process sectional view showing the method for manufacturing the multilayer wiring board in the third embodiment of the present invention.
- FIG. 10D is a process sectional view showing the method for manufacturing the multilayer wiring board in the third embodiment of the present invention.
- FIG. 10E is a process sectional view showing the method for manufacturing the multilayer wiring board in the third embodiment of the present invention.
- FIG. 10F is a process sectional view showing the method for manufacturing the multilayer wiring board in the third embodiment of the present invention.
- FIG. 10G is a process sectional view showing the method for manufacturing the multilayer wiring board in the third embodiment of the present invention.
- FIG. 10H is a process sectional view showing the method for manufacturing the multilayer wiring board in the third embodiment of the present invention.
- FIG. 10I is a process sectional view showing the method for manufacturing the multilayer wiring board in the third embodiment of the present invention.
- FIG. 10J is a process sectional view showing the method for manufacturing the multilayer wiring board in the third embodiment of the present invention.
- FIG. 10K is a process sectional view showing the method for manufacturing the multilayer wiring board in the third embodiment of the present invention.
- FIG. 10L is a process sectional view showing the method for manufacturing the multilayer wiring board in the third embodiment of the present invention.
- FIG. 10M is a process sectional view showing the method for manufacturing the multilayer wiring board in the third embodiment of the present invention.
- FIG. 10N is a process sectional view showing the method for manufacturing the multilayer wiring board in the third embodiment of the present invention.
- FIG. 10O is a process sectional view showing the method for manufacturing the multilayer wiring board in the third embodiment of the present invention.
- FIG. 10P is a process sectional view showing the method for manufacturing the multilayer wiring board in the third embodiment of the present invention.
- FIG. 11A is a process sectional view showing a method of manufacturing a conventional multilayer wiring board.
- FIG. 11A is a process sectional view showing a method of manufacturing a conventional multilayer wiring board.
- FIG. 11B is a process sectional view showing the manufacturing method of the conventional multilayer wiring board.
- FIG. 11C is a process sectional view showing the manufacturing method of the conventional multilayer wiring board.
- FIG. 11D is a process sectional view showing the manufacturing method of the conventional multilayer wiring board.
- FIG. 11E is a process sectional view showing the manufacturing method of the conventional multilayer wiring board.
- FIG. 11F is a process sectional view showing the manufacturing method of the conventional multilayer wiring board.
- FIG. 11G is a process sectional view showing the manufacturing method of the conventional multilayer wiring board.
- FIG. 11H is a process sectional view showing the manufacturing method of the conventional multilayer wiring board.
- FIG. 11I is a process sectional view showing the manufacturing method of the conventional multilayer wiring board.
- FIG. 11J is a process sectional view showing the method of manufacturing the conventional multilayer wiring board.
- FIG. 11K is a process sectional view showing the manufacturing method of the conventional multilayer wiring board.
- FIG. 11L is a process sectional view showing the manufacturing method of the conventional multilayer wiring board.
- FIGS. 1A, 1 B and 2 A to 2 K show a structure of a multilayer wiring board and a method of manufacturing the multilayer wiring board in the embodiment 1 of the present invention.
- FIG. 1A a 10-layer wiring board 101 is shown in FIG. 1A as an example of a multilayer wiring board according to the present invention.
- the 10-layer wiring board 101 shown in FIG. 1A has a structure in which the through holes 102 are filled with the conductive paste 103 in the same manner as in the conventional example to secure the electrical connection between the wirings. Also, the 10-layer wiring board 101 has connection points A where the compressibility of the conductive paste 107 filled in the through holes 106 is enhanced by the wiring 105 formed on the double-sided wiring board 104 on both sides.
- connection part A of FIG. 1A is expanded and demonstrated in detail to FIG. 1B.
- the wirings 105 disposed on both sides of the conductive paste 107 at the connection point A are formed in advance on the front and back of the adjacent double-sided wiring board 104 and project from the double-sided wiring board 104. Since the wires 105 are disposed to be embedded in the electrically insulating base material 108 at both ends of the conductive paste 107, the conductive paste 107 is compressed more strongly.
- the conductive paste 107 can obtain more stable electrical connection, and the diameter of the through hole 106 can be reduced.
- the double-sided wiring board 104 is formed in one heating and pressurizing step and a circuit forming step, and the variation in positional accuracy of the wiring 105 due to the variation in residual stress is relatively small.
- the wiring 109 in the outermost layer shown in FIG. 1A is a 10-layer wiring substrate 101 formed in two heating and pressing steps and a circuit forming step, and the variation in residual stress is small. It is superior in position accuracy compared with.
- the wiring 109 in the outermost layer has small positional variation and is excellent in positional accuracy, the positional accuracy of the wiring 109 can be made closer to the design value.
- the multilayer wiring board of the present invention when the wiring and the IC chip are mounted on a bare chip or an ACF, etc. through solder bumps, positioning with the IC chip can be easily performed because the positional accuracy of the wiring 109 is good. It is characterized in that it can be implemented and is excellent in mountability.
- FIGS. 2A to 2K show a method of manufacturing a multilayer wiring board according to the first embodiment of the present invention.
- FIG. 2A An electrically insulating base material 201 is shown in FIG. 2A, and protective films 202 are attached to both sides of the electrically insulating base material 201 by lamination as shown in FIG. 2B.
- the electrically insulating base material 201 is a composite material of fiber and resin, and a material obtained by impregnating glass fiber or organic fiber with epoxy resin, polyimide resin, BT resin, PPE resin, PPO resin or the like, polyimide, aramid, PTFE, LCP
- a material in which a porous film such as an epoxy resin, a polyimide resin, a BT resin, a PPE resin, a PPO resin or the like is impregnated, a material in which an adhesive is formed on both sides of a polyimide, aramid or LCP film can be used.
- thermosetting material as the resin is advantageous in that the formability is excellent when laminating a multilayer wiring board.
- the electrically insulating substrate 201 has the feature of being a compressible porous substrate. That is, by compressing in the thickness direction of the electrically insulating base material 201, the dimensions shrink. The degree of the contraction can be adjusted by controlling the pores formed in the electrically insulating base material 201.
- a paper of fibers such as woven fabric and non-woven fabric may be used to be impregnated with a resin, and pores are also formed simultaneously at the time of impregnation.
- the pores in the electrically insulating base material 201 can be formed uniformly and efficiently. And a highly compressible insulating substrate can be obtained.
- the thickness of the electrically insulating base material 201 a material of about 20 to 200 microns can be used by adjusting glass fiber or organic fiber, and the thickness of the material is selected according to the desired plate thickness. .
- the through-hole 203 which penetrates all of the electrically insulating base material 201 and the protective film 202 is formed with a laser etc.
- the through holes 203 can be formed by punching, drilling, or laser processing, but if carbon dioxide gas laser or YAG laser is used, small diameter through holes can be formed in a short time, and processing with excellent productivity is realized. it can.
- a through hole with a diameter of 100 microns in the electrically insulating substrate 201 having a thickness of 80 microns it is possible to form a through hole with a diameter of 100 microns in the electrically insulating substrate 201 having a thickness of 80 microns.
- a through hole with a diameter of 30 microns can be formed in an electrically insulating substrate with a thickness of 30 microns.
- the through holes 203 are filled with a conductive paste 204 as a conductor.
- the conductive paste 204 is composed of metal conductive particles such as copper and silver and a resin component.
- the use of substantially spherical particles as the conductive particles is more preferable because the paste viscosity can be kept low even when the ratio of the conductive particles in the conductive paste 204 is high.
- low melting point metals such as tin, to which metals such as silver and bismuth are added, those previously alloyed with tin, and low melting point metals coated on the surface of conductive particles such as copper And the like can be used.
- the protective film 202 is peeled off to obtain the state shown in FIG. 2E.
- the conductive paste 204 is secured by the protective film 202 in a filling amount. That is, the conductive paste 204 protrudes from the surface of the electrically insulating base material 201 by the height of the thickness of the protective film 202.
- the thickness of the protective film 202 is set to about 5 to 25% of the diameter of the through hole 203, the amount of the conductive paste 204 taken to the protective film 202 side when peeling off the protective film 202 can be suppressed. More preferable.
- a foil-like wiring material 205 is stacked and arranged from both sides.
- the wiring material 205 is adhered to the electrically insulating base material 201 through the heating and pressing process shown in FIG. 2G.
- the conductive paste 204 a large amount of resin is present between the conductive particles after filling, and a sufficient electrical connection is not secured.
- an electrolytic copper foil of 9 microns is used as the wiring material 205, but the thickness is not limited to this. Furthermore, when making a multilayer wiring board thin, an electrolytic copper foil with a carrier of 5 microns thickness or a rolled copper foil of 5 microns can be used.
- the wiring material 205 is a copper foil having a roughened shape only on the side of the electrically insulating base material 201, and chemical processing such as etching is performed after a heating and pressing step described later to form minute irregularities on the surface You may According to this method, the copper foil can be thinned by uniformly etching the copper foil after the copper foil is attached to the electrically insulating base material, which is advantageous for the miniaturization of the wiring 206.
- the wiring material 205 is formed into a circuit by etching to complete a double-sided wiring board 207 for the inner layer having the wiring 206.
- the double-sided wiring board 207 is obtained by performing the heating and pressing process and the circuit forming process once each, and the wiring position variation due to the residual stress is relatively small.
- the circuit formation method may be formed by a photographic method using a pattern film, it is preferable to form it by a method capable of direct drawing with a semiconductor laser or the like because the wiring accuracy is further improved.
- the wiring material 208, the electrically insulating base materials for connection 209 and 210, and the double-sided wiring board 207 can be stacked and arranged to obtain the laminated board 213.
- the electrically insulating substrates for connection 209 and 210 are formed in the same steps as shown in FIGS. 2A to 2E, and the through holes 211 are formed in the electrically insulating substrate 201 to achieve conductivity.
- the paste 212 is filled.
- the wiring 206 of the double-sided wiring board 207 has little variation in wiring, and the position dimension of the wiring 206 is measured in advance, and processing position data of the through hole 211 of the electrically insulating base material for connection 209 and 210 based on the result. Correct the Thus, the through hole 211 can be aligned with the wiring 206 with higher accuracy.
- the electrically insulating base material for connection 209 and 210 is divided into ranks, and the one in which the position of the wiring 206 and the through hole 211 match is selected and used As a result, it is possible to obtain a multilayer wiring board with high matching accuracy between the wiring 206 and the through hole 211 filled with the conductive paste 212.
- the wiring 206 has a shape protruding from the double-sided wiring substrate 207, and can compress the conductive paste 212 of the electrically insulating base material for connection 210 effectively. As a result, the conductive paste 212 can obtain more stable electrical connection, and the diameter of the through hole 211 can be reduced.
- At least one end of the wiring 206 may be thickened in order to perform stable electrical connection.
- connection electrically insulating base material 210 needs to embed a larger volume of wiring than the connection electrically insulating base material 209 here, the ratio of the resin contained in the material can be increased, or the resin It is more preferable to increase the fluidity at high temperatures.
- the through holes 211 structurally embed the wiring from both sides and provide stronger compression.
- the electrical connection of the conductive paste 212 can be secured.
- the diameter of the hole of the electrically insulating base material for connection may be larger than the diameter of the hole provided in the double-sided wiring board.
- the thickness of the wiring does not have to be the same in each layer, and is thinner according to the function required for each layer, such as thinner when forming a finer wiring and thicker when reinforcing the ground. preferable.
- the thickness of the wiring may be changed according to the design pattern and the fluidity of the resin to enhance the process stability of the resin molding in the heating and pressurizing process.
- the double-sided wiring board 207 for which a short between interconnections or a disconnection of the wiring has been confirmed when the wiring is inspected may be changed to a double-sided wiring board 207 where they do not occur. More preferable.
- the wiring material 208 is bonded to the electrically insulating base material 209 for connection through the heating and pressing process shown in FIG. 2J.
- the double-sided wiring board 207 and the electrically insulating base material for connection 209 are also bonded.
- the conductive pastes 212 and 216 are compressed and thermally cured in the same manner as shown in FIG. 2G, and the double-sided wiring board 207 and the double-sided wiring board 207, the double-sided wiring board 207 and the wiring material 208 Are in high density contact via the conductive pastes 212 and 216, and an electrical connection is realized.
- the surface wiring material 208 is formed into a circuit by etching to obtain a 10-layer wiring board 215 having the wiring 214 as shown in FIG. 2K.
- the circuit formation method may be formed by a photographic method using a pattern film, it is preferable to form it by a method capable of direct drawing with a semiconductor laser or the like because the wiring accuracy is further improved.
- the 10-layer wiring board 215 is formed by the two heating and pressurizing steps and the circuit forming step as described above, and the variation in the position of the wiring 214 due to the variation in residual stress is small. It is characterized in that the positional accuracy of the wiring 214 is excellent in comparison.
- the 10-layer wiring board is described as an example, but the number of wiring layers is not limited to this, and the number of constituent members alternately arranged in FIG. It is possible to realize various numbers of layers such as 8, 10, 12 layers.
- the wiring board can be manufactured by the two heating and pressurizing steps and the circuit forming step regardless of the number of wiring board layers, and a high multilayer wiring board having a large number of layers.
- a recognition mark is provided in each layer, these are recognized, alignment is performed between layers, and further temporary positioning is performed. Is preferred.
- the recognition mark at the time of stacking will be described by taking the stacking and arranging process of the six-layer substrate shown in FIG. 3A as an example.
- the recognition mark at this time it is desirable that the displacement state of a plurality of layers can be easily grasped and detected in a narrow visual field at the time of stacking.
- a concentric mark made of a plurality of vias is used as a recognition mark in the electrically insulating base material for connection 310-1.
- the relative positional relationship of the vias formed in the plurality of layers of connection electrically insulating substrates 310-1, 310-2, and 310-3 can be grasped. It is possible to In addition, the centers of the recognition marks shown in FIGS. 3B, 3D, and 3F are calculated by a method such as image recognition, and arranged in a stacking arrangement step, thereby providing a plurality of electrically insulating substrates for connection. It is possible to realize a highly accurate stacking state.
- recognition marks with different shapes and sizes of patterns are arranged on double-sided wiring boards 307-1 and 307-2, respectively. Recognize the center of each recognition mark in Fig. 3C and Fig. 3E by a method such as image recognition and align the center coordinates to determine the relative positional relationship of the patterns formed on the double-sided wiring board of multiple layers It is possible to Further, by arranging so that the recognition mark centers in FIGS. 3C and 3E are aligned in the stacking and arranging step, it is possible to realize a highly accurate stacking state for a plurality of double-sided wiring boards.
- the centers of the recognition marks in FIGS. 3B, 3D, and 3F of the electrically insulating substrates 310-1, 310-2, and 310-3 for connection, and the double-sided wiring board 307-1 It is possible to obtain a multilayer wiring board with high lamination accuracy by performing image recognition in the stacking arrangement of each layer and performing alignment so that the recognition mark centers of FIG. 3C and 3E of FIG. Become. Furthermore, even in the inspection after stacking, the recognition mark of FIG. 3G can be confirmed by a technique such as an X-ray camera, and a plurality of layers can be obtained in a limited narrow view due to the relative positional relationship of the recognition marks of each layer. It is possible to simply detect the misalignment of the layers. Moreover, it is possible to prevent that the order of lamination
- both vias and patterns are shown as circular examples as recognition marks here, the shape is not limited to a circle, and it goes without saying that similar effects can be obtained with other shapes.
- the recognition marks of the double-sided wiring board may be provided on both the upper and lower sides. By doing this, it becomes possible to align the wiring of the double-sided wiring board and the via formed in the electrically insulating base material for connection not only on the upper surface of the double-sided wiring board but also on the lower surface.
- positioning of FIG. 3A recognition by a camera is common, and a reflected light, a transmitted light, and X ray may be utilized depending on the case.
- alignment can be performed by the recognition mark formed on the upper surface of the double-sided wiring board and the recognition mark formed by a via on the electrically insulating base material for connection.
- a multilayer wiring board with higher accuracy can be obtained.
- the camera is disposed not only in the upper part but also in the lower part of the laminate and the via formed in the electrically insulating base material for connection and the lower surface of the double-sided wiring board
- a method of using a prism or the like and a camera arranged at the top of the laminate it is possible to use a method of using a prism or the like and a camera arranged at the top of the laminate to recognize.
- a double-sided wiring board is formed by aligning a center on a double-sided wiring board on the basis of the lower surface recognition mark and forming a through hole, and aligning this through hole with a recognition mark formed on the electrically insulating base material for connection. It is also possible to use a method of aligning the lower surface wiring and the via of the electrically insulating base material for connection. By using any of these methods, the matching between the wiring of the double-sided wiring board and the via of the electrically insulating base material for connection is enhanced, and a multilayer wiring board with high positional accuracy can be obtained.
- connection electrically insulating base material 401 is welded.
- a part of the laminated plate 410 is heated and pressurized by the heated heat tool 407 to connect the electrically insulating base material 401 for connection. Weld a part.
- the wiring material 402 and the double-sided wiring board 403 disposed above and below are fixed and positioned.
- connection electrically insulating base material separated from the heat tool and the double-sided wiring board can not be adhered well.
- heat from the heat tool 407 is transmitted to the electrically insulating base material for connection 401 and the double-sided wiring board 403 by providing the welding area 409 where the wiring material of the outermost layer is selectively removed as shown in FIG. 4D. It becomes possible to make it easy.
- connection area immediately below the heat tool 407 is used. It has a through hole 405 in which a conductive paste 404 is filled in the electrically insulating base material 401 and the double-sided wiring board 403, and a wire 406 connected thereto.
- FIG. 4C shows a welding area cross section 411 which is a cross section after welding of the welding area 409.
- the area of the welding area 409 is equal to or more than the heat tool 407. It is preferable that the size of Thereby, the heat of the heat tool 407 can be more efficiently transferred to the laminated plate 410.
- the heat tool 407 is more preferably an installation capable of changing the temperature, pressurizing condition and the like depending on the thickness of the object to be welded.
- the double-sided wiring board 403 becomes a four-layer wiring board, the same effect can be expected by enhancing the thermal conductivity by performing spot facing processing to partially thin the welded portion.
- the welding area 409 is provided in a part of the laminated plate 410, and the method of heating and pressurizing this part to temporarily fix is described, but the electrically insulating substrate 401 for connection or the double-sided wiring board 403 It is also possible to temporarily fix by heating and pressing the entire surface. By doing this, it is possible to make the adhesion of the connection electrically insulating base material 401 or the double-sided wiring board 403 after lamination and placement at the time of temporary fixing strong, and a multilayer wiring board with high positional accuracy. It becomes possible to obtain.
- productivity can be improved by sandwiching the laminated plate between the SUS plates 506 and placing it in multiple stages and heating and pressurizing it. It becomes.
- productivity-pressing process by laminating
- the area B where the wiring or via exists in the laminate and the area A where the wiring or via does not exist are clearly different in partial thickness, and the thickness is the area B> It is area A.
- the laminated plate 505 is described separately in a state before lamination.
- the laminated plates are alternately stacked as shown in FIG. 5C or the laminated as shown in FIG. 5D so that the pressure is uniformly applied.
- pressure can be uniformly transmitted to the laminated plates in the heating and pressing process.
- products do not depend on wiring density and via density as much as possible, and if there are biases in wiring and via density in the product, the product of discarded plate portion or work outside the product It is preferable to provide wiring and vias in the outer part.
- the multilayer wiring substrate manufactured in FIGS. 2A to 2K adopts a method of collectively heating and pressurizing without sequentially heating and pressurizing each layer. For this reason, even if a void or the like due to insufficient embedding of resin is generated inside the substrate, it is very difficult to distinguish it from the appearance, so it is more preferable to dispose the inspection coupon.
- FIG. 6A shows a method for confirming the embeddability of the electrically insulating base material for connection.
- the test coupon placed in an arbitrary work size is irradiated with light 603, and the difference in light transmittance is detected by the detector 604 to evaluate the embeddability of the resin.
- FIG. 6B shows an example of an actual inspection coupon.
- the area of the wiring pattern 606 having no pattern in all layers is changed and arranged, and after the heating and pressing, the embeddability is evaluated by the method described above. By this, it is possible to determine how much area the connection electrically insulating substrate 1 layer can be embedded in the wiring.
- FIG. 6C shows an example of a circuit for inspection. This is from the surface layer by forming a circuit in which the wires 602 are formed in the upper and lower layers of the electrically insulating base material 601 for connection and connected in series with the vias 606 formed in the electrically insulating base material 601 for connection. It is possible to confirm the electrical resistance value.
- the inspection coupon By forming the inspection coupon, it is possible to measure the resistance value from the surface layer, whereby the via connectivity of the connection electrically insulating base material 601 can be simply evaluated.
- this method is not limited to the specific layer but may be applied to any layer as long as the layer using the electrically insulating base material for connection 601 is used.
- circuit of FIG. 6C is merely an example, and in the case of a circuit in which vias are similarly provided in a layer using the electrically insulating base material for connection 601 and these are connected in series, the circuit of FIG. It is not limited to
- Second Embodiment 7A, 7B and 8A to 8K show a structure of a multilayer wiring board and a method of manufacturing the multilayer wiring board according to the second embodiment of the present invention.
- FIG. 7A a 10-layer wiring board 701 is shown in FIG. 7A as an example of a multilayer wiring board according to the present invention.
- FIG. 7A shows a structure in which the conductive paste 703 is filled in the through holes 702 as in the first embodiment to secure the electrical connection between the interconnections, but a four-layer wiring board for the inner layer having high rigidity from both sides.
- the wiring 705 formed in 704 is characterized in that it has a portion where the compressibility of the conductive paste 707 of the through hole 706 is enhanced.
- connection location A of FIG. 7A will be described in detail with reference to FIG. 7B.
- the wires 705 disposed on both sides of the conductive paste 707 are formed in advance on the front and back of the adjacent high rigidity four-layer wiring substrate 704, and project from the four-layer wiring substrate 704. Since the wires 705 are disposed on both ends of the conductive paste 707 so as to be embedded in the electrically insulating base material 708, the conductive paste 707 is compressed more strongly.
- the four-layer wiring board 704 has high rigidity of a fixed value or more and there is no local variation in rigidity due to the density of the wiring, the conductive paste 707 can be uniformly compressed in the plane.
- the layer configuration is not limited to this, and six or more layers may be used. If it is a double-sided board with a thickness of 6 layers or more, the effect of uniforming compression can be similarly obtained. As a result, the conductive paste 707 can provide a more stable electrical connection and can reduce the diameter of the through hole 706.
- the wiring 709 of the outer layer shown in FIG. 7B is a 10-layer wiring board 701 formed in three heating and pressing steps and a circuit forming step, and the variation in the position of the wire 709 due to the variation in residual stress Compared with the conventional example, it has the features of being smaller and having excellent position accuracy.
- FIGS. 8A to 8N show a method of manufacturing a multilayer wiring board according to the second embodiment.
- FIG. 8A shows an electrically insulating base 801.
- a protective film 802 is pasted to the electrically insulating substrate 801 by lamination.
- the through hole 803 is filled with a conductive paste 804 as a conductor, and the protective film 802 is peeled off to obtain the state shown in FIG. 8E.
- the state shown in FIG. 8F is obtained.
- the wiring material 805 is adhered to the electrically insulating base material 801 through a heating and pressing process.
- the conductive paste 804 is thermally cured, and an electrical connection between the wiring material 805 and the conductive paste 804 is also realized.
- the wiring material 805 is formed into a circuit by etching, whereby a double-sided wiring substrate 807 having the wiring 806 can be obtained.
- the wiring material 808, the connection electrically insulating base material 809, and the double-sided wiring board 807 are stacked and arranged.
- the electrically insulating base material 809 for connection is formed by the same process as shown in FIGS. 8A to 8E, and the through holes 811 are formed in the electrically insulating base material 810 and the conductive paste 812 is formed. It is filled.
- the wiring material 808 is bonded to the electrically insulating base material through the heating and pressing process in the state shown in FIG. 8J.
- the double-sided wiring board 807 and the electrically insulating base are also bonded.
- the conductive paste is thermally cured in the same manner as shown in FIG. 8G, and the wiring material 808 and the double-sided wiring board 807 contact at high density via the conductive paste, and electrical connection is made. Is realized.
- a circuit material of the surface layer is formed into a circuit by etching to obtain a four-layer wiring board 814 having the wiring 813 as shown in FIG. 8K.
- the wiring material 815, the connection electrically insulating base material 809, the four-layer wiring board 814, and the connection electrically insulating base material 816 are stacked and arranged.
- the electrically insulating base material for connection 816 is formed by the same process as shown in FIGS. 8A to 8E, and a through hole 818 is formed in the electrically insulating base material 817, and the conductive paste 819 is formed. Is filled with
- the wiring 813 of the four-layer wiring board 814 has small wiring variation as described above, and the position dimension of the wiring 813 is measured in advance, and the through hole of the electrically insulating base material 816 for connection is based on the result.
- the correction of the processing position data 818 makes it possible to align the through hole 818 with the wiring 813 with higher accuracy, as in the first embodiment.
- the wiring 813 has a shape protruding from the four-layer wiring substrate 814, the wiring 813 is disposed so as to be embedded at both ends of the conductive paste 819 of the connection electrically insulating substrate 816, and the conductive paste 819 is more stable The electrical connection is obtained, and the diameter of the through hole 818 can be reduced.
- the selection of the material of the conductive paste 819 and the selection of the electrically insulating base material 817 are the same as in Embodiment 1, and thus the description thereof is omitted.
- the four-layer wiring board is characterized in that the inner layer is provided with the wiring layer and the thickness is increased, so that the rigidity and the variation in rigidity are small compared to the double-sided wiring board.
- the positional variation of the surface layer surface is larger than that of a double-sided wiring board because it has undergone two heating and pressing steps and a circuit formation step, but smaller than a wiring board of six or more layers according to the configuration shown in the conventional example. .
- the wiring material 815, the connection electrically insulating base material 809, the four-layer wiring board 814, and the connection electrically insulating base material 816 are bonded.
- the conductive paste is compressed and thermally cured in the same manner as shown in FIG. 8G, and a four-layer wiring board 814 and a four-layer wiring board 814, a four-layer wiring board 814 and a wiring material 815 Are in high density contact via the conductive paste, and an electrical connection is realized.
- a circuit material of the surface layer wiring material 815 is formed by etching to obtain a 10-layer wiring board 821 having a wiring 820 as shown in FIG. 8N.
- the wiring 820 is formed by three heating and pressing steps and a circuit forming step, and is characterized in that the variation of the position of the wiring 820 due to the variation of the residual stress is smaller than that of the conventional example and the position accuracy is excellent. .
- the number of wiring layers is not limited to this, and the number of constituent members alternately arranged may be changed in FIG. 8L.
- wiring boards having other numbers of layers may be used. It is more preferable to enhance the process stability of the conductive paste compression for selecting the number of layers depending on the required rigidity.
- the wiring board can be manufactured by the heating and pressing process and the circuit forming process three times regardless of the number of wiring board layers, and a multilayer wiring board having a large number of layers is formed. In this case, it has the advantage of excellent productivity.
- FIGS. 9A, 9B, and 10A to 10P show the structure of the multilayer wiring board and the method of manufacturing the multilayer wiring board according to the third embodiment of the present invention.
- a 10-layer wiring board 901 is shown in FIG. 9A.
- FIG. 9A shows a structure in which the conductive paste 903 is filled in the through holes 902 as in the first and second embodiments to ensure the electrical connection between the wires, but the electrically insulating base material 904 of the outermost layer is The non-through holes 905 thus formed are filled with filled vias 906 to ensure electrical connection.
- connection part A of FIG. 9A is expanded and demonstrated in detail to FIG. 9B.
- the degree of freedom in selection of the material is increased as the outermost layer of the electrically insulating substrate 904, and various substrates can be applied.
- the non-through holes 905 are stably secured by the plating method, the diameter of the non-through holes 905 can be reduced, and the surface layer wiring can be formed with a high wiring density.
- 9A and 9B show the structure of the filled via 906 in which the non-through holes 905 are completely filled with the plating as the plating deposition method, but the method is not limited to this, and a conformal via is generally used. It does not matter.
- the structure shown in the second embodiment is shown in the inner layer portion of the multilayer wiring board, the present invention is not limited to this, and it is possible to apply to the first embodiment as well.
- FIGS. 10A to 10P show a method of manufacturing a multilayer wiring board according to the third embodiment.
- a protective film 1002 is pasted to the electrically insulating substrate 1001 by lamination.
- the through hole 1003 is filled with a conductive paste 1004 as a conductor, and the protective film 1002 is peeled off to obtain the state shown in FIG. 10E.
- the wiring material 1005 is adhered to the electrically insulating base material 1001 through a heating and pressing process.
- the conductive paste 1004 is thermally cured, and an electrical connection between the wiring material 1005 and the conductive paste 1004 is also realized.
- the wiring material 1005 is formed into a circuit by etching to obtain a double-sided wiring substrate 1007 having the wiring 1006.
- the wiring material 1008, the connection electrically insulating base material 1009, and the double-sided wiring board 1007 are stacked and arranged.
- the electrically insulating base material for connection 1009 is formed by the same process as shown in FIGS. 10A to 10E, and the through holes 1011 are formed in the electrically insulating base material 1010, and the conductive paste 1012 is formed. It is filled.
- the wiring material 1008 is adhered to the electrically insulating base material 1010 by passing through a heating and pressing process in the state shown in FIG. 10J.
- the double-sided wiring board 1007 and the electrically insulating base material 1010 are also bonded.
- the conductive paste 1012 is thermally cured in the same manner as shown in FIG. 10G, and the wiring material 1008 and the double-sided wiring board 1007 contact at high density via the conductive paste 1012 and electrically The connection is realized.
- a circuit material of the surface layer wiring material 1008 is formed by etching to obtain a four-layer wiring substrate 1014 having a wiring 1013 as shown in FIG. 10K.
- the wiring material 1015, the electrically insulating base 1016, the four-layer wiring board 1014, and the electrically insulating base for connection 1017 are stacked and arranged.
- the electrically insulating base material 1017 for connection is formed by the same process as shown in FIGS. 10A to 10E, and the through holes 1019 are formed in the electrically insulating base material 1018 and the conductive paste 1020 is formed. It is filled.
- the wiring 1013 has a shape protruding from the four-layer wiring substrate 1014, the wiring 1013 is arranged to be embedded at both ends of the conductive paste 1020 of the connection electrically insulating substrate 1017, and the conductive paste 1020 is more stable. The electrical connection is obtained, and the diameter of the through hole 1019 can be reduced.
- the position dimension of the wiring 1013 may be measured in advance, and the through hole 1019 may be processed based on the result.
- the electrically insulating substrate 1016 may use the same material as in Embodiments 1 and 2, but it is more preferable to use a different material from the viewpoint of imparting the stability of the manufacturing process and the functionality.
- thermosetting resin by setting the flowability of the thermosetting resin to a high specification, sufficient embeddability can be ensured even between wiring of higher density, and the wiring substrate is not dependent on the wiring of the inner layer pattern or the density. Surface smoothness can be obtained.
- a highly thermally conductive material filled with an inorganic filler such as calcium hydroxide, silica, magnesium oxide or the like at a high density as the electrically insulating base 1016, the heat dissipation in the case of mounting the heat-generating component at a high density Can be realized.
- the multilayer wiring board according to the present invention is suitable as a board on which semiconductor elements such as high speed LSIs and LEDs are mounted at high density.
- high-speed high-frequency transmission can be realized by using, as the electrically insulating base material 1016, a material of low ⁇ and low tan ⁇ with good high frequency characteristics such as PPE, PPO, Teflon (registered trademark) and the like.
- the electrically insulating substrate 1016 is shown without the electrically conductive paste, since the through holes filled with the electrically conductive paste are not disposed in the product area. However, by forming the through holes filled with the conductive paste outside the product area, it is possible to prevent the side slip of the electrically insulating substrate 1016 in the heating and pressing process, and at the same time the electrically insulating substrate for connection. The pressure can be applied more uniformly to 1017.
- the wiring material 1015, the electrically insulating base material for connection 1016, the four-layer wiring board 1014, and the electrically insulating base material for connection 1017 are bonded by passing through a heating and pressing process.
- the conductive paste is compressed and thermally cured, as in FIG. 10G, so that the four-layer wiring board 1014 and the four-layer wiring board 1014 have a high density via the conductive paste. Contact and electrical connection are realized.
- a non-through hole 1021 is formed using a carbon dioxide gas laser or a YAG laser.
- the non-through holes 1021 may be formed in the wiring material 1015 by etching beforehand by pattern film photography, a semiconductor laser or the like at the locations where the non-through holes 1021 are to be processed.
- the wiring 1022 immediately below the non-through hole 1021 should be surface-treated to selectively etch the crystal plane of the metal so as to have a high heat absorption. More preferable. In this case, surface treatment may be performed such that metal crystal planes are selectively etched only on one side of the four-layer wiring board.
- anticorrosion coating of 300 angstroms or less on wiring is compatible with connectivity of conductive paste and high productivity of carbon dioxide gas laser. Is more preferable.
- a conductive thin film is formed in the non-through hole by electroless plating, and a conductive film 1023 is formed by electroplating as shown in FIG. did.
- resin residue removal is carried out by using an oxidizing solution such as potassium permanganate or plasma treatment, and electroless plating is carried out by using copper, nickel or the like.
- conformal plating formed following the wall surface of the non-through hole 1021 or filled via plating in which the non-through hole 1021 is filled with the conductive film 1023 Can.
- the diameter of the non-through hole 1021 can be processed to about 30 microns, since the wiring 1022 and the conductive film 1023 are metal-bonded, electrical connection is realized even if the diameter of the non-through hole 1021 is small.
- the wiring on the non-through holes 1021 becomes flat as in the first and second embodiments, and the gas generated from the base material during component mounting It is more preferable because voids in the solder are not generated and connection reliability with the mounted component is improved.
- the conductive film and the wiring material are simultaneously formed into a circuit by etching to obtain a 10-layer wiring board 1025 having the wiring 1024 shown in FIG. 10P.
- the wiring 1024 can be formed to the same diameter as the non-through hole 1021 diameter, and the wiring 1024 corresponding to narrow pitch mounting can be realized.
- the wiring board can be manufactured by the heating and pressing process and the circuit forming process three times regardless of the number of wiring board layers, and a multilayer wiring board having a large number of layers is formed. In this case, it has the advantage of excellent productivity.
- the present invention eliminates dimensional variations in the process due to residual residual stress, improves the positional accuracy of the outermost layer wiring, and provides a multilayer wiring board with high interlayer connection reliability with high productivity. It can be widely used for a multilayer wiring board and its manufacturing method.
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Abstract
Description
図1A、図1B、図2A~図2Kに本発明の実施形の態1における多層配線基板の構造と多層配線基板の製造方法を示す。
図7A、図7B、図8A~図8Kに本発明の実施の形態2における多層配線基板の構造と多層配線基板の製造方法を示す。
図9A、図9B、図10A~図10Pに本発明の実施の形態3における多層配線基板の構造と多層配線基板の製造方法を示す。
103,107,204,212,216,404,504,703,707,804,812,819,903,1004,1012,1020 導電性ペースト
104,207,307-1,307-2,403,807,1007 両面配線基板(配線基板)
105,206,214,406,605,705,709,806,813,820,1006,1013,1022 配線
108,201,309,708,801,810,817,904,1001,1010,1016,1018 電気絶縁性基材
202,802,1002 保護フィルム
205,208,301,402,501,602,805,808,815,1005,1008,1015 配線材料
209,210,310-1,310-2,310-3,401,502,601,809,816,1009,1017 接続用電気絶縁性基材
213,410,505 積層板
407 ヒートツール
409 溶着エリア
506 SUS板
704,714,1014 4層配線基板(配線基板)
905,1021 非貫通穴
1023 導電性皮膜
Claims (18)
- 両面に配線を有する内層用の配線基板と、
貫通穴に導電性ペーストが充填された電気絶縁性基材と、
最外層に形成された配線とを備え、
前記配線基板と前記電気絶縁性基材とは交互に積層され、
前記配線基板の配線は前記導電性ペーストの両端の前記電気絶縁性基材に埋設され配置されていることを特徴とする多層配線基板。 - 前記内層用の配線基板は、両面配線基板であることを特徴とする請求項1に記載の多層配線基板。
- 前記内層用の配線基板は、4層配線基板であることを特徴とする請求項1に記載の多層配線基板。
- 複数の前記内層用の配線基板と複数の前記電気絶縁性基材で構成され、
複数の前記内層用の配線基板は、剛性が異なることを特徴とする請求項1に記載の多層配線基板。 - 複数の前記内層用の配線基板と複数の前記電気絶縁性基材で構成され、
複数の前記内層用の配線基板は、互いに反り方向が逆になるように積層されていることを特徴とする請求項1に記載の多層配線基板。 - 貫通穴に導電性ペーストが充填された接続用電気絶縁性基材と、
前記接続用電気絶縁性基材の両側に配線を有する配線基板と、
前記配線基板に積層配置された電気絶縁性基材と、
最外層に形成された配線とを備え、
前記電気絶縁性基材は、前記接続用電気絶縁性基材あるいは前記配線基板を構成する材料とは異なる材料であることを特徴とする多層配線基板。 - 前記電気絶縁性基材と前記接続用電気絶縁性基材あるいは前記配線基板を構成する材料は一定温度以上で流動性を備える熱硬化性樹脂を含み、
前記電気絶縁性基材に含有された樹脂の流動性は、前記接続用電気絶縁性基材あるいは前記配線基板を構成する材料に含有された樹脂の流動性よりも高いことを特徴とする請求項6に記載の多層配線基板。 - 前記電気絶縁性基材は非貫通孔に導電性皮膜を備え、
前記導電性皮膜を介して前記配線基板の配線と最外層に形成された配線とが電気的に接続されていることを特徴とする請求項6に記載の多層配線基板。 - 配線を有する電気絶縁性基材で構成される配線基板を準備する工程と、
貫通穴に導電性ペーストを充填された接続用電気絶縁性基材を準備する工程と、
前記配線基板と前記接続用電気絶縁性基材とを交互にかつ最外層に配線を積層配置し積層板を準備する工程と、
前記積層板を加熱加圧する工程と、
前記積層板表層の前記配線材料をエッチングにより回路形成する工程とを備え、
前記接続用電気絶縁性基材の導電性ペーストの両端に配置された前記配線基板の配線は、前記接続用電気絶縁性基材に埋設されて加熱加圧されることを特徴とする多層配線基板の製造方法。 - 配線を有する前記配線基板を準備する工程は、
前記電気絶縁性基材の両側に保護フィルムをラミネートする工程と、
前記電気絶縁性基材と前記保護フィルムに貫通穴を形成する工程と、
前記貫通穴に導電性ペーストを充填する工程と、
前記保護フィルムを剥離する工程と、
前記電気絶縁性基材の両側に配線材料を積層配置する工程と、
それを加熱加圧する工程と、
前記配線材料をエッチングにより回路形成し配線を有する両面配線基板を得る工程とを含むことを特徴とする請求項9に記載の多層配線基板の製造方法。 - 配線を有する前記配線基板を準備する工程は、
一定値以上の剛性を有する4層以上の配線基板を準備する工程であることを特徴とする
請求項9に記載の多層配線基板の製造方法。 - 前記配線材料をエッチングにより回路形成し配線を有する前記両面配線基板を得る工程は、
前記両面配線基板の残留応力を除去する工程を含むものであることを特徴とする請求項10に記載の多層配線基板の製造方法。 - 前記配線基板を構成する前記電気絶縁性基材と前記接続用電気絶縁性基材は少なくとも樹脂を含み、前記接続用電気絶縁性基材の樹脂の含有比率は、前記電気絶縁性基材の樹脂の含有比率よりも高いことを特徴とする請求項9に記載の多層配線基板の製造方法。
- 前記配線基板を構成する前記電気絶縁性基材と前記接続用電気絶縁性基材は一定温度以上で流動性を備える樹脂を含み、前記接続用電気絶縁性基材に含有された樹脂の流動性は、前記電気絶縁性基材に含有された樹脂の流動性よりも高いことを特徴とする請求項9に記載の多層配線基板の製造方法。
- 前記配線基板と前記接続用電気絶縁性基材とを交互にかつ最外層に配線材料を積層配置し積層板を準備する工程は、
前記接続用電気絶縁性基材の一部を前記両面配線基板に溶着させ仮固定する工程を含み、仮固定はヒートツールにより前記積層板に設けられた溶着エリアを加熱加圧することであることを特徴とする請求項9に記載の多層配線基板の製造方法。 - 前記溶着エリアは、少なくとも前記接続用電気絶縁性基材に導電性ペーストを充填した貫通穴と
前記両面配線基板に前記導電性ペーストを充填した貫通穴とで構成されることを特徴とする請求項15に記載の多層配線基板の製造方法。 - 前記積層板に設けられた前記溶着エリアは、最外層の配線材料が選択的に除去されていることを特徴とする請求項15に記載の多層配線基板の製造方法。
- 前記積層板を加熱加圧する工程は、
複数の積層板をSUS板を介して多段積みにして加熱加圧する工程を含み、
前記積層板は互いに反転または半回転あるいは互いにずらした状態で交互に積み重ねられることを特徴とする請求項9に記載の多層配線基板の製造方法。
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US13/697,774 US20130062101A1 (en) | 2010-06-08 | 2011-06-02 | Multilayer wiring substrate, and manufacturing method for multilayer substrate |
JP2012519236A JPWO2011155162A1 (ja) | 2010-06-08 | 2011-06-02 | 多層配線基板および多層配線基板の製造方法 |
CN2011800279599A CN102939803A (zh) | 2010-06-08 | 2011-06-02 | 多层布线基板以及多层布线基板的制造方法 |
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Cited By (2)
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US10905013B2 (en) | 2018-05-29 | 2021-01-26 | Tdk Corporation | Printed wiring board and method for manufacturing the same |
US11382218B2 (en) | 2018-05-29 | 2022-07-05 | Tdk Corporation | Printed wiring board and method for manufacturing the same |
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JP5931547B2 (ja) | 2012-03-30 | 2016-06-08 | イビデン株式会社 | 配線板及びその製造方法 |
JP2013214578A (ja) * | 2012-03-30 | 2013-10-17 | Ibiden Co Ltd | 配線板及びその製造方法 |
US8985468B1 (en) | 2012-07-13 | 2015-03-24 | The United States Of America As Represented By The Administrator Of The National Aeronautics And Space Administration | Switch using radio frequency identification |
CN104663007B (zh) * | 2012-09-20 | 2017-10-24 | 株式会社可乐丽 | 电路基板及其制造方法 |
JP6454283B2 (ja) * | 2013-11-27 | 2019-01-16 | 東レエンジニアリング株式会社 | 3次元実装方法および3次元実装装置 |
US10453787B2 (en) * | 2015-05-21 | 2019-10-22 | The Charles Stark Draper Laboratory, Inc. | Method and apparatus for forming multi-layered vias in sequentially fabricated circuits |
CN107241875B (zh) * | 2016-03-28 | 2019-05-07 | 上海美维科技有限公司 | 一种双面埋线印制板的制造方法 |
DE102018132057B4 (de) * | 2018-12-13 | 2020-09-24 | Ilfa Industrieelektronik Und Leiterplattenfertigung Aller Art Gmbh | Verfahren zur Überwachung eines Beschichtungsprozesses einer Leiterplatte sowie Leiterplatte zur Durchführung des Verfahrens. |
CN112291939B (zh) * | 2020-11-09 | 2022-09-27 | 上海裕达实业有限公司 | 基于台阶式的pcb加工技术的质谱仪电路构造方法及*** |
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TW201223379A (en) | 2012-06-01 |
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