WO2011141981A1 - Dispositif à semi-conducteur - Google Patents

Dispositif à semi-conducteur Download PDF

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Publication number
WO2011141981A1
WO2011141981A1 PCT/JP2010/057874 JP2010057874W WO2011141981A1 WO 2011141981 A1 WO2011141981 A1 WO 2011141981A1 JP 2010057874 W JP2010057874 W JP 2010057874W WO 2011141981 A1 WO2011141981 A1 WO 2011141981A1
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silicon carbide
semiconductor region
semiconductor
impurity concentration
region
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PCT/JP2010/057874
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English (en)
Japanese (ja)
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望月　和浩
横山　夏樹
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株式会社日立製作所
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Priority to JP2012514615A priority Critical patent/JP5697665B2/ja
Priority to PCT/JP2010/057874 priority patent/WO2011141981A1/fr
Priority to DE112010005547T priority patent/DE112010005547T5/de
Publication of WO2011141981A1 publication Critical patent/WO2011141981A1/fr

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
    • H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
    • H01L29/0619—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66053—Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide
    • H01L29/6606—Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/861—Diodes
    • H01L29/8611—Planar PN junction diodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/861—Diodes
    • H01L29/872—Schottky diodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Definitions

  • the present invention relates to a semiconductor device using a floating guard ring suitable for a silicon carbide power device.
  • the present invention relates to a termination structure of a semiconductor device.
  • Non-patent document 1 discloses a technique for simultaneously forming a silicon carbide main junction and a floating guard ring.
  • Solid State Electronics Vol. 44 (2000), pages 303-308 (Solid State Electronics vol. 44 (2000) pp. 303-308)
  • the first problem is manufacturing variation due to positive charge density. As a result of variations in the density of positive charges existing at the interface between the p-type silicon carbide region constituting the floating guard ring and the insulating film at each manufacturing, the manufacturing variation of the breakdown voltage in the silicon carbide power device increases.
  • the second problem is the breakdown voltage due to the structure of the floating guard ring.
  • the floating guard ring is formed of a p-type silicon carbide region having a uniform acceptor concentration distribution. Therefore, when a reverse bias is applied to the pn junction between the floating guard ring and the n-type silicon carbide region, the depletion layer does not extend into the floating guard ring and the electric field strength is increased. As a result, the silicon carbide power device It is difficult to increase the breakdown voltage.
  • Non-Patent Document 1 discloses that the main junction and the floating guard ring are made of p-type silicon carbide having substantially the same acceptor concentration and substantially the same depth, and the breakdown voltage between the main junction and the floating guard ring is disclosed. Is not controlled separately, it is difficult to increase the breakdown voltage of the silicon carbide power device.
  • One aspect of the present invention is a silicon carbide substrate, an n-type silicon carbide layer formed on the silicon carbide substrate, and a first impurity concentration (N1: cm ⁇ 3 ) formed in the silicon carbide layer. And a p-type second semiconductor region having a second impurity concentration (N2: cm ⁇ 3 ) greater than the first impurity concentration between the first semiconductor region and the surface of the silicon carbide layer, An insulating film formed on the surface of the silicon carbide substrate, the first and second semiconductor regions are floating guard rings, the first and second semiconductor regions contain Al as an impurity, and silicon carbide
  • the semiconductor device is such that the layer has an impurity concentration of 5 ⁇ 10 15 cm ⁇ 3 or less and the depth (d1: ⁇ m) of the second semiconductor region is smaller than 7 ⁇ 10 ⁇ 19 ⁇ N2 ⁇ 0.14.
  • Another invention of the present application has a silicon carbide substrate, an n-type silicon carbide layer formed on the silicon carbide substrate, and a first impurity concentration (N1: cm ⁇ 3 ) formed in the silicon carbide layer.
  • an insulating film formed on the surface of the silicon carbide layer, the first and second semiconductor regions are floating guard rings, the first and second semiconductor regions contain Al as an impurity, and are carbonized.
  • the silicon layer has an impurity concentration greater than 5 ⁇ 10 15 cm ⁇ 3 and less than 2 ⁇ 10 16 cm ⁇ 3 , and the depth (d1: ⁇ m) of the second semiconductor region is 8 ⁇ 10 ⁇ 19 ⁇ N2-0.
  • the semiconductor device is smaller than 24 ( ⁇ m).
  • Another invention of the present application has a silicon carbide substrate, an n-type silicon carbide layer formed on the silicon carbide substrate, and a first impurity concentration (N1: cm ⁇ 3 ) formed in the silicon carbide layer.
  • the first and second semiconductor regions are floating guard rings, the first and second semiconductor regions contain Al as an impurity,
  • This is a semiconductor device in which the distance (d2: ⁇ m) between the surface edge of one semiconductor region and the surface edge of the second semiconductor region is smaller than ⁇ 5 ⁇ 10 ⁇ 18 ⁇ N2 + 3.9.
  • Another invention of the present application includes a silicon carbide substrate, an n-type silicon carbide layer formed on the silicon carbide substrate, a p-type first semiconductor region formed in the silicon carbide layer, and a first semiconductor region
  • a plurality of p-type second semiconductor regions surrounding the first semiconductor region, the first and second semiconductor regions contain Al as an impurity, and the depth of the first semiconductor region is shallower than the depth of the second semiconductor region
  • the second semiconductor region at the innermost periphery of the second semiconductor region is a semiconductor device that contacts or partially overlaps the first semiconductor region.
  • the silicon carbide power device is not easily affected by the positive charge existing between the silicon carbide and the insulating film. Further, by making the acceptor density in the floating guard ring non-uniform, electric field concentration can be suppressed and the breakdown voltage of the silicon carbide power device can be increased. Furthermore, the withstand voltage can be increased by optimizing the main junction and the floating guard ring independently.
  • 1 is a longitudinal sectional view of a pn diode according to a first embodiment of the present invention. It is an example of the Al concentration profile of the depth direction in a floating guard ring. It is a simulation result which shows the effect of the 1st Example of this invention. It is a simulation result which shows the effect of the 1st Example of this invention. It is a simulation result which shows the effect of the 1st Example of this invention. This is a result of measuring the breakdown voltage of the pn diode by changing the Al concentration of the main junction without providing the termination structure. It is a longitudinal cross-sectional structure figure of the pn diode by a prior art. It is a simulation result which shows the withstand voltage in the pn diode shown in FIG.
  • FIG. 6 is a vertical cross-sectional structure diagram when the direction is shallower than the floating guard ring 5. It is a longitudinal cross-section structure figure of the JBS diode which is the 3rd Example of this invention.
  • FIG. 1 is a cross-sectional view of a semiconductor device according to the present invention.
  • the semiconductor device of Example 1 according to the present invention is formed in a drift layer 3 made of n-type silicon carbide formed on an n-type silicon carbide substrate 2 and in the drift layer.
  • the insulating film 8 is provided with an opening for drawing the anode electrode 7 to the outside, and the anode electrode 7 is electrically connected to the p-type silicon carbide region 4 through the opening.
  • the planar layout itself is well known, and thus a top view is omitted, but p-type silicon carbide region 4 is surrounded by a plurality of floating guard rings 9.
  • the p-type silicon carbide region 4 and the drift layer 3 made of n-type silicon carbide constitute a pn diode.
  • a floating guard ring 9 is formed between a p-type first semiconductor region 5 having a predetermined impurity concentration, and between the first semiconductor region 5 and the surface of the n-type silicon carbide substrate 2.
  • the second semiconductor region 6 is a p-type second semiconductor region 6 having an impurity concentration higher than that of one semiconductor region 5.
  • FIG. 2 is an impurity concentration profile in which the horizontal axis represents depth and the vertical axis represents the concentration of Al, which is an impurity of the p-type semiconductor region. This profile is shown along the vertical depth of the region including the floating guard ring 9 of FIG. As described above, the concentration peak in the first semiconductor region is about 9.5 ⁇ 10 17 cm ⁇ 3 , which is higher than the concentration peak in the second semiconductor region of about 3.5 ⁇ 10 17 cm ⁇ 3. It can be seen that the impurity concentration of the first semiconductor region is higher than the concentration of the second semiconductor region.
  • the concentration peak in the first semiconductor region is 1.0 ⁇ 10 17 cm ⁇ 3 or more and 5.0 ⁇ 10 17 cm ⁇ 3 or less
  • the concentration peak in the second semiconductor region is 5.0 ⁇ 10 17 cm ⁇ 3 or less. It is desirable that it is greater than 10 17 cm ⁇ 3 and 1.0 ⁇ 10 18 cm ⁇ 3 or less.
  • the upper part shows a distribution diagram of the Al impurity concentration in the depth direction
  • the lower part shows a two-dimensional simulation result of the potential distribution at the time of avalanche breakdown in the impurity concentration distribution corresponding to the upper part.
  • the floating guard ring is actually substituted for the main junction, but it is the same in terms of the p-type semiconductor region, and the result itself can be understood by replacing it with that of the floating guard ring.
  • the left diagram in FIG. 3 shows the Al concentration of the second semiconductor region at 10 18 cm ⁇ 3 , the middle diagram at 10 17 cm ⁇ 3 , and the right diagram at 10 16 cm ⁇ 3 . Each of them is implanted with seven kinds of acceleration energy of 25 to 380 keV.
  • the lower left figure shows a 600V equipotential line on the substrate surface.
  • the substrate surface has a potential of about 700V at the time of avalanche breakdown. . That is, the breakdown voltage is about 700V.
  • the breakdown voltage in the middle figure is about 1000V, and the breakdown voltage in the right figure is slightly over 400V. Therefore, if an attempt is made to manufacture a pn junction diode with a breakdown voltage of 600 V, the second semiconductor region of the floating guard ring preferably has an impurity concentration of 10 18 or 17 cm ⁇ 3 , It can be seen that the 17th power cm ⁇ 3 is preferable.
  • FIGS. 4 and 5 show the results of two-dimensional simulation of the hole concentration distribution at the time of avalanche breakdown in the case of having the box-like Al concentration distribution in the upper left portion of FIG. 3 and the upper middle portion of FIG.
  • FIGS. 4 and 5 show the results of two-dimensional simulation of the hole concentration distribution at the time of avalanche breakdown in the case of having the box-like Al concentration distribution in the upper left portion of FIG. 3 and the upper middle portion of FIG.
  • FIGS. 4 and 5 show the results of two-dimensional simulation of the hole concentration distribution at the time of avalanche breakdown in the case of having the box-like Al concentration distribution in the upper left portion of FIG. 3 and the upper middle portion of FIG.
  • FIGS. 4 and 5 show the results of two-dimensional simulation of the hole concentration distribution at the time of avalanche breakdown in the case of having the box-like Al concentration distribution in the upper left portion of FIG. 3 and the upper middle portion of FIG.
  • FIGS. 4 and 5 show the results of two-dimensional simulation of the hole concentration
  • the donor density Nd of the drift layer was set to 2 ⁇ 10 15 cm ⁇ 3 , which is a condition suitable for a power device having a withstand voltage of several kV. Further, in this simulation, the middle diagram is performed using three semiconductor regions having different impurity concentrations, and the left diagram is performed using four semiconductor regions having different impurity concentrations. As described above, as shown in FIG. Similar effects can be obtained by at least two types of semiconductor regions (first and second semiconductor regions).
  • a pn diode having a withstand voltage of several kV in which the floating guard ring 5 is used as one type of semiconductor region instead of the two types of semiconductor regions as in the present invention will be described.
  • the Al concentration of the main junction is changed in the range of 3.0 ⁇ 10 17 to 7.6 ⁇ 10 17 cm ⁇ 3 to obtain the donor concentration in the drift layer and
  • the relationship with the reverse breakdown voltage of the pn diode was measured.
  • FIG. 6 shows the result.
  • a structure in which a terminal structure such as a floating guard ring was not formed was used.
  • the withstand voltage significantly increases in the impurity concentration of Al in the range of 3.8 ⁇ 10 17 to 5.7 ⁇ 10 17 cm ⁇ 3 .
  • the floating guard ring 5 of the silicon carbide pn diode shown in FIG. 7 is made of p-type silicon carbide (one type of semiconductor region) having an Al concentration of 3.8 ⁇ 10 17 cm ⁇ 3 , and 19 to 23 pieces are arranged.
  • the breakdown voltage When applied to a drift layer having a donor concentration of 2 ⁇ 10 15 cm ⁇ 3 and a film thickness of 30 ⁇ m, the breakdown voltage hardly depended on the number of floating guard rings 5 and remained at about 3.3 kV.
  • the floating guard ring 9 is composed of a semiconductor region 6 having a relatively high impurity concentration and a semiconductor region 5 having a relatively low impurity concentration.
  • the floating guard ring 6 was formed by increasing the implantation amount at a minimum implantation energy of 25 keV from 5 ⁇ 10 11 cm ⁇ 2 to 5 ⁇ 10 12 cm ⁇ 2 .
  • the pn diode breakdown voltage improved to 3.8 kV.
  • FIG. 8 is a diagram showing the relationship between the interface charge density and the breakdown voltage.
  • the broken line is a structure in which the implantation amount at a minimum implantation energy of 25 eV is 5 ⁇ 10 11 cm ⁇ 2 as a comparative example
  • the solid line is a structure in which the implantation amount according to the present invention is 5 ⁇ 10 12 cm ⁇ 2 .
  • the structure according to the present invention has little dependency on the breakdown voltage with respect to the interface charge density. That is, it was confirmed that the breakdown voltage did not decrease even if the interface charge density increased to 1 ⁇ 10 13 cm ⁇ 2 due to manufacturing variations.
  • FIG. 10 shows the hole concentration distribution during the avalanche breakdown shown in FIG.
  • the depth of the hole concentration end of 1 ⁇ 10 17 cm ⁇ 3 where the depletion layer hardly penetrates even when a reverse voltage is applied is defined as d1.
  • d1 is obtained by further reducing the hole concentration of 1 ⁇ 10 17 cm ⁇ 3 to 4 ⁇ 10 17 cm ⁇ 3 , 5 ⁇ 10 17 cm ⁇ 3 , and 6 ⁇ 10 17 cm ⁇ 3. It is a simulation figure.
  • the horizontal axis Nd is the donor density of the drift layer 3, and the vertical axis d1 is the allowable maximum depth.
  • Nd is the donor density of the drift layer 3
  • d1 is the allowable maximum depth.
  • FIG. 11 is a graph in the case where Nd is 5 ⁇ 10 15 cm ⁇ 3 or less and the maximum acceptor concentration N2 is the horizontal axis and the allowable maximum depth d1.
  • Circles, triangles, and squares correspond to the densities in FIG.
  • the circle is 0.15 ⁇ m
  • the triangle is 0.21 ⁇ m
  • the square is 0.28 ⁇ m.
  • FIG. 12 shows a similar graph when Nd is larger than 5 ⁇ 10 15 cm ⁇ 3 .
  • Nd 1 ⁇ 10 16 cm ⁇ 3
  • an approximate straight line as shown in FIG. I can draw.
  • Nd is greater than 5 ⁇ 10 15 cm ⁇ 3 and less than 2 ⁇ 10 16 cm ⁇ 3 , if d1 satisfies d1 ⁇ 8 ⁇ 10 ⁇ 19 ⁇ N2 ⁇ 0.24 ( ⁇ m), A region having a small curvature radius such as 4 is unlikely to occur, and an element with a high breakdown voltage can be obtained.
  • the circle is 0.09 ⁇ m, the triangle is 0.16 ⁇ m, and the square is 0.24 ⁇ m.
  • FIG. 13 After growing an n-type silicon carbide drift layer (film thickness 30 ⁇ m, nitrogen concentration 2 ⁇ 10 15 cm ⁇ 3 ) 3 on an n-type silicon carbide substrate 2 by vapor phase epitaxy, SiO SiO (not shown) Two films were deposited, and an ion implantation mask was formed by photolithography and dry etching. Then, Al ions having a concentration distribution indicated by a solid line in FIG. 2 were implanted in the depth direction using seven energies between 25 keV and 380 keV.
  • the Al ion implantation amount was increased compared to other energies, and the Al concentration on the substrate surface side was increased so that the depth d1 was 0.1 ⁇ m or less.
  • This Al concentration distribution corresponds to the floating guard rings 5 and 6 in FIG.
  • the number of floating guard rings 5 and 6 can be changed according to the desired breakdown voltage and the nitrogen concentration in n-type silicon carbide drift layer 3.
  • an SiO 2 film (not shown) was again deposited, and an ion implantation mask was formed for the p-type silicon carbide region 4 where the main junction was to be formed by photolithography and dry etching. Then, Al ions having a concentration of 10 19 cm ⁇ 3 were implanted using four energies between 25 keV and 130 keV. Thereafter, the ion implantation mask was removed with hydrofluoric acid, and activation annealing of the ion implanted Al was performed at 1700 ° C. (FIG. 14).
  • a SiO 2 film 8 (film thickness 0.2 ⁇ m) was deposited, and an opening was provided on p-type silicon carbide region 4 where a main junction was formed by photolithography and dry etching (FIG. 15).
  • a pn diode was manufactured by forming the anode electrode 7 and the cathode electrode 1 (FIG. 1), and the reverse breakdown voltage was measured. As a result, 3.8 kV was obtained.
  • the floating guard ring is obtained.
  • a silicon carbide pn diode can be manufactured in which the influence of positive charges of about 3 ⁇ 10 12 cm ⁇ 2 existing at the interface of the insulating film on the breakdown voltage can be ignored.
  • the implantation energy on the outermost surface is reduced to, for example, 15 keV, and d1 ⁇ 8 ⁇ 10 ⁇ 19 ⁇ N2 ⁇ 0.24 ( ⁇ m)
  • a similar silicon carbide pn diode can be manufactured.
  • a transistor using silicon carbide such as a field effect transistor or a bipolar transistor, can similarly realize a termination structure.
  • Example 1 An embodiment of a silicon carbide pn diode which is a second example will be described.
  • the contents described in the first embodiment can also be applied to the present embodiment unless there are special circumstances.
  • Example 1 a preferable depth of the p-type second semiconductor region 6 having an impurity concentration higher than that of the first semiconductor region 5 will be described, and a preferable horizontal distance between the first semiconductor region 5 and the second semiconductor region 6 will be described.
  • Example 2 a constant distance was provided in the horizontal direction between the first semiconductor region 5 and the second semiconductor region 6.
  • FIG. 16 shows an element in which the second semiconductor region 6 is wider than the first semiconductor region 5 and a horizontal distance d2 is provided.
  • the present embodiment is not limited to the depth d1 as described in the first embodiment.
  • Other configurations are the same as those in FIG.
  • the depletion layer at the time of avalanche breakdown also extends in the horizontal direction in the floating guard ring 5, so that the radius of curvature of the hole concentration curve at the time of avalanche breakdown is obtained. Can be increased. Therefore, the electric field there can be relaxed, and the breakdown voltage of the silicon carbide power device can be increased.
  • the silicon carbide pn diode which can ignore the influence which a positive charge has on a proof pressure can be provided.
  • FIG. 10 illustrates d2 using the hole concentration distribution during avalanche breakdown.
  • d2 is the distance in the horizontal direction from the hole concentration end of 1 ⁇ 10 17 cm ⁇ 3 unit where the depletion layer hardly penetrates and the side surface end of the floating guard ring 5, that is, the end of the Al ion implantation region.
  • D2 is substantially equal to the distance between the surface end of the first semiconductor region 5 and the surface end of the second semiconductor region 6.
  • Example 2 although it did not limit about the depth d1, in addition to Example 2, a good effect is acquired by adding the conditions of the depth of Example 1 to the depth d1.
  • a transistor using silicon carbide such as a field effect transistor or a bipolar transistor, can similarly realize a termination structure.
  • the embodiment has been described in which the withstand voltage is ensured by changing the concentration distribution of the floating guard rings 5 and 6.
  • the third embodiment is an example in which the withstand voltage is secured by controlling the depth of the impurity concentration region between the floating guard ring 5 and the main junction 4.
  • FIG. 18A shows the case where the p-type silicon carbide region 4 forming the main junction is deeper than the floating guard ring 5 and FIG. 18B shows the direction of the p-type silicon carbide region 4 forming the main junction. Is shallower than the floating guard ring 5.
  • the innermost floating guard ring closest to the p-type silicon carbide region 4 and the p-type silicon carbide region 4 are in contact with or partially overlapping.
  • the p-type silicon carbide region 4 and the floating guard ring 5 that form the main junction are formed using different masks, so that the impurity concentration of the p-type silicon carbide region is made independent. Can be controlled.
  • the p-type silicon carbide region 4 has a higher impurity concentration than the floating guard ring 5 because the anode electrode needs to be formed with a low contact resistance.
  • an end where a high electric field tends to concentrate is formed at the position indicated by the symbol A.
  • the portion indicated by symbol A is in contact with or partially overlaps the floating guard ring 5 and is an integral p-type silicon carbide region, so that it is p-type silicon carbide.
  • the substantial end of region 4 is symbol B. Therefore, the avalanche breakdown voltage is determined at the end of the floating guard ring 5 having the maximum acceptor concentration N2.
  • the portion of the symbol A is not exposed to the drift layer 3, so that the breakdown voltage can be increased, and further, the breakdown voltage fluctuation caused by misalignment of the mask due to the manufacturing. It is possible to manufacture a silicon carbide power device with a high breakdown voltage that suppresses the above.
  • FIG. 1 and FIG. 19 The difference between FIG. 1 and FIG. 19 is that the JBS diode has an arrangement in which Schottky junctions and pn junctions are alternately repeated. Therefore, the configuration of the p-type silicon carbide region 4, the impurity concentration distribution of the floating guard ring 5, The p-type silicon carbide region 4 to be joined and the floating guard ring are in contact with or partly overlapped, and the p-type silicon carbide region 4 to be the main junction is shallower than the floating guard ring 5. The impurity concentration of the main junction 4 is higher than the impurity concentration of the floating guard ring 5.
  • the JBS main junction and the innermost peripheral floating guard ring are brought into contact with each other, and the main junction is shallower than the innermost peripheral floating guard ring.
  • the JBS main junction and the floating guard ring are independently optimized.
  • the floating guard ring and the p-type silicon carbide region to be the main junction of the JBS diode are formed by ion implantation of Al using separate masks, and the p-type silicon carbide region of the floating guard ring is the main junction. This can be realized by contacting or overlapping with the p-type silicon carbide region and deepening the ion implantation on the floating guard ring side. Either the main junction or the floating guard ring may be formed first.
  • JBS diode not only the JBS diode but also a transistor using silicon carbide, such as a field effect transistor, a bipolar transistor, or a pn diode, can similarly realize a termination structure.
  • a transistor using silicon carbide such as a field effect transistor, a bipolar transistor, or a pn diode

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Abstract

Le problème de variation de production est résolu car les concentrations en accepteurs dans des anneaux de garde flottants, qui sont formés à une pluralité d'intervalles, sont rendues non uniformes, et la concentration maximum en accepteurs côté surface devient supérieure à la concentration en accepteurs côté substrat, ce qui permet de réduire l'influence de la charge positive présente entre le carbure de silicium et le film d'isolation.
PCT/JP2010/057874 2010-05-10 2010-05-10 Dispositif à semi-conducteur WO2011141981A1 (fr)

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JP2012514615A JP5697665B2 (ja) 2010-05-10 2010-05-10 半導体装置
PCT/JP2010/057874 WO2011141981A1 (fr) 2010-05-10 2010-05-10 Dispositif à semi-conducteur
DE112010005547T DE112010005547T5 (de) 2010-05-10 2010-05-10 Halbleiterbauelement

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PCT/JP2010/057874 WO2011141981A1 (fr) 2010-05-10 2010-05-10 Dispositif à semi-conducteur

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Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2012056705A1 (fr) * 2010-10-29 2012-05-03 パナソニック株式会社 Elément semi-conducteur et procédé de fabrication de celui-ci
JP2013168549A (ja) * 2012-02-16 2013-08-29 Mitsubishi Electric Corp 半導体装置およびその製造方法
CN103390654A (zh) * 2012-05-10 2013-11-13 朱江 一种多沟槽终端肖特基器件及其制备方法
WO2014087601A1 (fr) * 2012-12-03 2014-06-12 パナソニック株式会社 Dispositif à semiconducteur et procédé pour sa fabrication
WO2014184839A1 (fr) * 2013-05-13 2014-11-20 株式会社日立製作所 Dispositif semiconducteur au carbure de silicium
WO2016002057A1 (fr) * 2014-07-03 2016-01-07 株式会社日立製作所 Dispositif à semi-conducteur, module de puissance, dispositif de conversion de puissance, système de moteur triphasé, automobile et véhicule de chemin de fer
CN106887470A (zh) * 2017-01-23 2017-06-23 西安电子科技大学 Ga2O3肖特基二极管器件结构及其制作方法
JP2017163158A (ja) * 2017-05-22 2017-09-14 三菱電機株式会社 電力用半導体装置
JP2018067690A (ja) * 2016-10-21 2018-04-26 トヨタ自動車株式会社 半導体装置とその製造方法
CN109863581A (zh) * 2016-10-18 2019-06-07 株式会社电装 半导体装置及其制造方法
CN110364575A (zh) * 2019-07-23 2019-10-22 中国科学院长春光学精密机械与物理研究所 一种具有浮动场环终端结构的结势垒肖特基二极管及其制备方法

Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001196604A (ja) * 2000-01-12 2001-07-19 Hitachi Ltd 半導体装置
JP2002231965A (ja) * 2001-02-01 2002-08-16 Hitachi Ltd 半導体装置
JP2003510817A (ja) * 1999-09-22 2003-03-18 サイスド エレクトロニクス デヴェロプメント ゲゼルシャフト ミット ベシュレンクテル ハフツング ウント コンパニ コマンディートゲゼルシャフト 炭化珪素からなる半導体装置とその製造方法
JP2005135972A (ja) * 2003-10-28 2005-05-26 Shindengen Electric Mfg Co Ltd 半導体装置の製造方法
WO2005117134A1 (fr) * 2004-05-26 2005-12-08 Shindengen Electric Manufacturing Co., Ltd. Diode et thyristor
JP2007173705A (ja) * 2005-12-26 2007-07-05 Toyota Central Res & Dev Lab Inc 窒化物半導体装置
JP2008541459A (ja) * 2005-05-11 2008-11-20 クリー インコーポレイテッド 少数キャリアの注入が抑制される炭化シリコン接合障壁ショットキーダイオード
CN101371362A (zh) * 2006-01-12 2009-02-18 克里公司 用于碳化硅器件的边缘终端结构和制造包含该结构的碳化硅器件的方法
JP2010040686A (ja) * 2008-08-04 2010-02-18 Renesas Technology Corp 半導体装置およびその製造方法

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2850694B2 (ja) * 1993-03-10 1999-01-27 株式会社日立製作所 高耐圧プレーナ型半導体装置
US7026650B2 (en) 2003-01-15 2006-04-11 Cree, Inc. Multiple floating guard ring edge termination for silicon carbide devices
JP5052169B2 (ja) * 2007-03-15 2012-10-17 新電元工業株式会社 炭化珪素半導体装置の製造方法

Patent Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003510817A (ja) * 1999-09-22 2003-03-18 サイスド エレクトロニクス デヴェロプメント ゲゼルシャフト ミット ベシュレンクテル ハフツング ウント コンパニ コマンディートゲゼルシャフト 炭化珪素からなる半導体装置とその製造方法
JP2001196604A (ja) * 2000-01-12 2001-07-19 Hitachi Ltd 半導体装置
JP2002231965A (ja) * 2001-02-01 2002-08-16 Hitachi Ltd 半導体装置
JP2005135972A (ja) * 2003-10-28 2005-05-26 Shindengen Electric Mfg Co Ltd 半導体装置の製造方法
WO2005117134A1 (fr) * 2004-05-26 2005-12-08 Shindengen Electric Manufacturing Co., Ltd. Diode et thyristor
JP2008541459A (ja) * 2005-05-11 2008-11-20 クリー インコーポレイテッド 少数キャリアの注入が抑制される炭化シリコン接合障壁ショットキーダイオード
JP2007173705A (ja) * 2005-12-26 2007-07-05 Toyota Central Res & Dev Lab Inc 窒化物半導体装置
CN101371362A (zh) * 2006-01-12 2009-02-18 克里公司 用于碳化硅器件的边缘终端结构和制造包含该结构的碳化硅器件的方法
JP2009524217A (ja) * 2006-01-12 2009-06-25 クリー インコーポレイテッド 炭化ケイ素デバイス用のエッジ終端構造およびエッジ終端構造を含む炭化ケイ素デバイスの製造方法
JP2010040686A (ja) * 2008-08-04 2010-02-18 Renesas Technology Corp 半導体装置およびその製造方法

Cited By (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2012056705A1 (fr) * 2010-10-29 2012-05-03 パナソニック株式会社 Elément semi-conducteur et procédé de fabrication de celui-ci
US8563988B2 (en) 2010-10-29 2013-10-22 Panasonic Corporation Semiconductor element and manufacturing method therefor
JP2013168549A (ja) * 2012-02-16 2013-08-29 Mitsubishi Electric Corp 半導体装置およびその製造方法
CN103390654A (zh) * 2012-05-10 2013-11-13 朱江 一种多沟槽终端肖特基器件及其制备方法
WO2014087601A1 (fr) * 2012-12-03 2014-06-12 パナソニック株式会社 Dispositif à semiconducteur et procédé pour sa fabrication
JP5628462B1 (ja) * 2012-12-03 2014-11-19 パナソニック株式会社 半導体装置およびその製造方法
US9006748B2 (en) 2012-12-03 2015-04-14 Panasonic Intellectual Property Management Co., Ltd. Semiconductor device and method for manufacturing same
WO2014184839A1 (fr) * 2013-05-13 2014-11-20 株式会社日立製作所 Dispositif semiconducteur au carbure de silicium
WO2016002057A1 (fr) * 2014-07-03 2016-01-07 株式会社日立製作所 Dispositif à semi-conducteur, module de puissance, dispositif de conversion de puissance, système de moteur triphasé, automobile et véhicule de chemin de fer
CN109863581A (zh) * 2016-10-18 2019-06-07 株式会社电装 半导体装置及其制造方法
CN109863581B (zh) * 2016-10-18 2022-04-26 株式会社电装 半导体装置及其制造方法
JP2018067690A (ja) * 2016-10-21 2018-04-26 トヨタ自動車株式会社 半導体装置とその製造方法
US10985241B2 (en) 2016-10-21 2021-04-20 Toyota Jidosha Kabushiki Kaisha Semiconductor device and production method thereof
CN106887470A (zh) * 2017-01-23 2017-06-23 西安电子科技大学 Ga2O3肖特基二极管器件结构及其制作方法
CN106887470B (zh) * 2017-01-23 2019-07-16 西安电子科技大学 Ga2O3肖特基二极管器件结构及其制作方法
JP2017163158A (ja) * 2017-05-22 2017-09-14 三菱電機株式会社 電力用半導体装置
CN110364575A (zh) * 2019-07-23 2019-10-22 中国科学院长春光学精密机械与物理研究所 一种具有浮动场环终端结构的结势垒肖特基二极管及其制备方法

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