WO2011129708A1 - Thin film solar cell electrode with graphene electrode layer - Google Patents

Thin film solar cell electrode with graphene electrode layer Download PDF

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Publication number
WO2011129708A1
WO2011129708A1 PCT/NO2011/000127 NO2011000127W WO2011129708A1 WO 2011129708 A1 WO2011129708 A1 WO 2011129708A1 NO 2011000127 W NO2011000127 W NO 2011000127W WO 2011129708 A1 WO2011129708 A1 WO 2011129708A1
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layer
solar cell
cell structure
intrinsic
graphene
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PCT/NO2011/000127
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French (fr)
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Smagul Karazhanov
Muhammad Nawaz
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Institutt For Energiteknikk
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/0224—Electrodes
    • H01L31/022466—Electrodes made of transparent conductive layers, e.g. TCO, ITO layers
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier
    • H01L31/065—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the graded gap type
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier
    • H01L31/075—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PIN type
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier
    • H01L31/075—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PIN type
    • H01L31/076—Multiple junction or tandem solar cells
    • H—ELECTRICITY
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    • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier
    • H01L31/078—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier including different types of potential barriers provided for in two or more of groups H01L31/062 - H01L31/075
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/548—Amorphous silicon PV cells

Definitions

  • the invention generally relates to semiconductor technology and in particular to graphene based thin film solar cell structure.
  • TCO transparent conducting oxides
  • TCOs For solar cell applications, the primary requirement of TCOs is the transparency over wider spectral range, excellent thermal and electrical conductivity, good mechanical strength and adhesion to respective semiconductor materials.
  • ITO Indium tin oxide ln 2 O3:Sn
  • AI(Ga) doped ZnO i.e., AZO(GZO)
  • ITO Indium tin oxide ln 2 O3:Sn
  • AZO(GZO) AI(Ga) doped ZnO
  • IR infrared
  • Another problem is the limited availability of the element indium on earth and the intrinsic chemical and electrical drawbacks of ITO.
  • the limited thermal and chemical stability (polymer films and TCOs) are other disadvantages of the TCO films. Moreover, when such TCOs are bent, cracks appear in the film which leads to high resistance. Thus the usage of TCO becomes more economical for large scale industrial applications and hence poses a great threat to long term quality and reliability.
  • TCOs are conducting semiconductors with a wide bandgap over 3.0 eV. While in contact with semiconductor (e.g., Si with energy gap of 1.1 eV), produces a large bandgap discontinuity at the conduction and valence band. Such a large discontinuity value produces a potential barrier for the transport of electrons and holes. Hence, this may leads to non-uniform l-V characteristics.
  • Such an intermediate layer can be of a-Si:H (i.e., hydrogenated amorphous silicon) material widely used in SANYO'S HIT cells or SiN x :H (hydrogenated silicon nitride) material both of which can be deposited by PECVD. Thickness of the a-SiNx:H is usually > 40 nm.
  • WO2009/089268A2 teaches how a solvent for graphene is used in the production of transparent conductive electrodes.
  • US20090071533A1 discloses a transparent electrode that can be prepared by employing a graphene sheet.
  • CN101602503A teaches an epitaxial growth method of graphene on a silicon surface of 4H-SiC by hydrogen etching to eliminate surface scratch on the silicone surface and form regular step-like strips, removing oxide from surface, and then heating surface in presence of argon gas.
  • An object of the present invention is to provide an improved silicone based thin film solar cell structure.
  • the scope is however not limited to only thin film or silicone based structures; for example gallium arsenide, cadmium telluride or copper indium gallium selenide could be used.
  • the present invention is an alternate but flexible solution for transparent conducting electrode well-suited for photovoltaic applications.
  • Graphene is considered as one potential candidate that overcomes the problems encountered by conventional TCOs.
  • Graphene appears in a two dimensional thin sheet of carbon atoms.
  • Graphene possesses excellent optical, electrical, thermal and mechanical properties.
  • graphene is transparent over wide spectral range (0.3 - 1.2 urn), possess approximately zero bandgap (i.e., metallic behavior), high carrier mobility (5000 - 20,000 cm 2 / V.s), high thermal conductivity (5 x 10 3 W/m.K at room temperature), high Young's modulus (0.5 - 1 TPa: provide 100 times greater breaking strength than steel).
  • the graphene is rigid and strong material while ITOs are very brittle in nature.
  • high thermal conductivity value allows graphene for other electronic applications where thermal management is a critical issue.
  • the graphene carrier mobility is independent of temperature and doping.
  • the present invention deals with the usage of graphene as a transparent conducting electrode which provides more flexible solution and possibly eliminates the need of using TCO and top metal in solar cells.
  • the main objective of this invention will be to replace the ITO-a-Si:H or ITO-SiNx:H layers or ZnO based TCOs or other ARC (antireflection coating) films in solar cell by very thin ⁇ 1- 10 nm graphene layers, which would be transparent and well conducting.
  • the graphene film may be placed at top, middle and bottom surface of the solar cell.
  • the exemplary art of this invention is demonstrated schematically in different embodiments using graphene at various places in the following figures.
  • a solar cell structure comprising: a first electrode layer presenting a first surface of the solar cell structure; a second electrode layer presenting a second surface of the solar cell structure, the second surface being opposite the first surface, the first electrode layer and the second electrode layer being electrically connected; a first doped layer, and a first intrinsic layer, the first doped layer and the first intrinsic layer being arranged between the first electrode layer and the second electrode layer, wherein the second electrode layer is a first graphene layer.
  • the second surface may present an external surface of the solar cell structure.
  • a thickness of the first graphene layer may be 2-10 nm.
  • the first electrode layer may be a metal layer.
  • the first doped layer may provided between the first intrinsic layer and the second electrode layer, and wherein the first doped layer may composed of a p-doped layer of thickness 10-50 nm and the first intrinsic layer may be of 10- 20 nm thickness.
  • the first doped layer may be an aSiC:H layer.
  • the first intrinsic layer may be an aSiC:H layer.
  • the first intrinsic layer may be a crystalline Si layer.
  • One embodiment may comprise graded aSiC:H layers between the crystalline Si layer and the first electrode layer, each aSiC:H layer having a lower band gap than a previous aSiC:H layer in a direction towards the crystalline Si layer.
  • One embodiment may comprise graded aSiC:H layers between the crystalline Si layer and the second electrode layer, each aSiC:H layer having a lower band gap than a previous aSiC:H layer in a direction towards the crystalline Si layer.
  • a thickness of each of the graded aSiC:H layers may be in the range 10-40 nm.
  • One embodiment may further comprise a second graphene layer and a second intrinsic layer, the second graphene layer being sandwiched between the first intrinsic layer and the second intrinsic layer, wherein the second graphene layer has a thickness in the range 2-10 nm.
  • the second intrinsic layer may be a crystalline Si layer between the first electrode layer and the second graphene layer.
  • the second intrinsic crystalline Si layer may have a thickness in the range 1-5 pm.
  • the first electrode layer may be an Ag/AI layer of 100-200 nm thickness.
  • the second intrinsic layer may be of a-SiGe material.
  • the first intrinsic aSiC:H layer may have a thickness in the range 200- 400 nm
  • the second intrinsic a-SiGe layer may have a thickness in the range 100-200 nm.
  • One embodiment may further comprise: a third graphene layer arranged in parallel with and next to the second intrinsic a-SiGe layer; and a third intrinsic layer, which third intrinsic layer is an intrinsic crystalline Si layer, wherein the third intrinsic layer is arranged between the second graphene layer and the third graphene layer, the third graphene layer having a thickness in the range 2-10 nm.
  • the third intrinsic layer may have a thickness in the range 500-800 nm.
  • the first doped layer and the first intrinsic layer may form part of a first sub cell structure of the solar cell structure, and wherein the second graphene layer and the second intrinsic layer forms part of a second sub cell structure of the solar cell structure.
  • the third graphene layer and the third intrinsic layer may form part of a third sub cell structure of the solar cell structure.
  • Fig 1 a shows a schematic view of layers of a solar cell structure according to the prior art
  • Fig. 1 b shows schematic views of two variations of the invention
  • Figs 2a-b shows schematic views of micromorph tandem designs of a solar cell structure according to the prior art
  • Figs 3a-c show some variations of micromorph tandem designs according to the invention. Detailed description
  • Figure 1 b shows the first example of a silicone based structure (a so- called single heterojunction) of proposed art in this invention. It does not, for any of the examples or other implementations, exclude using for example gallium arsenide, cadmium telluride or copper indium gallium selenide.
  • the crystalline silicon can be monocrystalline, polycrystalline or have other crystalline forms.
  • n doping in the crystalline silicon layer [041a, 041 b, 041c] can be in the range of 1 x 10 15 - 1 x 10 16 cm “3 and p type doping in the a-Si:H layer [042a, 042b, 042c] can be in the range of 0.5 - 1.0 x 10 19 cm "3 .
  • the back metal is usually Al/Ag (aluminum/silver). Usually, the light is absorbed in the thick (ca 200 - 300 pm) lightly n-doped Si layers [i.e., 041a, 041 b, 041c] and photogenerated carriers are collected at the respective contacts.
  • the layer [042a, 042b, 042c] in the prior art is of a-Si:H (amorphous hydrogenated silicon) material while layer [041a, 041 b, 041c] is either monocrystalline Si or microcrystalline Si.
  • the doping position can be changed if needed, meaning that the layer [042a, 042b, 042c] can be n-type doped and layer [041a, 041b, 041c] can be p-type doped.
  • Graphene layer [043] is a replacement of conventional design using either ITO (indium based tin oxide) [043c] or stack of ITO and Si 3 N 4 [043b and 044b] or stack of ITO and SiO 2 [043a and 044a].
  • the design is further modified here to tailor the device manufacturability and electrical performance from the point of view of improving the efficiency.
  • the top a-Si:H layer [042a, 042b, 042c] is replaced here with a-SiC:H layers (i.e., hydrogenated amorphous silicon carbide) [042aa, 042bb] where some part of these layer is undoped [i.e., 042aa].
  • the a-SiC:H layer has a larger bandgap (1.9 - 2.5 eV) than that of a-Si:H layer (i.e., 1.7 - 1.75 eV).
  • a-SiC:H layer acts as an optical transparent window layer and further allows to tune slightly higher open circuit voltage (i.e., improved efficiency).
  • the doping in the a-SiC:H layer [042bb] may be 1- 5 x 10 19 cm 3 .
  • Plasma enhanced chemical vapor deposition (PECVD) technique is well suited to grow a-SiC:H layer using silane, and methane combination with growth temperature in the range 200 - 350 °C.
  • both type of layers namely a-Si:H or a-SiC:H can be realized using a well-known PECVD (Plasma enhanced chemical vapor deposition) technique where the bandgap and the layer quality (i.e., defect density) is controlled by the deposition parameters such as silane/methane/hydrogen flow, plasma pressure, RF (radio frequency) power and growth temperature.
  • PECVD Pullasma enhanced chemical vapor deposition
  • the thickness of the p doped a-SiC:H layer [042bb] and undoped a-SiC:H layer [042aa] may be 10 - 50 nm and 10 - 20 nm respectively.
  • a lightly doped n-type crystalline Si layer [041] may be 50 - 300 pm, especially 50 - 100 pm, and with a doping concentration of 0.1 - 5 x 10 16 cm “3 respectively.
  • a backside metal layer [040] is usually Al/Ag (aluminum/silver) of 100 - 200 nm thickness. The thickness of the graphene layer may be 2 - 10 nm.
  • the graphene layer can be grown either CVD (chemical vapor deposition) or solid source molecular beam epitaxy (MBE) or PECVD (plasma enhanced vapor deposition) technique.
  • One other embodiment is multi-heterojunction design where intrinsic crystalline Si layer [052] is sandwiched between two a-S/C.H layers [051 and 053].
  • the a-SiC:H layer is composed of stack of graded, i.e., varying bandgap layers. The required bandgap of graded layers is achievable by varying the growth parameters using PECVD technique.
  • the bottom graded stack [layers: 051a, 051 b.
  • 051c is composed of a-SiC layers of decreasing bandgap from 1.95 to 1.1 eV while top graded stack is composed of [layers: 053a, 053b, 053c] a-S/ ' C layers of increasing bandgap from 1.1 to 1.95 eV.
  • the thickness of each of the bottom or top stack of a-SiC:H layers may be in the 10 - 40 nm range.
  • the a-SiC:H layers [053a, 051c] surrounding closely the undoped crystalline i-Si absorbing layer [052] are of lightly n/p type doped in the range of 0.1 - 1 x 10 17 cm "3 .
  • a-SiC layers [053b, 053c] and [051a, 051 b] may be highly doped p and n type in the range 0.1 - 1.0 x 10 20 cm "3 .
  • This graded mechanism facilitates the transport of the photogenerated carriers to be collected at the respective contacts and thus may have higher efficiency potential.
  • device design can be tailored to achieve optimal efficiency of the device. Note that for conventional heterojunction (HIT) type solar cells, non-uniform l-V characteristics and reduced fill-factor have been reported due to large valence band discontinuity (i.e., impede the hole transport) of the two materials (i.e., c-Si of 1.1 eV and a-Si:H of 1.75 eV).
  • the grading of the wide bandgap aSiC:H layers around the i-Si layer will therefore help to get smooth I - V characteristics.
  • the graphene layer [054] of 2 -10 nm thickness is added at the top of the device which will replace the conventional TCO approaches discussed earlier.
  • the thickness of the undoped crystalline i-Si layer [052] may be 50 - 100 pm.
  • Figs 3a-c shows the usage of proposed graphene in solar cells based on mircomorph type and tandem design.
  • Such solar cell designs are needed to cover the wider spectrum of solar radiation and hence improved efficiency performance.
  • Micromorph design or thin film design offer advantages in terms of improved efficiency performance and potentially reduced cost due to less material usage.
  • Prior art work of micromorph design approach is given in fig. 2a and figure 2b.
  • the two cells i.e., top cell composed of a-Si:H and bottom cell composed of crystalline c-Si
  • ZnO Zinc oxide
  • TCO ZnO
  • n type a-Si:H and p type c-Si is used as a tunneling recombination junction layer [072].
  • TCO ZnO
  • Other approach using thin high doped tunneling recombination junction shows absorption losses.
  • the bandgap discontinuity between the top and bottom cell is quite large with these approaches and hence photogenerated carriers find difficulty to surmount the potential barriers (i.e., valence band discontinuity for hole barrier and conduction band discontinuity for electron barrier).
  • these approaches leading to higher recombination losses at the interface between two cells are not well suited for optimal design.
  • the present invention therefore replaces the [062] and [072] layers with layer [082] and [092] of graphene.
  • [064] and [074] layers of conventional TCO materials are also replaced with new layers of graphene material [084] and [094].
  • Present art based on the said changes is shown in figure 3a and figure 3b.
  • the top cell is composed of aSiC:H material and bottom cell is composed of crystalline c-Si material.
  • the a-SiC:H layer [083a, 083b] has a total thickness of 200 - 400 nm and c-Si layer [081 a, 081 b] has a total thickness of 1.0 - 5.0 pm.
  • a-SiC:H layer is undoped [083a] over the middle graphene layers [082, 092] while remaining part of a- SiC:H layer [083b] over the middle graphene layers [082, 092] is highly p- doped with doping concentration of 0.1 - 5 x 10 19 cm "3 .
  • the thickness of the top doped and undoped aSiC:H layers may be 10 - 40 nm and 200 - 400 nm respectively.
  • c-Si layer under the middle graphene layer [082] is undoped [081 b] while remaining part of c-Si layer is highly n- doped [081a] with doping concentration of 0.1 - 1 x 10 19 cm "3 .
  • a total thickness of the c-Si layers [081a and 081 b] may be in the range of 1- 5 pm out of which doped c-Si layer [081a] may be 10 - 50 nm.
  • a back contact is of aluminum material [080] with a total thickness of 100 - 200 nm.
  • the thickness of graphene layers [082, 084] may be 2 - 10 nm.
  • the bottom cell is composed of aSiGe:H (i.e., hydrogenated amorphous silicon germanium) layer [091a, 091b] under the middle graphene layer [092].
  • the top cell is composed of aSiC:H layers [093a, 093b] where the doped aSiC:H layer [093b] may be of thickness 10 - 40 nm and undoped aSiC:H layer [093a] is of thickness 200 - 400 nm.
  • the middle and top graphene layers [092, 094] are of thickness 2 - 10 nm.
  • a total thickness of the a-SGe:H layers [091a and 091 b] may be in the range of 1- 3 ⁇ out of which doped a- SiGe:H layer [091a] may be 10 - 40 nm.
  • a back contact is of aluminum material [090] with a total thickness of 100 nm.
  • the growth of the a- SiGe:H layer follow the same technique described earlier (i.e., PECVD) where the thickness, bandgap and quality is controlled by the gas flow ratios (i.e., germane, silane, hydrogen), substrate temperature, RF power and pressure.
  • the bandgap of aSiGe is reported to be 0.74 - 0.94 eV with PECVD technique which can be tailored to achieve the optimal performance.
  • the solar cell is composed of tandem type design where three solar cells of different materials (i.e., different bandgap) are stacked over each other.
  • the wide bandgap top cell is of aSiC:H material [105a]
  • the middle bandgap solar cell is of crystalline c-Si material [103]
  • bottom solar cell is of aSiGe:H material [101 b].
  • the three solar cell (top, middle and bottom) parts are separated by the graphene layers [102, 104].
  • the structure is finally completed by the top graphene layer [106].
  • the thickness of the top, middle and bottm cell may be in the range 200 - 400 nm, 500 - 800 nm, and 1- 3.0 pm respectively.
  • the p-doping and thickness of aSiC:H layer [105b] may be 1 - 5 x 10 19 cm '3 and 10 - 40 nm respectively.
  • n-doping and thickness of aSiGe:H layer [101a] may be 1 - 5 x 10 19 cm "3 and 10 - 40 nm respectively.
  • a back contact is of aluminum material [100] with a total thickness of 100 nm.
  • the thickness of graphene layer [106 or 104 or 102] may be 2 - 10 nm and this is left undoped.
  • graphene helps in two ways. Firstly it is transparent (with better transparency than ZnO or other ITO) over a wide spectral range. Secondly, it is highly conductive and show metallic behavior with zero bandgap, and hence avoiding the discontinuity problem.
  • Present embodiments primarily deals with three design approaches namely double cell micromorph based on a-SiC/c-Si layers with graphene intermediate sandwich layer (fig. 3a), double cell composed of a-SiC/a-SiGe layers with graphene intermediate sandwich layer (fig. 3b) and triple tandem cell composed of a- SiC/c-Si/a-SiGe layers with graphene intermediate sandwich layer between the cells (fig. 3c).

Abstract

It is presented a solar cell structure having a first electrode layer presenting a first surface of the solar cell structure, and a second electrode layer presenting a second surface of the solar cell structure. The second surface is opposite the first surface, and the first electrode layer and the second electrode layer are electrically connected. The solar cell structure further comprises a first doped layer, and a first intrinsic layer, the first doped layer and the first intrinsic layer being arranged between the first electrode layer and the second electrode layer, wherein the second electrode layer is a first graphene layer.

Description

THIN FILM SOLAR CELL ELECTRODE WITH GRAPHENE ELECTRODE LAYER
Field of the invention
The invention generally relates to semiconductor technology and in particular to graphene based thin film solar cell structure. Background
Optically transparent materials such as glass, plastic etc. are normally electrical insulators. Materials such as Ag, Al and Cu conduct electrical current well, and are opaque to visible part of solar radiation. There is another class of materials, which are transparent to the visible light in the energy range from 2.1 to 3.1 eV and at the same time possess good conductivity of electrical current. These materials are called transparent conducting oxides (TCO). Because of these interesting electrical and optical properties, TCO- coated glass substrates have found wide range of applications as front electrode in thin film solar cells, transparent heaters for defogging windows of aircrafts and battle tanks, heat reflectors in windows to improve air conditioning in buildings, smart windows, oven windows, defrosting windows in refrigerators and airplanes and display devices with thin film transistors, holographic recording media and memory chips.
For solar cell applications, the primary requirement of TCOs is the transparency over wider spectral range, excellent thermal and electrical conductivity, good mechanical strength and adhesion to respective semiconductor materials.
Indium tin oxide ln2O3:Sn (ITO) and AI(Ga) doped ZnO (i.e., AZO(GZO)) are the candidates widely used in semiconductor devices as transparent electrode. One of the deficiencies of ITO, AZO and GZO films is the reduced transparency in the infrared (IR) part of the solar spectra. Another problem is the limited availability of the element indium on earth and the intrinsic chemical and electrical drawbacks of ITO. The limited thermal and chemical stability (polymer films and TCOs) are other disadvantages of the TCO films. Moreover, when such TCOs are bent, cracks appear in the film which leads to high resistance. Thus the usage of TCO becomes more economical for large scale industrial applications and hence poses a great threat to long term quality and reliability.
Also note that TCOs are conducting semiconductors with a wide bandgap over 3.0 eV. While in contact with semiconductor (e.g., Si with energy gap of 1.1 eV), produces a large bandgap discontinuity at the conduction and valence band. Such a large discontinuity value produces a potential barrier for the transport of electrons and holes. Hence, this may leads to non-uniform l-V characteristics.
On the other side, usage of TCOs enables larger inter finger spacing on the front grid of a solar cell, thus reducing shadowing and increasing the amount of light that hits the cell. That is why modern solar cells containing homojunction and heterojunction type structures have been made using TCOs and indium-tin-oxide (ITOs). However, the usage of ITO is limited by the lack of surface passivation and non-negligible optical absorption. This limitation can be somehow suppressed by including an intermediate layer between the ITO and the Si substrate. Such an intermediate layer can be of a-Si:H (i.e., hydrogenated amorphous silicon) material widely used in SANYO'S HIT cells or SiNx:H (hydrogenated silicon nitride) material both of which can be deposited by PECVD. Thickness of the a-SiNx:H is usually > 40 nm. WO2009/089268A2 teaches how a solvent for graphene is used in the production of transparent conductive electrodes.
US20090071533A1 discloses a transparent electrode that can be prepared by employing a graphene sheet.
CN101602503A teaches an epitaxial growth method of graphene on a silicon surface of 4H-SiC by hydrogen etching to eliminate surface scratch on the silicone surface and form regular step-like strips, removing oxide from surface, and then heating surface in presence of argon gas.
Summary of the invention
An object of the present invention is to provide an improved silicone based thin film solar cell structure. The scope is however not limited to only thin film or silicone based structures; for example gallium arsenide, cadmium telluride or copper indium gallium selenide could be used.
The present invention is an alternate but flexible solution for transparent conducting electrode well-suited for photovoltaic applications. Graphene is considered as one potential candidate that overcomes the problems encountered by conventional TCOs. Graphene appears in a two dimensional thin sheet of carbon atoms. Graphene possesses excellent optical, electrical, thermal and mechanical properties. For example, graphene is transparent over wide spectral range (0.3 - 1.2 urn), possess approximately zero bandgap (i.e., metallic behavior), high carrier mobility (5000 - 20,000 cm2/ V.s), high thermal conductivity (5 x 103 W/m.K at room temperature), high Young's modulus (0.5 - 1 TPa: provide 100 times greater breaking strength than steel). Note that the graphene is rigid and strong material while ITOs are very brittle in nature. Similarly, high thermal conductivity value allows graphene for other electronic applications where thermal management is a critical issue. Furthermore the graphene carrier mobility is independent of temperature and doping.
The present invention deals with the usage of graphene as a transparent conducting electrode which provides more flexible solution and possibly eliminates the need of using TCO and top metal in solar cells. Thus the main objective of this invention will be to replace the ITO-a-Si:H or ITO-SiNx:H layers or ZnO based TCOs or other ARC (antireflection coating) films in solar cell by very thin ~ 1- 10 nm graphene layers, which would be transparent and well conducting. Depending on the design of solar cell structure, the graphene film may be placed at top, middle and bottom surface of the solar cell. The exemplary art of this invention is demonstrated schematically in different embodiments using graphene at various places in the following figures.
Hence, according to an aspect of the present invention, there is provided a solar cell structure comprising: a first electrode layer presenting a first surface of the solar cell structure; a second electrode layer presenting a second surface of the solar cell structure, the second surface being opposite the first surface, the first electrode layer and the second electrode layer being electrically connected; a first doped layer, and a first intrinsic layer, the first doped layer and the first intrinsic layer being arranged between the first electrode layer and the second electrode layer, wherein the second electrode layer is a first graphene layer.
The second surface may present an external surface of the solar cell structure.
A thickness of the first graphene layer may be 2-10 nm.
The first electrode layer may be a metal layer.
The first doped layer may provided between the first intrinsic layer and the second electrode layer, and wherein the first doped layer may composed of a p-doped layer of thickness 10-50 nm and the first intrinsic layer may be of 10- 20 nm thickness.
The first doped layer may be an aSiC:H layer.
The first intrinsic layer may be an aSiC:H layer.
The first intrinsic layer may be a crystalline Si layer. One embodiment may comprise graded aSiC:H layers between the crystalline Si layer and the first electrode layer, each aSiC:H layer having a lower band gap than a previous aSiC:H layer in a direction towards the crystalline Si layer.
One embodiment may comprise graded aSiC:H layers between the crystalline Si layer and the second electrode layer, each aSiC:H layer having a lower band gap than a previous aSiC:H layer in a direction towards the crystalline Si layer.
A thickness of each of the graded aSiC:H layers may be in the range 10-40 nm.
One embodiment may further comprise a second graphene layer and a second intrinsic layer, the second graphene layer being sandwiched between the first intrinsic layer and the second intrinsic layer, wherein the second graphene layer has a thickness in the range 2-10 nm.
The second intrinsic layer may be a crystalline Si layer between the first electrode layer and the second graphene layer.
The second intrinsic crystalline Si layer may have a thickness in the range 1-5 pm.
The first electrode layer may be an Ag/AI layer of 100-200 nm thickness. The second intrinsic layer may be of a-SiGe material.
The first intrinsic aSiC:H layer may have a thickness in the range 200- 400 nm, and the second intrinsic a-SiGe layer may have a thickness in the range 100-200 nm.
One embodiment may further comprise: a third graphene layer arranged in parallel with and next to the second intrinsic a-SiGe layer; and a third intrinsic layer, which third intrinsic layer is an intrinsic crystalline Si layer, wherein the third intrinsic layer is arranged between the second graphene layer and the third graphene layer, the third graphene layer having a thickness in the range 2-10 nm.
The third intrinsic layer may have a thickness in the range 500-800 nm.
The first doped layer and the first intrinsic layer may form part of a first sub cell structure of the solar cell structure, and wherein the second graphene layer and the second intrinsic layer forms part of a second sub cell structure of the solar cell structure.
The third graphene layer and the third intrinsic layer may form part of a third sub cell structure of the solar cell structure.
Further features and advantages of the present invention will be evident from the following description.
Brief description of the drawings
The invention and further advantages thereof will now be described by a non- limiting example of an embodiment with reference to the accompanying drawings, in which:
Fig 1 a shows a schematic view of layers of a solar cell structure according to the prior art;
Fig. 1 b shows schematic views of two variations of the invention;
Figs 2a-b shows schematic views of micromorph tandem designs of a solar cell structure according to the prior art; and
Figs 3a-c show some variations of micromorph tandem designs according to the invention. Detailed description
Manufacturing methodologies of graphene sheet have been documented by various means. For example, US patent application US2009181502 presents a method of manufacturing graphene on silicon or silicon on insulator (SOI) substrates by carbonizing the top silicon layer into SiC (silicon carbide) utilizing a gaseous source and then converting the SiC layer into thin graphene sheet. Another US patent application by C. J. Young, US2009071533 deals with fabrication of graphene by forming a graphitizing catalyst in the form of sheet which is coated by an organic material on the graphitizing catalyst and providing heating thereafter. Yet another patent application by S. Hyeon-Jin, US2009146111 prepares reduced graphene oxide thin sheet doped with mixed organic and inorganic dopants for transparent electrode applications.
Figure 1 b shows the first example of a silicone based structure (a so- called single heterojunction) of proposed art in this invention. It does not, for any of the examples or other implementations, exclude using for example gallium arsenide, cadmium telluride or copper indium gallium selenide. The crystalline silicon can be monocrystalline, polycrystalline or have other crystalline forms. Those skilled in the solar industry knows the basic solar cell design which is composed of back metal reflector [040a, 040b, 040c], lightly n- type doped layer of crystalline silicon [041a, 041 b, 041c], p+ - type doped thin layer of a-Si:H (hydrogenated amorphous silicon) [042a, 042b, 042c] and top ITO layer [043c] and/or combined ITO/Si3N layer [043b, 044b] and/or combined ITO/SiO2 layer [043a, 044a]. Here, n doping in the crystalline silicon layer [041a, 041 b, 041c] can be in the range of 1 x 1015 - 1 x 1016 cm"3 and p type doping in the a-Si:H layer [042a, 042b, 042c] can be in the range of 0.5 - 1.0 x 1019 cm"3. The back metal is usually Al/Ag (aluminum/silver). Mostly, the light is absorbed in the thick (ca 200 - 300 pm) lightly n-doped Si layers [i.e., 041a, 041 b, 041c] and photogenerated carriers are collected at the respective contacts. It is important to mention here that the layer [042a, 042b, 042c] in the prior art is of a-Si:H (amorphous hydrogenated silicon) material while layer [041a, 041 b, 041c] is either monocrystalline Si or microcrystalline Si. For design optimization, the doping position can be changed if needed, meaning that the layer [042a, 042b, 042c] can be n-type doped and layer [041a, 041b, 041c] can be p-type doped.
Graphene layer [043] is a replacement of conventional design using either ITO (indium based tin oxide) [043c] or stack of ITO and Si3N4 [043b and 044b] or stack of ITO and SiO2 [043a and 044a]. The design is further modified here to tailor the device manufacturability and electrical performance from the point of view of improving the efficiency. For example, the top a-Si:H layer [042a, 042b, 042c] is replaced here with a-SiC:H layers (i.e., hydrogenated amorphous silicon carbide) [042aa, 042bb] where some part of these layer is undoped [i.e., 042aa]. Depending on the growth conditions and growth mechanism, the a-SiC:H layer has a larger bandgap (1.9 - 2.5 eV) than that of a-Si:H layer (i.e., 1.7 - 1.75 eV). a-SiC:H layer acts as an optical transparent window layer and further allows to tune slightly higher open circuit voltage (i.e., improved efficiency). The doping in the a-SiC:H layer [042bb] may be 1- 5 x 1019 cm 3. Plasma enhanced chemical vapor deposition (PECVD) technique is well suited to grow a-SiC:H layer using silane, and methane combination with growth temperature in the range 200 - 350 °C. Principally, both type of layers namely a-Si:H or a-SiC:H can be realized using a well-known PECVD (Plasma enhanced chemical vapor deposition) technique where the bandgap and the layer quality (i.e., defect density) is controlled by the deposition parameters such as silane/methane/hydrogen flow, plasma pressure, RF (radio frequency) power and growth temperature. The thickness of the p doped a-SiC:H layer [042bb] and undoped a-SiC:H layer [042aa] may be 10 - 50 nm and 10 - 20 nm respectively. A lightly doped n-type crystalline Si layer [041] may be 50 - 300 pm, especially 50 - 100 pm, and with a doping concentration of 0.1 - 5 x 1016 cm"3 respectively. A backside metal layer [040] is usually Al/Ag (aluminum/silver) of 100 - 200 nm thickness. The thickness of the graphene layer may be 2 - 10 nm. The graphene layer can be grown either CVD (chemical vapor deposition) or solid source molecular beam epitaxy (MBE) or PECVD (plasma enhanced vapor deposition) technique.
One other embodiment is multi-heterojunction design where intrinsic crystalline Si layer [052] is sandwiched between two a-S/C.H layers [051 and 053]. The a-SiC:H layer is composed of stack of graded, i.e., varying bandgap layers. The required bandgap of graded layers is achievable by varying the growth parameters using PECVD technique. The bottom graded stack [layers: 051a, 051 b. 051c] is composed of a-SiC layers of decreasing bandgap from 1.95 to 1.1 eV while top graded stack is composed of [layers: 053a, 053b, 053c] a-S/'C layers of increasing bandgap from 1.1 to 1.95 eV. The thickness of each of the bottom or top stack of a-SiC:H layers may be in the 10 - 40 nm range. The a-SiC:H layers [053a, 051c] surrounding closely the undoped crystalline i-Si absorbing layer [052] are of lightly n/p type doped in the range of 0.1 - 1 x 1017 cm"3. Other a-SiC layers [053b, 053c] and [051a, 051 b] may be highly doped p and n type in the range 0.1 - 1.0 x 1020 cm"3. This graded mechanism facilitates the transport of the photogenerated carriers to be collected at the respective contacts and thus may have higher efficiency potential. Thus device design can be tailored to achieve optimal efficiency of the device. Note that for conventional heterojunction (HIT) type solar cells, non-uniform l-V characteristics and reduced fill-factor have been reported due to large valence band discontinuity (i.e., impede the hole transport) of the two materials (i.e., c-Si of 1.1 eV and a-Si:H of 1.75 eV). The grading of the wide bandgap aSiC:H layers around the i-Si layer will therefore help to get smooth I - V characteristics. The graphene layer [054] of 2 -10 nm thickness is added at the top of the device which will replace the conventional TCO approaches discussed earlier. The thickness of the undoped crystalline i-Si layer [052] may be 50 - 100 pm.
Figs 3a-c shows the usage of proposed graphene in solar cells based on mircomorph type and tandem design. Such solar cell designs are needed to cover the wider spectrum of solar radiation and hence improved efficiency performance. Micromorph design or thin film design offer advantages in terms of improved efficiency performance and potentially reduced cost due to less material usage. Prior art work of micromorph design approach is given in fig. 2a and figure 2b. Here the two cells (i.e., top cell composed of a-Si:H and bottom cell composed of crystalline c-Si) are separated by either intermediate reflectors [062] or tunneling recombination junction layer [072]. ZnO (Zinc oxide) is oftenly used as a TCO material [062] (fig. 2a) while highly doped n type a-Si:H and p type c-Si is used as a tunneling recombination junction layer [072]. TCO (ZnO) is a transparent wideband semiconductor (bandgap of 3.4 eV) and offer very limited transparency range. Other approach using thin high doped tunneling recombination junction shows absorption losses. Simultaneously, the bandgap discontinuity between the top and bottom cell is quite large with these approaches and hence photogenerated carriers find difficulty to surmount the potential barriers (i.e., valence band discontinuity for hole barrier and conduction band discontinuity for electron barrier). Thus these approaches leading to higher recombination losses at the interface between two cells are not well suited for optimal design.
The present invention therefore replaces the [062] and [072] layers with layer [082] and [092] of graphene. Similarly [064] and [074] layers of conventional TCO materials are also replaced with new layers of graphene material [084] and [094]. Present art based on the said changes is shown in figure 3a and figure 3b. Here the top cell is composed of aSiC:H material and bottom cell is composed of crystalline c-Si material. The a-SiC:H layer [083a, 083b] has a total thickness of 200 - 400 nm and c-Si layer [081 a, 081 b] has a total thickness of 1.0 - 5.0 pm. Some part of the a-SiC:H layer is undoped [083a] over the middle graphene layers [082, 092] while remaining part of a- SiC:H layer [083b] over the middle graphene layers [082, 092] is highly p- doped with doping concentration of 0.1 - 5 x 1019 cm"3. The thickness of the top doped and undoped aSiC:H layers may be 10 - 40 nm and 200 - 400 nm respectively. Similarly, some part of the c-Si layer under the middle graphene layer [082] is undoped [081 b] while remaining part of c-Si layer is highly n- doped [081a] with doping concentration of 0.1 - 1 x 1019 cm"3. A total thickness of the c-Si layers [081a and 081 b] may be in the range of 1- 5 pm out of which doped c-Si layer [081a] may be 10 - 50 nm. A back contact is of aluminum material [080] with a total thickness of 100 - 200 nm. The thickness of graphene layers [082, 084] may be 2 - 10 nm.
In another embodiment of the present artwork is also shown in fig. 3b. Here the bottom cell is composed of aSiGe:H (i.e., hydrogenated amorphous silicon germanium) layer [091a, 091b] under the middle graphene layer [092]. The top cell is composed of aSiC:H layers [093a, 093b] where the doped aSiC:H layer [093b] may be of thickness 10 - 40 nm and undoped aSiC:H layer [093a] is of thickness 200 - 400 nm. Here, the middle and top graphene layers [092, 094] are of thickness 2 - 10 nm. A total thickness of the a-SGe:H layers [091a and 091 b] may be in the range of 1- 3 μιη out of which doped a- SiGe:H layer [091a] may be 10 - 40 nm. A back contact is of aluminum material [090] with a total thickness of 100 nm. Note that the growth of the a- SiGe:H layer follow the same technique described earlier (i.e., PECVD) where the thickness, bandgap and quality is controlled by the gas flow ratios (i.e., germane, silane, hydrogen), substrate temperature, RF power and pressure. The bandgap of aSiGe is reported to be 0.74 - 0.94 eV with PECVD technique which can be tailored to achieve the optimal performance.
Yet another exemplary art of the present invention is shown in fig. 3c. Here the solar cell is composed of tandem type design where three solar cells of different materials (i.e., different bandgap) are stacked over each other. The wide bandgap top cell is of aSiC:H material [105a], the middle bandgap solar cell is of crystalline c-Si material [103] and bottom solar cell is of aSiGe:H material [101 b]. The three solar cell (top, middle and bottom) parts are separated by the graphene layers [102, 104]. The structure is finally completed by the top graphene layer [106]. The thickness of the top, middle and bottm cell may be in the range 200 - 400 nm, 500 - 800 nm, and 1- 3.0 pm respectively. The p-doping and thickness of aSiC:H layer [105b] may be 1 - 5 x 1019 cm'3 and 10 - 40 nm respectively. Similarly, n-doping and thickness of aSiGe:H layer [101a] may be 1 - 5 x 1019 cm"3 and 10 - 40 nm respectively. A back contact is of aluminum material [100] with a total thickness of 100 nm. The thickness of graphene layer [106 or 104 or 102] may be 2 - 10 nm and this is left undoped.
In the present embodiments, graphene helps in two ways. Firstly it is transparent (with better transparency than ZnO or other ITO) over a wide spectral range. Secondly, it is highly conductive and show metallic behavior with zero bandgap, and hence avoiding the discontinuity problem. Present embodiments primarily deals with three design approaches namely double cell micromorph based on a-SiC/c-Si layers with graphene intermediate sandwich layer (fig. 3a), double cell composed of a-SiC/a-SiGe layers with graphene intermediate sandwich layer (fig. 3b) and triple tandem cell composed of a- SiC/c-Si/a-SiGe layers with graphene intermediate sandwich layer between the cells (fig. 3c).

Claims

Claims
1. A solar cell structure comprising:
- a first electrode layer (040; 050; 080; 090; 100) presenting a first surface of the solar cell structure,
- a second electrode layer (043; 054; 084; 094; 106) presenting a second surface of the solar cell structure, the second surface being opposite the first surface, the first electrode layer and the second electrode layer being electrically connected,
- a first doped layer (042bb; 053c), and
- a first intrinsic layer (042aa; 052; 083a; 093a; 105a), the first doped layer and the first intrinsic layer being arranged between the first electrode layer and the second electrode layer,
wherein the second electrode layer is a first graphene layer.
2. The solar cell structure as claimed in claim 1 , wherein the second surface presents an external surface of the solar cell structure.
3. The solar cell structure as claimed in claim 1 or 2, wherein a thickness of the first graphene layer is 2-10 nm.
4. The solar cell structure as claimed in any of the preceding claims, wherein the first electrode layer is a metal layer.
5. The solar cell structure as claimed in any of the preceding claims, wherein the first doped layer is provided between the first intrinsic layer and the second electrode layer, and wherein the first doped layer is composed of a p-doped layer of thickness 10-50 nm and the first intrinsic layer (042aa; 083a; 093a; 105a), is of 10-20 nm thickness.
6. The solar cell structure as claimed in any of claims 1-4, wherein the first doped layer is provided between the first intrinsic layer and the second electrode layer, and wherein the first doped layer is composed of a p- doped layer of thickness 10-50 nm and the first intrinsic layer (052) is of 50-100 prn.
7. The solar cell structure as claimed in any of the preceding claims, wherein the first doped layer is an aSiC:H layer.
8. The solar cell structure as claimed in any of the preceding claims, wherein the first intrinsic layer is an aSiC:H layer.
9. The solar cell structure as claimed in any of claims 1-7, wherein the first intrinsic layer is a crystalline Si layer (052).
10. The solar cell structure as claimed in claim 9, comprising graded aSiC:H layers with varying bandgap (051a, 051 b, 051c) between the crystalline Si layer (052) and the first electrode layer, each aSiC:H layer having a lower band gap than a previous aSiC:H layer in a direction towards the crystalline Si layer.
11. The solar cell structure as claimed in claim 9 or 109, comprising graded aSiC:H layers with varying bandgap (053c, 053b, 053a) between the crystalline Si layer (052) and the second electrode layer (054), each aSiC:H layer having a lower band gap than a previous aSiC:H layer in a direction towards the crystalline Si layer (052).
12. The solar cell structure as claimed in any of the preceding claims, further comprising a second graphene layer (082; 092; 104) and a second intrinsic layer (081 b), the second graphene layer being sandwiched between the first intrinsic layer (083a) and the second intrinsic layer (081 b), wherein the second graphene layer has a thickness in the range 2- 10 nm.
13. The solar cell structure as claimed in claim 12, wherein the second intrinsic layer is a crystalline Si layer between the first electrode layer and the second graphene layer.
14. The solar cell structure as claimed in claim 13 wherein the second intrinsic crystalline Si layer has a thickness in the range 1-5 μιη.
15. The solar cell structure as claimed in any of the preceding claims, wherein the first electrode layer is an Ag/AI layer of 100-200 nm thickness.
16. The solar cell structure as claimed in claims 12, wherein the second intrinsic layer is of a-SiGe material.
17. The solar cell structure as claimed in claim 16, wherein the first intrinsic aSiC:H layer has a thickness in the range 200-400 nm, and the second intrinsic a-SiGe layer has a thickness in the range 100-200 nm.
18. The solar cell structure as claimed in claim 16 or 17, further
comprising:
- a third graphene layer (102) arranged in parallel with and next to the second intrinsic a-SiGe layer (101 b), and
- a third intrinsic layer (103),
which third intrinsic layer is an intrinsic crystalline Si layer, wherein the third intrinsic layer is arranged between the second graphene layer and the third graphene layer, the third graphene layer having a thickness in the range 2-10 nm.
19. The solar cell structure as claimed in claim 18, wherein the third intrinsic layer has a thickness in the range 500-800 nm.
20. The solar cell structure as claimed in any of claims 13-19 wherein the first doped layer and the first intrinsic layer forms part of a first sub cell structure of the solar cell structure, and wherein the second graphene layer and the second intrinsic layer forms part of a second sub cell structure of the solar cell structure.
21. The solar cell structure as claimed in any of claims 18-20, wherein the third graphene layer and the third intrinsic layer forms part of a third sub cell structure of the solar cell structure.
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