WO2010103713A1 - Surface acoustic wave element - Google Patents

Surface acoustic wave element Download PDF

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Publication number
WO2010103713A1
WO2010103713A1 PCT/JP2010/000291 JP2010000291W WO2010103713A1 WO 2010103713 A1 WO2010103713 A1 WO 2010103713A1 JP 2010000291 W JP2010000291 W JP 2010000291W WO 2010103713 A1 WO2010103713 A1 WO 2010103713A1
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piezoelectric substrate
acoustic wave
surface acoustic
support layer
substrate
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PCT/JP2010/000291
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French (fr)
Japanese (ja)
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大村正志
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株式会社 村田製作所
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Publication of WO2010103713A1 publication Critical patent/WO2010103713A1/en

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00—Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/02—Details
    • H03H9/02535—Details of surface acoustic wave devices
    • H03H9/02818—Means for compensation or elimination of undesirable effects
    • H03H9/02834—Means for compensation or elimination of undesirable effects of temperature influence
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H3/00—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators
    • H03H3/007—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks
    • H03H3/08—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks for the manufacture of resonators or networks using surface acoustic waves
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00—Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/02—Details
    • H03H9/02535—Details of surface acoustic wave devices
    • H03H9/02543—Characteristics of substrate, e.g. cutting angles
    • H03H9/02574—Characteristics of substrate, e.g. cutting angles of combined substrates, multilayered substrates, piezoelectrical layers on not-piezoelectrical substrate
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00—Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/02—Details
    • H03H9/05—Holders; Supports
    • H03H9/058—Holders; Supports for surface acoustic wave devices
    • H03H9/059—Holders; Supports for surface acoustic wave devices consisting of mounting pads or bumps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched

Definitions

  • the present invention relates to a surface acoustic wave element, and more particularly to a surface acoustic wave element in which a support layer is formed on a piezoelectric substrate.
  • the piezoelectric substrate In the surface acoustic wave element, it is necessary to make the piezoelectric substrate thin in order to obtain desired characteristics. In order to reduce the thickness of the piezoelectric substrate, for example, a manufacturing method shown in a sectional view of FIG. 10 has been proposed.
  • FIG. 10A after bonding the piezoelectric substrate 111A and the silicon support substrate 112A, as shown in FIG. 10B, a part 111C of the piezoelectric substrate 111A is cut and polished.
  • the piezoelectric substrate 111B having a desired thickness is formed by removing.
  • an element pattern 101a including an IDT electrode (IDT: interdigital transducer) 113, an electrode pad 114 and a wiring pattern is formed on the piezoelectric substrate 111B, and a bump 108 is formed on the electrode pad 114. To do.
  • IDT electrode interdigital transducer
  • a part 112C of the support substrate 112A is removed by cutting and polishing to form a support layer 112B having a desired thickness.
  • the piezoelectric substrate 111B and the support substrate 112B are cut so that the element patterns 101a are separated, and the surface acoustic wave separated into pieces as shown in FIG.
  • the element 110 that is, the surface acoustic wave element 110 in which the support layer 112 is formed on the piezoelectric substrate 111 is manufactured (for example, see Patent Document 1).
  • the element pattern 220 is formed as shown in the cross-sectional view of FIG. Due to this heat, warpage due to a difference in linear expansion coefficient between the piezoelectric substrate 210 and the support substrate 240 may occur, and accurate patterning may not be possible. In the worst case, the wafer itself is broken. Further, as shown in the sectional view of FIG. 9A, the wafer is warped as shown in the sectional view of FIG. 9B due to heat in the process of bonding the support substrate 240 to the flat piezoelectric substrate 210 as shown in the sectional view of FIG. Or cracks may occur.
  • the present invention intends to provide a surface acoustic wave element capable of preventing the occurrence of warping due to the formation of a support layer on a piezoelectric substrate.
  • the present invention provides a surface acoustic wave element configured as follows.
  • the surface acoustic wave element includes (a) a first piezoelectric substrate having a pair of main surfaces, (b) a second piezoelectric substrate having a pair of main surfaces, and (c) a pair of main surfaces, One of the main surfaces is bonded to one of the main surfaces of the first piezoelectric substrate, and the other of the main surfaces includes a support layer bonded to one of the main surfaces of the second piezoelectric substrate, An element pattern including an IDT electrode is formed on at least one of the other main surface of the first piezoelectric substrate and the other main surface of the second piezoelectric substrate.
  • the linear expansion coefficient of the support layer is smaller than the linear expansion coefficient of the first piezoelectric substrate and smaller than the linear expansion coefficient of the second piezoelectric substrate.
  • the surface acoustic wave element has a sandwich structure in which a support layer is sandwiched between first and second piezoelectric substrates, and an element pattern including an IDT electrode is formed on at least one of the piezoelectric substrates.
  • the first warp caused by the joining of the first piezoelectric substrate and the support layer if there is no second piezoelectric substrate, the first warp caused by the joining of the first piezoelectric substrate and the support layer, and if there is no first piezoelectric substrate, the second piezoelectric substrate and the support layer Since the second warp caused by the joining is opposite to each other, the first warp and the second warp cancel each other. Therefore, it is possible to prevent the occurrence of warpage due to the formation of the support layer on the piezoelectric substrate.
  • the linear expansion coefficient of the support layer is smaller than the linear expansion coefficients of the first and second piezoelectric substrates, the expansion and contraction of the piezoelectric substrate is suppressed by the support layer, and the variation in the frequency characteristics due to the temperature change becomes small. The characteristics are improved.
  • an element pattern including an IDT electrode is formed on both the other main surface of the first piezoelectric substrate and the other main surface of the second piezoelectric substrate.
  • the surface acoustic wave element is formed more than in the case where the element pattern is formed only on one side of the chip. It can be downsized.
  • the thickness of the support layer is larger than the thickness of the first piezoelectric substrate and larger than the thickness of the second piezoelectric substrate.
  • the support layer thicker than the first and second piezoelectric substrates, expansion and contraction of the piezoelectric substrate accompanying a temperature change can be sufficiently suppressed by the support layer, and the temperature characteristic improvement effect can be enhanced.
  • the surface acoustic wave device according to the present invention can prevent warpage due to the formation of the support layer on the piezoelectric substrate.
  • Example 1 It is sectional drawing of a surface acoustic wave element.
  • Example 1 It is sectional drawing which shows the manufacturing process of a surface acoustic wave element.
  • Example 1 It is sectional drawing which shows the manufacturing process of a surface acoustic wave element.
  • Example 2 It is sectional drawing which shows the mounting state of a surface acoustic wave element.
  • Example 2 It is sectional drawing which shows the mounting state of a surface acoustic wave element.
  • Example 2 It is sectional drawing which shows the manufacturing process of a surface acoustic wave element.
  • Example 2 It is sectional drawing which shows the manufacturing process of a surface acoustic wave element.
  • Example 2 It is sectional drawing which shows the manufacturing process of a surface acoustic wave element.
  • Reference example It is sectional drawing which shows the manufacturing process of a surface acoustic wave element.
  • Example 1 A surface acoustic wave element 2 of Example 1 will be described with reference to FIGS.
  • FIG. 1 is a cross-sectional view of a surface acoustic wave element 2 according to the first embodiment.
  • first and second piezoelectric substrates 12 and 16 are bonded via a support layer 14.
  • An element pattern 20 including an IDT electrode is formed on the surface 12 a of the first piezoelectric substrate 12.
  • An element pattern including an IDT electrode is not formed on the surface 16 b of the second piezoelectric substrate 16.
  • FIGS. 2 and 3 are cross-sectional views schematically showing a method for manufacturing the surface acoustic wave device 2 of the first embodiment.
  • a wafer-like first piezoelectric substrate 12 is prepared.
  • a lithium tantalate (LiTaO 3 ) substrate (LT substrate) or a lithium niobate (LiNbO 3 ) substrate (LN substrate) is prepared.
  • the support layer 14 is formed on the back surface 12b of the first piezoelectric substrate 12 by thermal spraying.
  • the linear expansion coefficient is sufficiently higher than that of the piezoelectric substrates 12 and 16 such as the LT substrate and the LN substrate, using a material such as a metal or ceramic such as Si, Al 2 O 3 , SiO 2 .
  • the support layer 14 can be easily formed, and the effect of improving the temperature characteristics by the support layer 14 can be increased. Even if the back surface 12b of the piezoelectric substrate 12 is uneven, the support layer 14 can be easily formed by thermal spraying, and the flatness of the back surface 12b of the piezoelectric substrate 12 is high as in the case of direct bonding. Manufacturing is simple because accuracy is not required.
  • a member that becomes the support layer 14 is formed in advance using a material such as Si, Al 2 O 3 , SiO 2, such as metal or ceramic, and this member is attached to the back surface 12 b of the first piezoelectric substrate 12. To join.
  • FIG. 3 (f) Pattern Formation Next, as shown in FIG. 3 (f), an element including an IDT electrode, a pad, and a wiring connecting the IDT electrode and the pad on the surface 12a of the first piezoelectric substrate 12.
  • the pattern 20 is formed using a photolithography technique or an etching technique.
  • the surface acoustic wave element 2 of Example 1 has a sandwich structure in which a support layer 14 is sandwiched between first and second piezoelectric substrates 12 and 16, and an element pattern 20 including an IDT electrode is formed on one piezoelectric substrate 12. Is formed.
  • the surface acoustic wave element 2 has a sandwich structure, and if there is no second piezoelectric substrate 16, the first warp caused by the bonding of the first piezoelectric substrate 12 and the support layer 14 and the first piezoelectric substrate 12 are absent. Since the second warp caused by the joining of the second piezoelectric substrate 16 and the support layer 14 is opposite to each other, the first warp and the second warp cancel each other. Therefore, it is possible to prevent the occurrence of warpage due to the formation of the support layer on the piezoelectric substrate.
  • the surface acoustic wave element 2 is formed so that the linear expansion coefficient of the support layer 14 is smaller than the linear expansion coefficients of the first and second piezoelectric substrates 12 and 16.
  • the expansion and contraction of the piezoelectric substrates 12 and 16 is suppressed by the support layer 14, fluctuations in the frequency characteristics accompanying temperature changes are reduced, and the temperature characteristics of the surface acoustic wave element 2 are improved.
  • the support layer 14 is formed using a material such as Si, Al 2 O 3 , or SiO 2 , the temperature characteristics are improved. .
  • the thickness of the support layer 14 is preferably larger than the thickness of the first piezoelectric substrate 12 and larger than the thickness of the second piezoelectric substrate 16. In this case, by making the support layer 14 thicker than the piezoelectric substrates 12 and 16, the expansion and contraction of the piezoelectric substrates 12 and 16 due to temperature change can be sufficiently suppressed by the support layer 14, and the effect of improving the temperature characteristics can be achieved. Can be increased.
  • Example 2 A surface acoustic wave element 2a of Example 2 will be described with reference to FIGS.
  • FIG. 4 is a cross-sectional view of the surface acoustic wave element 2a according to the second embodiment.
  • the surface acoustic wave element 2 a according to the second embodiment is similar to the first embodiment, in which the first and second piezoelectric substrates 12 and 16 are joined via the support layer 14.
  • An element pattern 20 is formed on the surface 12 a of 12.
  • the element pattern 22 including the IDT electrode is also formed on the surface 16 b of the second piezoelectric substrate 16.
  • the surface acoustic wave element 2 a is a duplexer in which a transmission resonator and a filter are formed by one element pattern 20 and a reception resonator and a filter are formed by the other element pattern 22.
  • the chip body 10 in which the support layer 14 is sandwiched between the pair of piezoelectric substrates 12 and 16, the chip body as in the first embodiment.
  • the surface acoustic wave element can be reduced in size as compared with the case where the element pattern 20 is formed only on one side of 10.
  • the surface acoustic wave element 2a can be mounted on the circuit board 30 as shown in the cross-sectional view of FIG.
  • one piezoelectric substrate 12 side is electrically connected to the circuit substrate 30 via the bonding wire 40
  • the other piezoelectric substrate 16 side is electrically connected to the circuit substrate 30 via the bump 42.
  • the surface acoustic wave element 2 a can be mounted in a standing state on the circuit board 30.
  • the electrodes formed on the piezoelectric substrates 12 and 16 are electrically connected to the circuit substrate 30 via the solder 44.
  • FIGS. 7 and 8 are cross-sectional views schematically showing manufacturing steps of the surface acoustic wave element 2a.
  • support layers 15s and 15t are formed on the back surfaces 12b and 16a of the first and second piezoelectric substrates 12 and 16 by thermal spraying, and the surfaces 15a and 15b of the support layers 15s and 15t are formed. They are joined together using an adhesive.
  • the surface acoustic wave element 2 a is formed so that the linear expansion coefficients of the support layers 14; 15 s and 15 t are smaller than the linear expansion coefficients of the first and second piezoelectric substrates 12 and 16.
  • the expansion and contraction of the piezoelectric substrates 12 and 16 is suppressed by the support layers 14; 15s and 15t, the fluctuation of the frequency characteristics accompanying the temperature change is reduced, and the temperature characteristics of the surface acoustic wave element 2 are improved.
  • a material such as Si, Al 2 O 3 , or SiO 2
  • the thickness of the support layer 14 and the total thickness of the support layers 15 s and 15 t are preferably larger than the thickness of the first piezoelectric substrate 12 and larger than the thickness of the second piezoelectric substrate 16.
  • the support layers 14; 15s, 15t thicker than the piezoelectric substrates 12, 16, the expansion and contraction of the piezoelectric substrates 12, 16 due to temperature changes can be sufficiently suppressed by the support layers 14; 15s, 15t. It is possible to increase the effect of improving the temperature characteristics.
  • the sandwich structure in which the support layer 14; 15s, 15t is sandwiched between the piezoelectric substrates 12 and 16 can cause warpage due to the formation of the support layer on the piezoelectric substrate. Can be prevented.
  • the surface acoustic wave element 2 may be manufactured by a manufacturing method different from the manufacturing method described above.

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  • Physics & Mathematics (AREA)
  • Acoustics & Sound (AREA)
  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Surface Acoustic Wave Elements And Circuit Networks Thereof (AREA)

Abstract

Disclosed is a surface acoustic wave element wherein occurrence of warping due to the formation of a supporting layer on a piezoelectric substrate can be prevented. The surface acoustic wave element comprises: (a) a first piezoelectric substrate (12) having a pair of main surfaces (12a, 12b); (b) a second piezoelectric substrate (16) having a pair of main surfaces (16a, 16b); and (c) a supporting layer (14) having a pair of main surfaces (14a, 14b) respectively bonded to one main surface (12b, 16a) of the first and second piezoelectric substrate (12, 16). At least one main surface (12a) among the other main surface (12a, 16b) of the first and second piezoelectric substrate (12, 16) is provided with an element pattern (20) containing an IDT electrode. The linear expansion coefficient of the supporting layer (14) is lower than both the linear expansion coefficient of the first piezoelectric substrate (12) and the linear expansion coefficient of the second piezoelectric substrate (16).

Description

弾性表面波素子Surface acoustic wave device
　本発明は、弾性表面波素子に関し、詳しくは、圧電基板に支持層が形成された弾性表面波素子に関する。 The present invention relates to a surface acoustic wave element, and more particularly to a surface acoustic wave element in which a support layer is formed on a piezoelectric substrate.
　弾性表面波素子は、所望の特性を得るために圧電基板を薄くする必要がある。圧電基板を薄くするため、例えば図１０の断面図に示す製造方法が提案されている。 In the surface acoustic wave element, it is necessary to make the piezoelectric substrate thin in order to obtain desired characteristics. In order to reduce the thickness of the piezoelectric substrate, for example, a manufacturing method shown in a sectional view of FIG. 10 has been proposed.
　すなわち、図１０（ａ）に示すように、圧電基板１１１Ａとシリコンの支持基板１１２Ａとを貼り合わせた後、図１０（ｂ）に示すように、圧電基板１１１Ａの一部１１１Ｃを切削・研磨により除去して、所望の厚さを有する圧電基板１１１Ｂを形成する。次いで、図１０（ｃ）に示すように、圧電基板１１１ＢにＩＤＴ電極（ＩＤＴ：interdigital transducer）１１３，電極パッド１１４及び配線パターンを含む素子パターン１０１ａを形成し、電極パッド１１４上にバンプ１０８を形成する。次いで、図１０（ｄ）に示すように、支持基板１１２Ａの一部１１２Ｃを切削・研磨により除去して、所望の厚さを有する支持層１１２Ｂを形成する。次いで、図１０（ｅ）に示すように、素子パターン１０１ａが個別になるように圧電基板１１１Ｂ及び支持基板１１２Ｂをカットすることにより、図１０（ｆ）に示すよう個片化された弾性表面波素子１１０、すなわち圧電基板１１１に支持層１１２が形成された弾性表面波素子１１０を作製する（例えば、特許文献１参照）。 That is, as shown in FIG. 10A, after bonding the piezoelectric substrate 111A and the silicon support substrate 112A, as shown in FIG. 10B, a part 111C of the piezoelectric substrate 111A is cut and polished. The piezoelectric substrate 111B having a desired thickness is formed by removing. Next, as shown in FIG. 10C, an element pattern 101a including an IDT electrode (IDT: interdigital transducer) 113, an electrode pad 114 and a wiring pattern is formed on the piezoelectric substrate 111B, and a bump 108 is formed on the electrode pad 114. To do. Next, as shown in FIG. 10D, a part 112C of the support substrate 112A is removed by cutting and polishing to form a support layer 112B having a desired thickness. Next, as shown in FIG. 10E, the piezoelectric substrate 111B and the support substrate 112B are cut so that the element patterns 101a are separated, and the surface acoustic wave separated into pieces as shown in FIG. The element 110, that is, the surface acoustic wave element 110 in which the support layer 112 is formed on the piezoelectric substrate 111 is manufactured (for example, see Patent Document 1).
特開２００４－２９７６９３号公報JP 2004-297893 A
　しかしながら、この製造方法のように、圧電基板と支持基板とを貼り合わせた状態で圧電基板に素子パターンを形成すると、図９（ｃ）の断面図に示すように、素子パターン２２０を形成する際の熱により、圧電基板２１０と支持基板２４０との線膨張係数の差に起因する反りが発生し、正確にパターニングできないことがあり、最悪の場合にはウェハ自体が割れる。また、図９（ａ）の断面図に示すように平坦な圧電基板２１０に、支持基板２４０を貼り合わせる工程での熱によって、図９（ｂ）の断面図に示すようにウェハに反りが発生したり、割れが発生したりすることがある。 However, when the element pattern is formed on the piezoelectric substrate with the piezoelectric substrate and the supporting substrate bonded together as in this manufacturing method, the element pattern 220 is formed as shown in the cross-sectional view of FIG. Due to this heat, warpage due to a difference in linear expansion coefficient between the piezoelectric substrate 210 and the support substrate 240 may occur, and accurate patterning may not be possible. In the worst case, the wafer itself is broken. Further, as shown in the sectional view of FIG. 9A, the wafer is warped as shown in the sectional view of FIG. 9B due to heat in the process of bonding the support substrate 240 to the flat piezoelectric substrate 210 as shown in the sectional view of FIG. Or cracks may occur.
　本発明は、かかる実情に鑑み、圧電基板に支持層が形成されたことによる反りの発生を防止することができる弾性表面波素子を提供しようとするものである。 In view of such circumstances, the present invention intends to provide a surface acoustic wave element capable of preventing the occurrence of warping due to the formation of a support layer on a piezoelectric substrate.
　本発明は、上記課題を解決するために、以下のように構成した弾性表面波素子を提供する。 In order to solve the above problems, the present invention provides a surface acoustic wave element configured as follows.
　弾性表面波素子は、（ａ）一対の主面を有する第１の圧電基板と、（ｂ）一対の主面を有する第２の圧電基板と、（ｃ）一対の主面を有し、当該主面の一方が前記第１の圧電基板の前記主面の一方に接合され、当該主面の他方が前記第２の圧電基板の前記主面の一方に接合された支持層とを備える、前記第１の圧電基板の前記主面の他方と前記第２の圧電基板の前記主面の他方との少なくとも一方に、ＩＤＴ電極を含む素子パターンが形成されている。前記支持層の線膨張係数は、前記第１の圧電基板の線膨張係数よりも小さく、かつ前記第２の圧電基板の線膨張係数よりも小さい。 The surface acoustic wave element includes (a) a first piezoelectric substrate having a pair of main surfaces, (b) a second piezoelectric substrate having a pair of main surfaces, and (c) a pair of main surfaces, One of the main surfaces is bonded to one of the main surfaces of the first piezoelectric substrate, and the other of the main surfaces includes a support layer bonded to one of the main surfaces of the second piezoelectric substrate, An element pattern including an IDT electrode is formed on at least one of the other main surface of the first piezoelectric substrate and the other main surface of the second piezoelectric substrate. The linear expansion coefficient of the support layer is smaller than the linear expansion coefficient of the first piezoelectric substrate and smaller than the linear expansion coefficient of the second piezoelectric substrate.
　上記構成において、弾性表面波素子は、第１及び第２の圧電基板に支持層が挟まれたサンドイッチ構造であり、少なくとも一方の圧電基板に、ＩＤＴ電極を含む素子パターンが形成されている。 In the above configuration, the surface acoustic wave element has a sandwich structure in which a support layer is sandwiched between first and second piezoelectric substrates, and an element pattern including an IDT electrode is formed on at least one of the piezoelectric substrates.
　上記構成によれば、第２の圧電基板が無ければ第１の圧電基板と支持層との接合により生じる第１の反りと、第１の圧電基板が無ければ第２の圧電基板と支持層との接合により生じる第２の反りとは、互いに逆向きになるため、第１の反りと第２の反りは相殺し合う。したがって、圧電基板に支持層が形成されたことによる反りの発生を防止することができる。 According to the above configuration, if there is no second piezoelectric substrate, the first warp caused by the joining of the first piezoelectric substrate and the support layer, and if there is no first piezoelectric substrate, the second piezoelectric substrate and the support layer Since the second warp caused by the joining is opposite to each other, the first warp and the second warp cancel each other. Therefore, it is possible to prevent the occurrence of warpage due to the formation of the support layer on the piezoelectric substrate.
　また、支持層の線膨張係数が第１及び第２の圧電基板の線膨張係数よりも小さいと、圧電基板の伸縮が支持層によって抑制され、温度変化に伴う周波数特性の変動が小さくなり、温度特性が改善される。 Further, if the linear expansion coefficient of the support layer is smaller than the linear expansion coefficients of the first and second piezoelectric substrates, the expansion and contraction of the piezoelectric substrate is suppressed by the support layer, and the variation in the frequency characteristics due to the temperature change becomes small. The characteristics are improved.
　好ましくは、前記第１の圧電基板の前記主面の他方と前記第２の圧電基板の前記主面の他方との両方に、ＩＤＴ電極を含む素子パターンが形成されている。 Preferably, an element pattern including an IDT electrode is formed on both the other main surface of the first piezoelectric substrate and the other main surface of the second piezoelectric substrate.
　この場合、一対の圧電基板の間に支持層が挟まれたチップの両面に素子パターンを形成することができるので、チップの片面にのみ素子パターンが形成される場合よりも、弾性表面波素子を小型化することができる。 In this case, since the element pattern can be formed on both sides of the chip in which the support layer is sandwiched between the pair of piezoelectric substrates, the surface acoustic wave element is formed more than in the case where the element pattern is formed only on one side of the chip. It can be downsized.
　好ましくは、前記支持層の厚みが、前記第１の圧電基板の厚みよりも大きく、かつ前記第２の圧電基板の厚みよりも大きい。 Preferably, the thickness of the support layer is larger than the thickness of the first piezoelectric substrate and larger than the thickness of the second piezoelectric substrate.
　この場合、支持層を第１及び第２の圧電基板よりも厚くすることにより、温度変化に伴う圧電基板の伸縮を支持層によって十分に抑制することができ、温度特性改善効果を高めることができる。 In this case, by making the support layer thicker than the first and second piezoelectric substrates, expansion and contraction of the piezoelectric substrate accompanying a temperature change can be sufficiently suppressed by the support layer, and the temperature characteristic improvement effect can be enhanced. .
　本発明の弾性表面波素子は、圧電基板に支持層が形成されたことによる反りの発生を防止することができる。 The surface acoustic wave device according to the present invention can prevent warpage due to the formation of the support layer on the piezoelectric substrate.
弾性表面波素子の断面図である。（実施例１）It is sectional drawing of a surface acoustic wave element. (Example 1) 弾性表面波素子の製造工程を示す断面図である。（実施例１）It is sectional drawing which shows the manufacturing process of a surface acoustic wave element. (Example 1) 弾性表面波素子の製造工程を示す断面図である。（実施例１）It is sectional drawing which shows the manufacturing process of a surface acoustic wave element. (Example 1) 弾性表面波素子の断面図である。（実施例２）It is sectional drawing of a surface acoustic wave element. (Example 2) 弾性表面波素子の実装状態を示す断面図である。（実施例２）It is sectional drawing which shows the mounting state of a surface acoustic wave element. (Example 2) 弾性表面波素子の実装状態を示す断面図である。（実施例２）It is sectional drawing which shows the mounting state of a surface acoustic wave element. (Example 2) 弾性表面波素子の製造工程を示す断面図である。（実施例２）It is sectional drawing which shows the manufacturing process of a surface acoustic wave element. (Example 2) 弾性表面波素子の製造工程を示す断面図である。（実施例２）It is sectional drawing which shows the manufacturing process of a surface acoustic wave element. (Example 2) 弾性表面波素子の製造工程を示す断面図である。（参考例）It is sectional drawing which shows the manufacturing process of a surface acoustic wave element. (Reference example) 弾性表面波素子の製造工程を示す断面図である。（従来例）It is sectional drawing which shows the manufacturing process of a surface acoustic wave element. (Conventional example)
　以下、本発明の実施の形態について、図１～図８を参照しながら説明する。 Hereinafter, embodiments of the present invention will be described with reference to FIGS.
　＜実施例１＞　実施例１の弾性表面波素子２について、図１～図３を参照しながら説明する。 Example 1 A surface acoustic wave element 2 of Example 1 will be described with reference to FIGS.
　図１は、実施例１の弾性表面波素子２の断面図である。図１に示すように、弾性表面波素子２は、第１及び第２の圧電基板１２，１６が支持層１４を介して接合されている。第１の圧電基板１２の表面１２ａには、ＩＤＴ電極を含む素子パターン２０が形成されている。第２の圧電基板１６の表面１６ｂには、ＩＤＴ電極を含む素子パターンは形成されていない。 FIG. 1 is a cross-sectional view of a surface acoustic wave element 2 according to the first embodiment. As shown in FIG. 1, in the surface acoustic wave element 2, first and second piezoelectric substrates 12 and 16 are bonded via a support layer 14. An element pattern 20 including an IDT electrode is formed on the surface 12 a of the first piezoelectric substrate 12. An element pattern including an IDT electrode is not formed on the surface 16 b of the second piezoelectric substrate 16.
　次に、弾性表面波素子２の製造方法について、図２及び図３を参照しながら説明する。図２及び図３は、実施例１の弾性表面波素子２の製造方法を模式的に示す断面図である。 Next, a method for manufacturing the surface acoustic wave element 2 will be described with reference to FIGS. 2 and 3 are cross-sectional views schematically showing a method for manufacturing the surface acoustic wave device 2 of the first embodiment.
　（ａ）基板準備
　まず、図２（ａ）に示すように、ウェハ状の第１の圧電基板１２を準備する。例えば、タンタル酸リチウム（ＬｉＴａＯ３）基板（ＬＴ基板）やニオブ酸リチウム（ＬｉＮｂＯ３）基板（ＬＮ基板）を準備する。 (A) Substrate Preparation First, as shown in FIG. 2A, a wafer-like first piezoelectric substrate 12 is prepared. For example, a lithium tantalate (LiTaO 3 ) substrate (LT substrate) or a lithium niobate (LiNbO 3 ) substrate (LN substrate) is prepared.
　（ｂ）支持層形成
　次いで、図２（ｂ）に示すように、第１の圧電基板１２の裏面１２ｂに支持層１４を形成する。 (B) Formation of Support Layer Next, as illustrated in FIG. 2B, the support layer 14 is formed on the back surface 12 b of the first piezoelectric substrate 12.
　例えば、第１の圧電基板１２の裏面１２ｂに、溶射により支持層１４を形成する。溶射により支持層１４を形成すると、ＬＴ基板やＬＮ基板などの圧電基板１２，１６よりも線膨張係数が十分にＳｉ、Ａｌ２Ｏ３、ＳｉＯ２など、金属やセラミックなどの材料を用いて、支持層１４を容易に形成することができ、支持層１４による温度特性の改善効果を大きくすることができる。また、圧電基板１２の裏面１２ｂに凹凸があっても、溶射であれば支持層１４を容易に形成することができ、直接接合の場合のように圧電基板１２の裏面１２ｂの平坦性について高い加工精度は要求されないため、製造が簡単である。 For example, the support layer 14 is formed on the back surface 12b of the first piezoelectric substrate 12 by thermal spraying. When the support layer 14 is formed by thermal spraying, the linear expansion coefficient is sufficiently higher than that of the piezoelectric substrates 12 and 16 such as the LT substrate and the LN substrate, using a material such as a metal or ceramic such as Si, Al 2 O 3 , SiO 2 , The support layer 14 can be easily formed, and the effect of improving the temperature characteristics by the support layer 14 can be increased. Even if the back surface 12b of the piezoelectric substrate 12 is uneven, the support layer 14 can be easily formed by thermal spraying, and the flatness of the back surface 12b of the piezoelectric substrate 12 is high as in the case of direct bonding. Manufacturing is simple because accuracy is not required.
　あるいは、支持層１４になる部材をＳｉ、Ａｌ２Ｏ３、ＳｉＯ２など、金属やセラミックなどの材料を用いて予め形成しておき、この部材を第１の圧電基板１２の裏面１２ｂに接着材を用いて接合する。 Alternatively, a member that becomes the support layer 14 is formed in advance using a material such as Si, Al 2 O 3 , SiO 2, such as metal or ceramic, and this member is attached to the back surface 12 b of the first piezoelectric substrate 12. To join.
　（ｃ）基板薄化
　次いで、図２（ｃ）に示すように、第１の圧電基板１２の表面１２ａについて、研削（グラインド）、研磨（ラッピング）などの除去加工を行い、第１の圧電基板１２を薄くする。 (C) Substrate Thinning Next, as shown in FIG. 2 (c), the surface 12a of the first piezoelectric substrate 12 is subjected to removal processing such as grinding (grinding) and polishing (lapping) to obtain the first piezoelectric substrate. 12 is thinned.
　（ｄ）基板貼り合わせ
　次いで、図３（ｄ）に示すように、支持層１４の第１の圧電基板１２とは反対側の面１４ｂに、接着材を用いて第２の圧電基板１６を接合する。 (D) Substrate Bonding Next, as shown in FIG. 3D, the second piezoelectric substrate 16 is bonded to the surface 14b of the support layer 14 on the side opposite to the first piezoelectric substrate 12 using an adhesive. To do.
　（ｅ）基板薄化
　次いで、図３（ｅ）に示すように、第２の圧電基板１６の表面１６ｂについて、研削（グラインド）、研磨（ラッピング）などの除去加工を行い、第２の圧電基板１６を薄くする。 (E) Substrate thinning Next, as shown in FIG. 3 (e), the surface 16b of the second piezoelectric substrate 16 is subjected to removal processing such as grinding (grinding) and polishing (lapping) to obtain a second piezoelectric substrate. Make 16 thinner.
　（ｆ）パターン形成
　次いで、図３（ｆ）に示すように、第１の圧電基板１２の表面１２ａに、ＩＤＴ電極と、パッドと、ＩＤＴ電極とパッドとの間を接続する配線とを含む素子パターン２０を、フォトリソグラフィー技術やエッチング技術を用いて形成する。 (F) Pattern Formation Next, as shown in FIG. 3 (f), an element including an IDT electrode, a pad, and a wiring connecting the IDT electrode and the pad on the surface 12a of the first piezoelectric substrate 12. The pattern 20 is formed using a photolithography technique or an etching technique.
　（ｇ）基板分割工程
　次いで、圧電基板１２，１６及び支持層１４のチップ本体１０を、ダイシング加工などにより分割し、弾性表面波素子２の個片を形成する。 (G) Substrate Dividing Step Next, the piezoelectric substrates 12 and 16 and the chip body 10 of the support layer 14 are divided by dicing or the like to form individual pieces of the surface acoustic wave element 2.
　実施例１の弾性表面波素子２は、第１及び第２の圧電基板１２，１６に支持層１４が挟まれたサンドイッチ構造であり、一方の圧電基板１２に、ＩＤＴ電極を含む素子パターン２０が形成されている。 The surface acoustic wave element 2 of Example 1 has a sandwich structure in which a support layer 14 is sandwiched between first and second piezoelectric substrates 12 and 16, and an element pattern 20 including an IDT electrode is formed on one piezoelectric substrate 12. Is formed.
　弾性表面波素子２は、サンドイッチ構造によって、第２の圧電基板１６が無ければ第１の圧電基板１２と支持層１４との接合により生じる第１の反りと、第１の圧電基板１２が無ければ第２の圧電基板１６と支持層１４との接合により生じる第２の反りとが、互いに逆向きになるため、第１の反りと第２の反りは相殺し合う。したがって、圧電基板に支持層が形成されたことによる反りの発生を防止することができる。 The surface acoustic wave element 2 has a sandwich structure, and if there is no second piezoelectric substrate 16, the first warp caused by the bonding of the first piezoelectric substrate 12 and the support layer 14 and the first piezoelectric substrate 12 are absent. Since the second warp caused by the joining of the second piezoelectric substrate 16 and the support layer 14 is opposite to each other, the first warp and the second warp cancel each other. Therefore, it is possible to prevent the occurrence of warpage due to the formation of the support layer on the piezoelectric substrate.
　弾性表面波素子２は、支持層１４の線膨張係数が第１及び第２の圧電基板１２，１６の線膨張係数よりも小さくなるように形成する。これによって、圧電基板１２，１６の伸縮が支持層１４によって抑制され、温度変化に伴う周波数特性の変動が小さくなり、弾性表面波素子２の温度特性が改善される。例えば、第１及び第２の圧電基板１２，１６にＬＴ基板やＬＮ基板を用い、支持層１４をＳｉ、Ａｌ２Ｏ３、ＳｉＯ２などの材料を用いて形成すると、温度特性が改善される。 The surface acoustic wave element 2 is formed so that the linear expansion coefficient of the support layer 14 is smaller than the linear expansion coefficients of the first and second piezoelectric substrates 12 and 16. As a result, the expansion and contraction of the piezoelectric substrates 12 and 16 is suppressed by the support layer 14, fluctuations in the frequency characteristics accompanying temperature changes are reduced, and the temperature characteristics of the surface acoustic wave element 2 are improved. For example, when an LT substrate or an LN substrate is used for the first and second piezoelectric substrates 12 and 16 and the support layer 14 is formed using a material such as Si, Al 2 O 3 , or SiO 2 , the temperature characteristics are improved. .
　支持層１４の厚みは、第１の圧電基板１２の厚みよりも大きく、かつ第２の圧電基板１６の厚みよりも大きくすることが好ましい。この場合、支持層１４を圧電基板１２，１６よりも厚くすることにより、温度変化に伴う圧電基板１２，１６の伸縮を、支持層１４によって十分に抑制することができ、温度特性の改善効果を高めることができる。 The thickness of the support layer 14 is preferably larger than the thickness of the first piezoelectric substrate 12 and larger than the thickness of the second piezoelectric substrate 16. In this case, by making the support layer 14 thicker than the piezoelectric substrates 12 and 16, the expansion and contraction of the piezoelectric substrates 12 and 16 due to temperature change can be sufficiently suppressed by the support layer 14, and the effect of improving the temperature characteristics can be achieved. Can be increased.
　＜実施例２＞　実施例２の弾性表面波素子２ａについて、図４～図８を参照しながら説明する。 Example 2 A surface acoustic wave element 2a of Example 2 will be described with reference to FIGS.
　図４は、実施例２の弾性表面波素子２ａの断面図である。図４に示すように、実施例２の弾性表面波素子２ａは、実施例１と同じく、第１及び第２の圧電基板１２，１６が支持層１４を介して接合され、第１の圧電基板１２の表面１２ａに素子パターン２０が形成されている。ただし、実施例１と異なり、第２の圧電基板１６の表面１６ｂにも、ＩＤＴ電極を含む素子パターン２２が形成されている。 FIG. 4 is a cross-sectional view of the surface acoustic wave element 2a according to the second embodiment. As shown in FIG. 4, the surface acoustic wave element 2 a according to the second embodiment is similar to the first embodiment, in which the first and second piezoelectric substrates 12 and 16 are joined via the support layer 14. An element pattern 20 is formed on the surface 12 a of 12. However, unlike Example 1, the element pattern 22 including the IDT electrode is also formed on the surface 16 b of the second piezoelectric substrate 16.
　例えば、弾性表面波素子２ａは、一方の素子パターン２０により送信用の共振子やフィルタが形成され、他方の素子パターン２２により受信用の共振子やフィルタが形成されたデュプレクサである。 For example, the surface acoustic wave element 2 a is a duplexer in which a transmission resonator and a filter are formed by one element pattern 20 and a reception resonator and a filter are formed by the other element pattern 22.
　弾性表面波素子２ａは、一対の圧電基板１２，１６の間に支持層１４が挟まれたチップ本体１０の両面に素子パターン２０，２２が形成されているため、実施例１のようにチップ本体１０の片面にのみ素子パターン２０が形成される場合よりも、弾性表面波素子を小型化することができる。 In the surface acoustic wave element 2a, since the element patterns 20 and 22 are formed on both surfaces of the chip body 10 in which the support layer 14 is sandwiched between the pair of piezoelectric substrates 12 and 16, the chip body as in the first embodiment. The surface acoustic wave element can be reduced in size as compared with the case where the element pattern 20 is formed only on one side of 10.
　弾性表面波素子２ａは、図５の断面図に示すように、回路基板３０に寝かせた状態で実装できる。例えば、一方の圧電基板１２側がボンディングワイヤ４０を介して、他方の圧電基板１６側がバンプ４２を介して、それぞれ回路基板３０に電気的に接続される。 The surface acoustic wave element 2a can be mounted on the circuit board 30 as shown in the cross-sectional view of FIG. For example, one piezoelectric substrate 12 side is electrically connected to the circuit substrate 30 via the bonding wire 40, and the other piezoelectric substrate 16 side is electrically connected to the circuit substrate 30 via the bump 42.
　あるいは、図６の断面図に示すように、弾性表面波素子２ａは、回路基板３０に立てた状態で実装できる。例えば、それぞれの圧電基板１２，１６に形成された電極が、はんだ４４を介して回路基板３０に電気的に接続される。 Alternatively, as shown in the cross-sectional view of FIG. 6, the surface acoustic wave element 2 a can be mounted in a standing state on the circuit board 30. For example, the electrodes formed on the piezoelectric substrates 12 and 16 are electrically connected to the circuit substrate 30 via the solder 44.
　次に、弾性表面波素子２ａの製造方法について、図７及び図８を参照しながら説明する。図７及び図８は、弾性表面波素子２ａの製造工程を模式的に示す断面図である。 Next, a method for manufacturing the surface acoustic wave element 2a will be described with reference to FIGS. 7 and 8 are cross-sectional views schematically showing manufacturing steps of the surface acoustic wave element 2a.
　（ａ）パターン形成
　図７（ａ）に示すように、ウェハ状の第１及び第２の圧電基板１２，１６の表面１２ａ，１６ｂに、ＩＤＴ電極と、パッドと、ＩＤＴ電極とパッドとの間を接続する配線とを含む素子パターン２０，２２を、フォトリソグラフィー技術やエッチング技術を用いて形成する。 (A) Pattern formation As shown to Fig.7 (a), between the IDT electrode, a pad, and an IDT electrode and a pad on the surface 12a, 16b of the wafer-like 1st and 2nd piezoelectric substrates 12 and 16 The element patterns 20 and 22 including the wiring for connecting are formed using a photolithography technique or an etching technique.
　（ｂ）基板薄化
　次いで、図７（ｂ）に示すように、第１及び第２の圧電基板１２，１６の裏面１２ｂ，１６ａについて、研削（グラインド）、研磨（ラッピング）などの除去加工を行い、第１及び第２の圧電基板１２，２６を薄くする。 (B) Substrate thinning Next, as shown in FIG. 7B, the back surfaces 12b and 16a of the first and second piezoelectric substrates 12 and 16 are subjected to removal processing such as grinding (grinding) and polishing (lapping). The first and second piezoelectric substrates 12 and 26 are thinned.
　（ｃ）支持層貼り合わせ
　次いで、図７（ｃ）に示すように、予め形成された支持層１４の上面１４ａ及び下面１４ｂに、接着材を用いて、第１及び第２の圧電基板１２，１６の裏面１２ｂ，１６ａを接合する。 (C) Support Layer Bonding Next, as shown in FIG. 7C, the first and second piezoelectric substrates 12, 12 are formed using an adhesive on the upper surface 14 a and the lower surface 14 b of the support layer 14 formed in advance. The back surfaces 12b and 16a of 16 are joined.
　あるいは、図８に示すように、第１及び第２の圧電基板１２，１６の裏面１２ｂ，１６ａに、それぞれ、溶射により支持層１５ｓ，１５ｔを形成し、支持層１５ｓ，１５ｔの表面１５ａ，１５ｂ同士を、接着材を用いて接合する。 Alternatively, as shown in FIG. 8, support layers 15s and 15t are formed on the back surfaces 12b and 16a of the first and second piezoelectric substrates 12 and 16 by thermal spraying, and the surfaces 15a and 15b of the support layers 15s and 15t are formed. They are joined together using an adhesive.
　（ｄ）基板分割工程
　次いで、圧電基板１２，１６及び支持層１４；１５ｓ，１５ｔが一体に形成されたチップ本体１０を、ダイシング加工などにより分割し、弾性表面波素子２ａの個片を形成する。 (D) Substrate Dividing Step Next, the chip body 10 on which the piezoelectric substrates 12 and 16 and the support layers 14; 15s and 15t are integrally formed is divided by dicing or the like to form individual pieces of the surface acoustic wave element 2a. .
　弾性表面波素子２ａは、支持層１４；１５ｓ，１５ｔの線膨張係数が第１及び第２の圧電基板１２，１６の線膨張係数よりも小さくなるように形成する。これによって、圧電基板１２，１６の伸縮が支持層１４；１５ｓ，１５ｔによって抑制され、温度変化に伴う周波数特性の変動が小さくなり、弾性表面波素子２の温度特性が改善される。例えば、第１及び第２の圧電基板１２，１６にＬＴ基板やＬＮ基板を用い、支持層１４；１５ｓ，１５ｔをＳｉ、Ａｌ２Ｏ３、ＳｉＯ２などの材料を用いて形成すると、温度特性が改善される。 The surface acoustic wave element 2 a is formed so that the linear expansion coefficients of the support layers 14; 15 s and 15 t are smaller than the linear expansion coefficients of the first and second piezoelectric substrates 12 and 16. As a result, the expansion and contraction of the piezoelectric substrates 12 and 16 is suppressed by the support layers 14; 15s and 15t, the fluctuation of the frequency characteristics accompanying the temperature change is reduced, and the temperature characteristics of the surface acoustic wave element 2 are improved. For example, when an LT substrate or an LN substrate is used for the first and second piezoelectric substrates 12 and 16, and the support layers 14; 15s and 15t are formed using a material such as Si, Al 2 O 3 , or SiO 2 , temperature characteristics are obtained. Is improved.
　支持層１４の厚みや支持層１５ｓ，１５ｔの合計厚みは、第１の圧電基板１２の厚みよりも大きく、かつ第２の圧電基板１６の厚みよりも大きくすることが好ましい。この場合、支持層１４；１５ｓ，１５ｔを圧電基板１２，１６よりも厚くすることにより、温度変化に伴う圧電基板１２，１６の伸縮を、支持層１４；１５ｓ，１５ｔによって十分に抑制することができ、温度特性の改善効果を高めることができる。 The thickness of the support layer 14 and the total thickness of the support layers 15 s and 15 t are preferably larger than the thickness of the first piezoelectric substrate 12 and larger than the thickness of the second piezoelectric substrate 16. In this case, by making the support layers 14; 15s, 15t thicker than the piezoelectric substrates 12, 16, the expansion and contraction of the piezoelectric substrates 12, 16 due to temperature changes can be sufficiently suppressed by the support layers 14; 15s, 15t. It is possible to increase the effect of improving the temperature characteristics.
　＜まとめ＞　以上に説明したように、圧電基板１２，１６の間に支持層１４；１５ｓ，１５ｔが挟まれるサンドイッチ構造にすることで、圧電基板に支持層が形成されたことによる反りの発生を防止することができる。 <Summary> As described above, the sandwich structure in which the support layer 14; 15s, 15t is sandwiched between the piezoelectric substrates 12 and 16 can cause warpage due to the formation of the support layer on the piezoelectric substrate. Can be prevented.
　なお、本発明は、上記実施の形態に限定されるものではなく、種々変更を加えて実施することが可能である。 It should be noted that the present invention is not limited to the above embodiment, and can be implemented with various modifications.
　例えば、弾性表面波素子２は、上述した製造方法とは異なる製造方法で製造してもよい。 For example, the surface acoustic wave element 2 may be manufactured by a manufacturing method different from the manufacturing method described above.
　　２，２ａ　弾性表面波素子
　１０，１０ａ　チップ本体
　１２　第１の圧電基板
　１２ａ　表面（他方主面）
　１２ｂ　裏面（一方主面）
　１４　支持層
　１４ａ　上面（一方主面）
　１４ｂ　下面（他方主面）
　１５ｓ，１５ｔ　支持層
　１６　第２の圧電基板
　１６ａ　裏面（一方主面）
　１６ｂ　表面（他方主面）
　２０，２２　素子パターン 2, 2a Surface acoustic wave element 10, 10a Chip body 12 First piezoelectric substrate 12a Surface (the other main surface)
12b Back side (one main side)
14 Support layer 14a Upper surface (one main surface)
14b Lower surface (the other main surface)
15s, 15t Support layer 16 Second piezoelectric substrate 16a Back surface (one main surface)
16b Surface (the other main surface)
20,22 Element pattern

Claims (3)

  1. 　一対の主面を有する第１の圧電基板と、
    　一対の主面を有する第２の圧電基板と、
    　一対の主面を有し、当該主面の一方が前記第１の圧電基板の前記主面の一方に接合され、当該主面の他方が前記第２の圧電基板の前記主面の一方に接合された支持層と、
    を備え、
    　前記第１の圧電基板の前記主面の他方と前記第２の圧電基板の前記主面の他方との少なくとも一方に、ＩＤＴ電極を含む素子パターンが形成され、
    　前記支持層の線膨張係数は、前記第１の圧電基板の線膨張係数よりも小さく、かつ前記第２の圧電基板の線膨張係数よりも小さいことを特徴とする、弾性表面波素子。     A first piezoelectric substrate having a pair of main surfaces;
    A second piezoelectric substrate having a pair of main surfaces;
    A pair of main surfaces, wherein one of the main surfaces is bonded to one of the main surfaces of the first piezoelectric substrate, and the other of the main surfaces is bonded to one of the main surfaces of the second piezoelectric substrate; A supported support layer,
    With
    An element pattern including an IDT electrode is formed on at least one of the other main surface of the first piezoelectric substrate and the other main surface of the second piezoelectric substrate,
    The surface acoustic wave device according to claim 1, wherein a linear expansion coefficient of the support layer is smaller than a linear expansion coefficient of the first piezoelectric substrate and smaller than a linear expansion coefficient of the second piezoelectric substrate.
  2. 　前記第１の圧電基板の前記主面の他方と前記第２の圧電基板の前記主面の他方との両方に、ＩＤＴ電極を含む素子パターンが形成されたことを特徴とする、請求項１に記載の弾性表面波素子。 The element pattern including an IDT electrode is formed on both the other main surface of the first piezoelectric substrate and the other main surface of the second piezoelectric substrate. The surface acoustic wave device described.
  3. 　前記支持層の厚みが、前記第１の圧電基板の厚みよりも大きく、かつ前記第２の圧電基板の厚みよりも大きいことを特徴とする、請求項１又は２に記載の弾性表面波素子。 3. The surface acoustic wave device according to claim 1, wherein the thickness of the support layer is larger than the thickness of the first piezoelectric substrate and larger than the thickness of the second piezoelectric substrate.
PCT/JP2010/000291 2009-03-10 2010-01-20 Surface acoustic wave element WO2010103713A1 (en)

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JP2013545398A (en) * 2010-11-02 2013-12-19 レイセオン カンパニー Low acceleration sensitivity mounting of surface acoustic wave resonator
WO2016060072A1 (en) * 2014-10-17 2016-04-21 株式会社村田製作所 Piezoelectric device and method for manufacturing piezoelectric device
JP2017220778A (en) * 2016-06-07 2017-12-14 太陽誘電株式会社 Acoustic wave device

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JP2000049563A (en) * 1998-07-31 2000-02-18 Kinseki Ltd Surface acoustic wave device
JP2002135076A (en) * 2000-10-27 2002-05-10 Matsushita Electric Ind Co Ltd Surface acoustic wave device and its manufacturing method

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JP2013545398A (en) * 2010-11-02 2013-12-19 レイセオン カンパニー Low acceleration sensitivity mounting of surface acoustic wave resonator
WO2016060072A1 (en) * 2014-10-17 2016-04-21 株式会社村田製作所 Piezoelectric device and method for manufacturing piezoelectric device
JPWO2016060072A1 (en) * 2014-10-17 2017-05-18 株式会社村田製作所 Piezoelectric device and method for manufacturing piezoelectric device
US10594297B2 (en) 2014-10-17 2020-03-17 Murata Manufacturing Co., Ltd. Piezoelectric device and manufacturing method therefor
JP2017220778A (en) * 2016-06-07 2017-12-14 太陽誘電株式会社 Acoustic wave device
US10250231B2 (en) 2016-06-07 2019-04-02 Taiyo Yuden Co., Ltd. Acoustic wave device

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