WO2010018708A1 - Method for manufacturing module with built-in component, and module with built-in component - Google Patents

Method for manufacturing module with built-in component, and module with built-in component Download PDF

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Publication number
WO2010018708A1
WO2010018708A1 PCT/JP2009/060496 JP2009060496W WO2010018708A1 WO 2010018708 A1 WO2010018708 A1 WO 2010018708A1 JP 2009060496 W JP2009060496 W JP 2009060496W WO 2010018708 A1 WO2010018708 A1 WO 2010018708A1
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WIPO (PCT)
Prior art keywords
resin layer
circuit component
component
core substrate
built
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PCT/JP2009/060496
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French (fr)
Japanese (ja)
Inventor
雅人 野村
Original Assignee
株式会社村田製作所
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Publication date
Application filed by 株式会社村田製作所 filed Critical 株式会社村田製作所
Priority to JP2010524681A priority Critical patent/JP5093353B2/en
Priority to CN200980131635.2A priority patent/CN102119588B/en
Publication of WO2010018708A1 publication Critical patent/WO2010018708A1/en

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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • H05K1/182Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
    • H05K1/183Components mounted in and supported by recessed areas of the printed circuit board
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/18High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L24/23Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
    • H01L24/24Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4697Manufacturing multilayer circuits having cavities, e.g. for mounting components
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    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04105Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
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    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L2224/23Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
    • H01L2224/24Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
    • H01L2224/241Disposition
    • H01L2224/24151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/24221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/24225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/24227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the HDI interconnect not connecting to the same level of the item at which the semiconductor or solid-state body is mounted, e.g. the semiconductor or solid-state body being mounted in a cavity or on a protrusion of the item
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    • H01L2924/095Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
    • H01L2924/097Glass-ceramics, e.g. devitrified glass
    • H01L2924/09701Low temperature co-fired ceramic [LTCC]
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    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/1515Shape
    • H01L2924/15153Shape the die mounting substrate comprising a recess for hosting the device
    • H01L2924/15155Shape the die mounting substrate comprising a recess for hosting the device the shape of the recess being other than a cuboid
    • H01L2924/15156Side view
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    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15313Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a land array, e.g. LGA
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    • H01L2924/156Material
    • H01L2924/15786Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2924/15787Ceramics, e.g. crystalline carbides, nitrides or oxides
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    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191Disposition
    • H01L2924/19101Disposition of discrete passive components
    • H01L2924/19105Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
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    • H01L2924/19101Disposition of discrete passive components
    • H01L2924/19106Disposition of discrete passive components in a mirrored arrangement on two different side of a common die mounting substrate
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/06Lamination
    • H05K2203/063Lamination of preperforated insulating layer
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/22Secondary treatment of printed circuits
    • H05K3/28Applying non-metallic protective coatings
    • H05K3/284Applying non-metallic protective coatings for encapsulating mounted components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038Through-connections; Vertical interconnect access [VIA] connections
    • H05K3/4053Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques
    • H05K3/4069Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques for via connections in organic insulating substrates
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4602Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4614Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4644Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4644Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4652Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern

Definitions

  • the present invention relates to a method for manufacturing a component built-in module and a component built-in module.
  • the component built-in module in the present invention is a module having a resin layer on both sides of a core substrate and at least one circuit component built in between both resin layers. Parts may be embedded in each resin layer. Moreover, what laminated
  • circuit components are embedded in a circuit board to produce a module, thereby reducing the mounting area of the circuit parts and reducing the size of the circuit board.
  • the component built-in module in which the circuit component is embedded in the resin layer is light and has an advantage that there are few restrictions on the built-in circuit component because it is not accompanied by high-temperature firing unlike the ceramic substrate.
  • Patent Document 1 a through hole is formed in a core substrate, a tape is attached to the bottom surface of the core substrate, and a circuit component is attached on the tape exposed on the bottom surface of the through hole.
  • a method of manufacturing a component built-in module is disclosed in which a gap between the inner surface and the inner surface of the core substrate is fixed with an adhesive, and then the tape is peeled off and a resin layer is laminated on both surfaces of the core substrate.
  • the objective of this invention is providing the manufacturing method of a component built-in module which can eliminate the above subjects, and a component built-in module.
  • a method for manufacturing a component built-in module includes a step A of laminating a core substrate having an opening penetrating in the front and back directions on an uncured first resin layer, and the opening.
  • a step B of attaching a first circuit component to an exposed portion of the uncured first resin layer exposed in a portion, and an uncured second resin layer is laminated on the core substrate, and the opening
  • a step A step A of laminating a core substrate having an opening penetrating in the front and back directions on an uncured first resin layer, and the opening A step B of attaching a first circuit component to an exposed portion of the uncured first resin layer exposed in a portion, and an uncured second resin layer is laminated on the core substrate, and the opening
  • the component built-in module according to the present invention is housed in a first resin layer, a core substrate laminated on the first resin layer and having an opening penetrating in the front and back direction, and the opening of the core substrate.
  • the first circuit component having the bottom surface attached on the first resin layer and the core circuit board are stacked, and the gap between the opening of the core substrate and the first circuit component is filled.
  • a second resin layer and an electrode formed on the first resin layer and electrically connected to the first circuit component are provided.
  • a core substrate having an opening is laminated on the uncured first resin layer, and the first circuit component is attached to the exposed portion of the first resin layer in the opening.
  • Uncured means a semi-cured (for example, B stage) state or a softer state. Since the uncured first resin layer has adhesiveness, the core substrate and the first circuit component can be temporarily held on the first resin layer. That is, the first circuit component can be temporarily held without using a tape.
  • the uncured second resin layer is pressure-bonded on the core substrate with the first circuit component temporarily held, the second resin layer flows and the gap between the inner wall of the opening and the first circuit component Filled. That is, the core substrate and the first circuit component are embedded and integrated between the first resin layer and the second resin layer.
  • the component built-in module is completed.
  • the first circuit component can be temporarily held without using a tape, an adhesive, or the like, and the first resin layer for holding the first circuit component can be used as it is as a built-up layer.
  • the manufacturing process is simplified, and a low-cost manufacturing method can be realized.
  • the circuit components fall off when the tape is peeled off.
  • By forming the opening in the core substrate there is a concern that the mechanical strength of the module is reduced, but by sealing the opening and the surface of the core substrate with a resin (second resin layer), Mechanical strength can be increased.
  • a hole for an interlayer connection conductor penetrating the first resin layer in the first resin layer before the first circuit component is attached.
  • an uncured conductive paste filled in the hole for the interlayer connection conductor, and in step B, the first circuit component is attached to the first resin layer so as to be in contact with the electrode.
  • the first resin layer may be cured, and at the same time, the conductive paste may be cured to electrically connect the first circuit component and the electrode.
  • the first circuit component is not mounted after the first resin layer is cured, but an uncured electrode is formed on the uncured first resin layer with a conductive paste, and the first circuit is formed.
  • the first resin layer and the electrode are cured at the same time, so that the uncured conductive paste has conductivity, and the electrical connection between the first circuit component and the electrode. Connection.
  • the special mounting work of the first circuit component and the first resin layer can be omitted.
  • an interlayer connection conductor hole is formed in the cured first resin layer so as to reach the first circuit component.
  • An electrode electrically connected to the first circuit component may be formed by forming an interlayer connection conductor in the hole for the interlayer connection conductor. That is, after the first resin layer is cured, an interlayer connection conductor hole (via hole) penetrating the first resin layer is formed, and an interlayer connection conductor (via) is formed in the hole, whereby the electrode Can be formed.
  • the interlayer connection conductor can be formed by plating formed on the inner surface of the hole for the interlayer connection conductor or a conductive paste filled in the hole for the interlayer connection conductor, the low resistance of the interlayer connection conductor And improved connection reliability.
  • the curing of the first resin layer and the curing of the second resin layer may be performed simultaneously, or the curing of the first resin layer may be performed before the lamination of the second resin layer.
  • the number of heat treatments can be reduced, and the curing of the first resin layer and the curing of the second resin layer can be performed simultaneously. It is possible to suppress the warpage of the component built-in module due to. Furthermore, since the number of thermal histories for the circuit component can be reduced, damage to the circuit component can be reduced.
  • the first circuit component is preferably a component that is taller than the thickness of the core substrate. Some circuit parts have a low height such as a chip part, but some parts have a high height such as a SAW element. By accommodating such a high-profile first circuit component in the opening of the core substrate, only a part of the first circuit component protrudes from the upper surface of the core substrate, and a thin component built-in module as a whole is provided. realizable.
  • the method includes a step of mounting a second circuit component having a height lower than that of the first circuit component on the core substrate.
  • the second circuit component is embedded in the second resin layer. Is preferred.
  • An in-plane conductor may be formed on the back surface of the first resin layer. In that case, an in-plane conductor can be easily formed if the copper foil is patterned after the copper foil is pressure-bonded to the back surface of the uncured first resin layer and the first resin layer is cured.
  • an in-plane conductor may be formed on the back surface of the second resin layer. In that case, an in-plane conductor can be easily formed if the copper foil is patterned after the copper foil is pressure-bonded to the back surface of the uncured second resin layer and the second resin layer is cured.
  • the formation method of an in-plane conductor is not restricted to the method of using copper foil, The method of printing, the method of printing a conductive paste, etc. can also be used.
  • the first resin layer and the second resin layer are preferably made of the same material. If they are made of the same material, their coefficients of thermal expansion are the same, so that module warpage and deformation due to temperature changes can be suppressed.
  • the resin layer can be composed of, for example, a thermosetting resin such as an epoxy resin, a mixture of a thermosetting resin and an inorganic filler, a resin composition in which a glass fiber is impregnated with a thermosetting resin, or the like.
  • a printed wiring board such as a resin substrate or a glass epoxy substrate may be used, or a ceramic substrate such as LTCC (low temperature fired ceramic substrate) may be used.
  • LTCC low temperature fired ceramic substrate
  • the core substrate having the opening is laminated on the uncured first resin layer, and the first circuit component is placed on the portion where the first resin layer in the opening is exposed.
  • the first resin layer and Since the second resin layer is cured, even if the first circuit component is a component that is taller than the core substrate, a component built-in module with a thin overall thickness can be realized.
  • the first resin layer has the temporary fixing of the core substrate and the first circuit component and the role as a built-up layer, the manufacturing process is simplified and the manufacturing cost can be reduced.
  • Embodiment 1 A first embodiment of a component built-in module according to the present invention will be described with reference to FIG.
  • the component built-in module A of the present embodiment includes a core substrate 1, a first resin layer 10 laminated on the lower side of the core substrate 1, and a second resin laminated on the upper side of the core substrate 1. And the layer 20.
  • the core substrate 1 may be a ceramic substrate such as LTCC in addition to a printed wiring board such as a resin substrate.
  • LTCC a printed wiring board
  • the first resin layer 10 is a resin layer thinner than the core substrate 1, and a thermosetting resin such as an epoxy resin, an inorganic filler and a thermosetting resin, or a prepreg can be used.
  • the second resin layer 20 is preferably made of the same material as that of the first resin layer 10, but may be made of another material.
  • the core substrate 1 is formed with an opening 2 penetrating the front and back, and the bottom surface of the opening 2 is closed with a resin layer 10.
  • the first circuit component 3 is accommodated in the opening 2, and the terminal electrode 3 a of the circuit component 3 is electrically connected to an electrode (interlayer connection conductor) 11 a formed on the resin layer 10.
  • the first circuit component 3 is a high-profile component that is taller than the core substrate 1, such as a SAW element.
  • the upper surface and the periphery of the first circuit component 3 are covered with a second resin layer 20 formed on the core substrate 1. That is, the second resin layer 20 is also filled in the gap between the inner wall of the opening 2 and the periphery of the first circuit component 3.
  • In-plane conductors 4 and 5 are patterned on the upper and lower surfaces of the core substrate 1, and the second circuit component 6 is mounted on the in-plane conductor 4 on the upper surface.
  • the second circuit component 6 is a low-profile component having a height lower than that of the first circuit component 3 such as a chip capacitor or an integrated circuit element.
  • the second resin component 20 is formed on the core substrate 1. Covered.
  • the in-plane conductor 5 on the lower surface of the core substrate 1 is electrically connected to an interlayer connection conductor 11 b formed in the resin layer 10.
  • the interlayer connection conductors 11a and 11b of the resin layer 10 are electrically connected to the in-plane conductors 12a and 12b patterned on the lower surface of the resin layer 10, respectively.
  • the high-profile first circuit component 3 is disposed in the opening 2, and the low-profile second circuit component 6 is mounted on the core substrate 1.
  • the upper surface of the second circuit component 6 is averaged, and a thin and high mounting density component built-in module A can be realized as a whole.
  • the core substrate 1 having the opening 2 has a low mechanical strength, but the opening 2 and the surface of the core substrate 1 are sealed with the same resin (second resin layer) 20. Strength can be increased.
  • FIG. 2 is a 1st process and shows the state which prepared the core board
  • FIG. The core substrate 1 is a hard substrate, and an opening 2 and in-plane conductors 4 and 5 are formed.
  • the second circuit component 6 is mounted on the in-plane conductor 4 on the upper surface in advance. However, the second circuit component 6 may be mounted after the core substrate 1 is bonded to the first resin layer 10.
  • the first resin layer 10 is an uncured resin sheet, for example, an uncured sheet containing an inorganic filler and a thermosetting resin, an uncured sheet made of a thermosetting resin not containing an inorganic filler, A prepreg or the like can be used.
  • interlayer connection conductors 11a and 11b are formed at positions corresponding to the terminal electrodes 3a of the first circuit component 3 and the in-plane conductors 5 of the core substrate 1, respectively. These interlayer connection conductors 11 a and 11 b are obtained by filling an interlayer connection conductor hole penetrating the first resin layer 10 with an uncured conductive paste. Further, the copper foil 12 is attached to the entire lower surface of the first resin layer 10 by the adhesive force of the first resin layer 10.
  • FIG. 2B shows the second step, in which the core substrate 1 is pressure-bonded onto the first resin layer 10 and the first resin layer 10 in the opening 2 is exposed to the first circuit component 3. Crimp to the part. At this time, crimping is performed so that the in-plane conductor 5 of the core substrate 1 corresponds to the interlayer connection conductor 11b and the terminal electrode 3a of the first circuit component 3 corresponds to the interlayer connection conductor 11a. Since the uncured first resin layer 10 has adhesiveness, the core substrate 1 and the first circuit component 3 are temporarily fixed to the first resin layer 10. At this time, since the conductive paste constituting the interlayer connection conductor 11a is also uncured, the terminal electrode 3 of the first circuit component 3 and the interlayer connection conductor 11a are not electrically connected.
  • FIG. 2C shows a third step, in which an uncured second resin layer 20 is laminated on the core substrate 1. Since the second resin layer 20 is uncured, the second resin layer 20 flows and fills the periphery of the second circuit component 6 without a gap, and the inner wall of the opening 2 and the first circuit component 3 is also filled in the gap. The first resin layer 10 and the second resin layer 20 are collectively cured by heating together with the lamination pressure bonding. As a result, the first resin layer 10 and the second resin layer 20 are integrated with the core substrate 1 in between.
  • the interlayer connection conductors 11a and 11b are also cured at the same time to generate conductivity, so that the interlayer connection conductor 11a and the terminal electrode 3a of the first circuit component 3 are electrically connected, and the interlayer connection conductor 11b
  • the in-plane conductor 5 of the core substrate 1 is electrically connected.
  • FIG. 2D shows a fourth step, in which the copper foil 12 of the cured first resin layer 10 is patterned to form in-plane conductors 12a and 12b, thereby completing the component built-in module A.
  • the pattern formation of the copper foil 12 can be formed by a known method such as etching.
  • the in-plane conductors 12a and 12b are not only a method in which the copper foil 12 is attached to the uncured first resin layer 10 and etching is performed after the first resin layer 10 is cured, but also a plating method and a conductive paste printing method. It can also be formed by, for example.
  • the first resin layer 10 and the second resin layer 20 are simultaneously cured, but the first resin layer 10 is first cured at the stage where the step (b) is completed. Also good. However, when the first resin layer 10 and the second resin layer 20 are made of the same material and are cured at the same time, the curing shrinkage of both the resin layers becomes the same, so that the generation of warp can be suppressed. There is.
  • FIG. 3 shows another example of the manufacturing method of the component built-in module A.
  • (A) of FIG. 3 is a 1st process and shows the state which prepared the core board
  • FIG. The core substrate 1 is the same as that in FIG. 2, but the first resin layer 10 is a thin resin sheet in which no interlayer connection conductor is formed. Copper foil is also not affixed.
  • FIG. 3B shows the second step, in which the core substrate 1 is pressure-bonded onto the first resin layer 10 and the first resin layer 10 in the opening 2 is exposed to the first circuit component 3. Crimp to the part. Since the interlayer connection conductor is not yet formed on the first resin layer 10, it is not necessary to align the core substrate 1 and the first circuit component 3 with respect to the first resin layer 10, and the bonding operation is simple. become.
  • FIG. 3C shows a third step, in which an uncured second resin layer 20 is laminated on the core substrate 1. Since the second resin layer 20 is uncured, the second resin layer 20 flows and fills the periphery of the second circuit component 6 without a gap, and the inner wall of the opening 2 and the first circuit component 3 is also filled in the gap. The first resin layer 10 and the second resin layer 20 are collectively cured by heating together with the lamination pressure bonding.
  • FIG. 3D shows a fourth step, in which an interlayer connection conductor hole is formed at the position of the first resin layer 10 corresponding to the in-plane conductor 5 of the core substrate 1 and the terminal electrode 3 a of the first circuit component 3.
  • 11a 1 and 11b 1 are formed by laser processing. By forming the interlayer connection conductor holes 11a 1 and 11b 1 , the in-plane conductor 5 and the terminal electrode 3a are exposed.
  • FIG. 3E shows a fifth step, in which the interlayer connection conductors 11a and 11b are formed by filling and curing the interlayer connection conductor holes (via holes) 11a 1 and 11b 1 to form the interlayer connection conductors 11a and 11b.
  • the in-plane conductors 12a and 12b that are electrically connected to the interlayer connection conductors 11a and 11b are formed in a pattern on the surface of the resin layer 10.
  • Interlayer connection conductors 11a, 11b are filled conductive paste is not limited to curing, a conductive film is formed on the inner surface of the interlayer connection conductor holes 11a 1, 11b 1 by plating, holes 11a 1 for interlayer connection conductor , 11b 1 may be embedded with resin.
  • As a method for forming the in-plane conductors 12a and 12b an arbitrary method such as plating or printing of a conductive paste can be selected.
  • the interlayer connection conductor holes 11a 1 and 11b 1 after the first resin layer 10 is cured in order to form the interlayer connection conductor holes 11a 1 and 11b 1 after the first resin layer 10 is cured, and to form the interlayer connection conductors 11a and 11b by conductive paste or plating.
  • the in-plane conductor 5 of the core substrate 1 and the terminal electrode 3a of the first circuit component 3 and the interlayer connection conductors 11a and 11b can be electrically and reliably connected.
  • the first resin layer 10 and the second resin layer 20 are cured simultaneously, but the first resin layer 10 is cured before the second resin layer 20 is laminated. Also good. In that case, the interlayer connection conductors 11a and 11b may be formed before the second resin layer 20 is laminated.
  • FIG. 4 shows a second embodiment of the component built-in module.
  • a further resin layer 30 is built up and laminated on the lower surface of the first resin layer 10 of the component built-in module A of the first embodiment.
  • the resin layer 30 is a thin resin layer similar to the first resin layer 10, and the lower surface thereof includes in-plane conductors 12 a and 12 b of the first resin layer 10 via a plurality of interlayer connection conductors 31. A connected in-plane conductor 32 is formed.
  • a resin layer may be further built up on the lower surface of the resin layer 30.
  • FIG. 5 shows a third embodiment of the component built-in module.
  • the third circuit component 40 is mounted on the in-plane conductors 12a and 12b on the back surface of the first resin layer 10 in order to increase the mounting density, and the first resin layer 10
  • the third circuit component 40 is embedded in the third resin layer 50 by laminating the third resin layer 50 on the back surface of the substrate.
  • the third circuit component 40 is preferably a lower-profile component than the first circuit component 3.
  • the third resin layer 50 is preferably made of the same material as the first and second resin layers 10 and 20.
  • a plurality of interlayer connection conductors 21 connected to the in-plane conductor pattern 4 of the core substrate 1 are formed on the second resin layer 20.
  • the surface of the second resin layer 20 is connected to the interlayer connection conductor 21.
  • An in-plane conductor pattern 22a is formed.
  • FIG. 6 shows an example of the manufacturing process of the component built-in module C.
  • (a) to (d) in FIG. 6 are substantially the same as (a) to (d) in FIG.
  • the copper foil 22 is arranged on the surface of the second resin layer 20 at the stage of FIG. 6C, and the copper foil 22 is fixed to the surface of the second resin layer 20 at the time of pressure bonding / curing.
  • FIG. 6 shows an example of the manufacturing process of the component built-in module C.
  • the copper foil 22 is patterned to form an in-plane conductor pattern 22a, and an interlayer reaching the in-plane conductor 4 on the upper surface of the core substrate 1
  • the interlayer connection conductor 21 is formed by laser processing the connection conductor hole (via hole) and filling the interlayer connection conductor hole with a conductive paste and curing. Further, the shape of a part of the second circuit component 6 is different from that in FIG.
  • FIG. 6E the module obtained in FIG. 6D is turned upside down, and the third circuit component 40 is mounted on the in-plane conductors 12a and 12b on the back surface of the first resin layer 10.
  • FIG. (f) of FIG. 6 an uncured third resin layer 50 is thermocompression-bonded on the first resin layer 10, and the periphery of the third circuit component 40 is covered with the third resin layer 50.
  • the third resin layer 50 is cured to complete the component built-in module C.
  • FIG. 6 a resin sheet in which the interlayer connection conductors 11a and 11b are formed in advance as the first resin layer 10 and the copper foil 12 is pasted on the entire lower surface is used. However, as shown in FIG. A resin sheet having no copper foil may be used, and the interlayer connection conductor may be formed after the resin sheet is cured.
  • the hardening process of the 1st resin layer 10 and the 2nd resin layer 20 does not necessarily need to be simultaneous. That is, after temporarily fixing the core substrate 1 and the first circuit component 3 to the first resin layer 10, the first resin layer 10 is cured, and then the second resin layer 20 is laminated and cured. Also good. However, it is advantageous to simultaneously cure the first resin layer 10 and the second resin layer 20 in that the warpage of the module accompanying curing shrinkage can be reduced.

Abstract

Provided are a method for manufacturing a module with a built-in component, which can be easily manufactured without using a tape and adhesive, and the module with the built-in component. A core substrate (1) having an opening section (2) is laminated on a first resin layer (10) in an uncured state, and a first circuit component (3) is adhered on a part from which a first resin layer in the opening section is exposed.  Then, a second resin layer (20) in an uncured state is laminated on the core substrate (1), a second resin layer is applied in a gap between an inner wall of the opening section (2) and a first circuit component (3), then, the first resin layer (10) and the second resin layer (20) are cured.

Description

部品内蔵モジュールの製造方法及び部品内蔵モジュールManufacturing method of component built-in module and component built-in module
本発明は部品内蔵モジュールの製造方法および部品内蔵モジュールに関する。本発明における部品内蔵モジュールとは、コア基板を間にしてその表裏に樹脂層を有し、両樹脂層の間に少なくとも1つの回路部品を内蔵したモジュールのことである。それぞれの樹脂層に部品が埋設されていてもよい。また、表裏の樹脂層の上にさらなる樹脂層を積層したものでもよい。 The present invention relates to a method for manufacturing a component built-in module and a component built-in module. The component built-in module in the present invention is a module having a resin layer on both sides of a core substrate and at least one circuit component built in between both resin layers. Parts may be embedded in each resin layer. Moreover, what laminated | stacked the further resin layer on the resin layer of the front and back may be used.
近年、電子機器の小型化に伴い、チップコンデンサ等の回路部品を実装するための回路基板の小型化が求められている。これを受けて、回路基板内部に回路部品を埋設してモジュールを作製することにより、回路部品の実装面積を削減し、回路基板の小型化を図ることが行われている。中でも、樹脂層の内部に回路部品が埋設された部品内蔵モジュールは、軽量であり、かつセラミック基板のように高温焼成を伴わないため、内蔵する回路部品に制約が少ないという利点がある。 In recent years, with the miniaturization of electronic devices, miniaturization of circuit boards for mounting circuit components such as chip capacitors is required. In response to this, circuit components are embedded in a circuit board to produce a module, thereby reducing the mounting area of the circuit parts and reducing the size of the circuit board. Among them, the component built-in module in which the circuit component is embedded in the resin layer is light and has an advantage that there are few restrictions on the built-in circuit component because it is not accompanied by high-temperature firing unlike the ceramic substrate.
特許文献1には、コア基板に貫通穴を形成し、このコア基板の底面にテープを貼り付けると共に、貫通穴の底面に露出するテープ上に回路部品を付着し、回路部品の周囲と貫通穴の内面との隙間を接着剤で固定した後、テープを剥離し、コア基板の両面に樹脂層を積層する部品内蔵モジュールの製造方法が開示されている。 In Patent Document 1, a through hole is formed in a core substrate, a tape is attached to the bottom surface of the core substrate, and a circuit component is attached on the tape exposed on the bottom surface of the through hole. A method of manufacturing a component built-in module is disclosed in which a gap between the inner surface and the inner surface of the core substrate is fixed with an adhesive, and then the tape is peeled off and a resin layer is laminated on both surfaces of the core substrate.
この方法では、回路部品を仮固定するためにテープが必要であるが、このテープは使用後に廃棄されるので、製造コストの上昇を招くという問題がある。また、回路部品とコア基板の貫通穴との隙間に接着剤を塗布する必要があるが、狭い空間に接着剤を塗布する作業は、時間と精度を必要とする。また、接着剤とコア基板の両面に積層される樹脂層とは一般に異種材料であるから、熱膨張係数が異なり、温度変化にともなって基板に反りが発生する可能性がある。反りを抑制するには接着剤を回路部品と貫通穴との隙間の一部にだけ塗布することが望ましいが、その場合には回路部品の固定強度が低くなるので、テープをコア基板から剥離した際にテープの粘着力によって回路部品が貫通穴から脱落する可能性がある。
特開2008-131039号公報
In this method, a tape is necessary to temporarily fix the circuit components. However, since this tape is discarded after use, there is a problem that the manufacturing cost increases. Moreover, although it is necessary to apply | coat an adhesive agent to the clearance gap between a circuit component and the through-hole of a core board | substrate, the operation | work which applies an adhesive agent to a narrow space requires time and precision. In addition, since the adhesive and the resin layer laminated on both surfaces of the core substrate are generally different materials, they have different coefficients of thermal expansion, and the substrate may be warped as the temperature changes. In order to suppress warpage, it is desirable to apply the adhesive only to a part of the gap between the circuit component and the through hole. In that case, however, the fixing strength of the circuit component is reduced, so the tape is peeled off from the core substrate. At this time, the circuit component may fall out of the through hole due to the adhesive force of the tape.
JP 2008-131039 A
本発明の目的は、上述のような課題を解消できる部品内蔵モジュールの製造方法及び部品内蔵モジュールを提供することにある。 The objective of this invention is providing the manufacturing method of a component built-in module which can eliminate the above subjects, and a component built-in module.
前記目的を達成するため、本発明に係る部品内蔵モジュールの製造方法は、表裏方向に貫通した開口部を有するコア基板を未硬化状態の第1の樹脂層上に積層する工程Aと、前記開口部内に露出した未硬化状態の前記第1の樹脂層の露出部分に第1の回路部品を付着させる工程Bと、前記コア基板上に未硬化状態の第2の樹脂層を積層し、前記開口部の内壁と前記第1の回路部品との隙間に第2の樹脂層を充填する工程Cと、前記第1の樹脂層を硬化させる工程Dと、前記第2の樹脂層を硬化させる工程Eと、を備えることを特徴とする。 In order to achieve the object, a method for manufacturing a component built-in module according to the present invention includes a step A of laminating a core substrate having an opening penetrating in the front and back directions on an uncured first resin layer, and the opening. A step B of attaching a first circuit component to an exposed portion of the uncured first resin layer exposed in a portion, and an uncured second resin layer is laminated on the core substrate, and the opening A step C of filling the gap between the inner wall of the part and the first circuit component with the second resin layer, a step D for curing the first resin layer, and a step E for curing the second resin layer And.
また、本発明に係る部品内蔵モジュールは、第1の樹脂層と、前記第1の樹脂層上に積層され、表裏方向に貫通した開口部を有するコア基板と、前記コア基板の開口部に収納され、底面が前記第1の樹脂層上に付着された第1の回路部品と、前記コア基板上に積層され、前記コア基板の開口部と前記第1の回路部品との隙間に充填された第2の樹脂層と、前記第1の樹脂層に形成されるとともに、前記第1の回路部品と電気的に接続された電極と、を備えたことを特徴とする。 The component built-in module according to the present invention is housed in a first resin layer, a core substrate laminated on the first resin layer and having an opening penetrating in the front and back direction, and the opening of the core substrate. The first circuit component having the bottom surface attached on the first resin layer and the core circuit board are stacked, and the gap between the opening of the core substrate and the first circuit component is filled. A second resin layer and an electrode formed on the first resin layer and electrically connected to the first circuit component are provided.
本発明では、未硬化の第1の樹脂層上に開口部を有するコア基板を積層し、第1の回路部品を開口部内の第1の樹脂層が露出した部分に付着させる。未硬化とは、半硬化(例えばBステージ)状態あるいはそれより柔らかい状態をいう。未硬化の第1の樹脂層は粘着性を持つので、コア基板と第1の回路部品とを第1の樹脂層上に仮保持できる。つまり、テープを使用せずに第1の回路部品を仮保持できる。第1の回路部品を仮保持した状態で、コア基板上に未硬化の第2の樹脂層を圧着すると、第2の樹脂層が流動して開口部の内壁と第1の回路部品との隙間に充填される。つまり、コア基板と第1の回路部品とが第1の樹脂層と第2の樹脂層との間に埋設され、一体化される。その後、第1の樹脂層と第2の樹脂層とを硬化させると、部品内蔵モジュールが完成する。このように、テープや接着剤等を用いずに第1の回路部品を仮保持でき、第1の回路部品を保持するための第1の樹脂層をそのままビルトアップ層として用いることができるため、製造工程が簡素化され、低コストな製造方法を実現できる。さらに、テープを剥離する際に回路部品が脱落するといった不具合もない。コア基板に開口部を形成することで、モジュールの機械的強度が低下することが懸念されるが、開口部とコア基板の表面とを樹脂(第2の樹脂層)で封止することで、機械的強度を上げることができる。 In the present invention, a core substrate having an opening is laminated on the uncured first resin layer, and the first circuit component is attached to the exposed portion of the first resin layer in the opening. Uncured means a semi-cured (for example, B stage) state or a softer state. Since the uncured first resin layer has adhesiveness, the core substrate and the first circuit component can be temporarily held on the first resin layer. That is, the first circuit component can be temporarily held without using a tape. When the uncured second resin layer is pressure-bonded on the core substrate with the first circuit component temporarily held, the second resin layer flows and the gap between the inner wall of the opening and the first circuit component Filled. That is, the core substrate and the first circuit component are embedded and integrated between the first resin layer and the second resin layer. Thereafter, when the first resin layer and the second resin layer are cured, the component built-in module is completed. As described above, the first circuit component can be temporarily held without using a tape, an adhesive, or the like, and the first resin layer for holding the first circuit component can be used as it is as a built-up layer. The manufacturing process is simplified, and a low-cost manufacturing method can be realized. Furthermore, there is no problem that the circuit components fall off when the tape is peeled off. By forming the opening in the core substrate, there is a concern that the mechanical strength of the module is reduced, but by sealing the opening and the surface of the core substrate with a resin (second resin layer), Mechanical strength can be increased.
第1の回路部品を第1の樹脂層に電気的に接続する方法として、第1の回路部品を付着させる前の第1の樹脂層に、第1の樹脂層を貫通する層間接続導体用穴と層間接続導体用穴に充填された未硬化の導電ペーストとからなる電極を形成し、工程Bにおいて、第1の回路部品を電極と接するように第1の樹脂層に付着させ、工程Dにおいて、第1の樹脂層を硬化させると同時に導電ペーストを硬化させて第1の回路部品と電極とを電気的に接続してもよい。この場合は、第1の樹脂層の硬化後に第1の回路部品を実装するのではなく、未硬化の第1の樹脂層に導電ペーストにより未硬化の電極を形成しておき、第1の回路部品を電極と接触させた状態で配置した後、第1の樹脂層と電極とを同時に硬化させることで、未硬化の導電ペーストが導電性を有し、第1の回路部品と電極との電気的接続を行うものである。この場合には、第1の回路部品と第1の樹脂層との格別な実装作業を省略できる。 As a method for electrically connecting the first circuit component to the first resin layer, a hole for an interlayer connection conductor penetrating the first resin layer in the first resin layer before the first circuit component is attached. And an uncured conductive paste filled in the hole for the interlayer connection conductor, and in step B, the first circuit component is attached to the first resin layer so as to be in contact with the electrode. The first resin layer may be cured, and at the same time, the conductive paste may be cured to electrically connect the first circuit component and the electrode. In this case, the first circuit component is not mounted after the first resin layer is cured, but an uncured electrode is formed on the uncured first resin layer with a conductive paste, and the first circuit is formed. After the component is placed in contact with the electrode, the first resin layer and the electrode are cured at the same time, so that the uncured conductive paste has conductivity, and the electrical connection between the first circuit component and the electrode. Connection. In this case, the special mounting work of the first circuit component and the first resin layer can be omitted.
第1の回路部品を第1の樹脂層に電気的に接続する他の方法として、硬化後の第1の樹脂層に第1の回路部品に達するように層間接続導体用穴を形成し、この層間接続導体用穴の中に層間接続導体を形成することにより、第1の回路部品と電気的に接続された電極を形成してもよい。つまり、第1の樹脂層を硬化させた後、第1の樹脂層を貫通する層間接続導体用穴(ビア穴)を形成し、その穴に層間接続導体(ビア)を形成することで、電極を形成することができる。この場合には、層間接続導体を層間接続導体用穴の内面に形成されためっきや、層間接続導体用穴の中に充填された導電ペーストによって形成することができるので、層間接続導体の低抵抗化、接続信頼性の向上を実現することができる。 As another method of electrically connecting the first circuit component to the first resin layer, an interlayer connection conductor hole is formed in the cured first resin layer so as to reach the first circuit component. An electrode electrically connected to the first circuit component may be formed by forming an interlayer connection conductor in the hole for the interlayer connection conductor. That is, after the first resin layer is cured, an interlayer connection conductor hole (via hole) penetrating the first resin layer is formed, and an interlayer connection conductor (via) is formed in the hole, whereby the electrode Can be formed. In this case, since the interlayer connection conductor can be formed by plating formed on the inner surface of the hole for the interlayer connection conductor or a conductive paste filled in the hole for the interlayer connection conductor, the low resistance of the interlayer connection conductor And improved connection reliability.
第1の樹脂層の硬化と第2の樹脂層の硬化とを同時に実施してもよいし、第1の樹脂層の硬化を第2の樹脂層の積層の前に実施してもよい。第1の樹脂層と第2の樹脂層とを同時に硬化させた場合には、熱処理回数を少なくできると共に、第1の樹脂層の硬化と第2の樹脂層の硬化とが同時になり、硬化収縮による部品内蔵モジュールのソリの発生を抑制できる。さらに、回路部品に対する熱履歴回数を少なくできるので、回路部品へのダメージを小さくできる。 The curing of the first resin layer and the curing of the second resin layer may be performed simultaneously, or the curing of the first resin layer may be performed before the lamination of the second resin layer. When the first resin layer and the second resin layer are cured at the same time, the number of heat treatments can be reduced, and the curing of the first resin layer and the curing of the second resin layer can be performed simultaneously. It is possible to suppress the warpage of the component built-in module due to. Furthermore, since the number of thermal histories for the circuit component can be reduced, damage to the circuit component can be reduced.
第1の回路部品はコア基板の厚みよりも高背な部品であるのが好ましい。回路部品の中にはチップ部品のように背丈が低い部品もあるが、SAW素子のような背丈が高い部品もある。このような高背な第1の回路部品をコア基板の開口部に収容することで、コア基板の上面には第1の回路部品の一部しか突出せず、全体として薄型の部品内蔵モジュールを実現できる。 The first circuit component is preferably a component that is taller than the thickness of the core substrate. Some circuit parts have a low height such as a chip part, but some parts have a high height such as a SAW element. By accommodating such a high-profile first circuit component in the opening of the core substrate, only a part of the first circuit component protrudes from the upper surface of the core substrate, and a thin component built-in module as a whole is provided. realizable.
工程Cの前に、コア基板上に第1の回路部品より低背な第2の回路部品を実装する工程を備え、工程Cにおいて、第2の回路部品を第2の樹脂層中に埋設するのが好ましい。部品内蔵モジュールの実装密度を上げるためには、コア基板上にも回路部品を実装することが望ましい。第1の回路部品より低背な第2の回路部品をコア基板上に実装することにより、第1の回路部品の上面と第2回路部品の上面とが平均化され、全体として薄型で高実装密度の部品内蔵モジュールを実現できる。 Before step C, the method includes a step of mounting a second circuit component having a height lower than that of the first circuit component on the core substrate. In step C, the second circuit component is embedded in the second resin layer. Is preferred. In order to increase the mounting density of the component built-in module, it is desirable to mount circuit components on the core substrate. By mounting the second circuit component, which is lower in height than the first circuit component, on the core substrate, the upper surface of the first circuit component and the upper surface of the second circuit component are averaged, and as a whole, it is thin and highly mounted. A high-density component built-in module can be realized.
第1の樹脂層の裏面に面内導体(パターン配線)を形成してもよい。その場合、未硬化の第1の樹脂層の裏面に銅箔を圧着し、第1の樹脂層を硬化した後で、銅箔をパターン化すれば、面内導体を容易に形成できる。同様に、第2の樹脂層の裏面にも面内導体(パターン配線)を形成してもよい。その場合、未硬化の第2の樹脂層の裏面に銅箔を圧着し、第2の樹脂層を硬化した後で、銅箔をパターン化すれば、面内導体を容易に形成できる。なお、面内導体の形成方法は、銅箔を用いる方法に限らず、めっき法や導電ペーストを印刷する方法などを用いることもできる。 An in-plane conductor (pattern wiring) may be formed on the back surface of the first resin layer. In that case, an in-plane conductor can be easily formed if the copper foil is patterned after the copper foil is pressure-bonded to the back surface of the uncured first resin layer and the first resin layer is cured. Similarly, an in-plane conductor (pattern wiring) may be formed on the back surface of the second resin layer. In that case, an in-plane conductor can be easily formed if the copper foil is patterned after the copper foil is pressure-bonded to the back surface of the uncured second resin layer and the second resin layer is cured. In addition, the formation method of an in-plane conductor is not restricted to the method of using copper foil, The method of printing, the method of printing a conductive paste, etc. can also be used.
第1の樹脂層と第2の樹脂層とは同一材質よりなるのが望ましい。同一材質であれば、その熱膨張係数も等しいので、温度変化に伴うモジュールの反りや変形を抑制できる。樹脂層としては、例えばエポキシ樹脂などの熱硬化性樹脂、熱硬化性樹脂と無機フィラーとの混合物、ガラス繊維に熱硬化性樹脂を含浸させた樹脂組成物等で構成することができる。 The first resin layer and the second resin layer are preferably made of the same material. If they are made of the same material, their coefficients of thermal expansion are the same, so that module warpage and deformation due to temperature changes can be suppressed. The resin layer can be composed of, for example, a thermosetting resin such as an epoxy resin, a mixture of a thermosetting resin and an inorganic filler, a resin composition in which a glass fiber is impregnated with a thermosetting resin, or the like.
本発明におけるコア基板としては、樹脂基板やガラスエポキシ基板のようなプリント配線板を用いてもよいし、LTCC(低温焼成セラミック基板)のようなセラミック基板を用いてもよい。 As the core substrate in the present invention, a printed wiring board such as a resin substrate or a glass epoxy substrate may be used, or a ceramic substrate such as LTCC (low temperature fired ceramic substrate) may be used.
以上のように、本発明によれば、未硬化の第1の樹脂層上に開口部を有するコア基板を積層し、第1の回路部品を開口部内の第1の樹脂層が露出した部分に付着させ、コア基板上に未硬化状態の第2の樹脂層を積層して開口部の内壁と第1の回路部品との隙間に第2の樹脂層を充填した後、第1の樹脂層及び前記第2の樹脂層を硬化させるので、第1の回路部品がコア基板より高背な部品であっても、全体の厚みの薄い部品内蔵モジュールを実現できる。また、第1の樹脂層がコア基板及び第1の回路部品の仮固定と、ビルトアップ層としての役割とを有するので、製造工程が簡素化され、製造コストを低減できる。 As described above, according to the present invention, the core substrate having the opening is laminated on the uncured first resin layer, and the first circuit component is placed on the portion where the first resin layer in the opening is exposed. After adhering and laminating the second resin layer in an uncured state on the core substrate and filling the gap between the inner wall of the opening and the first circuit component, the first resin layer and Since the second resin layer is cured, even if the first circuit component is a component that is taller than the core substrate, a component built-in module with a thin overall thickness can be realized. Further, since the first resin layer has the temporary fixing of the core substrate and the first circuit component and the role as a built-up layer, the manufacturing process is simplified and the manufacturing cost can be reduced.
本発明に係る部品内蔵モジュールの第1実施形態の断面図である。It is sectional drawing of 1st Embodiment of the component built-in module which concerns on this invention. 図1に示す部品内蔵モジュールの製造方法の一例の工程図である。It is process drawing of an example of the manufacturing method of the component built-in module shown in FIG. 図1に示す部品内蔵モジュールの製造方法の他の例の工程図である。It is process drawing of the other example of the manufacturing method of the component built-in module shown in FIG. 本発明に係る部品内蔵モジュールの第2実施形態の断面図である。It is sectional drawing of 2nd Embodiment of the component built-in module which concerns on this invention. 本発明に係る部品内蔵モジュールの第3実施形態の断面図である。It is sectional drawing of 3rd Embodiment of the component built-in module which concerns on this invention. 図5に示す部品内蔵モジュールの製造方法の一例の工程図である。It is process drawing of an example of the manufacturing method of the component built-in module shown in FIG.
〔実施形態1〕
本発明に係る部品内蔵モジュールの第1実施形態について、図1を参照しながら説明する。
Embodiment 1
A first embodiment of a component built-in module according to the present invention will be described with reference to FIG.
図1において、本実施形態の部品内蔵モジュールAは、コア基板1と、コア基板1の下側に積層された第1の樹脂層10と、コア基板1の上側に積層された第2の樹脂層20とで構成されている。コア基板1は、樹脂基板等のプリント配線板のほか、LTCCのようなセラミック基板であってもよい。ここでは、コア基板1が多層基板の例を示すが、単層基板であってもよい。第1の樹脂層10は、コア基板1より薄肉な樹脂層であり、エポキシ樹脂等の熱硬化性樹脂、無機フィラーと熱硬化性樹脂とを含有するもの、さらにはプリプレグを用いることができる。第2の樹脂層20は第1の樹脂層10と同じ材質のものが望ましいが、別の材質でもよい。 In FIG. 1, the component built-in module A of the present embodiment includes a core substrate 1, a first resin layer 10 laminated on the lower side of the core substrate 1, and a second resin laminated on the upper side of the core substrate 1. And the layer 20. The core substrate 1 may be a ceramic substrate such as LTCC in addition to a printed wiring board such as a resin substrate. Here, an example in which the core substrate 1 is a multilayer substrate is shown, but it may be a single layer substrate. The first resin layer 10 is a resin layer thinner than the core substrate 1, and a thermosetting resin such as an epoxy resin, an inorganic filler and a thermosetting resin, or a prepreg can be used. The second resin layer 20 is preferably made of the same material as that of the first resin layer 10, but may be made of another material.
コア基板1には表裏に貫通する開口部2が形成されており、開口部2の底面は樹脂層10で閉じられている。開口部2の中には第1の回路部品3が収納され、この回路部品3の端子電極3aは樹脂層10に形成された電極(層間接続導体)11aと電気的に接続されている。第1の回路部品3は、例えばSAW素子のような、コア基板1の厚みより背丈の高い高背部品である。第1の回路部品3の上面および周囲は、コア基板1上に形成された第2の樹脂層20で覆われている。つまり、開口部2の内壁と第1の回路部品3の周囲との隙間にも、第2の樹脂層20が充填されている。コア基板1の上面および下面には、面内導体4,5がパターン形成され、上面の面内導体4上には第2の回路部品6が実装されている。第2の回路部品6は、例えばチップコンデンサや集積回路素子のような、第1の回路部品3より背丈の低い低背部品であり、コア基板1上に形成された第2の樹脂層20で覆われている。 The core substrate 1 is formed with an opening 2 penetrating the front and back, and the bottom surface of the opening 2 is closed with a resin layer 10. The first circuit component 3 is accommodated in the opening 2, and the terminal electrode 3 a of the circuit component 3 is electrically connected to an electrode (interlayer connection conductor) 11 a formed on the resin layer 10. The first circuit component 3 is a high-profile component that is taller than the core substrate 1, such as a SAW element. The upper surface and the periphery of the first circuit component 3 are covered with a second resin layer 20 formed on the core substrate 1. That is, the second resin layer 20 is also filled in the gap between the inner wall of the opening 2 and the periphery of the first circuit component 3. In- plane conductors 4 and 5 are patterned on the upper and lower surfaces of the core substrate 1, and the second circuit component 6 is mounted on the in-plane conductor 4 on the upper surface. The second circuit component 6 is a low-profile component having a height lower than that of the first circuit component 3 such as a chip capacitor or an integrated circuit element. The second resin component 20 is formed on the core substrate 1. Covered.
コア基板1の下面の面内導体5は、樹脂層10に形成された層間接続導体11bと電気的に接続されている。樹脂層10の層間接続導体11a,11bは、それぞれ樹脂層10の下面にパターン形成された面内導体12a,12bと電気的に接続されている。 The in-plane conductor 5 on the lower surface of the core substrate 1 is electrically connected to an interlayer connection conductor 11 b formed in the resin layer 10. The interlayer connection conductors 11a and 11b of the resin layer 10 are electrically connected to the in- plane conductors 12a and 12b patterned on the lower surface of the resin layer 10, respectively.
このように、高背な第1の回路部品3を開口部2に配置し、低背な第2回路部品6をコア基板1上に実装してあるため、第1の回路部品3の上面と第2回路部品6の上面とが平均化され、全体として薄型で高実装密度の部品内蔵モジュールAを実現できる。また、開口部2を有するコア基板1は機械的強度が低くなるが、開口部2とコア基板1の表面とを同じ樹脂(第2の樹脂層)20で封止しているので、機械的強度を上げることができる。 As described above, the high-profile first circuit component 3 is disposed in the opening 2, and the low-profile second circuit component 6 is mounted on the core substrate 1. The upper surface of the second circuit component 6 is averaged, and a thin and high mounting density component built-in module A can be realized as a whole. The core substrate 1 having the opening 2 has a low mechanical strength, but the opening 2 and the surface of the core substrate 1 are sealed with the same resin (second resin layer) 20. Strength can be increased.
-第1の製造方法-
ここで、前記部品内蔵モジュールAの製造方法の一例について、図2を参照しながら説明する。なお、図2では単一の部品内蔵モジュールAの製造方法について説明するが、実際の製造工程では親基板状態の部品内蔵モジュールが作製され、その後で子基板状態にカットされる。
-First manufacturing method-
Here, an example of a manufacturing method of the component built-in module A will be described with reference to FIG. In FIG. 2, a manufacturing method of a single component built-in module A will be described. In an actual manufacturing process, a component built-in module in a parent board state is manufactured and then cut into a child board state.
図2の(a)は第1工程であり、コア基板1と第1の樹脂層10とを準備した状態を示す。コア基板1は硬質基板であり、開口部2と面内導体4,5とが形成されている。上面の面内導体4には事前に第2の回路部品6が実装されているが、コア基板1を第1の樹脂層10と接着した後で第2の回路部品6を実装してもよい。一方、第1の樹脂層10は未硬化の樹脂シートであり、例えば無機フィラーと熱硬化性樹脂とを含有する未硬化のシート、無機フィラーを含まない熱硬化性樹脂からなる未硬化のシート、プリプレグ等を用いることができる。第1の樹脂層10には、第1の回路部品3の端子電極3a及びコア基板1の面内導体5と対応する位置に、それぞれ層間接続導体11a,11bが形成されている。これら層間接続導体11a,11bは、第1の樹脂層10を貫通する層間接続導体用穴に未硬化の導電ペーストを充填したものである。さらに、第1の樹脂層10の下面全面には、銅箔12が第1の樹脂層10の接着力により貼り付けられている。 (A) of FIG. 2 is a 1st process and shows the state which prepared the core board | substrate 1 and the 1st resin layer 10. FIG. The core substrate 1 is a hard substrate, and an opening 2 and in- plane conductors 4 and 5 are formed. The second circuit component 6 is mounted on the in-plane conductor 4 on the upper surface in advance. However, the second circuit component 6 may be mounted after the core substrate 1 is bonded to the first resin layer 10. . On the other hand, the first resin layer 10 is an uncured resin sheet, for example, an uncured sheet containing an inorganic filler and a thermosetting resin, an uncured sheet made of a thermosetting resin not containing an inorganic filler, A prepreg or the like can be used. In the first resin layer 10, interlayer connection conductors 11a and 11b are formed at positions corresponding to the terminal electrodes 3a of the first circuit component 3 and the in-plane conductors 5 of the core substrate 1, respectively. These interlayer connection conductors 11 a and 11 b are obtained by filling an interlayer connection conductor hole penetrating the first resin layer 10 with an uncured conductive paste. Further, the copper foil 12 is attached to the entire lower surface of the first resin layer 10 by the adhesive force of the first resin layer 10.
図2の(b)は第2工程であり、第1の樹脂層10の上にコア基板1を圧着すると共に、第1の回路部品3を開口部2内の第1の樹脂層10が露出した部分に圧着する。このとき、コア基板1の面内導体5が層間接続導体11bに対応し、かつ第1の回路部品3の端子電極3aが層間接続導体11aに対応するように圧着する。未硬化の第1の樹脂層10は粘着性を持つので、コア基板1及び第1の回路部品3は第1の樹脂層10に仮固定される。この時点では、層間接続導体11aを構成する導電ペーストも未硬化であるため、第1の回路部品3の端子電極3と層間接続導体11aとは電気的に接続されていない。 FIG. 2B shows the second step, in which the core substrate 1 is pressure-bonded onto the first resin layer 10 and the first resin layer 10 in the opening 2 is exposed to the first circuit component 3. Crimp to the part. At this time, crimping is performed so that the in-plane conductor 5 of the core substrate 1 corresponds to the interlayer connection conductor 11b and the terminal electrode 3a of the first circuit component 3 corresponds to the interlayer connection conductor 11a. Since the uncured first resin layer 10 has adhesiveness, the core substrate 1 and the first circuit component 3 are temporarily fixed to the first resin layer 10. At this time, since the conductive paste constituting the interlayer connection conductor 11a is also uncured, the terminal electrode 3 of the first circuit component 3 and the interlayer connection conductor 11a are not electrically connected.
図2の(c)は第3工程であり、コア基板1上に未硬化の第2の樹脂層20を積層する。第2の樹脂層20は未硬化であるため、第2の樹脂層20が流動して第2の回路部品6の周囲に隙間なく充填されると共に、開口部2の内壁と第1の回路部品3との隙間にも充填される。積層圧着と共に加熱することで、第1の樹脂層10と第2の樹脂層20とを一括硬化させる。その結果、コア基板1を間にして第1の樹脂層10と第2の樹脂層20とが一体化される。この時、層間接続導体11a,11bも同時に硬化し、導電性を生じるため、層間接続導体11aと第1の回路部品3の端子電極3aとが電気的に接続されると共に、層間接続導体11bとコア基板1の面内導体5とが電気的に接続される。 FIG. 2C shows a third step, in which an uncured second resin layer 20 is laminated on the core substrate 1. Since the second resin layer 20 is uncured, the second resin layer 20 flows and fills the periphery of the second circuit component 6 without a gap, and the inner wall of the opening 2 and the first circuit component 3 is also filled in the gap. The first resin layer 10 and the second resin layer 20 are collectively cured by heating together with the lamination pressure bonding. As a result, the first resin layer 10 and the second resin layer 20 are integrated with the core substrate 1 in between. At this time, the interlayer connection conductors 11a and 11b are also cured at the same time to generate conductivity, so that the interlayer connection conductor 11a and the terminal electrode 3a of the first circuit component 3 are electrically connected, and the interlayer connection conductor 11b The in-plane conductor 5 of the core substrate 1 is electrically connected.
図2の(d)は第4工程であり、硬化した第1の樹脂層10の銅箔12をパターン形成し、面内導体12a,12bを形成することで、部品内蔵モジュールAを完成する。銅箔12のパターン形成は、エッチング等の公知の方法により形成できる。なお、面内導体12a,12bは、未硬化の第1の樹脂層10に銅箔12を貼り付け、第1の樹脂層10の硬化後にエッチングする方法のほか、めっき法、導電ペーストの印刷法等によって形成することもできる。 FIG. 2D shows a fourth step, in which the copper foil 12 of the cured first resin layer 10 is patterned to form in- plane conductors 12a and 12b, thereby completing the component built-in module A. The pattern formation of the copper foil 12 can be formed by a known method such as etching. The in- plane conductors 12a and 12b are not only a method in which the copper foil 12 is attached to the uncured first resin layer 10 and etching is performed after the first resin layer 10 is cured, but also a plating method and a conductive paste printing method. It can also be formed by, for example.
図2に示す製造方法では、第1の樹脂層10と第2の樹脂層20とを同時に硬化させたが、工程(b)が終了した段階で第1の樹脂層10を先に硬化させてもよい。但し、第1の樹脂層10と第2の樹脂層20とが同質材料で、かつ同時に硬化させた場合には、両樹脂層の硬化収縮が同じとなるので、ソリの発生を抑制できるという利点がある。 In the manufacturing method shown in FIG. 2, the first resin layer 10 and the second resin layer 20 are simultaneously cured, but the first resin layer 10 is first cured at the stage where the step (b) is completed. Also good. However, when the first resin layer 10 and the second resin layer 20 are made of the same material and are cured at the same time, the curing shrinkage of both the resin layers becomes the same, so that the generation of warp can be suppressed. There is.
-第2の製造方法-
図3は、前記部品内蔵モジュールAの製造方法の他の例を示す。図3の(a)は第1工程であり、コア基板1と未硬化の第1の樹脂層10とを準備した状態を示す。コア基板1は図2と同様であるが、第1の樹脂層10は層間接続導体が形成されていない薄層の樹脂シートである。銅箔も貼り付けられていない。
-Second manufacturing method-
FIG. 3 shows another example of the manufacturing method of the component built-in module A. (A) of FIG. 3 is a 1st process and shows the state which prepared the core board | substrate 1 and the uncured 1st resin layer 10. FIG. The core substrate 1 is the same as that in FIG. 2, but the first resin layer 10 is a thin resin sheet in which no interlayer connection conductor is formed. Copper foil is also not affixed.
図3の(b)は第2工程であり、第1の樹脂層10の上にコア基板1を圧着すると共に、第1の回路部品3を開口部2内の第1の樹脂層10が露出した部分に圧着する。第1の樹脂層10には未だ層間接続導体が形成されていないので、コア基板1及び第1の回路部品3を第1の樹脂層10に対して位置合わせする必要がなく、接着作業が簡単になる。 FIG. 3B shows the second step, in which the core substrate 1 is pressure-bonded onto the first resin layer 10 and the first resin layer 10 in the opening 2 is exposed to the first circuit component 3. Crimp to the part. Since the interlayer connection conductor is not yet formed on the first resin layer 10, it is not necessary to align the core substrate 1 and the first circuit component 3 with respect to the first resin layer 10, and the bonding operation is simple. become.
図3の(c)は第3工程であり、コア基板1上に未硬化の第2の樹脂層20を積層する。第2の樹脂層20は未硬化であるため、第2の樹脂層20が流動して第2の回路部品6の周囲に隙間なく充填されると共に、開口部2の内壁と第1の回路部品3との隙間にも充填される。積層圧着と共に加熱することで、第1の樹脂層10と第2の樹脂層20とを一括硬化させる。 FIG. 3C shows a third step, in which an uncured second resin layer 20 is laminated on the core substrate 1. Since the second resin layer 20 is uncured, the second resin layer 20 flows and fills the periphery of the second circuit component 6 without a gap, and the inner wall of the opening 2 and the first circuit component 3 is also filled in the gap. The first resin layer 10 and the second resin layer 20 are collectively cured by heating together with the lamination pressure bonding.
図3の(d)は第4工程であり、コア基板1の面内導体5及び第1の回路部品3の端子電極3aと対応する第1の樹脂層10の位置に、層間接続導体用穴11a1 ,11b1 をレーザー加工により形成する。層間接続導体用穴11a1 ,11b1 を形成することにより、面内導体5及び端子電極3aが露出する。 FIG. 3D shows a fourth step, in which an interlayer connection conductor hole is formed at the position of the first resin layer 10 corresponding to the in-plane conductor 5 of the core substrate 1 and the terminal electrode 3 a of the first circuit component 3. 11a 1 and 11b 1 are formed by laser processing. By forming the interlayer connection conductor holes 11a 1 and 11b 1 , the in-plane conductor 5 and the terminal electrode 3a are exposed.
図3の(e)は第5工程であり、層間接続導体用穴(ビア穴)11a1 ,11b1 に導電ペーストを充填、硬化させて層間接続導体11a,11bを形成し、その後で第1の樹脂層10の表面に、層間接続導体11a,11bと導通する面内導体12a,12bをパターン形成する。層間接続導体11a,11bは、導電ペーストの充填、硬化に限るものではなく、めっき法により層間接続導体用穴11a1 ,11b1 の内面に導電膜を形成した後、層間接続導体用穴11a1 ,11b1 に樹脂を埋設してもよい。面内導体12a,12bの形成方法としては、めっき法や、導電ペーストの印刷など、任意の方法を選択できる。 FIG. 3E shows a fifth step, in which the interlayer connection conductors 11a and 11b are formed by filling and curing the interlayer connection conductor holes (via holes) 11a 1 and 11b 1 to form the interlayer connection conductors 11a and 11b. The in- plane conductors 12a and 12b that are electrically connected to the interlayer connection conductors 11a and 11b are formed in a pattern on the surface of the resin layer 10. Interlayer connection conductors 11a, 11b are filled conductive paste is not limited to curing, a conductive film is formed on the inner surface of the interlayer connection conductor holes 11a 1, 11b 1 by plating, holes 11a 1 for interlayer connection conductor , 11b 1 may be embedded with resin. As a method for forming the in- plane conductors 12a and 12b, an arbitrary method such as plating or printing of a conductive paste can be selected.
図3に示す製造方法の場合、第1の樹脂層10が硬化した後で、層間接続導体用穴11a1 ,11b1 を形成し、導電ペースト又はめっきにより層間接続導体11a,11bを形成するため、コア基板1の面内導体5及び第1の回路部品3の端子電極3aと層間接続導体11a,11bとを電気的に確実に接続できる。図3に示す製造方法では、第1の樹脂層10と第2の樹脂層20とを同時に硬化させたが、第2の樹脂層20を積層する前に第1の樹脂層10を硬化させてもよい。その場合、層間接続導体11a,11bの形成を、第2の樹脂層20の積層の前に行ってもよい。 In the manufacturing method shown in FIG. 3, in order to form the interlayer connection conductor holes 11a 1 and 11b 1 after the first resin layer 10 is cured, and to form the interlayer connection conductors 11a and 11b by conductive paste or plating. The in-plane conductor 5 of the core substrate 1 and the terminal electrode 3a of the first circuit component 3 and the interlayer connection conductors 11a and 11b can be electrically and reliably connected. In the manufacturing method shown in FIG. 3, the first resin layer 10 and the second resin layer 20 are cured simultaneously, but the first resin layer 10 is cured before the second resin layer 20 is laminated. Also good. In that case, the interlayer connection conductors 11a and 11b may be formed before the second resin layer 20 is laminated.
〔実施形態2〕
図4は部品内蔵モジュールの第2実施形態を示す。この実施形態の部品内蔵モジュールBでは、第1実施形態の部品内蔵モジュールAの第1の樹脂層10の下面に、さらなる樹脂層30をビルトアップ積層したものである。この樹脂層30は、第1の樹脂層10と同様に薄肉な樹脂層であり、その下面には、複数の層間接続導体31を介して第1の樹脂層10の面内導体12a,12bと接続された面内導体32が形成されている。なお、樹脂層30の下面にさらに樹脂層をビルトアップしてもよいことは勿論である。
[Embodiment 2]
FIG. 4 shows a second embodiment of the component built-in module. In the component built-in module B of this embodiment, a further resin layer 30 is built up and laminated on the lower surface of the first resin layer 10 of the component built-in module A of the first embodiment. The resin layer 30 is a thin resin layer similar to the first resin layer 10, and the lower surface thereof includes in- plane conductors 12 a and 12 b of the first resin layer 10 via a plurality of interlayer connection conductors 31. A connected in-plane conductor 32 is formed. Of course, a resin layer may be further built up on the lower surface of the resin layer 30.
〔実施形態3〕
図5は部品内蔵モジュールの第3実施形態を示す。この実施形態の部品内蔵モジュールCは、実装密度を高めるために、第1の樹脂層10の裏面の面内導体12a,12bに第3の回路部品40を実装すると共に、第1の樹脂層10の裏面に第3の樹脂層50を積層することで、第3の回路部品40を第3の樹脂層50の中に埋設したものである。第3の回路部品40は第1の回路部品3より低背部品がよい。第3の樹脂層50は第1,第2の樹脂層10,20と同質の材料とするのがよい。第2の樹脂層20には、コア基板1の面内導体パターン4と接続された複数の層間接続導体21が形成され、第2の樹脂層20の表面には、層間接続導体21と接続された面内導体パターン22aが形成されている。
[Embodiment 3]
FIG. 5 shows a third embodiment of the component built-in module. In the component built-in module C of this embodiment, the third circuit component 40 is mounted on the in- plane conductors 12a and 12b on the back surface of the first resin layer 10 in order to increase the mounting density, and the first resin layer 10 The third circuit component 40 is embedded in the third resin layer 50 by laminating the third resin layer 50 on the back surface of the substrate. The third circuit component 40 is preferably a lower-profile component than the first circuit component 3. The third resin layer 50 is preferably made of the same material as the first and second resin layers 10 and 20. A plurality of interlayer connection conductors 21 connected to the in-plane conductor pattern 4 of the core substrate 1 are formed on the second resin layer 20. The surface of the second resin layer 20 is connected to the interlayer connection conductor 21. An in-plane conductor pattern 22a is formed.
図6は、部品内蔵モジュールCの製造工程の一例を示す。まず、図6の(a)~(d)は図2の(a)~(d)とほぼ同様であるため、重複説明を省略する。但し、図6の(c)の段階で、第2の樹脂層20の表面に銅箔22が配置され、圧着/硬化時に銅箔22は第2の樹脂層20の表面に固定される。また、図6の(d)では、第2の樹脂層20の硬化後に、銅箔22がパターン形成されて面内導体パターン22aとなると共に、コア基板1の上面の面内導体4に達する層間接続導体用穴(ビア穴)をレーザー加工し、その層間接続導体用穴に導電ペーストを充填、硬化させることにより、層間接続導体21を形成する。また、第2の回路部品6の一部の形状が図2とは異なる。 FIG. 6 shows an example of the manufacturing process of the component built-in module C. First, (a) to (d) in FIG. 6 are substantially the same as (a) to (d) in FIG. However, the copper foil 22 is arranged on the surface of the second resin layer 20 at the stage of FIG. 6C, and the copper foil 22 is fixed to the surface of the second resin layer 20 at the time of pressure bonding / curing. In FIG. 6D, after the second resin layer 20 is cured, the copper foil 22 is patterned to form an in-plane conductor pattern 22a, and an interlayer reaching the in-plane conductor 4 on the upper surface of the core substrate 1 The interlayer connection conductor 21 is formed by laser processing the connection conductor hole (via hole) and filling the interlayer connection conductor hole with a conductive paste and curing. Further, the shape of a part of the second circuit component 6 is different from that in FIG.
図6の(e)では、図6の(d)にて得たモジュールを裏返しにし、第1の樹脂層10の裏面の面内導体12a,12bに第3の回路部品40を実装する。図6の(f)では、第1の樹脂層10の上に未硬化の第3の樹脂層50を熱圧着し、第3の回路部品40の周囲を第3の樹脂層50で覆うと共に、第3の樹脂層50を硬化させることで、部品内蔵モジュールCを完成する。 6E, the module obtained in FIG. 6D is turned upside down, and the third circuit component 40 is mounted on the in- plane conductors 12a and 12b on the back surface of the first resin layer 10. In FIG. In (f) of FIG. 6, an uncured third resin layer 50 is thermocompression-bonded on the first resin layer 10, and the periphery of the third circuit component 40 is covered with the third resin layer 50. The third resin layer 50 is cured to complete the component built-in module C.
図6では、第1の樹脂層10として予め層間接続導体11a,11bを形成しかつ下面全面に銅箔12を貼り付けた樹脂シートを使用したが、図3に示すように、層間接続導体及び銅箔を有しない樹脂シートを用い、その硬化後に層間接続導体を形成してもよい。 In FIG. 6, a resin sheet in which the interlayer connection conductors 11a and 11b are formed in advance as the first resin layer 10 and the copper foil 12 is pasted on the entire lower surface is used. However, as shown in FIG. A resin sheet having no copper foil may be used, and the interlayer connection conductor may be formed after the resin sheet is cured.
前記実施例では、第1の回路部品3として、コア基板1より高背な部品を用いた例を示したが、コア基板1と同等の高さあるいはコア基板1より低背の部品であっても構わない。また、第1の樹脂層10と第2の樹脂層20の硬化処理は、必ずしも同時である必要はない。すなわち、第1の樹脂層10にコア基板1と第1の回路部品3とを仮固定した後、第1の樹脂層10を硬化させ、その後で第2の樹脂層20を積層、硬化させてもよい。但し、第1の樹脂層10と第2の樹脂層20の硬化を同時に行う方が、硬化収縮に伴うモジュールの反りを小さくすることができる点で有利である。 In the above-described embodiment, an example in which a component having a height higher than that of the core substrate 1 is used as the first circuit component 3 is described. It doesn't matter. Moreover, the hardening process of the 1st resin layer 10 and the 2nd resin layer 20 does not necessarily need to be simultaneous. That is, after temporarily fixing the core substrate 1 and the first circuit component 3 to the first resin layer 10, the first resin layer 10 is cured, and then the second resin layer 20 is laminated and cured. Also good. However, it is advantageous to simultaneously cure the first resin layer 10 and the second resin layer 20 in that the warpage of the module accompanying curing shrinkage can be reduced.
A~C     部品内蔵モジュール
1       コア基板
2       開口部
3       第1の回路部品
3a      端子電極
4,5     面内導体
6       第2回路部品
10      第1の樹脂層
11a,11b 電極(層間接続導体)
12a,12b 面内導体
20      第2の樹脂層
21      層間接続導体
30      ビルドアップ樹脂層
40      第3の回路部品
50      第3の樹脂層
A to C component built-in module 1 core substrate 2 opening 3 first circuit component 3a terminal electrode 4, 5 in-plane conductor 6 second circuit component 10 first resin layer 11a, 11b electrode (interlayer connection conductor)
12a, 12b In-plane conductor 20 Second resin layer 21 Interlayer connection conductor 30 Build-up resin layer 40 Third circuit component 50 Third resin layer

Claims (12)

  1. 表裏方向に貫通した開口部を有するコア基板を未硬化状態の第1の樹脂層上に積層する工程Aと、
    前記開口部内に露出した未硬化状態の前記第1の樹脂層の露出部分に第1の回路部品を付着させる工程Bと、
    前記コア基板上に未硬化状態の第2の樹脂層を積層し、前記開口部の内壁と前記第1の回路部品との隙間に第2の樹脂層を充填する工程Cと、
    前記第1の樹脂層を硬化させる工程Dと、
    前記第2の樹脂層を硬化させる工程Eと、を備えることを特徴とする部品内蔵モジュールの製造方法。
    Step A for laminating a core substrate having an opening penetrating in the front and back direction on the uncured first resin layer;
    A step B of attaching a first circuit component to an exposed portion of the uncured first resin layer exposed in the opening;
    A step C of laminating an uncured second resin layer on the core substrate and filling the gap between the inner wall of the opening and the first circuit component with the second resin layer;
    Step D for curing the first resin layer;
    And a step E for curing the second resin layer.
  2. 前記工程Bの前の前記第1の樹脂層に、当該第1の樹脂層を貫通する層間接続導体用穴と当該層間接続導体用穴に充填された未硬化の導電ペーストとからなる電極が形成され、
    前記工程Bにおいて、前記第1の回路部品を前記電極と接するように前記第1の樹脂層に付着させ、
    前記工程Dにおいて、前記第1の樹脂層を硬化させると同時に前記導電ペーストを硬化させて前記第1の回路部品と前記電極とを電気的に接続することを特徴とする請求項1に記載の部品内蔵モジュールの製造方法。
    In the first resin layer before the step B, an electrode made of an interlayer connection conductor hole penetrating the first resin layer and an uncured conductive paste filled in the interlayer connection conductor hole is formed. And
    In the step B, the first circuit component is attached to the first resin layer so as to be in contact with the electrode,
    2. The method according to claim 1, wherein in the step D, the first resin layer is cured, and at the same time, the conductive paste is cured to electrically connect the first circuit component and the electrode. Manufacturing method of component built-in module.
  3. 前記工程Dの後、前記第1の樹脂層に前記第1の回路部品に達するように層間接続導体用穴を形成し、当該層間接続導体用穴の中に層間接続導体を形成することにより、前記第1の回路部品と電気的に接続された電極を形成することを特徴とする請求項1に記載の部品内蔵モジュールの製造方法。 After the step D, an interlayer connection conductor hole is formed in the first resin layer so as to reach the first circuit component, and an interlayer connection conductor is formed in the interlayer connection conductor hole. The method for manufacturing a component built-in module according to claim 1, wherein an electrode electrically connected to the first circuit component is formed.
  4. 前記工程Dと工程Eとを同時に実施することを特徴とする請求項1乃至3のいずれか1項に記載の部品内蔵モジュールの製造方法。 The method of manufacturing a component built-in module according to any one of claims 1 to 3, wherein the step D and the step E are performed simultaneously.
  5. 前記第1の回路部品は前記コア基板の厚みよりも高背な部品であることを特徴とする請求項1乃至4のいずれか1項に記載の部品内蔵モジュールの製造方法。 5. The method of manufacturing a component built-in module according to claim 1, wherein the first circuit component is a component that is taller than a thickness of the core substrate.
  6. 前記工程Cの前に、前記コア基板上に前記第1の回路部品より低背な第2の回路部品を実装する工程を備え、
    前記工程Cにおいて、前記第2の回路部品を前記第2の樹脂層中に埋設することを特徴とする請求項1乃至5のいずれか1項に記載の部品内蔵モジュールの製造方法。
    Before the step C, the step of mounting a second circuit component having a lower height than the first circuit component on the core substrate,
    6. The method of manufacturing a component built-in module according to claim 1, wherein in the step C, the second circuit component is embedded in the second resin layer.
  7. 前記第1の樹脂層と前記第2の樹脂層とは同一材質よりなることを特徴とする請求項1乃至6のいずれか1項に記載の部品内蔵モジュールの製造方法。 The method for manufacturing a component built-in module according to claim 1, wherein the first resin layer and the second resin layer are made of the same material.
  8. 第1の樹脂層と、
    前記第1の樹脂層上に積層され、表裏方向に貫通した開口部を有するコア基板と、
    前記コア基板の開口部内に収納され、底面が前記第1の樹脂層上に付着された第1の回路部品と、
    前記コア基板上に積層され、前記コア基板の開口部と前記第1の回路部品との隙間に充填された第2の樹脂層と、
    前記第1の樹脂層に形成されるとともに、前記第1の回路部品と電気的に接続された電極と、を備えたことを特徴とする部品内蔵モジュール。
    A first resin layer;
    A core substrate laminated on the first resin layer and having an opening penetrating in the front and back direction;
    A first circuit component housed in the opening of the core substrate and having a bottom surface attached on the first resin layer;
    A second resin layer stacked on the core substrate and filled in a gap between the opening of the core substrate and the first circuit component;
    A component built-in module comprising: an electrode formed on the first resin layer and electrically connected to the first circuit component.
  9. 前記電極は、前記第1の回路部品に達するように前記第1の樹脂層に形成された層間接続導体であることを特徴とする請求項8に記載の部品内蔵モジュール。 9. The component built-in module according to claim 8, wherein the electrode is an interlayer connection conductor formed in the first resin layer so as to reach the first circuit component.
  10. 前記第1の回路部品は前記コア基板の厚みよりも高背な部品であることを特徴とする請求項8又は9に記載の部品内蔵モジュール。 10. The component built-in module according to claim 8, wherein the first circuit component is a component that is taller than a thickness of the core substrate.
  11. 前記コア基板上に実装され、かつ前記第2の樹脂層中に埋設された、前記第1の回路部品より低背な第2の回路部品をさらに備えることを特徴とする請求項8乃至10のいずれか1項に記載の部品内蔵モジュール。 The circuit board according to claim 8, further comprising a second circuit component mounted on the core substrate and embedded in the second resin layer and having a height lower than that of the first circuit component. The component built-in module according to any one of the above.
  12. 前記第1の樹脂層と前記第2の樹脂層とは同一材質よりなることを特徴とする請求項8乃至11のいずれか1項に記載の部品内蔵モジュール。 The component built-in module according to claim 8, wherein the first resin layer and the second resin layer are made of the same material.
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CN102119588A (en) 2011-07-06
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CN103747616A (en) 2014-04-23
JPWO2010018708A1 (en) 2012-01-26

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