WO2009037808A1 - 半導体集積回路 - Google Patents

半導体集積回路 Download PDF

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Publication number
WO2009037808A1
WO2009037808A1 PCT/JP2008/002471 JP2008002471W WO2009037808A1 WO 2009037808 A1 WO2009037808 A1 WO 2009037808A1 JP 2008002471 W JP2008002471 W JP 2008002471W WO 2009037808 A1 WO2009037808 A1 WO 2009037808A1
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WO
WIPO (PCT)
Prior art keywords
dtr
dummy transistors
scl
transistors
substrate contact
Prior art date
Application number
PCT/JP2008/002471
Other languages
English (en)
French (fr)
Inventor
Junichi Naka
Original Assignee
Panasonic Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Panasonic Corporation filed Critical Panasonic Corporation
Publication of WO2009037808A1 publication Critical patent/WO2009037808A1/ja

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203—Particular design considerations for integrated circuits
    • H01L27/0207—Geometrical layout of the components, e.g. computer aided design; custom LSI, semi-custom LSI, standard cell technique
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7842—Field effect transistors with field effect produced by an insulated gate means for exerting mechanical stress on the crystal lattice of the channel region, e.g. using a flexible substrate
    • H01L29/7846—Field effect transistors with field effect produced by an insulated gate means for exerting mechanical stress on the crystal lattice of the channel region, e.g. using a flexible substrate the means being located in the lateral device isolation region, e.g. STI
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/8238—Complementary field-effect transistors, e.g. CMOS
    • H01L21/823807—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the channel structures, e.g. channel implants, halo or pocket implants, or channel materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/8238—Complementary field-effect transistors, e.g. CMOS
    • H01L21/823878—Complementary field-effect transistors, e.g. CMOS isolation region manufacturing related aspects, e.g. to avoid interaction of isolation region with adjacent structure

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Ceramic Engineering (AREA)
  • General Engineering & Computer Science (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

　回路動作に関与する２本のトランジスタＴＲ、ＴＲの外郭に、各々、ダミートランジスタＤＴＲ、ＤＴＲが配置される。この両ダミートランジスタＤＴＲ、ＤＴＲを挟み込む形でパターン端に基板コンタクトラインＳＣＬが配置される。この基板コンタクトラインＳＣＬは、前記各ダミートランジスタＤＴＲの側部に位置するドレイン端子Ｄと接して配置される。前記基板コンタクトラインＳＣＬの幅を任意に選択すれば、両ダミートランジスタＤＴＲの外郭に素子分離領域は発生せず、ＳＴＩ応力ひずみは軽減される。また、ダミートランジスタＤＴＲが配置されるので、ゲート領域の等間隔性を保持したレイアウトパターンが得られる。従って、微細プロセスにおけるＳＴＩ応力ひずみに起因して、トランジスタ特性の変動やトランジスタ特性のばらつきが発生したり、トランジスタモデルと実際に形成されるトランジスタデバイスとの差異が乖離したりすることを抑制できる。
PCT/JP2008/002471 2007-09-18 2008-09-08 半導体集積回路 WO2009037808A1 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2007241049 2007-09-18
JP2007-241049 2007-09-18

Publications (1)

Publication Number Publication Date
WO2009037808A1 true WO2009037808A1 (ja) 2009-03-26

Family

ID=40467637

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2008/002471 WO2009037808A1 (ja) 2007-09-18 2008-09-08 半導体集積回路

Country Status (1)

Country Link
WO (1) WO2009037808A1 (ja)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8957480B2 (en) 2011-03-04 2015-02-17 Renesas Electronics Corporation Semiconductor device including dummy transistors with reduced off-leakage current
CN104835815A (zh) * 2014-02-07 2015-08-12 亚德诺半导体集团 复合电路元件的布局
US9143123B2 (en) 2012-07-10 2015-09-22 Infineon Technologies Ag RF switch, mobile communication device and method for switching an RF signal
DE102015101549B4 (de) * 2014-02-07 2017-01-26 Analog Devices Global Anordnung zusammengesetzter Schaltungselemente sowie zugehöriges Herstellungsverfahren
US10043905B2 (en) 2015-09-11 2018-08-07 Toshiba Memory Corporation Semiconductor device
CN108701653A (zh) * 2016-02-25 2018-10-23 株式会社索思未来 半导体集成电路装置

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02238668A (ja) * 1989-03-10 1990-09-20 Fujitsu Ltd 半導体装置
JP2001044397A (ja) * 1999-07-30 2001-02-16 Fujitsu Ltd 半導体集積回路
JP2002368117A (ja) * 2001-04-02 2002-12-20 Matsushita Electric Ind Co Ltd アナログｍｏｓ半導体装置、その製造方法、製造プログラム及びプログラム装置
JP2007096211A (ja) * 2005-09-30 2007-04-12 Ricoh Co Ltd 半導体装置

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02238668A (ja) * 1989-03-10 1990-09-20 Fujitsu Ltd 半導体装置
JP2001044397A (ja) * 1999-07-30 2001-02-16 Fujitsu Ltd 半導体集積回路
JP2002368117A (ja) * 2001-04-02 2002-12-20 Matsushita Electric Ind Co Ltd アナログｍｏｓ半導体装置、その製造方法、製造プログラム及びプログラム装置
JP2007096211A (ja) * 2005-09-30 2007-04-12 Ricoh Co Ltd 半導体装置

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8957480B2 (en) 2011-03-04 2015-02-17 Renesas Electronics Corporation Semiconductor device including dummy transistors with reduced off-leakage current
US9349727B2 (en) 2011-03-04 2016-05-24 Renesas Electronics Corporation Semiconductor device
US9143123B2 (en) 2012-07-10 2015-09-22 Infineon Technologies Ag RF switch, mobile communication device and method for switching an RF signal
DE102013213366B4 (de) 2012-07-10 2022-09-15 Infineon Technologies Ag HF-Schalter, Mobilkommunikationseinrichtung und Verfahren zum Schalten eines HF-Signals
CN104835815A (zh) * 2014-02-07 2015-08-12 亚德诺半导体集团 复合电路元件的布局
DE102015101549B4 (de) * 2014-02-07 2017-01-26 Analog Devices Global Anordnung zusammengesetzter Schaltungselemente sowie zugehöriges Herstellungsverfahren
US10043905B2 (en) 2015-09-11 2018-08-07 Toshiba Memory Corporation Semiconductor device
USRE49164E1 (en) 2015-09-11 2022-08-09 Kioxia Corporation Semiconductor device
CN108701653A (zh) * 2016-02-25 2018-10-23 株式会社索思未来 半导体集成电路装置
CN108701653B (zh) * 2016-02-25 2022-07-29 株式会社索思未来 半导体集成电路装置

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