WO2009037808A1 - Semiconductor integrated circuit - Google Patents

Semiconductor integrated circuit Download PDF

Info

Publication number
WO2009037808A1
WO2009037808A1 PCT/JP2008/002471 JP2008002471W WO2009037808A1 WO 2009037808 A1 WO2009037808 A1 WO 2009037808A1 JP 2008002471 W JP2008002471 W JP 2008002471W WO 2009037808 A1 WO2009037808 A1 WO 2009037808A1
Authority
WO
WIPO (PCT)
Prior art keywords
dtr
dummy transistors
scl
transistors
substrate contact
Prior art date
Application number
PCT/JP2008/002471
Other languages
French (fr)
Japanese (ja)
Inventor
Junichi Naka
Original Assignee
Panasonic Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Panasonic Corporation filed Critical Panasonic Corporation
Publication of WO2009037808A1 publication Critical patent/WO2009037808A1/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/0203—Particular design considerations for integrated circuits
    • H01L27/0207—Geometrical layout of the components, e.g. computer aided design; custom LSI, semi-custom LSI, standard cell technique
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7842—Field effect transistors with field effect produced by an insulated gate means for exerting mechanical stress on the crystal lattice of the channel region, e.g. using a flexible substrate
    • H01L29/7846—Field effect transistors with field effect produced by an insulated gate means for exerting mechanical stress on the crystal lattice of the channel region, e.g. using a flexible substrate the means being located in the lateral device isolation region, e.g. STI
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/8238—Complementary field-effect transistors, e.g. CMOS
    • H01L21/823807—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the channel structures, e.g. channel implants, halo or pocket implants, or channel materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/8238—Complementary field-effect transistors, e.g. CMOS
    • H01L21/823878—Complementary field-effect transistors, e.g. CMOS isolation region manufacturing related aspects, e.g. to avoid interaction of isolation region with adjacent structure

Abstract

Dummy transistors (DTR) are arranged at the outside of two transistors (TR) associated with a circuit operation. Substrate contact lines (SCL) are arranged at pattern ends so as to sandwich the two dummy transistors (DTR). The substrate contact lines (SCL) are arranged in contact with a drain terminal (D) positioned at the side portions of the respective dummy transistors (DTR). By selecting an arbitrary width of the substrate contact lines (SCL), no element separation region is generated outside the two dummy transistors (DTR), which reduces the STI stress distortion. Moreover, since the dummy transistors (DTR) are arranged, it is possible to obtain a layout pattern for holding an identical interval between gate regions. This can suppress fluctuations of transistor characteristics or increase of a difference between a transistor model and an actually formed transistor device.
PCT/JP2008/002471 2007-09-18 2008-09-08 Semiconductor integrated circuit WO2009037808A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2007241049 2007-09-18
JP2007-241049 2007-09-18

Publications (1)

Publication Number Publication Date
WO2009037808A1 true WO2009037808A1 (en) 2009-03-26

Family

ID=40467637

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2008/002471 WO2009037808A1 (en) 2007-09-18 2008-09-08 Semiconductor integrated circuit

Country Status (1)

Country Link
WO (1) WO2009037808A1 (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8957480B2 (en) 2011-03-04 2015-02-17 Renesas Electronics Corporation Semiconductor device including dummy transistors with reduced off-leakage current
CN104835815A (en) * 2014-02-07 2015-08-12 亚德诺半导体集团 Layout of composite circuit elements
US9143123B2 (en) 2012-07-10 2015-09-22 Infineon Technologies Ag RF switch, mobile communication device and method for switching an RF signal
DE102015101549B4 (en) * 2014-02-07 2017-01-26 Analog Devices Global Arrangement of composite circuit elements and associated manufacturing method
US10043905B2 (en) 2015-09-11 2018-08-07 Toshiba Memory Corporation Semiconductor device
CN108701653A (en) * 2016-02-25 2018-10-23 株式会社索思未来 Conductor integrated circuit device

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02238668A (en) * 1989-03-10 1990-09-20 Fujitsu Ltd Semiconductor device
JP2001044397A (en) * 1999-07-30 2001-02-16 Fujitsu Ltd Semiconductor integrated circuit
JP2002368117A (en) * 2001-04-02 2002-12-20 Matsushita Electric Ind Co Ltd Analog mos semiconductor device, manufacturing method therefor, manufacturing program and programming apparatus
JP2007096211A (en) * 2005-09-30 2007-04-12 Ricoh Co Ltd Semiconductor device

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02238668A (en) * 1989-03-10 1990-09-20 Fujitsu Ltd Semiconductor device
JP2001044397A (en) * 1999-07-30 2001-02-16 Fujitsu Ltd Semiconductor integrated circuit
JP2002368117A (en) * 2001-04-02 2002-12-20 Matsushita Electric Ind Co Ltd Analog mos semiconductor device, manufacturing method therefor, manufacturing program and programming apparatus
JP2007096211A (en) * 2005-09-30 2007-04-12 Ricoh Co Ltd Semiconductor device

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8957480B2 (en) 2011-03-04 2015-02-17 Renesas Electronics Corporation Semiconductor device including dummy transistors with reduced off-leakage current
US9349727B2 (en) 2011-03-04 2016-05-24 Renesas Electronics Corporation Semiconductor device
US9143123B2 (en) 2012-07-10 2015-09-22 Infineon Technologies Ag RF switch, mobile communication device and method for switching an RF signal
DE102013213366B4 (en) 2012-07-10 2022-09-15 Infineon Technologies Ag RF switch, mobile communication device and method for switching an RF signal
CN104835815A (en) * 2014-02-07 2015-08-12 亚德诺半导体集团 Layout of composite circuit elements
DE102015101549B4 (en) * 2014-02-07 2017-01-26 Analog Devices Global Arrangement of composite circuit elements and associated manufacturing method
US10043905B2 (en) 2015-09-11 2018-08-07 Toshiba Memory Corporation Semiconductor device
USRE49164E1 (en) 2015-09-11 2022-08-09 Kioxia Corporation Semiconductor device
CN108701653A (en) * 2016-02-25 2018-10-23 株式会社索思未来 Conductor integrated circuit device
CN108701653B (en) * 2016-02-25 2022-07-29 株式会社索思未来 Semiconductor integrated circuit device having a plurality of semiconductor chips

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