WO2009004878A1 - 電子部品用パッケージ、それを備えるパッケージ部品および電子機器ならびにパッケージ部品の製造方法 - Google Patents

電子部品用パッケージ、それを備えるパッケージ部品および電子機器ならびにパッケージ部品の製造方法 Download PDF

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Publication number
WO2009004878A1
WO2009004878A1 PCT/JP2008/060059 JP2008060059W WO2009004878A1 WO 2009004878 A1 WO2009004878 A1 WO 2009004878A1 JP 2008060059 W JP2008060059 W JP 2008060059W WO 2009004878 A1 WO2009004878 A1 WO 2009004878A1
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WIPO (PCT)
Prior art keywords
package
electronic
electronic device
parts
virtual plane
Prior art date
Application number
PCT/JP2008/060059
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English (en)
French (fr)
Inventor
Kazuhiro Komatsu
Daisuke Enomoto
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Fujitsu Ten Limited
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Publication date
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Publication of WO2009004878A1 publication Critical patent/WO2009004878A1/ja

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    • HELECTRICITY
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    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49537Plurality of lead frames mounted in one device
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/565Moulds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • H01L24/78Apparatus for connecting with wire connectors
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    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/10Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers
    • H01L25/105Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers the devices being of a type provided for in group H01L27/00
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    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
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    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

 本発明は、電子部品用パッケージ、それを備えるパッケージ部品および電子機器ならびにパッケージ部品の製造方法に関する。集積回路素子2が設けられるパッケージ本体3と、パッケージ本体3に保持され、パッケージ本体3のうちこのパッケージ本体3の底面12を含む予め定める仮想一平面に垂直な基準軸線L1まわりの周側部11から突出している複数のリード4とを含み、複数のリード4は、周側部11のうち、予め定める仮想一平面からの基準軸線L1方向における距離が異なる複数の位置から予め定める仮想一平面に沿って突出して、前記予め定める仮想一平面側に屈曲している。
PCT/JP2008/060059 2007-07-04 2008-05-30 電子部品用パッケージ、それを備えるパッケージ部品および電子機器ならびにパッケージ部品の製造方法 WO2009004878A1 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2007176640A JP2009016572A (ja) 2007-07-04 2007-07-04 電子部品用パッケージ、それを備えるパッケージ部品および電子機器ならびにパッケージ部品の製造方法
JP2007-176640 2007-07-04

Publications (1)

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WO2009004878A1 true WO2009004878A1 (ja) 2009-01-08

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PCT/JP2008/060059 WO2009004878A1 (ja) 2007-07-04 2008-05-30 電子部品用パッケージ、それを備えるパッケージ部品および電子機器ならびにパッケージ部品の製造方法

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Publication number Priority date Publication date Assignee Title
US9978675B2 (en) 2015-11-20 2018-05-22 Canon Kabushiki Kaisha Package, electronic component, and electronic apparatus

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60107848A (ja) * 1983-11-16 1985-06-13 Hitachi Ltd 半導体装置およびこれに用いられるリ−ドフレ−ム
JPH02343A (ja) * 1989-01-12 1990-01-05 Ibiden Co Ltd 電子部品搭載用基板
JPH0414859A (ja) * 1990-05-08 1992-01-20 Mitsubishi Electric Corp 電子部品のリード端子構造
JPH0590335A (ja) * 1991-09-27 1993-04-09 Rohm Co Ltd 半導体装置

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60107848A (ja) * 1983-11-16 1985-06-13 Hitachi Ltd 半導体装置およびこれに用いられるリ−ドフレ−ム
JPH02343A (ja) * 1989-01-12 1990-01-05 Ibiden Co Ltd 電子部品搭載用基板
JPH0414859A (ja) * 1990-05-08 1992-01-20 Mitsubishi Electric Corp 電子部品のリード端子構造
JPH0590335A (ja) * 1991-09-27 1993-04-09 Rohm Co Ltd 半導体装置

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