WO2009001653A1 - 波形処理回路 - Google Patents

波形処理回路 Download PDF

Info

Publication number
WO2009001653A1
WO2009001653A1 PCT/JP2008/060086 JP2008060086W WO2009001653A1 WO 2009001653 A1 WO2009001653 A1 WO 2009001653A1 JP 2008060086 W JP2008060086 W JP 2008060086W WO 2009001653 A1 WO2009001653 A1 WO 2009001653A1
Authority
WO
WIPO (PCT)
Prior art keywords
outputs
circuit
waveform processing
processing circuit
reference signal
Prior art date
Application number
PCT/JP2008/060086
Other languages
English (en)
French (fr)
Inventor
Fujio Kurokawa
Original Assignee
Nagasaki University, National University Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nagasaki University, National University Corporation filed Critical Nagasaki University, National University Corporation
Priority to EP08777072A priority Critical patent/EP2173033A4/en
Priority to US12/666,780 priority patent/US8314642B2/en
Priority to KR1020097025328A priority patent/KR101161004B1/ko
Priority to JP2009520414A priority patent/JP5303762B2/ja
Publication of WO2009001653A1 publication Critical patent/WO2009001653A1/ja

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/13Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/01Shaping pulses
    • H03K5/04Shaping pulses by increasing duration; by decreasing duration
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K2005/00013Delay, i.e. output pulse is delayed after input pulse and pulse length of output pulse is dependent on pulse length of input pulse
    • H03K2005/00078Fixed delay
    • H03K2005/00136Avoiding asymmetry of delay for leading or trailing edge; Avoiding variations of delay due to threshold

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Analogue/Digital Conversion (AREA)
  • Pulse Circuits (AREA)
  • Manipulation Of Pulses (AREA)

Abstract

 立上りエッジや立下りエッジを微調整し、あるいはデッドタイム,周期等を高い精度で調整する。  矩形または概略矩形のパルスを入力し、当該パルス信号を積分した漸次増加または漸次減少する信号を出力する積分回路11と、一定の値または変化する値を基準信号として出力する基準信号出力回路12と、前記積分回路の出力と前記基準信号出力回路の出力とを比較し、これらの出力の大小関係が変化するタイミングで、立ち上がるかまたは立ち下がるパルスを出力する比較回路13とを備える。
PCT/JP2008/060086 2007-06-25 2008-06-01 波形処理回路 WO2009001653A1 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
EP08777072A EP2173033A4 (en) 2007-06-25 2008-06-01 WAVEFORM PROCESSING CIRCUIT
US12/666,780 US8314642B2 (en) 2007-06-25 2008-06-01 Pulse width adjusting circuit
KR1020097025328A KR101161004B1 (ko) 2007-06-25 2008-06-01 파형 처리 회로
JP2009520414A JP5303762B2 (ja) 2007-06-25 2008-06-01 波形処理回路。

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP2007166389 2007-06-25
JP2007-166389 2007-06-25
JP2007-201390 2007-08-01
JP2007201390 2007-08-01

Publications (1)

Publication Number Publication Date
WO2009001653A1 true WO2009001653A1 (ja) 2008-12-31

Family

ID=40185475

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2008/060086 WO2009001653A1 (ja) 2007-06-25 2008-06-01 波形処理回路

Country Status (5)

Country Link
US (1) US8314642B2 (ja)
EP (1) EP2173033A4 (ja)
JP (1) JP5303762B2 (ja)
KR (1) KR101161004B1 (ja)
WO (1) WO2009001653A1 (ja)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010206335A (ja) * 2009-02-28 2010-09-16 Nagasaki Univ 信号発生装置
JP2013034119A (ja) * 2011-08-02 2013-02-14 Mitsubishi Electric Corp 位相比較装置
US20130074473A1 (en) * 2011-09-22 2013-03-28 Continental Automotive Systems Us, Inc. Trigger activated adjustable pulse width generator circuit for automotive exhaust after-treatment and injection

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8982099B2 (en) 2009-06-25 2015-03-17 Semiconductor Energy Laboratory Co., Ltd. Touch panel and driving method of the same
JP6679897B2 (ja) * 2015-11-20 2020-04-15 富士通株式会社 情報処理装置、生体認証方法および生体認証プログラム
US10270429B1 (en) * 2017-12-20 2019-04-23 Micron Technology, Inc. Internal clock distortion calibration using DC component offset of clock signal
US10833656B2 (en) 2018-04-30 2020-11-10 Micron Technology, Inc. Autonomous duty cycle calibration

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04151968A (ja) * 1990-05-07 1992-05-25 Ricoh Co Ltd パルス幅変調回路
JPH08330916A (ja) * 1995-05-29 1996-12-13 Ricoh Co Ltd タイミング発生器

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2553680B2 (ja) * 1988-12-29 1996-11-13 松下電器産業株式会社 デジタル信号処理回路
JPH04105412A (ja) * 1990-08-27 1992-04-07 Nec Ibaraki Ltd フリップフロップ
JP3378667B2 (ja) * 1994-08-10 2003-02-17 株式会社アドバンテスト 周期クロックの可変遅延回路
JPH08322240A (ja) * 1995-05-24 1996-12-03 Fuji Electric Co Ltd 自己消弧形半導体素子のゲート制御方法
US6204710B1 (en) * 1998-06-22 2001-03-20 Xilinx, Inc. Precision trim circuit for delay lines
JP4105831B2 (ja) * 1998-09-11 2008-06-25 株式会社アドバンテスト 波形発生装置、半導体試験装置、および半導体デバイス
JP2003329712A (ja) * 2002-05-15 2003-11-19 Sony Corp 信号処理装置、および信号処理方法
US7075353B1 (en) * 2004-01-05 2006-07-11 National Semiconductor Corporation Clock generator circuit stabilized over temperature, process and power supply variations
US20080143408A1 (en) * 2006-12-19 2008-06-19 Fabrice Paillet Pulse width modulator

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04151968A (ja) * 1990-05-07 1992-05-25 Ricoh Co Ltd パルス幅変調回路
JPH08330916A (ja) * 1995-05-29 1996-12-13 Ricoh Co Ltd タイミング発生器

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010206335A (ja) * 2009-02-28 2010-09-16 Nagasaki Univ 信号発生装置
JP2013034119A (ja) * 2011-08-02 2013-02-14 Mitsubishi Electric Corp 位相比較装置
US20130074473A1 (en) * 2011-09-22 2013-03-28 Continental Automotive Systems Us, Inc. Trigger activated adjustable pulse width generator circuit for automotive exhaust after-treatment and injection
US8723614B2 (en) * 2011-09-22 2014-05-13 Continental Automotive Systems, Inc. Trigger activated adjustable pulse width generator circuit for automotive exhaust after-treatment and injection

Also Published As

Publication number Publication date
US20100271096A1 (en) 2010-10-28
KR20100020954A (ko) 2010-02-23
JPWO2009001653A1 (ja) 2010-08-26
EP2173033A4 (en) 2012-07-04
US8314642B2 (en) 2012-11-20
KR101161004B1 (ko) 2012-06-28
EP2173033A1 (en) 2010-04-07
JP5303762B2 (ja) 2013-10-02

Similar Documents

Publication Publication Date Title
WO2009001653A1 (ja) 波形処理回路
TW200642280A (en) Clock synthesizer and method thereof
EP2259428A3 (en) Automatic control of clock duty cycle
EP2884228A3 (en) Detection device, sensor, electronic apparatus and moving object
TW200735114A (en) Shift register circuit and display drive device
WO2009011438A1 (ja) 周期信号処理方法、周期信号変換方法、周期信号処理装置および周期信号の分析方法
TW201130229A (en) Delay locked loop and method of driving delay locked loop
WO2016182993A3 (en) Phase-based measurement and control of a gyroscope
WO2009002679A3 (en) Calibration circuits and methods for proximity detector
WO2007146075A3 (en) Analog signal transition detector
WO2009050831A1 (ja) 距離測定装置及び距離測定方法
WO2008085420A3 (en) Automatic frequency calibration
WO2007120957A3 (en) Dynamic timing adjustment in a circuit device
EP2360834A3 (en) Frequency multiplier
WO2004010579A8 (en) Apparatus and method for duty cycle correction
WO2012151313A3 (en) Apparatus and method to hold pll output frequency when input clock is lost
WO2014123802A3 (en) Systems and methods for providing duty cycle correction
WO2007099579A9 (ja) Ramマクロ、そのタイミング生成回路
SG179433A1 (en) Encoding device and encoding method
TW200635224A (en) Digital duty cycle corrector
WO2007065040A3 (en) Comparator circuit
WO2011113025A3 (en) Adjustable sampling rate converter
WO2007012010A3 (en) Methods and apparatus for dividing a clock signal
WO2009038588A8 (en) Signal generator with adjustable phase
TW200740125A (en) Phase frequency detector with limited output pulse width and method thereof

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 08777072

Country of ref document: EP

Kind code of ref document: A1

ENP Entry into the national phase

Ref document number: 2009520414

Country of ref document: JP

Kind code of ref document: A

ENP Entry into the national phase

Ref document number: 20097025328

Country of ref document: KR

Kind code of ref document: A

NENP Non-entry into the national phase

Ref country code: DE

WWE Wipo information: entry into national phase

Ref document number: 2008777072

Country of ref document: EP

WWE Wipo information: entry into national phase

Ref document number: 12666780

Country of ref document: US