WO2008114342A1 - 電源スイッチ回路及び半導体集積回路装置 - Google Patents

電源スイッチ回路及び半導体集積回路装置 Download PDF

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Publication number
WO2008114342A1
WO2008114342A1 PCT/JP2007/055359 JP2007055359W WO2008114342A1 WO 2008114342 A1 WO2008114342 A1 WO 2008114342A1 JP 2007055359 W JP2007055359 W JP 2007055359W WO 2008114342 A1 WO2008114342 A1 WO 2008114342A1
Authority
WO
WIPO (PCT)
Prior art keywords
power switch
switch circuit
semiconductor integrated
integrated circuit
control signal
Prior art date
Application number
PCT/JP2007/055359
Other languages
English (en)
French (fr)
Inventor
Masaki Komaki
Original Assignee
Fujitsu Microelectronics Limited
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Microelectronics Limited filed Critical Fujitsu Microelectronics Limited
Priority to PCT/JP2007/055359 priority Critical patent/WO2008114342A1/ja
Priority to JP2009504942A priority patent/JP4855514B2/ja
Publication of WO2008114342A1 publication Critical patent/WO2008114342A1/ja
Priority to US12/561,046 priority patent/US8258829B2/en

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0008—Arrangements for reducing power consumption
    • H03K19/0016—Arrangements for reducing power consumption by using a control or a clock signal, e.g. in order to apply power supply

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Electronic Switches (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Logic Circuits (AREA)

Abstract

　過渡電流の増大を確実に抑制し得る電源スイッチ回路（ＳＷＸ１）。電源スイッチ回路（ＳＷＸ１）は、制御信号（Ｅ）に応答して出力電圧（ＶDD）を生成する第１トランジスタ（Ｔ１）と、前記制御信号と前記第１トランジスタの出力電圧との論理処理により前記制御信号を遅延させる時間差発生回路（２０）とを備える。
PCT/JP2007/055359 2007-03-16 2007-03-16 電源スイッチ回路及び半導体集積回路装置 WO2008114342A1 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
PCT/JP2007/055359 WO2008114342A1 (ja) 2007-03-16 2007-03-16 電源スイッチ回路及び半導体集積回路装置
JP2009504942A JP4855514B2 (ja) 2007-03-16 2007-03-16 電源スイッチ回路及び半導体集積回路装置
US12/561,046 US8258829B2 (en) 2007-03-16 2009-09-16 Power switch circuit and semiconductor integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2007/055359 WO2008114342A1 (ja) 2007-03-16 2007-03-16 電源スイッチ回路及び半導体集積回路装置

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US12/561,046 Continuation US8258829B2 (en) 2007-03-16 2009-09-16 Power switch circuit and semiconductor integrated circuit device

Publications (1)

Publication Number Publication Date
WO2008114342A1 true WO2008114342A1 (ja) 2008-09-25

Family

ID=39765464

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2007/055359 WO2008114342A1 (ja) 2007-03-16 2007-03-16 電源スイッチ回路及び半導体集積回路装置

Country Status (3)

Country Link
US (1) US8258829B2 (ja)
JP (1) JP4855514B2 (ja)
WO (1) WO2008114342A1 (ja)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010153535A (ja) * 2008-12-25 2010-07-08 Renesas Electronics Corp 半導体装置及びそのスイッチトランジスタの制御方法
JP2010183339A (ja) * 2009-02-05 2010-08-19 Kawasaki Microelectronics Inc 演算回路
JP2013066179A (ja) * 2011-09-16 2013-04-11 Samsung Electronics Co Ltd 電力制御回路、それを含む半導体装置及び該電力制御回路の動作方法

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9467136B1 (en) * 2015-10-05 2016-10-11 Monolithic Power Systems, Inc. Monolithic integrated circuit switch device with output current balancing for parallel-connection
US9847133B2 (en) * 2016-01-19 2017-12-19 Ememory Technology Inc. Memory array capable of performing byte erase operation

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03266519A (ja) * 1990-03-16 1991-11-27 Oki Electric Ind Co Ltd 半導体集積回路
JP2001143477A (ja) * 1999-11-09 2001-05-25 Nec Corp 半導体装置
JP2003289245A (ja) * 2002-03-28 2003-10-10 Fujitsu Ltd リーク電流遮断回路を有する半導体集積回路
JP2004503996A (ja) * 2000-06-14 2004-02-05 アドバンスト・マイクロ・ディバイシズ・インコーポレイテッド 電気的負荷を順番にスイッチングするための制御回路

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02151115A (ja) * 1988-12-02 1990-06-11 Fujitsu Ltd 信号駆動方式
JPH07142982A (ja) * 1993-11-15 1995-06-02 Hitachi Ltd 出力回路
JP2001044822A (ja) * 1999-08-03 2001-02-16 Nec Shizuoka Ltd Ｃｍｏｓインバータ回路

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03266519A (ja) * 1990-03-16 1991-11-27 Oki Electric Ind Co Ltd 半導体集積回路
JP2001143477A (ja) * 1999-11-09 2001-05-25 Nec Corp 半導体装置
JP2004503996A (ja) * 2000-06-14 2004-02-05 アドバンスト・マイクロ・ディバイシズ・インコーポレイテッド 電気的負荷を順番にスイッチングするための制御回路
JP2003289245A (ja) * 2002-03-28 2003-10-10 Fujitsu Ltd リーク電流遮断回路を有する半導体集積回路

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010153535A (ja) * 2008-12-25 2010-07-08 Renesas Electronics Corp 半導体装置及びそのスイッチトランジスタの制御方法
JP2010183339A (ja) * 2009-02-05 2010-08-19 Kawasaki Microelectronics Inc 演算回路
JP2013066179A (ja) * 2011-09-16 2013-04-11 Samsung Electronics Co Ltd 電力制御回路、それを含む半導体装置及び該電力制御回路の動作方法

Also Published As

Publication number Publication date
US20100001782A1 (en) 2010-01-07
JPWO2008114342A1 (ja) 2010-06-24
JP4855514B2 (ja) 2012-01-18
US8258829B2 (en) 2012-09-04

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