WO2008105478A1 - 配線基板、電気信号伝送システムおよび電子機器 - Google Patents

配線基板、電気信号伝送システムおよび電子機器 Download PDF

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Publication number
WO2008105478A1
WO2008105478A1 PCT/JP2008/053450 JP2008053450W WO2008105478A1 WO 2008105478 A1 WO2008105478 A1 WO 2008105478A1 JP 2008053450 W JP2008053450 W JP 2008053450W WO 2008105478 A1 WO2008105478 A1 WO 2008105478A1
Authority
WO
WIPO (PCT)
Prior art keywords
wiring board
line conductor
conductor
electronic device
signal transmission
Prior art date
Application number
PCT/JP2008/053450
Other languages
English (en)
French (fr)
Inventor
Maraki Maetani
Original Assignee
Kyocera Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corporation filed Critical Kyocera Corporation
Priority to JP2009501287A priority Critical patent/JP4942811B2/ja
Publication of WO2008105478A1 publication Critical patent/WO2008105478A1/ja
Priority to US12/548,371 priority patent/US8013427B2/en

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0237—High frequency adaptations
    • H05K1/0245—Lay-out of balanced signal pairs, e.g. differential lines or twisted lines
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0237—High frequency adaptations
    • H05K1/025—Impedance arrangements, e.g. impedance matching, reduction of parasitic impedance
    • H05K1/0251—Impedance arrangements, e.g. impedance matching, reduction of parasitic impedance related to vias or transitions between vias and transmission lines
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09218—Conductive traces
    • H05K2201/09236—Parallel layout
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09218—Conductive traces
    • H05K2201/09263—Meander
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/095—Conductive through-holes or vias
    • H05K2201/09636—Details of adjacent, not connected vias
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/09672—Superposed layout, i.e. in different planes

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Structure Of Printed Boards (AREA)
  • Waveguide Connection Structure (AREA)
  • Waveguides (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

　本発明は、配線基板、電気信号伝送システムおよび電子機器に関する。配線基板１０は、誘電体基板１１、第１線路導体１２ａ、第１ビア導体１４ａ、第２線路導体１２ｂ、および第２ビア導体１４ｂを備え、第１線路導体１２ａと第２線路導体１２ｂとは中間層１７ｂの上下面１８，１９上に沿って設けられる。第１ビア導体１４ａは、誘電体基板１１の一方の主面１１ａから第１線路導体１２ａの一端部まで設けられる。また第２ビア導体１４ｂは、誘電体基板１１の一方の主面１１ａから第２線路導体１２ｂの一端部まで設けられ、第１線路導体１２ａの電気長は、第２線路導体１２ｂの電気長より大きく設定される。
PCT/JP2008/053450 2007-02-27 2008-02-27 配線基板、電気信号伝送システムおよび電子機器 WO2008105478A1 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2009501287A JP4942811B2 (ja) 2007-02-27 2008-02-27 配線基板、電気信号伝送システムおよび電子機器
US12/548,371 US8013427B2 (en) 2007-02-27 2009-08-26 Wiring board and electrical signal transmission system

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP2007-048090 2007-02-27
JP2007048090 2007-02-27
JP2007284054 2007-10-31
JP2007-284054 2007-10-31

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US12/548,371 Continuation-In-Part US8013427B2 (en) 2007-02-27 2009-08-26 Wiring board and electrical signal transmission system

Publications (1)

Publication Number Publication Date
WO2008105478A1 true WO2008105478A1 (ja) 2008-09-04

Family

ID=39721302

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2008/053450 WO2008105478A1 (ja) 2007-02-27 2008-02-27 配線基板、電気信号伝送システムおよび電子機器

Country Status (3)

Country Link
US (1) US8013427B2 (ja)
JP (1) JP4942811B2 (ja)
WO (1) WO2008105478A1 (ja)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010087615A (ja) * 2008-09-29 2010-04-15 Kyocera Corp 差動伝送用接続構造体
FR2950219A1 (fr) * 2009-09-11 2011-03-18 Thales Sa Interconnexion pour circuit imprime haute frequence
JP2015216362A (ja) * 2014-05-08 2015-12-03 富士通株式会社 差動ビアを含む回路及びその形成方法
JP2017539068A (ja) * 2014-11-06 2017-12-28 ローゼンベルガー ホーフフレクベンツテクニーク ゲーエムベーハー ウント ツェーオー カーゲー 電気的インターフェース
WO2022003904A1 (ja) * 2020-07-02 2022-01-06 日本電信電話株式会社 配線構造
WO2022003905A1 (ja) * 2020-07-02 2022-01-06 日本電信電話株式会社 配線基板および信号接続構造

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8847696B2 (en) * 2002-03-18 2014-09-30 Qualcomm Incorporated Flexible interconnect cable having signal trace pairs and ground layer pairs disposed on opposite sides of a flexible dielectric
US20120160542A1 (en) * 2010-12-22 2012-06-28 Oluwafemi Olufemi B Crosstalk reduction on microstrip routing
CN102291931B (zh) * 2011-03-23 2013-12-18 威盛电子股份有限公司 差动对信号传输结构、线路板及电子模块
US8595682B2 (en) 2011-12-19 2013-11-26 International Business Machines Corporation Phase compensation in a differential pair of transmission lines
TWI449475B (zh) * 2012-01-09 2014-08-11 Novatek Microelectronics Corp 電路板
US20140034363A1 (en) * 2012-08-01 2014-02-06 Samtec, Inc. Multi-layer transmission lines
CN108475876B (zh) * 2015-11-06 2021-11-30 安费诺富加宜（亚洲）私人有限公司 包括散热孔的电连接器
US10410683B2 (en) * 2017-12-14 2019-09-10 Seagate Technology Llc Tightly coupled differential vias
JP7061459B2 (ja) * 2017-12-25 2022-04-28 日本航空電子工業株式会社 回路基板、コネクタ組立体及びケーブルハーネス
JP2024034696A (ja) * 2022-09-01 2024-03-13 株式会社日立製作所 プリント配線板および情報処理装置

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4326989A1 (de) * 1992-09-23 1994-03-24 Siemens Ag Leiterplatte
JP2001211211A (ja) * 2000-01-27 2001-08-03 Kanji Otsuka ドライバ回路、レシーバ回路、および信号伝送バスシステム
JP2002084108A (ja) * 2000-07-05 2002-03-22 Matsushita Electric Ind Co Ltd 伝送線路チップとその製造方法及びマルチチップモジュール
JP2002141711A (ja) * 2000-10-31 2002-05-17 Mitsubishi Electric Corp 差動ストリップ線路垂直変換器および光モジュール
JP2004014800A (ja) * 2002-06-06 2004-01-15 Mitsubishi Electric Corp 多層配線基板
US20040189418A1 (en) * 2003-03-27 2004-09-30 International Business Machines Corporation Method and structure for implementing enhanced differential signal trace routing
JP2004304233A (ja) * 2003-03-28 2004-10-28 Mitsubishi Electric Corp 伝送線路、および半導体装置

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* Cited by examiner, † Cited by third party
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JPH0998457A (ja) * 1995-09-29 1997-04-08 Oki Electric Ind Co Ltd 印刷配線板配線方法およびマトリクス端子配線方法
JPH11163539A (ja) * 1997-11-25 1999-06-18 Kyocera Corp 多層配線基板
US20020041009A1 (en) 2000-07-05 2002-04-11 Matsushita Electric Industrial Co., Ltd Transmission line assembly chip and a manufacturing method thereof in a multi-chip module
US6396000B1 (en) * 2000-09-11 2002-05-28 Hewlett-Packard Co. Printed circuit board and method for reducing radio frequency interference emissions from conductive traces on a printed circuit board
JP2003204209A (ja) * 2002-01-07 2003-07-18 Kyocera Corp 高周波用配線基板
JP2005051496A (ja) 2003-07-28 2005-02-24 Kanji Otsuka 信号伝送システム及び信号伝送線路

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4326989A1 (de) * 1992-09-23 1994-03-24 Siemens Ag Leiterplatte
JP2001211211A (ja) * 2000-01-27 2001-08-03 Kanji Otsuka ドライバ回路、レシーバ回路、および信号伝送バスシステム
JP2002084108A (ja) * 2000-07-05 2002-03-22 Matsushita Electric Ind Co Ltd 伝送線路チップとその製造方法及びマルチチップモジュール
JP2002141711A (ja) * 2000-10-31 2002-05-17 Mitsubishi Electric Corp 差動ストリップ線路垂直変換器および光モジュール
JP2004014800A (ja) * 2002-06-06 2004-01-15 Mitsubishi Electric Corp 多層配線基板
US20040189418A1 (en) * 2003-03-27 2004-09-30 International Business Machines Corporation Method and structure for implementing enhanced differential signal trace routing
JP2004304233A (ja) * 2003-03-28 2004-10-28 Mitsubishi Electric Corp 伝送線路、および半導体装置

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010087615A (ja) * 2008-09-29 2010-04-15 Kyocera Corp 差動伝送用接続構造体
FR2950219A1 (fr) * 2009-09-11 2011-03-18 Thales Sa Interconnexion pour circuit imprime haute frequence
EP2299791A1 (fr) * 2009-09-11 2011-03-23 Thales Interconnexion pour circuit imprimé haute fréquence
US8957324B2 (en) 2009-09-11 2015-02-17 Thales Interconnect for high-frequency printed circuit
JP2015216362A (ja) * 2014-05-08 2015-12-03 富士通株式会社 差動ビアを含む回路及びその形成方法
JP2017539068A (ja) * 2014-11-06 2017-12-28 ローゼンベルガー ホーフフレクベンツテクニーク ゲーエムベーハー ウント ツェーオー カーゲー 電気的インターフェース
US10230183B2 (en) 2014-11-06 2019-03-12 Rosenberger Hochfrequenztechnik Gmbh & Co. Kg Electrical interposer
WO2022003904A1 (ja) * 2020-07-02 2022-01-06 日本電信電話株式会社 配線構造
WO2022003905A1 (ja) * 2020-07-02 2022-01-06 日本電信電話株式会社 配線基板および信号接続構造
JP7424492B2 (ja) 2020-07-02 2024-01-30 日本電信電話株式会社 配線構造

Also Published As

Publication number Publication date
JPWO2008105478A1 (ja) 2010-06-03
US8013427B2 (en) 2011-09-06
JP4942811B2 (ja) 2012-05-30
US20090315158A1 (en) 2009-12-24

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