WO2007105261A1 - Method of dry etching of interlayer insulation film - Google Patents
Method of dry etching of interlayer insulation film Download PDFInfo
- Publication number
- WO2007105261A1 WO2007105261A1 PCT/JP2006/304625 JP2006304625W WO2007105261A1 WO 2007105261 A1 WO2007105261 A1 WO 2007105261A1 JP 2006304625 W JP2006304625 W JP 2006304625W WO 2007105261 A1 WO2007105261 A1 WO 2007105261A1
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- WO
- WIPO (PCT)
- Prior art keywords
- gas
- etching
- insulating film
- interlayer insulating
- dry etching
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31105—Etching inorganic layers
- H01L21/31111—Etching inorganic layers by chemical means
- H01L21/31116—Etching inorganic layers by chemical means by dry-etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31127—Etching organic layers
- H01L21/31133—Etching organic layers by chemical means
- H01L21/31138—Etching organic layers by chemical means by dry-etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31144—Etching the insulating layers by chemical or physical means using masks
Definitions
- the present invention relates to a method for dry etching an interlayer insulating film, and in particular, finely processes holes and trenches by dry etching an interlayer insulating film covered with a resist mask formed using an ArF photolithographic method.
- Background art on dry etching method of interlayer insulating film is referred to a method for dry etching an interlayer insulating film, and in particular, finely processes holes and trenches by dry etching an interlayer insulating film covered with a resist mask formed using an ArF photolithographic method.
- Non-Patent Document 1 a resist material that does not have a benzene ring and has a compound in order to provide sensitivity in the vacuum ultraviolet region.
- Patent Document 1 Japanese Patent Application Laid-Open No. 11-31678 (for example, refer to the description of claims)
- Patent Document 2 Japanese Patent Application No. 2004-56962 (for example, refer to the description of claims)
- Non-Patent Document l Koji Nozaki and Ei Yano, FUJITSU Sei.Tech.J., 38,1 P3- 12 (June 200
- an object of the present invention is to provide a dry etching method for an interlayer insulating film that can suppress the occurrence of striation and obtain high etching processing accuracy.
- the interlayer insulating film dry etching method of the present invention introduces a predetermined etching gas into the interlayer insulating film covered with a resist mask formed by using ArF photolithography.
- the etching gas is a halogen-based gas (norogens are F, I, Br), At least one of I and Br is characterized by using a fluorocarbon compound gas in which the atomic composition ratio is 26% or less of the total amount of halogen and the remainder is F.
- etching gas a fluorocarbon compound gas containing at least one of I and Br that forms a stable compound and has a function as an etchant for Si itself is used.
- the density of F atoms in the plasma atmosphere damage to the resist mask can be reduced, and the occurrence of striation can be suppressed.
- at least one of I and Br is contained in an atomic composition ratio exceeding 26% of the total amount of halogen, there are problems such as a decrease in etching speed and inability to perform etching in a desired shape. .
- the fluorocarbon compound gas is preferably one of an iodinated fluorocarbon compound gas and a brominated fluorinated carbon compound gas, or a mixed gas thereof.
- the iodinated fluorocarbon compound gas is CF I
- the brominated fluorocarbon compound gas is CF Br Br r r
- the etching gas may be a mixed gas of CF and CFI or CFFr.
- the etching gas may be a mixed gas of at least one of HI and HBr and a fluorocarbon compound.
- the etching gas may be a mixed gas of CF I and a fluorocarbon compound.
- the etching gas may be a mixed gas of CFBr and a fluorocarbon compound.
- the etching gas is used with respect to the total flow rate of the etching gas.
- Oxygen should be added in the range of 3 to 15%. In this case, if it is less than 3%, the above effect cannot be achieved, and the amount of deposition cannot be adjusted. On the other hand, if it exceeds 15%, the ArF resist will be damaged and etched. The invention's effect
- the dry etching method for an interlayer insulating film according to the present invention has the effect of suppressing the generation of striation and obtaining high etching processing accuracy.
- FIG. 1, 1 shows that the interlayer insulating film of the present invention is dry-etched and arranged.
- This is an etching apparatus for finely processing line holes, trenches, and the like.
- the etching apparatus 1 uses discharge plasma (NLD plasma) generated in an area including zero magnetic field, and has a chamber 11 provided with a vacuum exhaust means 12 such as a dry pump, a rotary pump, or a turbo molecular pump.
- NLD plasma discharge plasma
- the chamber 11 includes an upper plasma generation chamber 11a formed by a cylindrical side wall 13 made of a dielectric material such as quartz, and a lower substrate processing chamber ib.
- Three magnetic field coils 14, 15, 16 are provided outside the cylindrical side wall 13 at predetermined intervals to constitute a magnetic field generating means.
- the three magnetic field coils 14, 15 and 16 are attached to a yoke member 17 made of a high magnetic permeability material so as to surround the outside from above and below.
- a current in the same direction is supplied to the upper and lower magnetic field coils 14 and 16, and a reverse current is supplied to the intermediate coil 15.
- a continuous magnetic field zero position is formed inside the cylindrical side wall 13 near the level of the intermediate coil 15, and an annular magnetic neutral line is formed.
- the size of the annular magnetic neutral wire can be set as appropriate by changing the ratio of the current passed through the upper and lower coils 14, 16 and the current passed through the intermediate coil 15.
- the vertical position can be appropriately set according to the ratio of the currents flowing through the upper and lower magnetic field coils 14 and 16. Further, as the current flowing through the intermediate coil 15 is increased, the diameter of the annular magnetic neutral wire decreases, and at the same time, the gradient of the magnetic field at the zero magnetic field position becomes gentler.
- An antenna 18 for generating a high-frequency electric field is provided between the intermediate coil 15 and the cylindrical side wall 13 and connected to a high-frequency power source 19 to constitute a magnetic field generating means. Then, NLD plasma is generated along the annular magnetic neutral line formed by the three magnetic field coils 14, 15 and 16
- a substrate electrode 20 having a circular cross section which is a substrate mounting portion on which the processing substrate S is mounted, is interposed via an insulator 20a.
- the substrate electrode 20 is connected to the second high-frequency power source 22 via the capacitor 21 and becomes a floating electrode in terms of potential and has a negative noise potential.
- the top plate 23 that partitions the plasma generation chamber 11a is hermetically fixed to the upper part of the cylindrical side wall, and is in a floating state in potential to form a counter electrode.
- a gas introducing means 24 for introducing an etching gas into the chamber 11 is provided on the inner surface of the top plate. It is connected to a gas source through a gas flow rate control means (not shown).
- an oxide film such as SiO, or spin coating such as HSQ or MSQ is used as an interlayer insulating film in which holes and trenches for wiring are finely processed using the etching apparatus 1.
- the formed SiOCH-based material, or SiOC-based material formed by CVD is a low-k material having a relative dielectric constant of 1.5 to 3.0, and includes a porous material.
- SiOCH-based material examples include, for example, trade name NCSZ catalyst manufactured by Kosei Kogyo Co., Ltd., trade name LKD 5109r5ZjSR, trade name HSG-7000 / Hitachi Chemical Co., Ltd., trade name HOSP / Honeywell Electric Materials Sento Trade name: Nanoglassz Honeywell Electric Materials, trade name: OCD T—12Z, manufactured by Tokyo Ohkasha, trade name: OCD T—32Z, manufactured by Tokyo Ohkasha, trade name: IPS2. 4Z Catalyst Chemical Industries, trade name: IPS2. 2Z catalyst There are products made by Kasei Kogyo Co., Ltd., trade name ALC AP—S5100Z Asahi Kasei Co., Ltd.
- SiOC-based material examples include, for example, trade name Aurola 2. 7 / manufactured by ASM Japan, trade name Aurol a2. 4Z manufactured by ASM Japan, trade name Orion 2. 7ZTRIKON, trade name CoralZNovellf, trade name Black There are DiamondZAMAT products. Also, organic products such as trade name SiLKZDow Chemical, trade name Porous-SiLKZDow Chemical, trade name FLAREZHoneywell Electric Materials, trade name Porous FLAREZHoneywell Electric Materials, trade name GX-3PZHoneywell Electric Materials, etc. It may be a low dielectric constant interlayer insulating film.
- a resist mask is formed with a predetermined pattern using a photolithography method in order to finely process wiring holes and trenches in the interlayer insulating film.
- the photolithography method the ArF photolithography method should be used to cope with the miniaturization and multi-layering of semiconductor elements due to higher integration and higher speed of LSI.
- As a resist material for ArF photolithography for example, there is UV-6ZShipley Co., Ltd. for vacuum ultraviolet light.
- the resist material used in the ArF photolithography method may be composed of a compound that does not have a benzene ring in order to provide sensitivity in the vacuum ultraviolet region.
- This type of resist material when fine patterning is performed using a laser with a short wavelength, causes the resist mask to become brittle and is used in other photolithography methods. Plasma resistance is low compared to those.
- a conventional dry etching method for an interlayer insulating film that is, an inductively coupled (ICP plasma) etching apparatus (not shown), for example, and fluorocarbon gas under an operating pressure of 1 to 3 Pa.
- ICP plasma inductively coupled
- etching is carried out by introducing an etching gas containing (CxFy) in a plasma atmosphere (in this case, the Ar plasma density is ⁇ IX lOUcnT 3 ), it is exposed to plasma as shown in FIG.
- edge roughness 33 occurs at the edge 32 of the patterned region of the resist mask 31 (the shape of the resist mask 31 changes).
- the output of the high-frequency power source 19 connected to the antenna 18 is usually 1 to 1.5 KW under an operating pressure of 0.3 to 0.7 Pa.
- the output (bias power) of the second high-frequency power source 22 is set to 0.2 to 0.6 KW, and the Ar plasma density at this time is ⁇ 1 X ⁇ ⁇ ⁇ 3 .
- the working pressure is set lower than that of the conventional method, the plasma density is reduced.
- the etching apparatus 1 since an efficient annular magnetic neutral discharge plasma is obtained, the amount of decrease in the plasma density is small.
- the ion current density in the etching apparatus 1 is almost the same as that of the ICP plasma etching apparatus that cannot suppress the generation of streaking, and the output of the second high-frequency power source 22 is 0.3 KW.
- the ion energy when set to ⁇ is LKeV, and high-energy ion collisions with the resist mask 31 are occurring. Therefore, when the NLD plasma etching apparatus 1 is used to etch the interlayer insulating film, it is considered that streaking occurs.
- the decomposition species generated by decomposing CxFy gas include F, CF, CF, CF, etc.
- molecular radicals are mainly used as polymerization precursors.
- CFI is used as an etching gas.
- the resist mask etching rate decreases and the resist selectivity increases.
- the F radical which is an etchant of the resist mask, reacts with I in the gas phase to form IF, IF, IF, etc.
- a halogen-based gas (a nitrogen is F is used as an etching gas). , I, Br), and at least one of I and Br.
- Fluorocarbon compound gas particularly Iodinated fluorinated carbon compound, in which the atomic yarn and the composition ratio are 26% or less of the total amount of halogen, and the remainder is F.
- gas and brominated fluorocarbon compound gas, or a mixed gas of these was used.
- the iodinated fluorocarbon compound gas and the brominated fluorocarbon compound gas are C (Hal) n 2n + 2
- At least one selected from Br, C F I and C F Br, or their fluorocarbons are selected from Br, C F I and C F Br, or their fluorocarbons
- a mixed gas containing two or more selected from a compound gas and HI or Br is preferable. If the number of n exceeds 3, problems such as contamination of the chamber 11 occur during etching, which is not practical.
- brominated fluids such as iodinated fluorocarbon compound gas such as C FI and C F Br.
- Carbon compound gas can also be used.
- CF gas or the like is added so that the atomic composition ratio is 26% or less of the total amount of halogen.
- a small amount of oxygen is added to the fluorocarbon compound gas in order to prevent etching holes and trenches from being filled by adjusting the amount of reaction product deposited by etching. It is preferable.
- the amount of oxygen added is set in a range of 3 to 15%, preferably 3 to 10%, more preferably 4 to 7% of the total flow rate of the gas introduced into the chamber 11. The If it is less than 3%, the above effect cannot be achieved, and the amount of deposition cannot be adjusted. other On the other hand, if it exceeds 15%, the ArF resist will be damaged and etched.
- Example 1
- Example 1 SiO is used as an interlayer insulating film, and a processing substrate is used by using a spin coater.
- a resist material was applied onto the interlayer insulating film by a spin coater, and a predetermined pattern was formed by an ArF photolithographic method to form a resist mask.
- the resist material was UV-6 for vacuum ultraviolet light, and the thickness was 500 nm.
- the interlayer insulating film was etched to form holes.
- the flow rate of Ar was set to 230 sccm
- the flow rate of CFI was set to 50 sccm
- the flow rate of oxygen was set to 20 sccm. Also plasma generation
- the output of the high-frequency power source 19 connected to the high-frequency antenna coil 18 was set to 1 KW
- the output of the high-frequency power source 22 connected to the substrate electrode 21 was set to 0.3 KW
- the substrate set temperature was 10 ° C.
- an interlayer insulating film and a resist mask are formed under the same conditions as in the above-described example 1, and an interlayer is formed under the same conditions as in the above-described example 1 using the NLD etching apparatus 1 shown in FIG.
- the insulating film was etched.
- C F instead of C F I is used as the etching gas.
- FIG. 3 and 4 are SEM photographs when the interlayer insulating film is etched under the conditions of Example 1 and Comparative Example 1.
- FIG. 4 it was confirmed that, in Comparative Example 1, edge roughness was generated at the edge portion of the patterned area of the resist mask by etching, and streaks were generated in the holes (FIG. 4 ( In contrast, in Example 1, it can be seen that edge roughness at the edge is suppressed, and the occurrence of streaking is suppressed (Figs. 3 (b) and (c)). See).
- the interlayer insulating film and the resist mask were formed under the same conditions as in the first embodiment, and the interlayer insulating film was etched under the same conditions as in the first embodiment using the etching apparatus 1 shown in FIG.
- the pressure in the chamber 11 was set to 0.67 Pa. In this case, the etching rate was slightly increased, and the generation of streaking could be suppressed.
- instead of I use Br But the same result was obtained.
- FIG. 1 is a view schematically showing an etching apparatus for carrying out an interlayer insulating film etching method of the present invention.
- FIG. 2 is a diagram schematically illustrating the occurrence of striations.
- FIG. 3 (a) to (c) are SEM photographs when the interlayer insulating film is etched according to Example 1.
- FIG. 4 (a) to (c) are SEM photographs when the interlayer insulating film is etched according to Comparative Example 1. Explanation of symbols
Abstract
Description
Claims
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PCT/JP2006/304625 WO2007105261A1 (en) | 2006-03-09 | 2006-03-09 | Method of dry etching of interlayer insulation film |
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PCT/JP2006/304625 WO2007105261A1 (en) | 2006-03-09 | 2006-03-09 | Method of dry etching of interlayer insulation film |
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2009088660A1 (en) * | 2008-01-04 | 2009-07-16 | Micron Tecnology, Inc. | Method of etching a high aspect ratio contact |
CN101692423B (en) * | 2008-02-12 | 2011-08-31 | 东京毅力科创株式会社 | Plasma etching method |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
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JPS61123142A (en) * | 1984-11-20 | 1986-06-11 | Matsushita Electric Ind Co Ltd | Dry etching method |
JPH11340211A (en) * | 1998-03-27 | 1999-12-10 | Nec Corp | Treatment method and apparatus for substrate |
JP2003051495A (en) * | 2001-06-28 | 2003-02-21 | Hynix Semiconductor Inc | Forming method for contact hole of semiconductor element |
JP2006032721A (en) * | 2004-07-16 | 2006-02-02 | Matsushita Electric Ind Co Ltd | Fabrication process of semiconductor device |
-
2006
- 2006-03-09 WO PCT/JP2006/304625 patent/WO2007105261A1/en active Application Filing
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
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JPS61123142A (en) * | 1984-11-20 | 1986-06-11 | Matsushita Electric Ind Co Ltd | Dry etching method |
JPH11340211A (en) * | 1998-03-27 | 1999-12-10 | Nec Corp | Treatment method and apparatus for substrate |
JP2003051495A (en) * | 2001-06-28 | 2003-02-21 | Hynix Semiconductor Inc | Forming method for contact hole of semiconductor element |
JP2006032721A (en) * | 2004-07-16 | 2006-02-02 | Matsushita Electric Ind Co Ltd | Fabrication process of semiconductor device |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2009088660A1 (en) * | 2008-01-04 | 2009-07-16 | Micron Tecnology, Inc. | Method of etching a high aspect ratio contact |
GB2468458A (en) * | 2008-01-04 | 2010-09-08 | Micron Technologies Inc | Method of etching a high aspect ratio contact |
GB2468458B (en) * | 2008-01-04 | 2013-02-20 | Micron Technologies Inc | Method of etching a high aspect ratio contact |
US8614151B2 (en) | 2008-01-04 | 2013-12-24 | Micron Technology, Inc. | Method of etching a high aspect ratio contact |
US20140077126A1 (en) * | 2008-01-04 | 2014-03-20 | Micron Technology, Inc. | Method of etching a high aspect ratio contact |
CN101692423B (en) * | 2008-02-12 | 2011-08-31 | 东京毅力科创株式会社 | Plasma etching method |
CN102254813A (en) * | 2008-02-12 | 2011-11-23 | 东京毅力科创株式会社 | Plasma etching method |
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