WO2006128477A1 - Phase-locked filter and phase-locked loop - Google Patents

Phase-locked filter and phase-locked loop Download PDF

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Publication number
WO2006128477A1
WO2006128477A1 PCT/EP2005/005776 EP2005005776W WO2006128477A1 WO 2006128477 A1 WO2006128477 A1 WO 2006128477A1 EP 2005005776 W EP2005005776 W EP 2005005776W WO 2006128477 A1 WO2006128477 A1 WO 2006128477A1
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Prior art keywords
loop filter
capacitor
common node
branch
filter
Prior art date
Application number
PCT/EP2005/005776
Other languages
French (fr)
Inventor
Bardo MÜLLER
Bernd Germann
Walter Marton
Original Assignee
Fujitsu Limited
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Priority to PCT/EP2005/005776 priority Critical patent/WO2006128477A1/en
Publication of WO2006128477A1 publication Critical patent/WO2006128477A1/en

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Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H1/00—Constructional details of impedance networks whose electrical mode of operation is not specified or applicable to more than one type of network
    • H03H1/02—Constructional details of impedance networks whose electrical mode of operation is not specified or applicable to more than one type of network of RC networks, e.g. integrated networks
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H19/00—Networks using time-varying elements, e.g. N-path filters
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/093—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using special filtering or amplification characteristics in the loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/10—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
    • H03L7/107—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using a variable transfer function for the loop, e.g. low pass filter having a variable bandwidth
    • H03L7/1075—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using a variable transfer function for the loop, e.g. low pass filter having a variable bandwidth by changing characteristics of the loop filter, e.g. changing the gain, changing the bandwidth

Definitions

  • the invention relates to a novel phase-locked (PLL) loop filter and to a phase-locked loop (PLL) .
  • Second and third order loop filters are very popular because of their good phase noise suppression, simplicity and hence low cost. They have an input end and an output end, a first branch comprising a first capacitor the other end of which is connected to ground, a second branch comprising a resistor and a second capacitor the other end of which is connected to ground, a second resistance, a third branch comprising a third capacitor the other end of which is connected to ground.
  • WO 2004/079914 Al discloses a phase-locked loop circuit having two loop filters of the same design but of different transfer characteristics due to different values for their circuit components. These loop filters act alternatively.
  • the first loop filter has small capacitors and is able to follow sudden changes quickly and shorten the lock time.
  • the second loop filter has large capacitors for the slow filter path. In this filter arrangement the voltage of the first, high-bandwidth loop filter is copied onto the second loop filter having a lower bandwidth.
  • an operational amplifier in unity-gain configuration (voltage follower) is used which enforces its input voltage onto its output.
  • the slow filter is disconnected from the copy amplifier output.
  • the VCO input is then switched from the output of the fast filter to the output of the slow filter.
  • This object is achieved by a loop filter having an input end and an output end, a first branch comprising a first capacitor the other end of which is connected to a common node, a second branch comprising a resistor the other end of which is connected to the common node, a second resistance, a third branch comprising a third capacitor the other end of which is connected to a common node, wherein the common node is connected to a second capacitor the other end of which is connected to ground.
  • This filter shows the advantage that it can be charged in a substantially shorter time by applying a voltage to the common node. Further, it shows the advantage that only a single additional switch and pin are required.
  • a filter circuit arrangement comprising a first fast loop filter with a high bandwidth and a second slow loop filter with a low bandwidth, the fast loop filter having the standard structure (but not limited to) and the low bandwidth loop filter having different structure and comprising switching means to switch between the first loop filter and the second loop filter.
  • the first loop filter comprises an input end and an output end, a first branch comprising a first capacitor the other end of which is connected to ground, a second branch comprising a resistor and a second capacitor the other end of which is connected to ground, a second resistance, a third branch comprising a third capacitor the other end of which is connected to ground, and the second loop filter comprises an input end and an output end, a first branch comprising a first capacitor the other end of which is connected to a common node, a second branch comprising a resistor the other end of which is connected to the common node, a second resistance, a third branch comprising a third capacitor the other end of which is connected to a common node, wherein the common node is connected to a second capacitor the other end of which is connected to ground.
  • Copying the voltage from a point of the first fast loop filter to the second slow loop filter can be achieved with a single additional pin and switch. It can be done by a single copy action of one point of the fast loop filter to the common node of the slow filter.
  • the voltage copying to the novel slow filter loop happens very fast.
  • the voltage on the common capacitor node changes almost instantaneously, depending on the current sourcing or sinking capability of the copy amplifier.
  • the relaxation of the other capacitances is minimized because they all connect to the common node.
  • novel loop filter topology can be used on any higher order loop filter. It can be used, e.g. on a 2 nd order loop filter which is simply the 3 rd order loop filter without the rightmost resistance R and capacitor C. Everything stated equally applies accordingly.
  • Protection is also claimed for a second order loop filter having an input end and an output end, a first branch comprising a first capacitor the other end of which is connected to a common node, a second branch comprising a resistor the other end of which is connected to the common node, wherein the common node is connected to a second capacitor the other end of which is connected to ground.
  • the input end voltage is identical to the output end voltage.
  • Fig. 1 shows a standard third order loop filter
  • Fig. 2 shows a filter arrangement used in the PLL of WO 2004/079914 Al, the filter arrangement consisting essentially of two standard third order loop filters having the same structure,
  • Fig. 3 shows the relaxation of voltages of several filter nodes of Fig. 3
  • Fig. 4 shows the novel loop filter according to the present invention
  • Fig. 5 shows the relaxation of node voltages of the novel loop filter according to the present invention
  • Fig. 6 shows the double loop filter arrangement according to the invention, consisting of a standard third order loop filter and a novel loop filter according to the present invention.
  • Fig. 1 shows a typical 3rd order loop filter.
  • the ratio between cap2/capl is usually in the range of 10, independently of the chosen bandwidth.
  • WO 2004/079914 Al uses the idea of "copying" the voltage of a relaxed first fast loop filter (i.e. when PLL is locked), having a high bandwidth, onto a slow loop filter having the same structure but different dimensioning and low bandwidth, as shown in Fig. 2.
  • This filter arrangement has an input end IN receiving I cp of the charge pump of the PLL and an output end OUT outputting the signal U LF controlling the VCO.
  • Switches Sl and S2 are operable to switch between the first fast loop filter (upper part) and the second slow loop filter (lower part) .
  • This publication further provides switches S3, S4, S5 to short the capacitor nodes in order to avoid the resulting delay by- relaxation, when applying a copy voltage only to the biggest value capacitor C5 in the circuit.
  • a voltage follower VF has its input connected to a voltage point of the first fast loop filter and its output is connected to switches S3, S4, S5.
  • Fig. 3 shows the relaxation of voltages on several filter capacitors when a voltage copy takes place only to cap2 , which is the best choice in terms of delay because having the highest value .
  • V(cap2) Loading of V(cap2) is determined by the copy amplifier.
  • the relaxation of V(capl) is determined by the time constant of res2 times capl.
  • the relaxation of V(cap2) is determined by the time constant of (res2+res3) times cap3. Loading of all three node takes up to the time t3. It is after this time when the slow loop filter is ready to be switched into the phase locked loop without causing disturbances.
  • Fig. 4 shows the new novel filter loop filter according to the present invention. It consists of loop filter having an input end IN and an output end OUT, a first branch comprising a first capacitor capB the other end of which is connected to a common node N, a second branch comprising a resistor resB the other end of which is connected to the common node N, a second resistor resC, a third branch comprising a third capacitor capC the other end of which is connected to a common node N, wherein the common node is connected to a second capacitor capB the other end of which is connected to ground.
  • a single copy path to the common node N enforces the desired voltage onto the second capacitor capA.
  • DC paths to ground as provided in the old standard structure are broken up for capacitors capl and cap3 , and the two capacitors result in capB and capC, referencing to the common node N at the capacitor capA .
  • V(B) is the output of charge pump and input of loop filter
  • V(C) is the output of loop filter, connected to VCO
  • Fig. 6 shows an example of the double loop filter arrangement according to the present invention, having a standard third order fast loop filter for lock acquisition and the slow, low bandwidth filter according to the present invention.
  • This Fig. 6 shows also the copying process by electrical short connection between a voltage point of the first fast loop filter and the second slow loop filter.

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  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)

Abstract

This order loop filter having an input end and an output end, a first branch comprising a first capacitor the other end of which is connected to a common node, a second branch comprising a first resistor the other end of which is connected to the common node, a second resistor, a third branch comprising a third capacitor the other end of which is connected to a common node, wherein the common node is connected to a second capacitor the other end of which is connected to ground.

Description

PHASE - LOCKED FILTER AND PHASE - LOCKED LOOP
The invention relates to a novel phase-locked (PLL) loop filter and to a phase-locked loop (PLL) .
Second and third order loop filters are very popular because of their good phase noise suppression, simplicity and hence low cost. They have an input end and an output end, a first branch comprising a first capacitor the other end of which is connected to ground, a second branch comprising a resistor and a second capacitor the other end of which is connected to ground, a second resistance, a third branch comprising a third capacitor the other end of which is connected to ground.
This topology appears as a reference for calculation formulas and also for the calculation software of multiple PLL - IC manufacturers. It is the standard loop filter for PLLs; see "Phase-Locked Loops" Roland Best, McGraw Hill, 2003.
However, this topology becomes disadvantageous when a fast voltage change has to be applied/enforced to the loop filter capacitors. This requirement arises e.g. when the PLL output has to quickly switch to a different frequency. With a single loop filter fast lock/acquisition and good phase noise suppression are at a trade-off in phase-locked loops (PLL) . Therefore, arrangements allowing changing the effective loop filter bandwidth are needed.
WO 2004/079914 Al discloses a phase-locked loop circuit having two loop filters of the same design but of different transfer characteristics due to different values for their circuit components. These loop filters act alternatively. The first loop filter has small capacitors and is able to follow sudden changes quickly and shorten the lock time. The second loop filter has large capacitors for the slow filter path. In this filter arrangement the voltage of the first, high-bandwidth loop filter is copied onto the second loop filter having a lower bandwidth.
For copying, an operational amplifier in unity-gain configuration (voltage follower) is used which enforces its input voltage onto its output. Once the copy is finished, the slow filter is disconnected from the copy amplifier output. The VCO input is then switched from the output of the fast filter to the output of the slow filter.
Figure imgf000003_0001
In order to guarantee a stable VCO frequency right after switching to the slow filter, relaxation effects between the loop filter capacitors must have died out. Such transients can be avoided by copying simultaneously to all nodes of the fast filter. However, the required PLL loop filter capacitances are generally too large to reside on chip. The several additional pins then required make this arrangement impractical .
It is an object of the present invention to provide a novel loop filter, especially apt for the use in PLLs, which permits a fast charging of the capacitors. This object is achieved by a loop filter having an input end and an output end, a first branch comprising a first capacitor the other end of which is connected to a common node, a second branch comprising a resistor the other end of which is connected to the common node, a second resistance, a third branch comprising a third capacitor the other end of which is connected to a common node, wherein the common node is connected to a second capacitor the other end of which is connected to ground.
This filter shows the advantage that it can be charged in a substantially shorter time by applying a voltage to the common node. Further, it shows the advantage that only a single additional switch and pin are required.
Further, it is an objective of the present invention to provide a double loop filter arrangement avoiding the disadvantages of the known double filter arrangement.
This object is achieved by a filter circuit arrangement, comprising a first fast loop filter with a high bandwidth and a second slow loop filter with a low bandwidth, the fast loop filter having the standard structure (but not limited to) and the low bandwidth loop filter having different structure and comprising switching means to switch between the first loop filter and the second loop filter.
This filter arrangement yields the advantage of freedom of design. It overcomes the common judgement of the man in the art that loop filters in a PLL must be exactly the standard 3rd order loop filters. According to a further development of the present invention the first loop filter comprises an input end and an output end, a first branch comprising a first capacitor the other end of which is connected to ground, a second branch comprising a resistor and a second capacitor the other end of which is connected to ground, a second resistance, a third branch comprising a third capacitor the other end of which is connected to ground, and the second loop filter comprises an input end and an output end, a first branch comprising a first capacitor the other end of which is connected to a common node, a second branch comprising a resistor the other end of which is connected to the common node, a second resistance, a third branch comprising a third capacitor the other end of which is connected to a common node, wherein the common node is connected to a second capacitor the other end of which is connected to ground.
This embodiment has a number of advantages :
Copying the voltage from a point of the first fast loop filter to the second slow loop filter can be achieved with a single additional pin and switch. It can be done by a single copy action of one point of the fast loop filter to the common node of the slow filter.
The voltage copying to the novel slow filter loop happens very fast. The voltage on the common capacitor node changes almost instantaneously, depending on the current sourcing or sinking capability of the copy amplifier. In the new filter structure, the relaxation of the other capacitances is minimized because they all connect to the common node.
Further, it is to be noted that the novel loop filter topology can be used on any higher order loop filter. It can be used, e.g. on a 2nd order loop filter which is simply the 3rd order loop filter without the rightmost resistance R and capacitor C. Everything stated equally applies accordingly.
Protection is also claimed for a second order loop filter having an input end and an output end, a first branch comprising a first capacitor the other end of which is connected to a common node, a second branch comprising a resistor the other end of which is connected to the common node, wherein the common node is connected to a second capacitor the other end of which is connected to ground.
In this embodiment the input end voltage is identical to the output end voltage.
The present invention is further described hereinafter with reference to embodiments shown in the accompanying drawings in which:
Fig. 1 shows a standard third order loop filter,
Fig. 2 shows a filter arrangement used in the PLL of WO 2004/079914 Al, the filter arrangement consisting essentially of two standard third order loop filters having the same structure,
Fig. 3 shows the relaxation of voltages of several filter nodes of Fig. 3
Fig. 4 shows the novel loop filter according to the present invention, Fig. 5 shows the relaxation of node voltages of the novel loop filter according to the present invention and
Fig. 6 shows the double loop filter arrangement according to the invention, consisting of a standard third order loop filter and a novel loop filter according to the present invention.
Fig. 1 shows a typical 3rd order loop filter. The ratio between cap2/capl is usually in the range of 10, independently of the chosen bandwidth.
Since this topology appears as a reference for calculation formula, see reference Roland Best, and also for the calculation software of multiple PLL - IC manufacturers, it can be considered as the standard third order loop filter.
However, this topology becomes disadvantageous when a fast voltage change has to be applied or enforced to the loop filter capacitors .
With a single loop filter having a single bandwidth, fast lock/acquisition and good phase noise suppression are at a trade-off .
In order to improve fast lock and good noise performance, WO 2004/079914 Al uses the idea of "copying" the voltage of a relaxed first fast loop filter (i.e. when PLL is locked), having a high bandwidth, onto a slow loop filter having the same structure but different dimensioning and low bandwidth, as shown in Fig. 2. This filter arrangement has an input end IN receiving Icp of the charge pump of the PLL and an output end OUT outputting the signal ULF controlling the VCO. Switches Sl and S2 are operable to switch between the first fast loop filter (upper part) and the second slow loop filter (lower part) .
This publication further provides switches S3, S4, S5 to short the capacitor nodes in order to avoid the resulting delay by- relaxation, when applying a copy voltage only to the biggest value capacitor C5 in the circuit. A voltage follower VF has its input connected to a voltage point of the first fast loop filter and its output is connected to switches S3, S4, S5.
However, this is impractical as the loop filter capacitances of such PLLs are too large and reside off chip, hence requiring several additional pins .
Without additional pins for the access to the other internal loop filter nodes, we have to attack the problem when only copying to the largest capacitance. Here is what happens in this case:
Fig. 3 shows the relaxation of voltages on several filter capacitors when a voltage copy takes place only to cap2 , which is the best choice in terms of delay because having the highest value .
Loading of V(cap2) is determined by the copy amplifier. The relaxation of V(capl) is determined by the time constant of res2 times capl. The relaxation of V(cap2) is determined by the time constant of (res2+res3) times cap3. Loading of all three node takes up to the time t3. It is after this time when the slow loop filter is ready to be switched into the phase locked loop without causing disturbances.
Fig. 4 shows the new novel filter loop filter according to the present invention. It consists of loop filter having an input end IN and an output end OUT, a first branch comprising a first capacitor capB the other end of which is connected to a common node N, a second branch comprising a resistor resB the other end of which is connected to the common node N, a second resistor resC, a third branch comprising a third capacitor capC the other end of which is connected to a common node N, wherein the common node is connected to a second capacitor capB the other end of which is connected to ground.
As can be seen, a single copy path to the common node N enforces the desired voltage onto the second capacitor capA. DC paths to ground as provided in the old standard structure are broken up for capacitors capl and cap3 , and the two capacitors result in capB and capC, referencing to the common node N at the capacitor capA .
As shown below, the relaxation of the new filter output V(capC) is much quicker than with the old filter structure. In this regard it is to be noted that ouly the output is of importance for the VCO.
The terms used in this Fig 5 are as follows:
V(B) is the output of charge pump and input of loop filter
-> V(LFIN)
V(C) is the output of loop filter, connected to VCO
-> V(LFOUT) 76
- S -
The advantage is shown in Fig. 5. The voltages on the nodes V(A), V(B), V(C) change almost synchronously.
This structure offers essential advantages in terms of fast voltage copying. Such kind of a fast, forced voltage change on a higher order loop filter is neither disclosed nor even indicated in the prior state of the art.
Fig. 6 shows an example of the double loop filter arrangement according to the present invention, having a standard third order fast loop filter for lock acquisition and the slow, low bandwidth filter according to the present invention. This Fig. 6 shows also the copying process by electrical short connection between a voltage point of the first fast loop filter and the second slow loop filter.

Claims

P2005/00577610- 10 -Claims :
1. Third order loop filter having an input end (IN) and an output end (OUT) , a first branch comprising a first capacitor (capB) the other end of which is connected to a common node (N) , a second branch comprising a first resistor (resB) the other end of which is connected to the common node (N) , a second resistance (resC) , a third branch comprising a third capacitor (capC) the other end of which is connected to a common node (N) , wherein the common node (N) is connected to a second capacitor (capA) the other end of which is connected to ground.
2. Filter circuit arrangement, comprising a first locked/relaxed fast loop filter with a high bandwidth and a second slow loop filter with a low bandwidth, the fast loop filter and the low loop filter having different structures and comprising switching means (Sl, S2) to switch between the first loop filter and the second loop filter.
3. Filter circuit arrangement according to claim 2, wherein the first loop filter comprises an input end (IN) and an output end (OUT) , a first branch comprising a first capacitor (cl) the other end of which is connected to ground, a second branch comprising a (R2) resistor and a second capacitor (C2) the other end of which is connected to ground, a second (Rl) resistance, a third branch comprising a third capacitor (C3) the other end of which is connected to ground, and wherein the second loop filter comprises an input end (IN) and an output end (OUT) , - Ii -
a first branch comprising a first capacitor (capB) the other end of which is connected to a common node (N) , a second branch comprising a first resistor (resB) the other end of which is connected to the common node (N) , a second resistance (resC) , a third branch comprising a third capacitor (capC) the other end of which is connected to a common node (N) , wherein the common node (N) is connected to a second capacitor (capA) the other end of which is connected to ground.
4. Filter circuit arrangement according to claim 2 or 3 , wherein a node of one of the branches of the first loop filter is connected to the common node (N) of the second loop filter.
5. Second order loop filter having an input end and an output end, a first branch comprising a first capacitor (capB) the other end of which is connected to a common node (N) , a second branch comprising a resistor (resB) the other end of which is connected to the common node (N) , wherein the common node (N) is connected to a second capacitor the other end of which is connected to ground.
6. Phase-locked loop comprising a loop filter according to claim 1.
7. Phase-locked loop comprising a loop filter according to any of claims 2 to 4.
8. Phase-locked loop comprising a loop filter according to claim 5.
PCT/EP2005/005776 2005-05-29 2005-05-29 Phase-locked filter and phase-locked loop WO2006128477A1 (en)

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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5774023A (en) * 1997-04-30 1998-06-30 Motorola, Inc. Adaptive phase locked loop system with charge pump having dual current output
US6278333B1 (en) * 2000-02-29 2001-08-21 Motorola, Inc. Phase lock loop with dual state charge pump and method of operating the same
US20030143950A1 (en) * 2002-01-29 2003-07-31 David Maldonado Multiple bandwidth phase lock filters for multimode radios
WO2004079914A1 (en) * 2003-03-07 2004-09-16 Fujitsu Limited Phase-locked loop circuit
EP1471645A1 (en) * 2003-04-25 2004-10-27 Matsushita Electric Industrial Co., Ltd. Low-pass filter, feedback system, and semiconductor integrated circuit

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5774023A (en) * 1997-04-30 1998-06-30 Motorola, Inc. Adaptive phase locked loop system with charge pump having dual current output
US6278333B1 (en) * 2000-02-29 2001-08-21 Motorola, Inc. Phase lock loop with dual state charge pump and method of operating the same
US20030143950A1 (en) * 2002-01-29 2003-07-31 David Maldonado Multiple bandwidth phase lock filters for multimode radios
WO2004079914A1 (en) * 2003-03-07 2004-09-16 Fujitsu Limited Phase-locked loop circuit
EP1471645A1 (en) * 2003-04-25 2004-10-27 Matsushita Electric Industrial Co., Ltd. Low-pass filter, feedback system, and semiconductor integrated circuit

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