WO2006120722A1 - 半導体デバイスの製造方法 - Google Patents
半導体デバイスの製造方法 Download PDFInfo
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- WO2006120722A1 WO2006120722A1 PCT/JP2005/008291 JP2005008291W WO2006120722A1 WO 2006120722 A1 WO2006120722 A1 WO 2006120722A1 JP 2005008291 W JP2005008291 W JP 2005008291W WO 2006120722 A1 WO2006120722 A1 WO 2006120722A1
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- hole
- diameter
- semiconductor device
- shape
- semiconductor wafer
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/10—Measuring as part of the manufacturing process
- H01L22/12—Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
Definitions
- the present invention relates to a method for manufacturing a semiconductor device.
- the present invention also relates to a technique for performing process evaluation during the manufacturing process of a semiconductor device using an electron beam, an ion beam, light, electromagnetic waves, or the like.
- via holes are formed in a semiconductor device. These holes are usually formed by a process called etching. Since these holes are holes for conducting electricity, it is necessary to check whether they have the desired finished shape.
- FIG. 16 is a partial cross-sectional view showing an example of holes formed in a semiconductor wafer.
- An oxide film 202 is formed on the surface of a silicon substrate 201 that is a semiconductor wafer. Holes are formed so as to penetrate the oxide film 202, that is, the surface of the silicon substrate 201 is exposed.
- the diameter of the hole opening is the hole top diameter dl.
- the diameter of the bottom of the hole is the hole bottom diameter d2.
- the etching residue of the oxide film 202, a film of silicon oxide on the bottom of the hole, or a residue 203 having a force such as a resist residue exists at the bottom of the hole.
- CDSEM observation is known as a method for nondestructively observing the performance of contact holes, via holes, and the like.
- CDSEM is a kind of high-performance electron microscope, which collects secondary electrons generated by scanning an electron beam on a sample (silicon substrate 201), images it, and measures the length of the hole top diameter dl and the hole opening. Ability to observe the shape.
- the semiconductor wafer is irradiated with an electron beam, and the semiconductor wafer is irradiated at the time of irradiation.
- a method (EBSCOPE substrate current method) for evaluating the quality of a semiconductor device process using a substrate current, which is a flowing current, has been invented by the inventors of the present application (see, for example, Patent Documents 1 to 3).
- a semiconductor wafer that has been etched is irradiated with an electron beam having a constant energy for several seconds, and the substrate current generated at that time is large or small! / Power is also a way of knowing the state of a process.
- 0 to several Kev is used as the electron beam energy, and the amount of current is picoampere (pA) or nanoampere (nA).
- Patent Document 1 Japanese Patent No. 3334750
- Patent Document 2 Japanese Patent No. 3292159
- Patent Document 3 Japanese Patent No. 3175765
- FIG. 17 is a flowchart showing a process evaluation method for a semiconductor device using SEM. First, the same pattern is formed on a plurality of semiconductor wafers by using photolithography for evaluation of etching characteristics (step S 101).
- each semiconductor wafer is processed by changing the etching level.
- Step S102 Next, the resist is peeled off to obtain a sample to be measured (step S103). Next, the semiconductor wafer is broken by FIB (focused ion beam) or manually to expose the cross section of the hole (step S104). Next, the cross section of the hole is observed using SEM or TEM (transmission microscope) (step S 105). Based on this observation result, an optimum etching condition is selected (step S106).
- the present invention has been made to solve the above-described problems of the prior art, and uses nondestructive inspection for managing a process having a step of forming a hole in a semiconductor wafer.
- a method for manufacturing a semiconductor device specifies one hole in a plurality of holes formed in a semiconductor wafer as a measurement target hole, and forms the shape of the hole top in the measurement target hole.
- the diameter, the shape or diameter of the hole bottom in the measurement target hole, and the bottom state or bottom residue in the measurement target hole are measured nondestructively, and the shape or diameter of the hole top
- the process control of the semiconductor device is performed based on the shape or diameter of the hole bottom and the state or residue of the bottom.
- one hole formed in the semiconductor wafer is set as a measurement target hole. Then, the shape of the hole top of the measurement target hole, the shape of the hole bottom, the state of the hole bottom, etc. are measured to manage the process. Therefore, it is possible to evaluate overall and comprehensively about whether or not the specific measurement target hole is normally formed, and it is possible to perform process control more strictly and accurately than before.
- the conventional CDSEM since the shape of the hole top for a specific hole to be measured is only measured, strict process management cannot be performed.
- the conventional EBSCOPE substrate current method can achieve a hole bottom diameter (hole bottom diameter), it has not been able to measure the shape of a specific hole to be measured as a whole.
- the shape or diameter of the hole top is measured by measuring secondary electrons and reflected electrons generated by irradiating the semiconductor wafer with an electron beam. It has the process.
- the measurement of the shape of the hole top and the like can be performed nondestructively using CDSEM in the entire measurement of one hole.
- the shape or diameter of the hole bottom The measurement includes a process of measuring a substrate current, which is a current generated in the semiconductor wafer by irradiating the semiconductor wafer with an electron beam.
- the measurement of the shape of the hole bottom and the like can be performed nondestructively using the EBSCOPE substrate current method in the entire measurement of one hole. it can.
- the measurement of the bottom state or the bottom residue is a current generated in the semiconductor wafer by irradiating the semiconductor wafer with an electron beam. It has the process which measures an electric current, It is characterized by the above-mentioned.
- the state of a hole bottom or a residue is measured nondestructively using the EBSCOPE substrate current method. can do.
- the shape or diameter of the hole top is a predetermined value
- the shape or diameter of the hole bottom is a predetermined value
- the state of the bottom or bottom When the residue is in a predetermined state, it is determined that the measurement target hole is normally formed.
- the hole to be measured is formed normally. Can be determined. Therefore, as compared with the conventional case where the process is managed by one element, the process can be managed with much higher accuracy.
- the non-destructive measurement is performed by irradiating the semiconductor wafer with an electron beam such that a trajectory of the electron beam crosses the measurement target hole. And detecting a waveform of secondary electrons generated during the irradiation and a substrate current waveform that is a waveform of current generated in the semiconductor wafer during the irradiation, and using the waveform of the secondary electrons, The shape or diameter of the hole top is measured, the shape or diameter of the hole bottom is measured using the substrate current waveform, and the electron beam is thicker than the electron beam crossing the measurement target hole, and the measurement target is measured.
- the hole is irradiated for a certain period of time, and the substrate current generated when this hole is irradiated is applied to the semiconductor wafer by the thick electron beam
- the EBS value which is a value divided by the current incident on, is measured, and the process management of the semiconductor device is performed based on the diameter of the hole top, the diameter of the hole bottom, and the EBS value. To do.
- the shape and the like of the hole top can be measured by CDSEM
- the shape and the like of the hole bottom can be measured in the line scan mode of the EBSCOPE substrate current method
- the hole can be measured in the blanket mode of the EBSCOPE substrate current method.
- the bottom residue can be measured.
- the line scan mode of the EBSCOPE substrate current method is a mode in which the sample is irradiated with a finely focused electron beam, similar to CDSEM.
- the blanket mode of the EBSCOPE substrate current method is a mode in which a thick electron beam with a constant energy is irradiated onto a sample for a certain period of time.
- the semiconductor device manufacturing method of the present invention is characterized in that the waveform of the secondary electrons and the substrate current waveform force are waveforms obtained simultaneously by irradiation of the electron beam onto the semiconductor wafer.
- the shape of the hole top and the shape of the hole bottom can be measured simultaneously by scanning with one electron beam. Therefore, according to the present invention, it is possible to perform strict process management more quickly and at a lower cost.
- the semiconductor device manufacturing method of the present invention is characterized in that it is performed based on the process management of the semiconductor device and the hole arrangement density in the semiconductor wafer and the measurement result.
- process management can be performed based on the shape of the hole top of the hole to be measured, the shape of the hole bottom, the state of the hole bottom, and the like, and the hole arrangement density. Therefore, more precise and accurate process management can be performed.
- the semiconductor device manufacturing method of the present invention is based on the process management of the semiconductor device, the layout (arrangement pattern or arrangement pattern) regarding the holes in the semiconductor wafer, and the result of the measurement. It is characterized by being performed. According to the semiconductor device manufacturing method of the present invention, the hole top of the hole to be measured is measured. Process management can be performed based on the shape, the shape of the hole bottom, the state of the hole bottom, and the layout of the hole. Therefore, more rigorous and accurate process management can be performed.
- the measurement of the shape or diameter of the hole top measures secondary electrons and reflected electrons generated by irradiating the semiconductor wafer with an electron beam. And measuring the shape or diameter of the hole bottom, and measuring the current generated in the semiconductor wafer by irradiating the semiconductor wafer with an electron beam, the hole top and the hole bottom.
- the image and numerical value indicating the shape of the hole top and the image and numerical value indicating the shape of the hole bottom are displayed on a display device. .
- the shape of the hole top and the shape of the hole bottom can be displayed on the screen in a specific measurement target hole.
- This display can be executed without damaging the semiconductor wafer to be measured, and can be executed at a much lower cost and faster than SEM and TEM. Therefore, according to the present invention, a high-performance semiconductor device can be manufactured at low cost.
- the shape or diameter of the hole top, the shape or diameter of the hole bottom, and the bottom state or bottom residue are displayed on a display device. It is characterized by making it.
- the method for manufacturing a semiconductor device of the present invention it is possible to display the entire overall structure on a screen in a specific measurement target hole. This display can be executed without damaging the semiconductor wafer to be measured, and can be executed at a much lower cost and faster than SEM and TEM. Therefore, according to the present invention, a high-performance semiconductor device can be manufactured at low cost.
- Strict hall process management directly contributes to improving yields in semiconductor manufacturing. Since any hole you want to manage can be selected for measurement, Applicable to semiconductor devices. In the present invention, a product device can be directly measured, and it is not necessary to prepare a test wafer.
- a laser beam or the like can be applied instead of the electron beam.
- electromagnetic waves or ions can be used as probes (instead of electron beams).
- the present invention is not limited to the three elements of the hole top, hole bottom, and hole bottom residue, and other elements may be measured and added to the evaluation target.
- FIG. 1 is a flowchart showing a method for manufacturing a semiconductor device according to a first embodiment of the present invention.
- FIG. 2 is an explanatory diagram showing an outline of a CDSEM used in the semiconductor device manufacturing method same as above.
- FIG. 3 An explanatory diagram showing an outline of EBSCOPE used in the semiconductor device manufacturing method described above.
- FIG. 4 is a plan view showing an example of shot arrangement on a semiconductor wafer.
- FIG. 5 is a plan view showing in detail one shot in FIG. 4.
- FIG. 6 is a diagram showing a table of values to be managed in the semiconductor device manufacturing method of the first embodiment.
- FIG. 7 is a diagram showing a set of process managements for performing an optimum process in the semiconductor device manufacturing method of the first embodiment.
- FIG. 8 is a flowchart showing a method for manufacturing a semiconductor device according to a second embodiment of the present invention. It is.
- FIG. 9B is a diagram showing an example of measured values acquired in the second embodiment.
- ⁇ 9C] is a diagram showing an example of measured values acquired in the second embodiment.
- FIG. 10 is an explanatory view showing a modification of the second embodiment.
- FIG. 11 is a view showing an EBSC OPE used in the method for manufacturing a semiconductor device according to the third embodiment of the present invention.
- FIG. 12 A diagram showing a method for manufacturing a semiconductor device according to a fourth embodiment of the invention.
- 13A A diagram showing a method for manufacturing a semiconductor device according to a fifth embodiment of the invention.
- FIG. 13B A diagram showing a method for manufacturing the semiconductor device according to the fifth embodiment of the present invention.
- 13C A diagram showing a method for manufacturing a semiconductor device according to the fifth embodiment of the invention.
- FIG. 14 is a drawing showing a method for manufacturing a semiconductor device according to a sixth embodiment of the present invention.
- FIG. 15A] A plan view showing a method for manufacturing a semiconductor device according to a seventh embodiment of the present invention.
- FIG. 15B A sectional view showing the method for manufacturing the semiconductor device according to the seventh embodiment of the present invention.
- FIG. 16 is a partial cross-sectional view showing an example of a hole formed in a semiconductor wafer.
- FIG. 17 is a flowchart showing a semiconductor device process evaluation method using SEM.
- Electron beam source 11, 21, 71, 81...
- FIG. 1 is a flow chart showing a method of manufacturing a semiconductor device according to the first embodiment of the present invention. In the present embodiment, a method for achieving the object of the present invention by using a combination of existing apparatuses is shown.
- FIG. 2 is an explanatory diagram showing an outline of the CDSEM used in the method for manufacturing the semiconductor device.
- Fig. 3 is an explanatory diagram showing the outline of EBSCOPE (EBSCOPE substrate current method) used in the manufacturing method of this semiconductor device.
- EBSCOPE EBSCOPE substrate current method
- one hole in a plurality of holes formed in the semiconductor wafer is selected and specified as the measurement target hole A (step S 1).
- FIG. 4 is a plan view showing an example of shot arrangement on the semiconductor wafer.
- Semiconductor devices are manufactured using photographic exposure technology. That is, equivalent to camera film All the layout information of the semiconductor device is recorded. By illuminating (exposing) the mask, the layout information on the mask is transferred to the semiconductor wafer 40.
- the area that can be exposed at one time is called Shot 41, which is about 2cm x 3cm. Therefore, there are about 20 shots 41 in one 8-inch semiconductor wafer 40.
- Each shot 41 is arranged in an orderly manner, and the shot position is uniquely determined by the designation of the semiconductor wafer, the column in the 40 and the row. Also, there is a shot interval 42 between each shot 41! /.
- FIG. 5 is a plan view showing in more detail one shot 41 in FIG.
- a shot interval 42 which is an interval between the shot 41 and the shot 41 is not necessarily constant and is arbitrary. Therefore, the coordinates specified by the XY coordinate axes that are stretched over the entire semiconductor wafer 40 do not necessarily correspond to one hole. Therefore, in order to designate one measurement target hole A, it is designated with reference to the origin of the XY coordinate system independently placed inside the shot 41 or the chips 41a, 41b, 41c, 41d on the semiconductor wafer 40. .
- the column and row of the shot 41 or the chips 41a, 41b, 41c, and 41d are designated.
- the electron beam irradiation position is moved to the XY coordinate position representing the measurement target position obtained with respect to the chip origin 4 lak using the precision stage.
- the position of the hole on the layout (design position) and the position of the actually created hole do not necessarily match due to manufacturing errors. Therefore, using the pattern matching technology, the measurement target hole A is accurately extracted from the holes appearing at the XY coordinate positions. If it is difficult to extract the measurement target hole A with only one pattern matching, the pattern matching is performed as many times as necessary, and the measurement points for the measurement target hole A are extracted.
- step S2 the hole top diameter of the measurement target hole A selected in step S1 is measured by CDSE M (step S2).
- CDSEM is a kind of scanning electron microscope called critical dimension SEM.
- the SEM includes an electron beam source 11, a deflection electrode 12, an XY stage 15, a secondary electron detector 16, a chamber 17, and a DC power source 18. Further, an electron beam source 11, a deflection electrode 12, a measurement sample 14, an XY stage 15, and a secondary electron detector 16 are disposed in a chamber 17 forming a vacuum container.
- the CDSEM is a device that uses an electron beam 13 with a short wavelength instead of light that has been used in the past to supplement the resolution of an optical microscope, and can obtain an image resolution of about several nanometers. .
- the principle of operation is similar to that of a CRT television.
- the cathode ray tube TV scans the light-emitting layer provided on the glass screen sequentially with an electron beam with a diameter of about 0.1 mm to form an image, while the CDSEM observes the object (measurement sample 14). This is scanned with an electron beam.
- the measurement sample 14 is, for example, a semiconductor wafer 40 and is placed on the XY stage 15 described above.
- the electron beam 13 is emitted from the electron beam source 11.
- the energy source of the electron beam source 11 is a DC power source 18. Further, the electron beam 13 emitted from the electron beam source 11 is narrowed down to about several nm by the polarizing electrode 12 or the like. The narrower the electron beam 13, the higher the image resolution.
- the electron beam 13 is irradiated so as to sequentially fill the object to be observed (measurement target hole A of the semiconductor wafer 40). Irradiation is performed by moving the XY stage 15 in the XY direction. Then, secondary electrons generated on the surface of the sample by the irradiation are detected by the secondary electron detector 16, and the detected signal is converted into an electric signal waveform and then imaged.
- An image obtained by such a CDSEM is, for example, an aggregate of pixels of 512 ⁇ 512 pixel force, and the luminance of each pixel corresponds to the detected amount of secondary electrons.
- the hole top diameter (surface diameter) of the measurement target hole A can be obtained by extracting the edge of the measurement target hole A using the differential method, the half-width method, the Laplacian method, or the Sobel method. it can.
- step S3 measure the hole bottom diameter (hole bottom diameter) of the measurement target hole A selected in step S1 in the EBSCOPE line scan mode.
- EBSCOPE line scan mode performed in step S3 !, see Figure 3 To explain.
- EBSCOPE uses electronic beam 23 as a measurement sample (semiconductor wafer 40) as described in Patent 3334750, Patent 3292159, and Patent 3175765 listed in the ⁇ Background Technology '' column. It is a device that measures the substrate current generated by irradiation with an ammeter 29 or the like.
- the EBSCOPE includes an electron beam source 21, a deflection electrode 22, an XY stage 25, a secondary electron detector 26, a chamber 27, a DC power supply 28, and an ammeter 29.
- An electron beam source 21, a deflection electrode 22, a measurement sample 24, an XY stage 25, a secondary electron detector 26, and an ammeter 29 are arranged in a chamber 27 that forms a vacuum container.
- the electron beam source 21 emits an electron beam 23 using a DC power supply 28 as an energy source.
- An electron beam 23 emitted from the electron beam source 21 is narrowed down by a polarizing electrode 22 or the like. This electron beam 23 is applied to the measurement sample (semiconductor wafer 40) 24. Secondary electrons generated on the sample surface by the irradiation are detected by the secondary electron detector 16, and the current (substrate current) generated in the measurement sample 24 by the irradiation is measured by the ammeter 29.
- EBSCOPE has a measurement method called a line scan mode in which the electron beam 23 is narrowed down and irradiated to the measurement sample 24 in the same manner as CDSEM.
- a line scan mode in which the electron beam 23 is narrowed down and irradiated to the measurement sample 24 in the same manner as CDSEM.
- the relative value of the measured waveform force of the substrate current and the hole bottom diameter is obtained. Further, by calibrating the length using a standard sample as the measurement sample 24, the relative value of the hole bottom diameter can be converted into an absolute value.
- step S4 the bottom state or bottom residue of the measurement target hole A selected in step S1 is measured in the blanket mode of EBSCOPE (step S4).
- EBSCOPE blanket mode performed in step S3 will be described with reference to FIG.
- EBSCOPE has a measurement mode called a blanket mode that irradiates a measurement sample 24 with a thick electron beam 23, which is the same as a certain energy, for a certain period of time.
- This blanket mode can sensitively detect the state of the thin film at the bottom of the hole.
- the blanket mode output result is an average evaluation of the substrate current that flows during measurement. It is expressed as a value called EBS value. That is, the EBS value is a value obtained by dividing the substrate current generated when the measurement sample 24 is relatively thick and irradiated with the electron beam 23 for a certain time by the current incident on the measurement sample 24 by the electron beam 23. It is. With this EBS value, it is possible to measure the bottom state of the measurement target hole A or the bottom residue. In other words, the EBS value when there is an abnormality such as the bottom of the measurement target hole A being acidified or there is a residue such as an etching residue is the EBS value when it is normal. The value is different from the value.
- Steps S5, S6 the hole top diameter, hole bottom diameter, and hole bottom residue of the measurement target hole A measured in steps S2, S3, and S4 are compared with standard values to determine whether the measurement target hole A is a non-defective product.
- a force determination is made such that the measured hole top diameter, hole bottom diameter, and hole bottom residue are within the allowable design range. Specifically, it is performed as follows. First, as shown in step S2 above, for the measurement target hole A selected for process management, the hole top diameter is measured using CDSEM, and the measured value is stored in the storage device. CD SEM measurements are done automatically for accuracy.
- the hole top diameter stored in the storage device is compared with the design standard value by the CPU.
- the allowable range is 0.1 ⁇ m ⁇ 0.01 ⁇ m.
- step S3 the hole bottom diameter of the measurement target hole A is measured using EBSCOPE and recorded in the storage device.
- the movement to the measurement point (navigation) is the same as in DSEM.
- Edge extraction processing is performed from the substrate current waveform, and the hole bottom diameter is measured.
- the measured hole bottom diameter is compared with a design reference value. For example, if the hole is designed with a diameter of 0.05 ⁇ m, the allowable range is 0.05 ⁇ m ⁇ 0.005 ⁇ m. If the design tolerance is not met, a warning is issued.
- a hole manufactured according to the design value can be selected in terms of shape.
- the hole has an important characteristic (element) that does not appear in the design value of the hole shape that gives a geometric definition, but affects the final electric characteristic. That is the state of the bottom boundary of the hole.
- the oxide film of nanometer order there is an oxide film of nanometer order, a film of the bottom of the material itself due to the acid and so on, or a resist residue or cleaning residue, which has a decisive influence on the operation of the electronic device. give.
- the same measurement target hole A as the hole measured in the EBSCOPE line scan mode is measured in the EBSCOPE blanket mode and stored in the storage means.
- the EBS value is an evaluation value unique to the equipment shown in Fig. 3, and there is no CAD data used in current semiconductor device design that corresponds to the EBS value. Therefore, the reference value for the EBS value is obtained by conducting experiments in advance.
- ⁇ 10EBS can be set as an allowable range. Compare the EBS value measured in step S4 above with this reference value, and select a non-defective hole.
- the semiconductor device manufacturing method of this embodiment is compared with the standard value one by one for each measurement of the hole top diameter, hole bottom diameter, hole bottom residue, etc. in steps S2, S3, and S4.
- the three measured values may be compared with the standard value.
- the order of steps S2, S3, S4 is not limited to the above order, and can be changed mutually.
- steps S2 and S3 the hole top diameter and the hole bottom diameter are measured. 1S Alternatively, the shape of the hole top and the shape of the hole bottom may be measured. In this case, the reference value in step S5 is a reference value for the shape of the hole top, the shape of the hole bottom, the state of the bottom, and the like.
- FIG. 6 is a diagram showing an example of a table summarizing values to be managed in the semiconductor device manufacturing method of the present embodiment.
- the non-defective hall has a hole top diameter, It can be managed with three process indicators: bottom diameter and EBS value.
- FIG. 7 is a diagram showing a set of process managements for performing an optimal process in the semiconductor device manufacturing method of the present embodiment.
- hole top diameter management, hole bottom diameter management, and EBS value (residue) management are performed for one measurement target hole A. Therefore, according to the present embodiment, it is possible to perform extremely strict management compared to the management using only the hole top diameter using the CDSEM, which is performed in the conventional semiconductor device process management, and a semiconductor device with much higher reliability. Can be manufactured.
- FIG. 8 is a flowchart showing a method for manufacturing a semiconductor device according to the second embodiment of the present invention.
- FIG. 8 shows an example of optimizing the process using the process evaluation method of the first embodiment.
- step S11 the same pattern for evaluating etching characteristics is formed on a plurality of equivalent semiconductor wafers using a photolithographic method.
- step S11 In the pattern formed in step S11, several different hole patterns with the array density and size as parameters are formed.
- step S 12 the process is performed for each semiconductor wafer while changing the etching level.
- the resist is peeled off in the same manner for each semiconductor wafer to obtain a sample to be measured (step S13).
- the measurement target hole A is selected from the many holes formed in the measurement target sample and measured (step S14).
- This measurement is, for example, hole top diameter, hole bottom diameter, EBS value. Therefore, for example, the hole top diameter is measured by CDSEM, and the hole bottom diameter and EBS value are measured by EBSCOP.
- Measurements may be made using SCI and SEM.
- FIG. 9A, FIG. 9B, and FIG. 9C are diagrams illustrating an example of the measurement values acquired in step S14.
- FIG. 9A shows the measured values in shades of color on the plane of the semiconductor wafer 40.
- Figure 9B shows the measured values for the hole top diameter in a graph.
- Fig. 9C is a graph showing all measured values for the hole bottom diameter.
- the hole top diameter and hole bottom diameter are the closest to the designed values, and the in-plane distribution of the hole top diameter, hole bottom diameter, and EBS value is the smallest. , Choose one as the best process.
- EBSCOPE shown in Fig. 3 has a secondary electron detector 26
- the hole top diameter can be measured using only EBSCOPE. Therefore, the hole top diameter, hole bottom diameter, hole residue, etc. can be measured using only EBSCOPE without using CD SEM as in the manufacturing method shown in Fig. 1. In such cases, hall management is performed as follows.
- a line scan of the electron beam is performed on the measurement target hole B selected for the hole formation process management, and the secondary electron generated at that time is used to scan the hole top.
- the diameter is measured and stored in a storage device.
- the EBS COPE blanket mode is applied to the same measurement target hole B as above, and the EBS value representing the hole bottom information is obtained and stored in the storage device.
- the three stored values and the reference value for each value are compared sequentially, Results of the comparison Evaluate the performance of the hall.
- FIG. 10 is an explanatory view showing a modification of the present embodiment. That is, FIG. 10 shows a state in which the measurement result of step S14 is displayed on the display device as an image or a numerical value.
- Screen 50 shows the shape of the hole top measured by SEM. On the screen 50, an image 51 showing the shape of the hole top and numerical data 52 about the shape of the hole top are displayed. Also, the hall top measurement memory Mx2, My2 for viewing the absolute value of the image 51 is also displayed.
- the screen 50 may be displayed by data measured by EBSCOPE shown in FIG.
- Screen 60 shows the shape of the hole bottom and the like measured in the EBSCOPE line scan mode.
- an image 61 indicating the shape of the hole bottom and numerical data 62 regarding the shape of the hole bottom are displayed.
- the memory Mxl, Myl for hole bottom measurement for visually recognizing the absolute value of image 61 is also displayed.
- Screen 50 and screen 60 may be displayed simultaneously on one display screen or separately.
- screens 50 and 60, images showing the state of the bottom of the hall, and numerical values may be displayed on the display device.
- the overall and overall structure of a specific measurement target hole can be displayed on the screen. This display can be executed without damaging the semiconductor wafer to be measured, and can be executed rapidly and at a much lower cost.
- FIG. 11 is a diagram showing EBSCOPE used in the method for manufacturing a semiconductor device according to the third embodiment of the present invention.
- the basic configuration of the EBSCOPE of this embodiment is the same as that of the EBSCOPE in FIG.
- EBSCOPE of this embodiment is
- An electron beam source 71, a deflection electrode 72, an XY stage 75, a secondary electron detector 76, a chamber 77, a DC power supply 78, and an ammeter 79 are configured. Further, an electron beam source 71, a deflection electrode 72, a measurement sample 74, an XY stage 75, a secondary electron detector 76, and an ammeter 79 are arranged in a chamber 77 forming a vacuum vessel.
- EBSCOPE is an internal parameter of the apparatus such as irradiation current amount, irradiation speed and irradiation energy.
- the measured values of the hole top diameter and the hole bottom diameter are obtained for the same measurement target hole C and for the same position in the measurement target hole C. Therefore, the effectiveness of the measured values of the hole top diameter and hole bottom diameter as evaluation data increases, and a more accurate evaluation of the hole performance becomes possible.
- FIG. 12 is a diagram showing a method for manufacturing a semiconductor device according to the fourth embodiment of the present invention.
- the Si substrate 84 that is a semiconductor wafer is used as a measurement sample.
- An oxide film 83 is formed on the surface of the Si substrate 84, and a hole penetrating the oxide film 83 is formed.
- An electron beam 81 is scanned across this hole (line scan measurement).
- EBSCOPE then measures the hole top diameter dl, hole bottom diameter d2, and the state of the hole bottom.
- the wave height hi of the substrate current waveform 85 measured during the line scan measurement can be measured.
- This wave height hi may contain information representing the hole bottom state similar to that obtained in the blanket mode. Therefore, for the purpose of increasing the measurement speed, the hole top diameter dl is measured from the secondary electron waveform 82 and the hole bottom diameter d2 is measured from the substrate current waveform 85 during one line scan measurement. The hole bottom state is measured from the wave height hi of the current waveform.
- FIG. 13A, FIG. 13B, and FIG. 13C are views showing a method for manufacturing a semiconductor device according to the fifth embodiment of the present invention. That is, FIG. 13A, FIG. 13B, and FIG. 13C show examples of the cross-sectional shape of holes in a semiconductor device.
- the cross-sectional shape of a hole in a recent semiconductor device is not only a circle but also shown in FIG. 13A. There are also ellipses or other shapes. In order to accurately evaluate the hole diameters, it is necessary to approximate the shape for each hole and extract the features.
- a normal CDSEM scans a specific part with a linear electron beam and measures the length, whereas multiple electron beam scans cover the entire hole.
- a mathematical approximation curve that matches the hole shape is generated from the extracted hole edge, and the diameter, minor axis, major axis, center position, distortion amount, roughness (see Fig. 13B), hole Obtain the center coordinates of the top and the coordinates of the center of the hole bottom or their deviation (see Fig. 13C), hole formation angle, hole depth, etc.
- target values are determined and managed using the measurement quantities required for process management as a table.
- FIG. 14 is a diagram showing a method for manufacturing a semiconductor device according to the sixth embodiment of the present invention. That is, FIG. 14 shows a plan view of one chip 90 in the semiconductor wafer.
- the chip 90 has a plurality of holes HI and H2.
- the process evaluation index is determined by the characteristics of one hole.
- the characteristics of several hole assemblies are important. For example, it is known that the performance of a hall fluctuates due to a loading effect called a microloading effect. Therefore, different process results are generally obtained even if the same process is performed depending on the density at which the holes are formed.
- index 1 is used for hole HI with a low hole density
- index 2 is used for hole H2 with a high hole density
- FIG. 15A and 15B are diagrams showing a method for manufacturing a semiconductor device according to the seventh embodiment of the present invention. That is, FIG. 15A and FIG. 15B show one chip 100 in the semiconductor wafer. FIG. 15A shows a plan view, and FIG. 15B shows a cross-sectional view at position XI-X2.
- a groove 101 is formed on the surface of the chip 100.
- a plurality of holes H are formed along the groove 101 at equal intervals.
- a plurality of holes H are formed.
- the arrangement of the holes H (layout R2) outside the region where the groove 101 is formed is different from the arrangement of the holes H (layout R1) in the region where the groove 101 is formed.
- the hole H is formed on the entire surface of the semiconductor wafer by an etching process. Therefore, in order to determine whether or not the hole H is formed as designed, it is necessary to know the nature of the hole H formed in the entire semiconductor wafer. Etching is performed by forming plasma, but it is generally known that distribution occurs in the wafer surface. The shape is concentric or tilted in one direction.
- hole H For example, about 100 points are taken all over the surface of the semiconductor wafer, and the hole top diameter, hole bottom diameter, hole bottom residue, etc. of hole H are measured.
- the result of the hole H has a load effect called microloading effect, and even the holes with the same hole diameter change depending on the peripheral layout. Therefore, Hall H at the same location in the layout is selected as the measurement point, and the variation is evaluated.
- the variation has a standard deviation such as 3 sigma and can be evaluated with a small amount.
- the evaluation of the quality of one etching process is performed using the average value of hole top diameter, average value of hole bottom diameter, average value of hole residue (EBS value), and in-plane variation of hole top diameter. Evaluation is based on sigma value, 3 sigma value of in-plane variation of hole bottom diameter, and 3 sigma value of in-plane variation of hole residue (EBS value).
- One semiconductor device includes various layouts, and standard values may be different for each layout. At that time, management is performed by separating the management level by layout. For example, for hole H in layout R1, the average hole top diameter, hole bottom diameter Average value, hole residue (EBS value) average value, 3 sigma value of in-plane variation of hole top diameter, 3 sigma value of in-plane variation of hole bottom diameter, in-plane variation of hole residue (EBS value) Sets the tolerance for the first 3 sigma values.
- the average value of hole top diameter, average value of hole bottom diameter, average value of hole residue (EBS value), 3 sigma value of in-plane variation of hole top diameter, hole bottom Set the tolerance of 3 sigma value of radial in-plane variation and 3 sigma value of hole residue (EBS value) in-plane variation.
- EBS value average value of hole residue
- the present invention can accurately measure holes formed in a semiconductor wafer by measuring a current flowing in a measurement sample such as a semiconductor wafer and a secondary electron by irradiation with an electron beam, and the semiconductor device
- the manufacturing process can be strictly controlled. Therefore, the present invention is useful not only for various semiconductor device manufacturing methods but also for various semiconductor device manufacturing apparatuses.
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PCT/JP2005/008291 WO2006120722A1 (ja) | 2005-05-02 | 2005-05-02 | 半導体デバイスの製造方法 |
CN2005800496612A CN101233609B (zh) | 2005-05-02 | 2005-05-02 | 半导体器件的制造方法 |
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Cited By (2)
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WO2008053524A1 (fr) * | 2006-10-31 | 2008-05-08 | Topcon Corporation | Appareil d'inspection de semi-conducteur et procédé d'inspection de semi-conducteur |
CN102832152A (zh) * | 2012-08-21 | 2012-12-19 | 无锡华润上华科技有限公司 | 一种在线检测接触孔的方法 |
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JP2000174077A (ja) * | 1998-12-08 | 2000-06-23 | Nec Corp | 半導体ウエハーの検査方法 |
JP2001210689A (ja) * | 2000-01-25 | 2001-08-03 | Jeol Ltd | 電子ビーム検査方法および装置 |
JP2002083849A (ja) * | 1999-11-05 | 2002-03-22 | Nec Corp | 半導体デバイス検査装置 |
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- 2005-05-02 WO PCT/JP2005/008291 patent/WO2006120722A1/ja active Application Filing
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JP2000174077A (ja) * | 1998-12-08 | 2000-06-23 | Nec Corp | 半導体ウエハーの検査方法 |
JP2002083849A (ja) * | 1999-11-05 | 2002-03-22 | Nec Corp | 半導体デバイス検査装置 |
JP2001210689A (ja) * | 2000-01-25 | 2001-08-03 | Jeol Ltd | 電子ビーム検査方法および装置 |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
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WO2008053524A1 (fr) * | 2006-10-31 | 2008-05-08 | Topcon Corporation | Appareil d'inspection de semi-conducteur et procédé d'inspection de semi-conducteur |
CN102832152A (zh) * | 2012-08-21 | 2012-12-19 | 无锡华润上华科技有限公司 | 一种在线检测接触孔的方法 |
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