WO2006082756A1 - 半導体装置とその製造方法、及び製造装置 - Google Patents
半導体装置とその製造方法、及び製造装置 Download PDFInfo
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- WO2006082756A1 WO2006082756A1 PCT/JP2006/301295 JP2006301295W WO2006082756A1 WO 2006082756 A1 WO2006082756 A1 WO 2006082756A1 JP 2006301295 W JP2006301295 W JP 2006301295W WO 2006082756 A1 WO2006082756 A1 WO 2006082756A1
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- Prior art keywords
- semiconductor device
- manufacturing
- conductive region
- metal conductive
- reduction treatment
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02041—Cleaning
- H01L21/02057—Cleaning during device manufacture
- H01L21/02068—Cleaning during device manufacture during, before or after processing of conductive layers, e.g. polysilicon or amorphous silicon layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02041—Cleaning
- H01L21/02057—Cleaning during device manufacture
- H01L21/0206—Cleaning during device manufacture during, before or after processing of insulating layers
- H01L21/02063—Cleaning during device manufacture during, before or after processing of insulating layers the processing being the formation of vias or contact holes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76814—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics post-treatment or after-treatment, e.g. cleaning or removal of oxides on underlying conductors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
- H01L21/76883—Post-treatment or after-treatment of the conductive material
Definitions
- the present invention relates to a semiconductor device including a metal (including alloy) conductive region, such as metal wiring, a manufacturing method thereof, and a manufacturing apparatus, and more particularly to an oxide film on the surface of a metal conductive region that is oxidized during the manufacturing process.
- the present invention relates to an improvement for effective removal.
- the conductive material is not limited to the above-mentioned Cu, but the introduction of various metals such as Ni, Co, Ta, and Ti is also considered in the LSI transistor device in order to control its low resistance and work function. Has been.
- the degree of reduction in the cross-sectional area of the conductor was so great.
- a strong passive film is not formed on the surface, so when exposed to the atmosphere or exposed to oxygen, the acid starting from the surface force proceeds deeply toward the inside and is effective in other words.
- the cross-sectional area that can be used as the conductor portion is greatly reduced, and as a result, there is a problem that the wiring resistance increases even though the corner Cu is used.
- the contact resistance naturally increases. In severe cases, continuity cannot be secured.
- Patent Document 1 and Patent Document 2 As a cleaning method for removing the oxide film formed on the surface of such a Cu wiring, it has been known in the past.
- a method for removing Cu surface oxides by hydrogen gas or hydrogen plasma treatment has been proposed, or a sputtering treatment using argon ion bombardment (argon 'milling) is also used in combination with this to remove surface oxides. It was removed.
- Patent Document 1 JP-A-11-191556
- Patent Document 2 Japanese Patent Laid-Open No. 11-186237
- the present invention has been made from such a viewpoint, not only Cu and its alloys, which are most likely to cause problems, but also Al, Co, Ni, Ti, Ta, etc., as wiring and functional areas. It is intended to provide a semiconductor device in which oxide films on the surface of various metal conductive layer materials used are removed without damage to peripheral structures such as a low dielectric constant thin film, and a manufacturing method and manufacturing apparatus therefor.
- the present invention provides
- a semiconductor device including a metal conductive region
- At least a part of the surface of the metal conductive region is a surface from which the oxide film has been removed by reduction treatment by heating in an inert gas in which the oxygen partial pressure is kept below 1 X 10-13 atm.
- a semiconductor device is proposed.
- the metal conductive region may be Cu or an alloy thereof, which may be, for example, Si, A1, Au, W, Mg, Be, Zn, Pd, Cd, Au, Hg, Pt, Zr, Ti It may contain one or more metals selected from the group force consisting of Sn, Ni, and Fe forces.
- the present invention can also be defined as a method for manufacturing a semiconductor device. That is, the present invention
- Reducing the oxide film formed on the surface of the metal conductive region by heating the metal conductive region in an inert gas with an oxygen partial pressure of 1 X 10-13 atm or less;
- a method of manufacturing a semiconductor device is proposed.
- the metal conductive region may be Cu or an alloy thereof such as Si, AL, Au, W, Mg, Be, Zn, Pd, Cd, Au, Hg, Pt, etc.
- Group force consisting of Zr, Ti, Sn, Ni and Fe forces. It may contain one or more selected metals.
- the heating temperature (after all, the reduction temperature) is 450 ° C or lower.
- the semiconductor device including the step of depositing a passivation film on the surface of the metal conductive region in a vacuum or a low oxygen atmosphere without exposure to the air after the reduction treatment
- a manufacturing method is also proposed.
- the material of the passivation film for example, any one selected from SiC, SiCN, and SiN may be used.
- the step of depositing the other conductive region on the surface of the metal conductive region in a vacuum or in a low oxygen atmosphere without exposing to the atmosphere is performed.
- a method for manufacturing a semiconductor device is also proposed.
- the material of the other conductive region is selected from TaN, Ta, Ti, TiN, Cu, Ni, Mo, Co, and W, for example.
- P or B is introduced into any one or alloy thereof, or any one or alloy selected from Ni, Mo, Co, and W.
- the present invention can also be defined as a semiconductor device manufacturing apparatus,
- a reduction treatment chamber for containing a sample having a metal conductive region formed on a substrate and forming a closed space filled with an inert gas
- An oxygen pump that can reduce the oxygen partial pressure of the inert gas in the reduction chamber to 1 X 10-13 atmospheres or less;
- the metal conductive area is heated and formed on its surface!
- An apparatus for manufacturing a semiconductor device is provided.
- the reduction processing chamber may be a dedicated chamber for reduction processing, and a film forming chamber for forming another film also serves as this. Also good.
- the oxygen partial pressure in the inert gas surrounding the metal conductive region is kept below 1 X 10-13 , for example, in the case of Cu, it is at most 400 ° C, at most 450 ° C. If heating is performed, the oxide film formed on the surface is sufficiently reduced and removed. There is no thermal damage to the structure.
- FIG. 1 is a schematic explanatory view of the principle of the present invention and the configuration of a basic manufacturing apparatus.
- FIG. 2 is a schematic configuration diagram of an oxygen pump that can be used in the present invention.
- FIG. 3 is a spectrum of copper and oxygen on the surface of the copper layer before the surface reduction treatment.
- FIG. 4 is a spectrum of copper and oxygen on the surface of the copper layer after the reduction treatment according to the present invention.
- FIG. 5 is an explanatory diagram of a semiconductor device manufacturing process example according to the present invention.
- FIG. 6 is an explanatory diagram of a semiconductor device manufacturing process example according to the present invention continued from FIG. 5.
- FIG. 6 is an explanatory diagram of a semiconductor device manufacturing process example according to the present invention continued from FIG. 5.
- FIG. 7 is an explanatory diagram of a semiconductor device manufacturing process example according to the present invention continued from FIG. 6;
- FIG. 8 is an explanatory diagram comparing the via resistance of a copper region and the relative dielectric constant of a peripheral insulating film when the present invention is used and when a conventional method is used.
- Fig. 1 (A) shows the relationship between the equilibrium oxygen concentration of CuO, and the reduction temperature and oxygen partial pressure to be given to the sample are reduced below the equilibrium boundary curve Bo-r with the acid region Ro. By setting the area Rr, the CuO can be reduced.
- the oxygen pump 30 has an internal hollow cylindrical sealed container 31 and its shaft.
- a solid electrolyte 32 having oxide ion conductivity is disposed along the outer peripheral surface in the radial direction, and a breathable electrode made of platinum or the like along both the inner and outer peripheral surfaces of the solid electrolyte 32, for example, Net-shaped electrodes ⁇ + and E- are provided.
- a material in which a part of is replaced with Ga. (Material example 3)
- A Sr, Ca, Ba
- Bl Mg, Al, In
- B2 Co, Fe, Ni, Cu ⁇ Material indicated.
- L Mg, Al, Ga, In, Mn, Cr, Cu, Zn material.
- a semiconductor manufacturing apparatus having an oxide film removal function configured as described below.
- a load lock chamber 23 and a transfer robot 24 each of which has a known and existing configuration, are provided so as to be able to cooperate with each other without breaking the vacuum.
- the sample 10 manufactured as a semiconductor device having a required function is preferably moved between the film forming chamber and the reduction processing chamber according to the present invention without breaking the vacuum.
- a plurality (two in the illustrated case) of film forming chambers 21-1 and 21-2 are provided so as to be connected without breaking the vacuum.
- various thin films necessary to build a semiconductor device as a final product are formed.
- this type of deposition chamber 21-1, 21-2 and the load lock chamber 23 a robot chamber can vacuum evacuated by conventional vacuum pumps to about 1 X 10- 8 atm, is maintained under vacuum.
- these film formation chambers 21-1, 2 and 2 are connected without breaking the vacuum, but a reduction treatment chamber 22 is provided as an independent chamber, and an exhaust system Fv is provided here.
- the internal oxygen can be evacuated, and the electrochemical oxygen pump 30 as already described with reference to FIG. 2 is linked to the inert gas filled in the interior (not shown).
- the oxygen partial pressure of And summer so as to reduce to Kutomo about 1 X 10- "optionally from pressure 1 X 10- 31 atmospheres
- the inert gas in the reduction treatment chamber 22 flows into the oxygen pump 30 from the inflow path Fi, and the inert gas whose oxygen partial pressure has been reduced here again flows from the outflow path Fo.
- the inert gas source is provided in a separate location, and the extremely low oxygen partial pressure inert gas output from the oxygen pump 30 is reduced. After being supplied to the chamber 22 and playing a role, it may be exhausted from the exhaust system Fv.
- the sample 10 is shown in this figure, for example, generally a silicon substrate, which may be a silicon substrate or the like.
- the metal conductive region 12 that may be converted to / can be known per se and is heated by the heating means 25.
- the heating means 25 is schematically shown only by a heater symbol.
- any gas can be used as long as it does not cause an ionic reaction with the constituent metal of the metal conductive region 12 at the operating temperature.
- Ar, N, He, Medium force such as Ne, Xe, Kr can be selected.
- the metal conductive region 12 (substantially the entire sample 10) is placed in an atmosphere of an inert gas in which the oxygen partial pressure is controlled to 1 X 10-13 atm or less in the reduction treatment chamber 22.
- the surface oxide layer is reduced by heating at a maximum temperature of 450 ° C or lower, preferably 400 ° C or lower.
- the reduction of the surface oxide film is sufficient by reduction even at a reduction temperature of 400 ° C, which is not so high at an oxygen partial pressure of inert gas of 1 X 10-13 atmospheres. For example, even if a low dielectric constant thin film or the like is already formed in the periphery, there is no need to cause thermal or mechanical damage to it.
- the indoor pressure during the reduction treatment may be under reduced pressure or normal pressure with the vacuum pump shut off. Circulation such as exhausting out of the system via the system Fv or returning to the oxygen pump 30 again via the inflow path Fi to the oxygen pump 30 and returning to the reduction treatment chamber 22 from the outflow path Fo as necessary. A closed loop may be formed. In the case of circulation, since the inert gas is more purified, it becomes possible to reach a predetermined oxygen partial pressure in a shorter time.
- FIG. 1 (C) shows a case where the independent reduction treatment chamber 22 is not provided in the apparatus configuration described above, and one film formation chamber 21-2 also serves as this. The above description can be used as it is for the reduction treatment operation and reduction process in the above.
- the sample 10 by heating the sample 10 in an inert gas atmosphere with an ultra-low oxygen concentration, the surface oxide of the metal conductive region 12 formed on the sample 10 is reduced, and the sample 10 is cleaned. A metal thin film can be formed, and the force does not damage the surrounding structure. Therefore, even if no special post-treatment is performed, the sample 10 is transferred by the transfer robot 24 in the ultrahigh vacuum or at least in a low oxygen atmosphere without being exposed to the atmosphere.
- Cu or its alloy is deposited as another conductive region directly on the surface of the metal conductive region, or a barrier metal such as TaN, Ta, Ti, TiN or their alloys, Ni, Mo, Cap metal with P or B introduced into Co, W or its alloy, Ni, Mo, Co, W or its alloy can be deposited immediately.
- a passivation insulating film such as a SiC, SiCN, or SiN thin film can be immediately deposited.
- the surface of the metal conductive region 12 whose surface has been cleaned has no other metal conductive region, for example, an intra-layer wiring, in a vacuum or at least in a low oxygen atmosphere without being exposed to the atmosphere.
- a step of depositing a conductive region such as Cu, Ta N, or Ta can be employed as an interlayer wiring in a via structure extending between upper and lower layers of a multilayer structure.
- a Cu thin film as a metal conductive region 12 having a lOOnm thickness is formed on a silicon substrate 11 through a silicon nitride film having a lOOnm thickness by sputtering.
- This sample 10 was transported into an independent reduction chamber 22, while argon gas was introduced into the oxygen pump 30 via a mass flow controller at 200 sccm, and the oxygen partial pressure was 1 ⁇ 10— After the pressure was reduced to 13 atmospheres, the gas was introduced into the reduction treatment chamber 22.
- - reducing the processing chamber vacuum in itself was 1 X 10- 3 atm.
- the silicon substrate 11 was heat-treated at 400 ° C for 1 minute to attempt reduction of copper oxide on the surface of the Cu thin film.
- the sample 10 was transferred into a vacuum chamber equipped with an X-ray photoelectron spectrometer in vacuum, and a photoelectron spectrum was acquired.
- the copper spectrum before reduction shown in FIG. 3 (B), the copper spectrum after reduction treatment shown in Fig. 4 (A) and the oxygen spectrum shown in Fig. 4 (B) are obtained. It was confirmed that the oxides on the Cu thin film previously seen were completely removed and clean copper appeared.
- the reduction treatment was performed to a depth region where the Cu thin film surface force was 50 nm or more. This is a very favorable treatment result that has never been obtained before.
- the inert Ar gas used in the reduction treatment was discharged out of the system by the vacuum pump here, as described above, the spent gas is returned to the oxygen pump again from the outlet of the vacuum pump. Even if a closed loop was formed, it was confirmed that the reduction treatment could be performed similarly. Furthermore, it was confirmed that the reduction treatment could be performed in the same way even if the reduction pump was shut off during the reduction treatment and the reduction treatment was performed after the treatment chamber was filled with Ar gas at atmospheric pressure. In this case, the same effect was obtained even if the spent gas was discharged out of the system as it was, or it was returned to the oxygen pump again to form a closed loop.
- the heating temperature was increased to about 450 ° C, which can be considered as the maximum temperature allowed for the multilayer wiring process.
- the oxygen partial pressure was changed in the state, the surface was reduced if it was kept below 1 X 10-13 atm, and beyond that, some copper oxide remained. This is also a thermodynamically valid result.
- etching is performed on a layer structure 51 on a silicon substrate 11 in which elements such as transistors and element isolation regions (none of which are shown) are formed in advance.
- 'A SiCN film 52 with a relative dielectric constant of 5 was deposited as a stopper.
- a SiOC film having a relative dielectric constant of 3 was deposited to a thickness of 400 nm to form an interlayer insulating film 53.
- a SiO film 54 was deposited to a thickness of about lOOnm as a hard mask 54 for the mask.
- a trench 55 for forming an insulating film and wiring was formed by a known photolithography and dry etching technique.
- a sputtering method under high vacuum is applied, and a Cu layer 56 that serves as a Cu diffusion prevention film and a seed layer for Cu plating is continuously formed in a wiring groove 55. It was deposited so as to cover the inner wall.
- a Cu layer 57 was formed by a plating method so as to fill the wiring groove 55.
- the excess Cu layer portion other than in the wiring trench 55 is the C described above.
- the reduction chamber 22 shown in FIGS. 1 (B) and (C) is used.
- a SiCN film 58 was deposited to a thickness of 50 by chemical vapor deposition using plasma excitation, and the sample was taken out into the atmosphere.
- a SiC film or a SiN film can also be used.
- the substrate 11 may be transported in a low oxygen atmosphere, not under vacuum, and as a cap metal covering the reduced Cu surface, Ni, Mo, Co, W or It is also possible to select an alloy such as CoW, NiMo, Ni, Mo, Co, W or an alloy obtained by introducing P or B, such as NiMoP or CoWP, and deposit them by an appropriate deposition method.
- the present inventor further tried a process of constructing a further laminated structure instead of taking the sample into the atmosphere in the above-mentioned final process.
- the barrier insulating film 58 formed in the process shown in FIG. 6 (B) is configured as an etching 'stopper layer 58, and as shown in FIG. 6 (C), A SiOC interlayer insulating film 59 having a relative dielectric constant of 3 was deposited to a thickness of 200 nm, and a SiO hard mask 60 was further deposited thereon to a thickness of lOOnmm.
- a through hole 61 having a depth of 200 nm and a diameter of 100 nm is drilled in the interlayer insulating film 59, and the surface of the etching stopper layer 58 is exposed at the bottom thereof. Thereafter, the etching stopper layer 58 was etched away by etch back, and the upper surface of the lower Cu wiring 57c was exposed at the bottom of the through hole 61 as shown in FIG. 6 (D).
- Ar gas was used as the inert gas, and the reduction treatment was performed at normal pressure.
- the Ar gas exhausted from the reduction processing equipment was returned to the oxygen pump 30 shown in FIGS. 1 (B) and 1 (C) and circulated for use.
- the reduction treatment chamber 22 shown in FIGS. 1 (B) and 1 (C) is evacuated again, and the robot 24 performs another operation under a vacuum or, as described above, under a low oxygen atmosphere.
- the substrate 11 is transferred to the film formation chamber 21-1 or 21-2, and the same procedure as already described in the process related to FIG. 20 nm thick Ta or TaN, or Ti or TiN, or Cu is deposited on the inner peripheral surface and bottom of the hole 61 by sputtering, and then, as shown in FIG. After filling 61 with Cu layer 63, as shown in FIG. 7 (C), excess Cu layer 63 region was removed by CMP method to form Cu plug 63p to be a vertical wiring.
- the hydrogen concentration at the junction between the upper and lower Cu layers and at the interface between the lower Cu layer 57c and the passivation film 58 is kept below the detection lower limit. And improved the adhesion at the interface between the two. Therefore, even in a semiconductor device that has already been manufactured, whether or not it is in accordance with the present invention depends on whether the residual hydrogen concentration around the metal conductive region where the oxide film does not remain and becomes a clean surface. Can be determined by measuring.
- the via resistance was measured. As shown in FIG. 8 (A), the via resistance was about 2 ⁇ from 2.2 ⁇ when not processed. The resistance was reduced by about 10%. Further, as shown in FIG. 8 (B), according to the present invention, no increase in the relative dielectric constant of the SiCN interlayer insulating film due to the reduction treatment was observed, and in the case of the conventional hydrogen plasma treatment, this figure is also shown. As can be seen from the fact that a considerable deterioration (increase) in the dielectric constant is recognized at about 0.4, the effect of the present invention is considerably large.
- an interlayer is further formed on the element structure shown in FIG.
- An insulating film 65 and a hard mask 66 are formed, a through hole 67 is opened by the above-described method, a Cu wiring 68c is formed therein, and the surface is covered with a passivation film 69 to obtain a multilayer structure. Furthermore, by repeating such a process, a semiconductor device having a stacked structure of as many layers as possible can be constructed.
- the force mainly described for the Cu wiring can be applied to many metals (including alloys) to which the present invention can be applied, as well as the wiring alone.
- metals including alloys
- the present invention can be applied to many metals (including alloys) to which the present invention can be applied, as well as the wiring alone.
- A1 is 1150 ° C or more
- Ti is 980 ° C or higher
- the dielectric breakdown of the peripheral oxide film can be prevented, and the fluctuation of the threshold voltage due to charge-up follows the conventional method. Compared to the case, we were able to reduce it by about 10%.
- the oxygen pump 30 in the sense of a functional device that controls and reduces the partial pressure of oxygen in an inert gas, the oxygen pump 30 having the structure shown in FIG.
- the oxygen partial pressure of the inert gas supplied to the reduction treatment chamber should be at least 1 X 10-13. Any structure can be adopted as long as the oxygen pump can reduce the pressure to atmospheric pressure.
- the basic method in the so-called damascene method that is, the power adopting the single damascene method, of course, the dual 'damascene described at the beginning.
- the present invention can be applied effectively.
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Abstract
Description
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Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
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DE112006000307T DE112006000307B4 (de) | 2005-02-02 | 2006-01-27 | Verfahren und vorrichtung zur herstellung einer halbleitereinrichtung |
US11/815,151 US20090014881A1 (en) | 2005-02-02 | 2006-01-27 | Semiconductor device, and method and apparatus for manufacturing same |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
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JP2005026400A JP4621888B2 (ja) | 2005-02-02 | 2005-02-02 | 半導体装置の製造方法 |
JP2005-026400 | 2005-02-02 |
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WO2006082756A1 true WO2006082756A1 (ja) | 2006-08-10 |
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PCT/JP2006/301295 WO2006082756A1 (ja) | 2005-02-02 | 2006-01-27 | 半導体装置とその製造方法、及び製造装置 |
Country Status (4)
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US (1) | US20090014881A1 (ja) |
JP (1) | JP4621888B2 (ja) |
DE (1) | DE112006000307B4 (ja) |
WO (1) | WO2006082756A1 (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP2090545A1 (en) * | 2006-12-05 | 2009-08-19 | Canon Machinery Inc. | Oxygen partial-pressure control unit and method of gas supply |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2009147218A (ja) * | 2007-12-17 | 2009-07-02 | Toshiba Corp | 半導体装置とその製造方法 |
JP2009260141A (ja) * | 2008-04-18 | 2009-11-05 | Panasonic Corp | インダクタ素子を備えた半導体装置 |
JP5537016B2 (ja) * | 2008-10-27 | 2014-07-02 | 株式会社東芝 | 半導体装置および半導体装置の製造方法 |
JP5066204B2 (ja) * | 2010-03-03 | 2012-11-07 | 株式会社東芝 | 蛍光体、および発光装置 |
JP2015056557A (ja) * | 2013-09-12 | 2015-03-23 | 株式会社東芝 | 半導体装置 |
US20170239730A1 (en) * | 2014-08-13 | 2017-08-24 | National Institute Of Advanced Industrial Science And Technology | Processing device for metal materials |
JP7465979B2 (ja) | 2020-03-10 | 2024-04-11 | アプライド マテリアルズ インコーポレイテッド | 選択的な酸化および簡略化された前洗浄 |
US11380536B2 (en) | 2020-05-05 | 2022-07-05 | Applied Materials, Inc. | Multi-step pre-clean for selective metal gap fill |
CN115241322A (zh) * | 2022-06-22 | 2022-10-25 | 通威太阳能(安徽)有限公司 | 电极的去氧化方法、电池的制备方法、电池和电子产品 |
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US2340764A (en) * | 1940-11-30 | 1944-02-01 | Vadim S Makaroff | Lifting device |
US2922533A (en) * | 1957-12-30 | 1960-01-26 | Labarge Pipe And Steel Company | Lift |
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2005
- 2005-02-02 JP JP2005026400A patent/JP4621888B2/ja active Active
-
2006
- 2006-01-27 DE DE112006000307T patent/DE112006000307B4/de not_active Expired - Fee Related
- 2006-01-27 WO PCT/JP2006/301295 patent/WO2006082756A1/ja not_active Application Discontinuation
- 2006-01-27 US US11/815,151 patent/US20090014881A1/en not_active Abandoned
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JP2000164531A (ja) * | 1998-11-30 | 2000-06-16 | Toshiba Corp | 微粒子膜形成装置・形成方法、ならびに半導体装置およびその製造方法 |
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JP2002326887A (ja) * | 2001-04-27 | 2002-11-12 | Nec Machinery Corp | 酸素分圧制御による試料作成方法および試料作成装置 |
JP2003045960A (ja) * | 2001-08-01 | 2003-02-14 | Matsushita Electric Ind Co Ltd | 半導体装置及びその製造方法 |
JP2003209113A (ja) * | 2002-01-16 | 2003-07-25 | Matsushita Electric Ind Co Ltd | 半導体装置の製造方法 |
JP2005051185A (ja) * | 2003-07-31 | 2005-02-24 | Toshiba Corp | 熱処理方法及び半導体装置の製造方法 |
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EP2090545A1 (en) * | 2006-12-05 | 2009-08-19 | Canon Machinery Inc. | Oxygen partial-pressure control unit and method of gas supply |
EP2090545A4 (en) * | 2006-12-05 | 2012-03-21 | Canon Machinery Inc | UNIT FOR THE CONTROL OF OXYGEN PARTICULAR PRESSURE AND GAS SUPPLY METHOD |
Also Published As
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DE112006000307B4 (de) | 2012-06-21 |
DE112006000307T5 (de) | 2008-04-17 |
JP2006216673A (ja) | 2006-08-17 |
JP4621888B2 (ja) | 2011-01-26 |
US20090014881A1 (en) | 2009-01-15 |
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