WO2006073733A1 - Appareil et procede de balayage lent (horizontal) pour systemes d'affichage a balayage transpose - Google Patents

Appareil et procede de balayage lent (horizontal) pour systemes d'affichage a balayage transpose Download PDF

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Publication number
WO2006073733A1
WO2006073733A1 PCT/US2005/045548 US2005045548W WO2006073733A1 WO 2006073733 A1 WO2006073733 A1 WO 2006073733A1 US 2005045548 W US2005045548 W US 2005045548W WO 2006073733 A1 WO2006073733 A1 WO 2006073733A1
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WO
WIPO (PCT)
Prior art keywords
scan
yoke
transposed
horizontal
deflection system
Prior art date
Application number
PCT/US2005/045548
Other languages
English (en)
Inventor
Richard Hugh Miller
Frank Melvin Koch
James Arthur Hutton
Richard William Collins
Richard Laverne Eyer
Original Assignee
Thomson Licensing
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Thomson Licensing filed Critical Thomson Licensing
Publication of WO2006073733A1 publication Critical patent/WO2006073733A1/fr

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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N3/00—Scanning details of television systems; Combination thereof with generation of supply voltages
    • H04N3/10—Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical
    • H04N3/16—Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical by deflecting electron beam in cathode-ray tube, e.g. scanning corrections
    • H04N3/22—Circuits for controlling dimensions, shape or centering of picture on screen
    • H04N3/23—Distortion correction, e.g. for pincushion distortion correction, S-correction
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N3/00—Scanning details of television systems; Combination thereof with generation of supply voltages
    • H04N3/10—Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical
    • H04N3/30—Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical otherwise than with constant velocity or otherwise than in pattern formed by unidirectional, straight, substantially horizontal or vertical lines

Definitions

  • the present invention relates to cathode ray tubes (CRTs) for displays such as, for example, High Definition Television (HDTV). More particularly, it relates to CRTs operating in a vertical scan mode and a method of operating the CRT in the vertical scan mode.
  • CRTs cathode ray tubes
  • HDTV High Definition Television
  • FIG. 1 illustrates the basic geometrical relationship between throw distance and deflection angle for a typical CRT. Increasing the deflection angle (A) reduces the throw distance, thus allowing for production of a shorter CRT and ultimately, a slimmer television set.
  • obliquity is defined as the effect of a beam intercepting the screen at an oblique angle, thereby causing an elongation of the spot.
  • the problem of obliquity becomes especially apparent in CRTs having a standard horizontal gun orientation, i.e., a CRT whose guns have a horizontal alignment along the major axis of the screen.
  • a spot having a generally circular shape at the center of the screen becomes oblong or elongated as the spot moves toward edges of the screen.
  • CRT's typically include a horizontal yoke that generates a pincushion shaped field and a vertical yoke that generates a barrel shaped field. These yoke fields cause the spot shape to become elongated. This elongation adds to the obliquity effect by further increasing spot distortion at the three-o'clock and nine o'clock positions (referred to as the "3/9" positions) and at corner positions on the screen.
  • U.S. Patent No. 5, 170,102 describes a CRT with a vertical electron gun orientation whose un-deflected beams appear parallel to the short axis of the display screen.
  • the deflection system described in this patent includes a signal generator for causing scanning of the display screen in a raster-scan fashion, thereby yielding a plurality of lines oriented along the short axis of the display screen.
  • the deflection system also comprises a first set of coils for generating a substantially pincushion-shaped deflection field for deflecting the beams in the direction of the short axis of the display screen.
  • a second set of coils generates a substantially barrel shaped deflection field for deflecting the beams in the direction in the long axis of the display screen.
  • the deflection system's coils generally distort spots by elongating them vertically. This vertical elongation compensates for obliquity effects, thereby reducing spot distortion at the 3/9 and corner positions on the screen.
  • the barrel shaped field required to achieve self convergence at 3/9 screen locations overcompensates for obliquity and vertically elongates the spot at the 3/9 and corner locations as shown in Figure 10 of the U.S. Patent No. 5, 170,102.
  • a video display system that comprises a cathode ray tube having a picture display area.
  • the display system includes a deflection system for the cathode ray tube to provide line rate scanning in a vertical direction.
  • a method and apparatus is provided for implementing a slow scan system that provides the required corrections in order to operate the transposed scan display device.
  • the horizontal scan deflection system for a transposed scan display includes a yoke for scanning an electron beam in a transposed scan display in a horizontal direction, and means for driving the yoke in the horizontal scan direction, said driving means including an audio amplifier.
  • the driving means can also include S correction means for achieving required linearity for the horizontal scan.
  • the S correction means includes an absolute value circuit for generating a modulation waveform, wherein said modulation waveform is integrated with a DC signal to produce the S corrected ramp waveform.
  • the S correction means includes an absolute value circuit for generating a modulation waveform, means for generating a linear ramp signal, and means for controlling a DC current input to said generating means for adapting the linear ramp signal to a deflection angle in the transposed scan display.
  • the absolute value modulation waveform is integrated with the DC signal to produce the S corrected ramp waveform.
  • the driving means further includes means for providing flyback voltage to the yoke, wherein said flyback voltage means increases the voltage beyond said driving means capability during a retrace interval.
  • the deflection system includes means for preventing unwanted shutdown of the horizontal scan circuitry.
  • the preventing means includes tying two inputs of the audio amplifier together to receive one of a differential output from a sync processor.
  • the method for providing a horizontal scan deflection system for a transposed scan display includes the steps of compensating for horizontal scan linearity distortions resulting from increasing deflection angles greater than 100 degrees in the transposed scan display, and providing increased yoke current and yoke voltage required during retrace intervals of the transposed scan display.
  • the compensating includes generating an S corrected ramp waveform for driving the yoke scanning an electron beam in the horizontal direction of the transposed scan display.
  • the providing increased yoke current and voltages further includes incorporating an audio amplifier into a slow scan (horizontal scan) circuit of the transposed scan display device.
  • the horizontal scan deflection system for a transposed scan display includes a yoke for scanning an electron beam in a transposed scan display in a horizontal direction, means for driving the yoke in the horizontal scan direction, and means compensating for horizontal scan linearity distortions in the driving means resulting from increasing deflection angles greater than 100 degrees in the transposed scan display.
  • Figure 1 is a diagram depicting the basic geometrical relationship between the throw distance and deflection angle in a typical CRT;
  • Figure 2a is a diagrammatic cross-sectional view of a CRT according to an embodiment of the present principles
  • Figure 2b is a diagram representing the lines and pixels of a standard scan CRT
  • Figure 2c is a diagram representing the lines and pixels of the transposed scan display according to an embodiment of the present principles
  • Figure 3 is a block diagram of the transposed scan display system incorporating the low frequency scan method of the present principles
  • Figures 4a - 4c illustrate schematic diagrams of an illustrative embodiment of the video display system for driving the CRT of FIG. 2 in accordance with an embodiment of the present principles
  • Figure 5 is a schematic diagram of the slow scan circuit according to an embodiment of the present principles
  • Figure 6 is an exemplary schematic diagram of slow scan linearity circuit according to an embodiment of the present principles
  • Figure 7 is a schematic diagram of a sync processor according to an embodiment of the present principles
  • Figure 8 is a graphical representation of the slow scan S correction according to an embodiment of the present principles.
  • Figure 9 is a graphical representation of the yoke driving voltage and current through the yoke according to an embodiment of present principles.
  • Figure 10 is a graphical representation of the yoke driving voltage, yoke current through the yoke during the retrace interval according to an embodiment of the present principles.
  • FIG. 2a illustrates a cathode ray tube (CRT) 1, for example a W76 wide screen tube, having a glass envelope 2 having a rectangular faceplate panel 3 and a tubular neck 4 connected by a funnel 5.
  • the funnel 5 has an internal conductive coating (not shown) that extends from an anode button 6 toward the faceplate panel 3 and to the neck 4.
  • the faceplate panel 3 comprises a viewing faceplate 8 and a peripheral flange or sidewall 9, which is sealed to the funnel 5 by a glass frit 7.
  • the inner surface of the faceplate panel 3 carries a three-color phosphor screen 12.
  • the screen 12 comprises a line screen with the phosphor lines arranged in triads. Each triad includes a phosphor line of three primary colors, typically Red, Green and Blue, and extends generally parallel to the major axis of the screen 12.
  • a mask assembly 10 lies in a predetermined spaced relation with the screen 12.
  • the mask assembly 10 has a multiplicity of elongated slits extending generally parallel to the major axis of the screen 12.
  • An electron gun assembly 13, shown schematically by dashed lines in Figure 2a, is centrally mounted within the neck 4 to generate three inline electron beams, a center beam and two side or outer beams, directed along convergent paths through the mask frame assembly 10 to strike the screen 12.
  • the electron gun assembly 13 has three vertically oriented guns, each generating an electron beam for a separate one of the three colors, Red, Green and Blue.
  • the three guns lie in a linear array extending parallel to a minor axis of the screen 12.
  • the CRT 1 employs an external magnetic deflection system comprised of a yoke 14 situated in the neighborhood of the funnel-to-neck junction. When activated with deflection currents, the yoke 14 generates magnetic fields that cause the beams to scan over the screen 12 vertically and horizontally in a rectangular raster.
  • FIG. 2b shows an example of a standard orientation (scan) CRT having 720 horizontally scanned lines each having a pixel width of 1280.
  • the image must undergo a translation into a vertical scan pattern such that the signal sequence starts at the upper left hand corner of the image.
  • the subsequent signal elements then follow along a vertical line from top to bottom along the left edge.
  • generation of a signal element at the top edge of the image at the second scan line occurs, followed by the signal elements corresponding to a sequence from top to bottom along the second scan line.
  • the third scan line starts at the top and proceeds to the bottom of the image, and thus the corresponding top to bottom signal element must be provided. This process continues through the last scan line at right vertical edge of the image.
  • Figure 2c shows an example of the vertical scanning of the transposed scan display according to an embodiment of the present principles. As shown in this example, there are 1280 vertically scanned lines, each having a length of 720 pixels.
  • Digital Orthogonal Scan and/or DOS refer to the above-described transposition operation and is used herein interchangeably with the term “transposed scan display”.
  • CRT displays exhibit raster distortions.
  • the most common raster distortions pertain to geometric errors and to convergence errors.
  • a geometric error results from non-linearities in the scanned positions of the beams as the raster traverses the screen.
  • Convergence errors occur in a CRT display when the Red, Green and Blue rasters do not align perfectly such that over some portion of the image, a Red sub-image appears offset with respect to the Green sub-image and the Blue sub-image appears offset with respect to the Green sub-image.
  • Convergence errors of this type can occur in any direction and can appear anywhere in the displayed image.
  • transposed scan display correction requirements include, but are not limited to: 1) S correction (i.e. to achieve required linearity for increased deflection angles); 2) increased yoke current; 3) increased flyback voltage for retrace; and 4) shutdown prevention due to increased heat generation.
  • FIG. 3 shows a block diagram of the transposed scan display system 100 according to an embodiment of the present principles.
  • an input from a high definition (HD) video source 102 such as, for example from a cable, satellite, network or other service provider is provided to the display system.
  • the high resolution source input is fed to an FPGA 110 where it is input into the video processor 116.
  • an RGB to YPrPb converter 104 may be required to input the Y, Pr and Pb signals to the video processor 116.
  • content source 102 provides horizontal and vertical sync signals (H & V) which are processed by the FPGA 110 and output to the sync processor 118.
  • H & V horizontal and vertical sync signals
  • the video processor 116 outputs the RGB video signals to the video drivers 133 which drive the electron guns of the transposed scan (DOS) CRT 200.
  • the sync processor 118 outputs several signals including synchronization signals to a waveform generator 120 embodied within the microprocessor 112 in order to generate the appropriate waveform for the quad coil drivers 130, and for N-S Pincushion Modulator 124.
  • the waveform generator can be incorporated into the FPGA 110 and thus be eliminated from the microprocessor the circuit shown in Figure 3.
  • the sync processor 118 is responsible for handling the synchronization of the output signals to the transposed scan (DOS) CRT 200. As such, it is responsible for the fast scan (V Drive) and slow scan (H Drive) signals input to the V scan 128 and H scan 126 circuits, respectively.
  • Sync processor 118 also provides control signals to the focus modulation generator 120, which controls the dynamic focus output 121 connected to the anode power supply 134.
  • the video processor 116 may include OSD insertion 117 capabilities.
  • the OSD may be integrated into video processor 116, or the microprocessor 112, or the FPGA 110 without departing from the spirit of the present disclosure.
  • ASIC application specific integrated circuit
  • Examples of such circuits that could be embodied in one or more ASICS would be, FPGA 110, Microprocessor 112, RGB to YPrPb converter 104, sync processor 118, video processor 116 and/or focus modulation generator 120.
  • Microprocessor 112 functions to control the video processor 116, and thus the video drivers 133, the OSD 117, FPGA 110, and the SW mode power supply 113.
  • An IR pickup 114/ keyboard or other user interface device may be connected to the microprocessor for providing remote control capability to the system 100.
  • the Anode power supply outputs the heater voltage and G2, G3 and G5 voltages to the appropriate pins (not shown) of the electron gun 13. In addition, it provides a 3OkV anode voltage to the transposed scan CRT 200.
  • the quad drivers 130 drive the quad coils 16 of the CRT, and the V scan 128 and H scan 126 circuits drive the yoke 14.
  • the video drivers 133 provide the video signals to the electron gun 13 for display on the CRT 200.
  • the fast scan sync waveform generated by the V scan circuit 128, is used by: the sync processor 118 for phase correction; the video processor 116 to generate blanking; the SW mode power supply
  • the present principles provide a method and corresponding circuitry for implementing a slow scan (H scan) system for transposed scan CRTs.
  • FIGS 4a - 4c are exemplary schematic diagrams of the circuitry embodying the transposed scan display system according to the present principles. As will be noted, the identified blocks in these figures correspond to blocks in Figure 3.
  • the amount of "S” correction needed varies with the tangent of the deflection angle (referring to Figurel).
  • the greater the deflection angle the more "S” correction that is required.
  • 30% more "S” correction is required for a 118 degree (corner to corner) CRT than that for a 104 degree (corner to corner) CRT.
  • the Philips TDA4858 sync processor is capable of providing sufficient correction for 104 degree CRTs along the minor axis.
  • such Integrated circuit cannot provide enough correction along the major axis of a 16:9 aspect ratio 118 degree CRT.
  • the horizontal scan H scan or slow scan in the transposed scan display
  • Figure 5 shows an exemplary schematic diagram of the slow scan (H scan) circuit 126 according to an embodiment of the present principles.
  • Figure 6 shows an exemplary schematic diagram of the absolute value circuit portion 602 of the sync processor 118 according to an embodiment of the present principles.
  • Figure 7 shows an exemplary schematic diagram of the sync processor 118 according to an embodiment of the present principles.
  • the size input may be modulated for the desired S correction. Normally, a constant current is drawn from this input, which is internally tied and held at +5 volts. The constant current is integrated into a linear ramp waveform.
  • FIG. 7 shows an exemplary schematic diagram of the sync processor circuit 118 where the slow scan size (SS Size) potentiometer VR161 is coupled to input 702 of the TDA4858.
  • SS Size slow scan size potentiometer VR161
  • potentiometer VR161 provides a range of size control input from 39k ohms to 239k ohms to ground, or 21 ⁇ A to 128 ⁇ A linear adjustment input limits.
  • the absolute value circuit 602 of Figure 6 (which is part of the sync processor 118) has an output 604 that is AC coupled and tied to the SS size input 702 via connection 704 with resistor VR192.
  • resistor VR192 is a 13k ohm resistor, which provides ⁇ 92 ⁇ Ap-p.
  • the internal linearity correction control of the sync processor circuit IC VUlOO is used to trim the exact amount of S correction needed for a specific yoke and CRT combination.
  • the absolute value circuit 602 is part of the sync processor circuit 118 and receives a constant amplitude waveform from the sync processor identified as LINEARJRAMP, which is buffered by op amp VU102.
  • the BUFFERED_RAMP signal feeds the input to the absolute value circuit 602 with no amplitude adjustment to the same.
  • This linear ramp waveform is shown in Figure 8 and depicted as waveform 802. Referring to Figure 8, the linear ramp waveform 802 (from the sync processor) creates the absolute value modulated waveform 804 output from the absolute value circuit 602.
  • the combination of the absolute value signal 804 with the DC slow scan size (SS Size) potentiometer VRl 61 is integrated by the sync processor IC VUlOO to result in the S correction waveform 806 shown.
  • the resulting S correction waveform 806 output from the sync processor 118 is applied to the output stage of the slow scan circuit 126.
  • the slow scan circuit 126 drives the yoke at outputs 550+ and 550- to the yoke (See. Fig. 5).
  • the voltage of absolute value waveform 804 is at its highest, while being at its lowest in the center. This causes the size input current to be least at the start and end of the scan and greatest at its center. For example, if we assume the duty cycle of the absolute value circuit 602 is 50%, it is desirable to set the DC current near 75 ⁇ A (via ss size input 702). The range of currents the input would then see would be from (75 ⁇ A - (92 ⁇ A/2)) or 29 ⁇ A at the start and end of the scan to (75 ⁇ A + (92 ⁇ A/2)) or 121 ⁇ A in the center of the scan.
  • the upper and lower limits of 121 ⁇ A and 29 ⁇ A are within 7 ⁇ A and 8 ⁇ A from the size inputs limits defined above of 128 ⁇ A and 21 ⁇ A, respectively.
  • an audio IC 502 is implemented for the slow scan (H scan) circuit 126. Referring to Figure 5, an audio IC 502 is used to provide the necessary yoke current for increased deflection angles in the transposed scan display.
  • the audio IC 502 can be a Philips TDA2052.
  • the audio IC is capable of 12 Ap-p and has a maximum operating voltage of +/- 25V. According to one embodiment, shown in Figure 5, the audio IC 502 is operated at +/- 22V.
  • the slow scan circuit 126 includes flyback voltage circuit 500 that provides the required increased voltage needed during the retrace intervals.
  • the exemplary flyback voltage circuit 500 includes two MOSFETS FQ 108 and FQ 109 that function as switches.
  • FQ 109 is in series with the audio IC 502 output and the yoke + output 550+. This switch FQ 109 is always on except when the resonant retrace is occurring (i.e., during the blanking interval).
  • the second switch FQ108 is switched on only during the resonant retrace to connect the capacitor FC 127 to the positive yoke output 550+.
  • Capacitor FC127 is charged by FD103 during trace time.
  • the MOSFETS FQ109 and FQ108 return to their normal scan mode operation.
  • the resonant retrace (waveform 1002) slews the current (waveform 1003) at approximately >12 amps/ms, while the slew rate is limited to about 1.2 amps/ms (yoke current waveforml003) with just the audio IC driving the yoke.
  • the voltage required to drive the MOSFET FQ108 is stored in the capacitor FC124 during the end of each scan, through the diode FD 105.
  • Zener diodes FD 107 and FD 108 are used across the gate to source of each MOSFET (switch) FQ109 and FQ108 to limit the gate voltage to a safe level both for normal operation and for faults, such as, for example, CRT arcing.
  • Figure 9 shows a graphical representation of yoke driving voltage and current through the yoke.
  • the yoke drive voltage waveform 901 is output from the audio IC 502 output 550+ through MOSFET FQ109, and the current waveform 902 represents the current through the yoke.
  • the yoke voltage and yoke current substantially track each other.
  • the spikes in the waveforms of Figure 9 represent the resonant retrace during the blanking interval.
  • audio IC 502 is not typical for CRT applications, and even more particularly in the transposed scan display of the present principles. This is primarily due to the fact that standard (non-transposed scan) CRT displays do not have the same increased current requirements as in the transposed scan display CRT of the present principles.
  • a system is employed to prevent the unwanted shutdown of the audio IC 502.
  • Unwanted shutdown of the audio IC 502 can occur at elevated temperatures, or when its internal safe operating area protection is tripped. Since the audio IC 502 was designed to operate with resistive loads, and not inductors like the yoke of a CRT, its safe operating area protection is close to being tripped right from the start. In addition, the temperature of the IC runs hot due to the +22 supply voltage only 3 volts from its operating voltage of 25V. As shown in Figure 5, the audio IC 502 has a second input +ESfM which is normally supplied with a reduced level signal or none at all.
  • This input +BSfM is referred to as the mute input and is activated when the IC 502 approaches thermal shutdown.
  • This input would ordinarily be tied to ground or a significantly lower amplitude audio signal. In this mode, the output audio level would be "muted” until the thermal temperature returns to normal operating ranges. As mentioned above, such shutdown during operation of the transposed scan display of the present principles would be unacceptable.
  • by tying mute input +BSfM to the play input +INP unwanted shutdowns due to over heating is prevented. The tying of these two inputs together prevents a reduction in the deflection current when a first level of shutdown could ordinarily occur.
  • the slow scan circuit uses differential inputs for noise cancellation.
  • the Sync processor circuit 118 includes differential outputs, which can be used to cancel coupled signals from other sources. This helps to maintain good signal to noise ratios in the vertical scan signals of the present principles.
  • the audio IC 502, and audio ICs in general do not have differential inputs.
  • the -IN is generally used to set the gain of the amplifier.
  • this input at pin 6 is used as one of the differential inputs 503 from the sync processor output 703.
  • the other differential input 501 to audio IC 502 is provided from the sync processor output 701.

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  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Details Of Television Scanning (AREA)

Abstract

L'invention a trait à un appareil et à un procédé de balayage lent (horizontal) destinés à un dispositif d'affichage à balayage transposé (CRT), qui font appel à un amplificateur audio et à un circuit de tension à retour du spot correspondant pour augmenter l'intensité et la tension de collier de dérivation, en particulier pendant les temps de retour du balayage horizontal. La transposition du balayage (autrement dit, CRT à balayage vertical) nécessite des considérations et des corrections supplémentaires pour empêcher les distorsions de linéarité dans les signaux de courant excitant le collier de dérivation. Une forme d'onde de correction en S est générée afin que la linéarité requise pour le balayage horizontal soit obtenue.
PCT/US2005/045548 2004-12-31 2005-12-15 Appareil et procede de balayage lent (horizontal) pour systemes d'affichage a balayage transpose WO2006073733A1 (fr)

Applications Claiming Priority (2)

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US64043404P 2004-12-31 2004-12-31
US60/640,434 2004-12-31

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WO2006073733A1 true WO2006073733A1 (fr) 2006-07-13

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3890542A (en) * 1973-08-15 1975-06-17 Gunter J Zimmermann Vertical deflection circuit for television receivers
GB1440098A (en) * 1972-08-17 1976-06-23 Texas Instruments Inc Vertical deflection circuit for television receivers
GB1538523A (en) * 1975-10-09 1979-01-17 Indesit Television receiver
WO2003085950A2 (fr) * 2002-04-04 2003-10-16 Thomson Licensing S.A. Balayage bidirectionnel transpose dans un tube cathodique

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1440098A (en) * 1972-08-17 1976-06-23 Texas Instruments Inc Vertical deflection circuit for television receivers
US3890542A (en) * 1973-08-15 1975-06-17 Gunter J Zimmermann Vertical deflection circuit for television receivers
GB1538523A (en) * 1975-10-09 1979-01-17 Indesit Television receiver
WO2003085950A2 (fr) * 2002-04-04 2003-10-16 Thomson Licensing S.A. Balayage bidirectionnel transpose dans un tube cathodique

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
KRIJN M P C M ET AL: "36.2: Transposed Scanning: The Way to Realize Super-Slim CRTs", SID 01 DIGEST, vol. XXXII, 2001, pages 1008, XP007007725 *

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