WO2006073733A1 - A slow (horizontal) scan method and apparatus for transposed scan display systems - Google Patents

Abstract

The slow scan (horizontal) scan apparatus and method for a transposed scan display (CRT) utilizes an audio amplifier and corresponding flyback voltage circuitry to achieve increased yoke current and voltage, especially during retrace intervals of the horizontal scan. Through the transportation of the scan (i. e., a vertical scan CRT), additional considerations and corrections are required for preventing linearity distortions in the current signals driving the yoke. An “S” correction waveform is generated to achieve the required linearity for the horizontal scan.

Description

A SLOW (HORIZONTAL) SCAN METHOD AND APPARATUS FOR

TRANSPOSED SCAN DISPLAY SYSTEMS

CROSS REFERENCE TO RELATED APPLICATIONS This application claims the benefit under 35 U.S. C. §119(e) of U.S. Provisional Patent application Serial No. 60/640,434 filed on December 31, 2004, the entire contents of which is incorporated herein by reference.

FIELD OF THE INVENTION The present invention relates to cathode ray tubes (CRTs) for displays such as, for example, High Definition Television (HDTV). More particularly, it relates to CRTs operating in a vertical scan mode and a method of operating the CRT in the vertical scan mode.

BACKGROUND OF THE INVENTION The popularity of HDTV has prompted an increased demand for television sets capable of displaying HDTV images. Such demand has prompted an increase in demand for larger aspect ratio, true flat screen displays having a shallower depth, increased deflection angle and improved visual resolution performance.

The demand for shallow, flat screen displays has led to efforts to improve spot performance so that spot size and shape exhibit greater uniformity across the entire screen for improved visual resolution performance. To this end, most displays now make use of dynamic focus. Increasing the deflection angle also yields an improvement in spot performance in the central area of the screen because increasing the deflection angle results in a decreased gun-to-screen distance, hereinafter referred to as the 'throw distance'. Figure 1 illustrates the basic geometrical relationship between throw distance and deflection angle for a typical CRT. Increasing the deflection angle (A) reduces the throw distance, thus allowing for production of a shorter CRT and ultimately, a slimmer television set.

As the deflection angle increases, the throw distance decreases and spot size decreases in a non-linear relationship. The following formula mathematically approximates relationship between spot size and throw distance:

Spot Size w B * Throw ^lΛ (Equation 1) where the exponent 1.4 represents an approximation taking into consideration the effects of magnification and space charge effects over a useful range of beam current. The term B represents a system-related proportionality constant. Considering this relationship, for a tube having a diagonal dimension of 760 mm, increasing the corner to corner deflection angle from 100 degrees to 120 degrees while decreasing the center throw distance, for example, from 413mm to 313mm yields a 32% reduction in spot size at the center of the screen.

Increasing the deflection angle in these displays gives rise to increases in obliquity, which is defined as the effect of a beam intercepting the screen at an oblique angle, thereby causing an elongation of the spot. The problem of obliquity becomes especially apparent in CRTs having a standard horizontal gun orientation, i.e., a CRT whose guns have a horizontal alignment along the major axis of the screen. As obliquity increases, a spot having a generally circular shape at the center of the screen becomes oblong or elongated as the spot moves toward edges of the screen. Based on this geometrical relationship, in a large aspect ratio screen, such as a 16 x 9 screen, the spot appears most elongated at the edges of the major axis and at the screen corners. Thus it becomes apparent that the obliquity effect causes the spot size to grow. The following equation defines the spot size radius SS_radιai:

SS_radi_ai = SS_nOrm_ai/cos(A) (Equation 2) where A represents deflection angle, as measured from Dc to De as shown in Figure 1 and nominal spot size SS_nOrmai represents the spot size without obliquity.

In addition to the obliquity effect, yoke deflection effects in self-converging CRTs having a horizontal gun orientation can compromises spot shape uniformity. To achieve self convergence, CRT's typically include a horizontal yoke that generates a pincushion shaped field and a vertical yoke that generates a barrel shaped field. These yoke fields cause the spot shape to become elongated. This elongation adds to the obliquity effect by further increasing spot distortion at the three-o'clock and nine o'clock positions (referred to as the "3/9" positions) and at corner positions on the screen.

Various attempts have been made to address spot distortion and obliquity. For example, U.S. Patent No. 5, 170,102 describes a CRT with a vertical electron gun orientation whose un-deflected beams appear parallel to the short axis of the display screen. The deflection system described in this patent includes a signal generator for causing scanning of the display screen in a raster-scan fashion, thereby yielding a plurality of lines oriented along the short axis of the display screen. The deflection system also comprises a first set of coils for generating a substantially pincushion-shaped deflection field for deflecting the beams in the direction of the short axis of the display screen. A second set of coils generates a substantially barrel shaped deflection field for deflecting the beams in the direction in the long axis of the display screen. The deflection system's coils generally distort spots by elongating them vertically. This vertical elongation compensates for obliquity effects, thereby reducing spot distortion at the 3/9 and corner positions on the screen. The barrel shaped field required to achieve self convergence at 3/9 screen locations overcompensates for obliquity and vertically elongates the spot at the 3/9 and corner locations as shown in Figure 10 of the U.S. Patent No. 5, 170,102. (In effect, the barrel shaped field overcompensates, thus making the spot shape at the 3/9 position and the screen corners a vertically oriented ellipse). Orienting the electron guns along the vertical or minor axis will yield improvements in a self- converging system, but spot distortion remains problematic at the 3/9 positions and at the corner screen locations.

Thus, a need exists for a CRT system that overcomes the aforementioned disadvantages when increasing the deflection angle A and thereby reducing throw distance and thus the overall depth of the CRT. More specifically, when transposing the scan into a vertical scan CRT, additional considerations must be made for the various changes in the display properties resulting from transposing the scan.

SUMMARY OF THE INVENTION

Briefly, in accordance with a preferred embodiment of the present principles, there is provided a video display system that comprises a cathode ray tube having a picture display area. The display system includes a deflection system for the cathode ray tube to provide line rate scanning in a vertical direction.

A method and apparatus is provided for implementing a slow scan system that provides the required corrections in order to operate the transposed scan display device.

This and other aspects are achieved in accordance with an embodiment of the present principles, wherein the horizontal scan deflection system for a transposed scan display includes a yoke for scanning an electron beam in a transposed scan display in a horizontal direction, and means for driving the yoke in the horizontal scan direction, said driving means including an audio amplifier.

The driving means can also include S correction means for achieving required linearity for the horizontal scan. According to one aspect of the present principles, the S correction means includes an absolute value circuit for generating a modulation waveform, wherein said modulation waveform is integrated with a DC signal to produce the S corrected ramp waveform. According to yet another aspect, the S correction means includes an absolute value circuit for generating a modulation waveform, means for generating a linear ramp signal, and means for controlling a DC current input to said generating means for adapting the linear ramp signal to a deflection angle in the transposed scan display. The absolute value modulation waveform is integrated with the DC signal to produce the S corrected ramp waveform.

According to another aspect, the driving means further includes means for providing flyback voltage to the yoke, wherein said flyback voltage means increases the voltage beyond said driving means capability during a retrace interval.

According to other aspects, the deflection system includes means for preventing unwanted shutdown of the horizontal scan circuitry. The preventing means includes tying two inputs of the audio amplifier together to receive one of a differential output from a sync processor.

According to a further aspect, the method for providing a horizontal scan deflection system for a transposed scan display includes the steps of compensating for horizontal scan linearity distortions resulting from increasing deflection angles greater than 100 degrees in the transposed scan display, and providing increased yoke current and yoke voltage required during retrace intervals of the transposed scan display.

The compensating includes generating an S corrected ramp waveform for driving the yoke scanning an electron beam in the horizontal direction of the transposed scan display. The providing increased yoke current and voltages further includes incorporating an audio amplifier into a slow scan (horizontal scan) circuit of the transposed scan display device.

According to yet another aspect of the present principles, the horizontal scan deflection system for a transposed scan display includes a yoke for scanning an electron beam in a transposed scan display in a horizontal direction, means for driving the yoke in the horizontal scan direction, and means compensating for horizontal scan linearity distortions in the driving means resulting from increasing deflection angles greater than 100 degrees in the transposed scan display. BRIEF DESCRIPTION OF THE DRAWINGS

The invention will now be described by way of example with reference to the accompanying figure of which:

Figure 1 is a diagram depicting the basic geometrical relationship between the throw distance and deflection angle in a typical CRT;

Figure 2a is a diagrammatic cross-sectional view of a CRT according to an embodiment of the present principles;

Figure 2b is a diagram representing the lines and pixels of a standard scan CRT; Figure 2c is a diagram representing the lines and pixels of the transposed scan display according to an embodiment of the present principles;

Figure 3 is a block diagram of the transposed scan display system incorporating the low frequency scan method of the present principles;

Figures 4a - 4c illustrate schematic diagrams of an illustrative embodiment of the video display system for driving the CRT of FIG. 2 in accordance with an embodiment of the present principles;

Figure 5 is a schematic diagram of the slow scan circuit according to an embodiment of the present principles;

Figure 6 is an exemplary schematic diagram of slow scan linearity circuit according to an embodiment of the present principles; Figure 7 is a schematic diagram of a sync processor according to an embodiment of the present principles;

Figure 8 is a graphical representation of the slow scan S correction according to an embodiment of the present principles;

Figure 9 is a graphical representation of the yoke driving voltage and current through the yoke according to an embodiment of present principles; and

Figure 10 is a graphical representation of the yoke driving voltage, yoke current through the yoke during the retrace interval according to an embodiment of the present principles.

DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS

Prior to discussing the CRT display system of the present principles, a brief discussion of the facets of a typical cathode ray tube will prove helpful. Figure 2a illustrates a cathode ray tube (CRT) 1, for example a W76 wide screen tube, having a glass envelope 2 having a rectangular faceplate panel 3 and a tubular neck 4 connected by a funnel 5. The funnel 5 has an internal conductive coating (not shown) that extends from an anode button 6 toward the faceplate panel 3 and to the neck 4. The faceplate panel 3 comprises a viewing faceplate 8 and a peripheral flange or sidewall 9, which is sealed to the funnel 5 by a glass frit 7. The inner surface of the faceplate panel 3 carries a three-color phosphor screen 12. The screen 12 comprises a line screen with the phosphor lines arranged in triads. Each triad includes a phosphor line of three primary colors, typically Red, Green and Blue, and extends generally parallel to the major axis of the screen 12.

A mask assembly 10 lies in a predetermined spaced relation with the screen 12. The mask assembly 10 has a multiplicity of elongated slits extending generally parallel to the major axis of the screen 12. An electron gun assembly 13, shown schematically by dashed lines in Figure 2a, is centrally mounted within the neck 4 to generate three inline electron beams, a center beam and two side or outer beams, directed along convergent paths through the mask frame assembly 10 to strike the screen 12. The electron gun assembly 13 has three vertically oriented guns, each generating an electron beam for a separate one of the three colors, Red, Green and Blue. The three guns lie in a linear array extending parallel to a minor axis of the screen 12.

The CRT 1 employs an external magnetic deflection system comprised of a yoke 14 situated in the neighborhood of the funnel-to-neck junction. When activated with deflection currents, the yoke 14 generates magnetic fields that cause the beams to scan over the screen 12 vertically and horizontally in a rectangular raster.

Conventional video signal transmission assumes a pixel-by-pixel time sequence such that transmission of Red, Green and Blue images effectively occurs as a series of scan lines proceeding from the left edge to the right edge of the image along a scan line and then moving down to the next scan line where again the signal sequence proceeds from left to right. This process continues from top to bottom, in either a progressive scan mode or an interlaced scan mode, as is known in the art. Figure 2b shows an example of a standard orientation (scan) CRT having 720 horizontally scanned lines each having a pixel width of 1280.

To achieve a vertical scan (or transposed scan) display, the image must undergo a translation into a vertical scan pattern such that the signal sequence starts at the upper left hand corner of the image. The subsequent signal elements then follow along a vertical line from top to bottom along the left edge. After an appropriate retrace interval, generation of a signal element at the top edge of the image at the second scan line occurs, followed by the signal elements corresponding to a sequence from top to bottom along the second scan line. Similarly the third scan line starts at the top and proceeds to the bottom of the image, and thus the corresponding top to bottom signal element must be provided. This process continues through the last scan line at right vertical edge of the image.

To effect vertical scanning, the horizontal scan sequence must undergo a change from a conventional left-to-right and stepwise top-to-bottom regimen to a top-to-bottom and stepwise left to right transposed sequence. Figure 2c shows an example of the vertical scanning of the transposed scan display according to an embodiment of the present principles. As shown in this example, there are 1280 vertically scanned lines, each having a length of 720 pixels.

For the purposes of the following discussion, the terms "Digital Orthogonal Scan" and/or DOS refer to the above-described transposition operation and is used herein interchangeably with the term "transposed scan display".

In general, CRT displays exhibit raster distortions. The most common raster distortions pertain to geometric errors and to convergence errors. A geometric error results from non-linearities in the scanned positions of the beams as the raster traverses the screen. Convergence errors occur in a CRT display when the Red, Green and Blue rasters do not align perfectly such that over some portion of the image, a Red sub-image appears offset with respect to the Green sub-image and the Blue sub-image appears offset with respect to the Green sub-image. Convergence errors of this type can occur in any direction and can appear anywhere in the displayed image.

With known color CRT displays, both convergence and geometric errors can occur despite perfect alignment of the center region during the original manufacture of the CRT display, assuming that the deflection signals applied to the deflection coils ramp linearly. Traditional analog circuit techniques compensate for such distortions by modifying the deflection signals from linear ramps to more complex wave shapes. Also, adjustment in the details of the yoke design can reduce convergence errors and geometry errors. As the deflection angle increases beyond 100°, however, the traditional methods of geometry and convergence corrections become more difficult to implement.

Thus, when the deflection angle is increased in a transposed scan display, thereby decreasing the throw distance of the electron gun, many considerations and corrections are required in order to compensate for the negative effects on the displayed image resulting from such changes in design.

Examples of such considerations for the transposed scan display correction requirements include, but are not limited to: 1) S correction (i.e. to achieve required linearity for increased deflection angles); 2) increased yoke current; 3) increased flyback voltage for retrace; and 4) shutdown prevention due to increased heat generation.

Figure 3 shows a block diagram of the transposed scan display system 100 according to an embodiment of the present principles. As shown, an input from a high definition (HD) video source 102, such as, for example from a cable, satellite, network or other service provider is provided to the display system. The high resolution source input is fed to an FPGA 110 where it is input into the video processor 116. In some instances, an RGB to YPrPb converter 104 may be required to input the Y, Pr and Pb signals to the video processor 116. In addition, content source 102 provides horizontal and vertical sync signals (H & V) which are processed by the FPGA 110 and output to the sync processor 118.

The video processor 116 outputs the RGB video signals to the video drivers 133 which drive the electron guns of the transposed scan (DOS) CRT 200.

The sync processor 118 outputs several signals including synchronization signals to a waveform generator 120 embodied within the microprocessor 112 in order to generate the appropriate waveform for the quad coil drivers 130, and for N-S Pincushion Modulator 124. In other contemplated embodiments, the waveform generator can be incorporated into the FPGA 110 and thus be eliminated from the microprocessor the circuit shown in Figure 3.

The sync processor 118 is responsible for handling the synchronization of the output signals to the transposed scan (DOS) CRT 200. As such, it is responsible for the fast scan (V Drive) and slow scan (H Drive) signals input to the V scan 128 and H scan 126 circuits, respectively. Sync processor 118 also provides control signals to the focus modulation generator 120, which controls the dynamic focus output 121 connected to the anode power supply 134.

In accordance with one embodiment, the video processor 116 may include OSD insertion 117 capabilities. In other contemplated embodiments, the OSD may be integrated into video processor 116, or the microprocessor 112, or the FPGA 110 without departing from the spirit of the present disclosure. Those of skill in the art will recognize that many of the components shown in the block diagram of Figure 3 can be embodied in an application specific integrated circuit (ASIC) or other specialized integrated circuit without departing from the spirit of the present principles. Examples of such circuits that could be embodied in one or more ASICS would be, FPGA 110, Microprocessor 112, RGB to YPrPb converter 104, sync processor 118, video processor 116 and/or focus modulation generator 120.

Microprocessor 112 functions to control the video processor 116, and thus the video drivers 133, the OSD 117, FPGA 110, and the SW mode power supply 113. Microprocessor

112 also functions as the waveform generator for the transposed. An IR pickup 114/ keyboard or other user interface device may be connected to the microprocessor for providing remote control capability to the system 100.

The Anode power supply outputs the heater voltage and G2, G3 and G5 voltages to the appropriate pins (not shown) of the electron gun 13. In addition, it provides a 3OkV anode voltage to the transposed scan CRT 200. The quad drivers 130 drive the quad coils 16 of the CRT, and the V scan 128 and H scan 126 circuits drive the yoke 14. The video drivers 133 provide the video signals to the electron gun 13 for display on the CRT 200. The fast scan sync waveform generated by the V scan circuit 128, is used by: the sync processor 118 for phase correction; the video processor 116 to generate blanking; the SW mode power supply

113 for synchronization and the anode power supply 134 for synchronization.

The present principles provide a method and corresponding circuitry for implementing a slow scan (H scan) system for transposed scan CRTs.

Figures 4a - 4c are exemplary schematic diagrams of the circuitry embodying the transposed scan display system according to the present principles. As will be noted, the identified blocks in these figures correspond to blocks in Figure 3.

Referring specifically to Figure 4c, there is shown the sync processor 118, the dynamic focus circuit 120, the H scan or slow scan circuit 126 and the V scan or Fast scan circuit 128 according to an exemplary embodiment of the transposed scan display of the present principles.

Generally speaking, more "S" correction is required as the deflection angle increases. The yoke deflects the electron beam at an equal angle for equal increments of current, but when the beam lands on a flat screen, the distance from the un-deflected spot is proportional to the tangent of the angle, so less angular deflection is required as the deflection angle increases. An extreme example shows that the first few degrees are linear, but the last degree (i.e., from 179-180) is an infinite distance.

Thus, the amount of "S" correction needed varies with the tangent of the deflection angle (referring to Figurel). Thus, it becomes apparent that the greater the deflection angle, the more "S" correction that is required. For example, 30% more "S" correction is required for a 118 degree (corner to corner) CRT than that for a 104 degree (corner to corner) CRT. By way of example, the Philips TDA4858 sync processor is capable of providing sufficient correction for 104 degree CRTs along the minor axis. However, those of skill in the art will recognize that such Integrated circuit cannot provide enough correction along the major axis of a 16:9 aspect ratio 118 degree CRT. Thus, the horizontal scan (H scan or slow scan in the transposed scan display) clearly requires more "S" correction as the deflection angle is increased.

In the following discussion, reference is made to Figures 5-7. Figure 5 shows an exemplary schematic diagram of the slow scan (H scan) circuit 126 according to an embodiment of the present principles. Figure 6 shows an exemplary schematic diagram of the absolute value circuit portion 602 of the sync processor 118 according to an embodiment of the present principles. Figure 7 shows an exemplary schematic diagram of the sync processor 118 according to an embodiment of the present principles. In order to achieve this increased "S" correction required for the transposed scan display having higher deflection angles, the size input may be modulated for the desired S correction. Normally, a constant current is drawn from this input, which is internally tied and held at +5 volts. The constant current is integrated into a linear ramp waveform.

With just a DC (normal pot load) the ramp is linear, however, with the addition of an absolute value signal (waveform) output from absolute value circuit 602, the desired S shaped correction is created on the ramp waveform. The internal linearity control of the sync processor performs a similar function for standard CRTs, however when increasing the deflection angle in a transposed scan display as proposed by the present principle, additional "S" correction is required. Figure 7 shows an exemplary schematic diagram of the sync processor circuit 118 where the slow scan size (SS Size) potentiometer VR161 is coupled to input 702 of the TDA4858. In this example, potentiometer VR161 provides a range of size control input from 39k ohms to 239k ohms to ground, or 21μA to 128μA linear adjustment input limits.

The absolute value circuit 602 of Figure 6 (which is part of the sync processor 118) has an output 604 that is AC coupled and tied to the SS size input 702 via connection 704 with resistor VR192. In this example, resistor VR192 is a 13k ohm resistor, which provides ~92μAp-p. Thus, leaving a small adjustment range of DC current (i.e., via potentiometer VRl 61 and resistor VRl 86) where the AC coupled signal does not exceed one or the other linear adjustment input limits. Those of skill in the art will recognize that in the event that an input limit is exceeded, the output waveforms become distorted, thus defeating the S correction.

The internal linearity correction control of the sync processor circuit IC VUlOO is used to trim the exact amount of S correction needed for a specific yoke and CRT combination. The absolute value circuit 602 is part of the sync processor circuit 118 and receives a constant amplitude waveform from the sync processor identified as LINEARJRAMP, which is buffered by op amp VU102. The BUFFERED_RAMP signal feeds the input to the absolute value circuit 602 with no amplitude adjustment to the same. This linear ramp waveform is shown in Figure 8 and depicted as waveform 802. Referring to Figure 8, the linear ramp waveform 802 (from the sync processor) creates the absolute value modulated waveform 804 output from the absolute value circuit 602. The combination of the absolute value signal 804 with the DC slow scan size (SS Size) potentiometer VRl 61 is integrated by the sync processor IC VUlOO to result in the S correction waveform 806 shown. The resulting S correction waveform 806 output from the sync processor 118 is applied to the output stage of the slow scan circuit 126. The slow scan circuit 126 drives the yoke at outputs 550+ and 550- to the yoke (See. Fig. 5).

In reviewing the graphical representation of Figure 8, it will be noted that at the start and end of the scan, the voltage of absolute value waveform 804 is at its highest, while being at its lowest in the center. This causes the size input current to be least at the start and end of the scan and greatest at its center. For example, if we assume the duty cycle of the absolute value circuit 602 is 50%, it is desirable to set the DC current near 75μA (via ss size input 702). The range of currents the input would then see would be from (75μA - (92μA/2)) or 29μA at the start and end of the scan to (75μA + (92μA/2)) or 121μA in the center of the scan. Thus, the upper and lower limits of 121μA and 29μA are within 7μA and 8μA from the size inputs limits defined above of 128μA and 21μA, respectively. Thus, it becomes apparent that by drawing a current that starts low and increases linearly to the center of the ramp, and then decreases linearly to the end, an "S" shaped ramp is formed, where the slope is the greatest in the center and smallest at the ends of the ramp. As mentioned above, as a result of increasing the deflection angle of a CRT, and in particular the transposed scan CRT of the present principles, there is an increased current requirement in the yoke. Unfortunately, current vertical ICs (e.g., Philips TDA8359J) do not support the increased yoke current requirements that result from increasing the deflection angles of the CRT. The most electrical current that available vertical ICs are capable of supporting is 3.2 Ap-p. In order to compensate for the increased yoke current for the transposed scan display 200 with deflection angles of 118° and higher, vertical ICs clearly cannot be used and a different approach is required. According to an embodiment of the present principles, an audio IC 502 is implemented for the slow scan (H scan) circuit 126. Referring to Figure 5, an audio IC 502 is used to provide the necessary yoke current for increased deflection angles in the transposed scan display. In an exemplary embodiment, the audio IC 502 can be a Philips TDA2052. The audio IC is capable of 12 Ap-p and has a maximum operating voltage of +/- 25V. According to one embodiment, shown in Figure 5, the audio IC 502 is operated at +/- 22V.

In order to retrace the yoke current during blanking, a higher voltage must be applied to overcome the inductance. In this example, +80V is used, however as discussed above, the audio IC 502 of the disclosed embodiment is +/- 25V. Since inductors require high voltages to change current rapidly, and although the audio IC 502 can supply the voltage and current during active video time, when the current is changing slowly, in order to retrace rapidly during blanking, additional voltage is necessary. In this regard, the slow scan circuit 126 includes flyback voltage circuit 500 that provides the required increased voltage needed during the retrace intervals.

In the exemplary flyback voltage circuit 500 includes two MOSFETS FQ 108 and FQ 109 that function as switches. FQ 109 is in series with the audio IC 502 output and the yoke + output 550+. This switch FQ 109 is always on except when the resonant retrace is occurring (i.e., during the blanking interval). The second switch FQ108 is switched on only during the resonant retrace to connect the capacitor FC 127 to the positive yoke output 550+.

Referring to Figures 5 and 10, in operation, at the start of the retrace, there is approximately 2 amps flowing in the yoke. As the audio IC 502 attempts to reverse the current, the output voltage goes positive very rapidly. This is shown by the waveform 1002. When the output voltage approaches the positive supply voltage (i.e., +22V) show by waveform 1001, MOSFET FQ109 is turned off by resistor FR137 and the diode FD107 discharges the gate to source voltage. The transistor FQl 10 is also switched off, and the result is MOSFET FQ108 is switched on. By switching FQ108 on, the_. combination of the charge on capacitor FC127, and the current in the yoke resonate reaching nearly 80 volts peak. Capacitor FC127 is charged by FD103 during trace time. As the ringing or resonating waveform 1002 returns to the supply voltage 1001, the MOSFETS FQ109 and FQ108 return to their normal scan mode operation. The resonant retrace (waveform 1002) slews the current (waveform 1003) at approximately >12 amps/ms, while the slew rate is limited to about 1.2 amps/ms (yoke current waveforml003) with just the audio IC driving the yoke.

The voltage required to drive the MOSFET FQ108 is stored in the capacitor FC124 during the end of each scan, through the diode FD 105. Zener diodes FD 107 and FD 108 are used across the gate to source of each MOSFET (switch) FQ109 and FQ108 to limit the gate voltage to a safe level both for normal operation and for faults, such as, for example, CRT arcing.

Figure 9 shows a graphical representation of yoke driving voltage and current through the yoke. The yoke drive voltage waveform 901 is output from the audio IC 502 output 550+ through MOSFET FQ109, and the current waveform 902 represents the current through the yoke. As shown, during normal scan operation, the yoke voltage and yoke current substantially track each other. Those of skill in the art will recognize that the spikes in the waveforms of Figure 9 represent the resonant retrace during the blanking interval.

Those of skill in the art will recognize that the use of audio IC 502 is not typical for CRT applications, and even more particularly in the transposed scan display of the present principles. This is primarily due to the fact that standard (non-transposed scan) CRT displays do not have the same increased current requirements as in the transposed scan display CRT of the present principles.

In accordance with another aspect of the present principles, a system is employed to prevent the unwanted shutdown of the audio IC 502. Unwanted shutdown of the audio IC 502 can occur at elevated temperatures, or when its internal safe operating area protection is tripped. Since the audio IC 502 was designed to operate with resistive loads, and not inductors like the yoke of a CRT, its safe operating area protection is close to being tripped right from the start. In addition, the temperature of the IC runs hot due to the +22 supply voltage only 3 volts from its operating voltage of 25V. As shown in Figure 5, the audio IC 502 has a second input +ESfM which is normally supplied with a reduced level signal or none at all. This input +BSfM is referred to as the mute input and is activated when the IC 502 approaches thermal shutdown. This input would ordinarily be tied to ground or a significantly lower amplitude audio signal. In this mode, the output audio level would be "muted" until the thermal temperature returns to normal operating ranges. As mentioned above, such shutdown during operation of the transposed scan display of the present principles would be unacceptable. As such, by tying mute input +BSfM to the play input +INP, unwanted shutdowns due to over heating is prevented. The tying of these two inputs together prevents a reduction in the deflection current when a first level of shutdown could ordinarily occur.

According to yet another aspect of the present principles, the slow scan circuit uses differential inputs for noise cancellation. The Sync processor circuit 118 includes differential outputs, which can be used to cancel coupled signals from other sources. This helps to maintain good signal to noise ratios in the vertical scan signals of the present principles. However, the audio IC 502, and audio ICs in general, do not have differential inputs. The -IN is generally used to set the gain of the amplifier. However, when using the audio amplifier 502 in the transposed scan display of the present principles, this input at pin 6 is used as one of the differential inputs 503 from the sync processor output 703. The other differential input 501 to audio IC 502 is provided from the sync processor output 701. While there have been shown, described and pointed out fundamental novel features of the invention as applied to preferred embodiments thereof, it will be understood that various omissions, substitutions and changes in the form and details of the methods described and devices illustrated, and in their operation, may be made by those skilled in the art without departing from the spirit of the invention. For example, it is expressly intended that all combinations of those elements and/or method steps which perform substantially the same function in substantially the same way to achieve the same results are within the scope of the invention. Moreover, it should be recognized that structures and/or elements and/or method steps shown and/or described in connection with any disclosed form or embodiment of the invention may be incorporated in any other disclosed, described or suggested form or embodiment as a general matter of design choice. It is the intention, therefore, to be limited only as indicated by the scope of the claims appended hereto.

Claims

1. A horizontal scan deflection system for a transposed scan display comprising: a yoke for scanning an electron beam in a transposed scan display in a horizontal direction; and means for driving the yoke in the horizontal scan direction, said driving means including an audio amplifier (502).

2. The deflection system according to claim 1, wherein said driving means further comprises S correction means for achieving required linearity for the horizontal scan.

3. The deflection system according to claim 1, wherein said driving means further comprises means for providing flyback voltage to the yoke.

4. The deflection system according to claim 3, wherein said flyback voltage means increases the voltage beyond said driving means capability during a retrace interval.

5. The deflection system according to claim 1, further comprising means for preventing unwanted shutdown of the horizontal scan deflection system.

6. The deflection system according to claim 2, wherein said S correction means comprises: an absolute value circuit (602) for generating a modulation waveform (804), wherein said modulation waveform is integrated with a DC signal (802) to produce the S corrected ramp waveform (806).

7. The deflection system according to claim 2, wherein said S correction means comprises: an absolute value circuit (602) for generating a modulation waveform (804); means for generating a DC signal (802); and means for controlling a DC current input to said generating means for adapting the DC signal to a deflection angle in the transposed scan display; wherein said absolute value modulation waveform (804) is integrated with the DC signal (802) to produce the S corrected ramp waveform (806).

8. The deflection system according to claim 5, wherein said preventing means comprises tying two inputs of the audio amplifier (502) together to receive one of a differential output from a sync processor.

9. A method for providing a horizontal scan deflection system for a transposed scan display comprising the steps of: compensating for horizontal scan linearity distortions resulting from increasing deflection angles greater than 100 degrees in the transposed scan display; providing increased yoke current; and providing increased yoke voltage required during retrace intervals of the transposed scan display.

10. The method according to claim 9, wherein said compensating comprises generating an S correction waveform for driving the yoke scanning an electron beam in the horizontal direction of the transposed scan display.

11. The method according to claim 9, wherein said providing increase yoke current and voltages further comprises incorporating an audio amplifier (502) into a slow scan (horizontal scan) circuit (126) of the transposed scan display device.

12. The method according to claim 9, further comprising configuring the audio amplifier (502) to avoid unwanted shutdowns during operation.

13. A horizontal scan deflection system for a transposed scan display comprising: a yoke for scanning an electron beam in a transposed scan display in a horizontal direction; means for driving the yoke in the horizontal scan direction; and means compensating for horizontal scan linearity distortions in the driving means resulting from increasing deflection angles greater than 100 degrees in the transposed scan display.

14. The deflection system according to claim 13, wherein said driving means comprises an audio amplifier (502).

15. The deflection system according to claim 13, wherein said compensating means comprises S correction circuitry for generating an S correction waveform (806) to eliminate scan linearity distortions during the horizontal scan.

16. The deflection system according to claim 15, wherein said S correction circuitry comprises: an absolute value circuit (602) for generating a modulation waveform (804); means for generating a linear ramp DC signal (802); and means for controlling a DC current input to said generating means for adapting the linear ramp signal to a deflection angle in the transposed scan display; wherein said absolute value modulation waveform (804) is integrated with the DC signal (802) to produce the S corrected ramp waveform (806).