WO2003060982A3 - Ideal oxygen precipitating silicon wafers with nitrogen/carbon stabilized oxygen precipitate nucleation centers and process for making the same - Google Patents

Ideal oxygen precipitating silicon wafers with nitrogen/carbon stabilized oxygen precipitate nucleation centers and process for making the same Download PDF

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Publication number
WO2003060982A3
WO2003060982A3 PCT/US2002/041269 US0241269W WO03060982A3 WO 2003060982 A3 WO2003060982 A3 WO 2003060982A3 US 0241269 W US0241269 W US 0241269W WO 03060982 A3 WO03060982 A3 WO 03060982A3
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WO
WIPO (PCT)
Prior art keywords
oxygen
nucleation centers
nitrogen
precipitate nucleation
making
Prior art date
Application number
PCT/US2002/041269
Other languages
French (fr)
Other versions
WO2003060982A2 (en
Inventor
Mule Stagno Luciano
Jeffrey L Libbert
Richard J Phillips
Milind Kulkarni
Mohsen Banan
Stephen J Brunkhorst
Original Assignee
Memc Electronic Materials
Mule Stagno Luciano
Jeffrey L Libbert
Richard J Phillips
Milind Kulkarni
Mohsen Banan
Stephen J Brunkhorst
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Memc Electronic Materials, Mule Stagno Luciano, Jeffrey L Libbert, Richard J Phillips, Milind Kulkarni, Mohsen Banan, Stephen J Brunkhorst filed Critical Memc Electronic Materials
Priority to KR1020047009764A priority Critical patent/KR100745308B1/en
Priority to EP02799299A priority patent/EP1456875A2/en
Priority to JP2003560976A priority patent/JP2005515633A/en
Publication of WO2003060982A2 publication Critical patent/WO2003060982A2/en
Publication of WO2003060982A3 publication Critical patent/WO2003060982A3/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/322Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
    • H01L21/3221Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering
    • H01L21/3226Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering of silicon on insulator
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/322Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/322Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
    • H01L21/3221Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering
    • H01L21/3225Thermally inducing defects using oxygen present in the silicon body for intrinsic gettering

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)

Abstract

A silicon wafer having a controlled oxygen precipitation behavior such that a denuded zone extending inward from the front surface and oxygen precipitates in the wafer bulk sufficient for intrinsic gettering purposes are ultimately formed. Specifically, prior to formation of the oxygen precipitates, the wafer bulk comprises dopant stabilized oxygen precipitate nucleation centers. The dopant is selected from a group consisting of nitrogen and carbon and the concentration of the dopant is sufficient to allow the oxygen precipitate nucleation centers to withstand thermal processing such as an epitaxial deposition process while maintaining the ability to dissolve any grown-in nucleation centers.
PCT/US2002/041269 2001-12-21 2002-12-23 Ideal oxygen precipitating silicon wafers with nitrogen/carbon stabilized oxygen precipitate nucleation centers and process for making the same WO2003060982A2 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
KR1020047009764A KR100745308B1 (en) 2001-12-21 2002-12-23 Ideal oxygen precipitating silicon wafers with nitrogen/carbon stabilized oxygen precipitate nucleation centers and process for making the same
EP02799299A EP1456875A2 (en) 2001-12-21 2002-12-23 Ideal oxygen precipitating silicon wafers with nitrogen/carbon stabilized oxygen precipitate nucleation centers and process for making the same
JP2003560976A JP2005515633A (en) 2001-12-21 2002-12-23 Silicon wafer with ideal oxygen precipitation having nitrogen / carbon stabilized oxygen precipitation nucleation center and method for producing the same

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US34517801P 2001-12-21 2001-12-21
US60/345,178 2001-12-21

Publications (2)

Publication Number Publication Date
WO2003060982A2 WO2003060982A2 (en) 2003-07-24
WO2003060982A3 true WO2003060982A3 (en) 2004-03-11

Family

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Family Applications (1)

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PCT/US2002/041269 WO2003060982A2 (en) 2001-12-21 2002-12-23 Ideal oxygen precipitating silicon wafers with nitrogen/carbon stabilized oxygen precipitate nucleation centers and process for making the same

Country Status (6)

Country Link
EP (1) EP1456875A2 (en)
JP (2) JP2005515633A (en)
KR (3) KR100920862B1 (en)
CN (1) CN100345263C (en)
TW (1) TWI276161B (en)
WO (1) WO2003060982A2 (en)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7803228B2 (en) 2003-10-21 2010-09-28 Sumco Corporation Process for producing high-resistance silicon wafers and process for producing epitaxial wafers and SOI wafers
JP2008016652A (en) * 2006-07-06 2008-01-24 Shin Etsu Handotai Co Ltd Method of manufacturing silicon wafer
KR101160930B1 (en) * 2006-07-31 2012-06-29 어플라이드 머티어리얼스, 인코포레이티드 Methods of forming carbon-containing silicon epitaxial layers
FR2928775B1 (en) * 2008-03-11 2011-12-09 Soitec Silicon On Insulator PROCESS FOR PRODUCING A SEMICONDUCTOR-TYPE SUBSTRATE ON INSULATION
JP5332502B2 (en) * 2008-10-27 2013-11-06 セイコーエプソン株式会社 Oscillation circuit and semiconductor device
KR101231412B1 (en) * 2009-12-29 2013-02-07 실트로닉 아게 Silicon wafer and production method therefor
KR101395359B1 (en) * 2012-02-27 2014-05-14 주식회사 엘지실트론 Single crystal silicon ingot growing method, and seed for the same
JP5793456B2 (en) 2012-03-23 2015-10-14 株式会社東芝 Semiconductor device, method for manufacturing the same, and substrate
CN105316767B (en) * 2015-06-04 2019-09-24 上海超硅半导体有限公司 Super large-scale integration silicon wafer and its manufacturing method, application
CN106884203A (en) * 2015-12-15 2017-06-23 上海新昇半导体科技有限公司 The forming method of monocrystal silicon and wafer
CN107151818A (en) * 2016-03-03 2017-09-12 上海新昇半导体科技有限公司 The growing method of monocrystalline silicon and its monocrystal silicon of preparation
CN107151817A (en) * 2016-03-03 2017-09-12 上海新昇半导体科技有限公司 The growing method of monocrystalline silicon and its monocrystal silicon of preparation
KR102032535B1 (en) 2016-07-06 2019-10-15 가부시키가이샤 도쿠야마 Monocrystalline Silicon Plates and Manufacturing Method Thereof
CN107604429A (en) * 2016-07-12 2018-01-19 上海新昇半导体科技有限公司 The method of czochralski growth monocrystalline silicon
CN108660509A (en) * 2017-03-27 2018-10-16 上海新昇半导体科技有限公司 A kind of pulling of silicon single crystal method
WO2019187844A1 (en) * 2018-03-28 2019-10-03 住友精密工業株式会社 Mems device production method, mems device, and shutter device using same
US10943813B2 (en) * 2018-07-13 2021-03-09 Globalwafers Co., Ltd. Radio frequency silicon on insulator wafer platform with superior performance, stability, and manufacturability

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0732431A1 (en) * 1995-03-14 1996-09-18 MEMC Electronic Materials, Inc. Precision controlled precipitation of oxygen in silicon
WO1998045507A1 (en) * 1997-04-09 1998-10-15 Memc Electronic Materials, Inc. Low defect density, ideal oxygen precipitating silicon
EP0942078A1 (en) * 1998-03-09 1999-09-15 Shin-Etsu Handotai Company Limited Method for producing silicon single crystal wafer and silicon single crystal wafer
US6284384B1 (en) * 1998-12-09 2001-09-04 Memc Electronic Materials, Inc. Epitaxial silicon wafer with intrinsic gettering
US20010030348A1 (en) * 1998-09-02 2001-10-18 Falster Robert J. Silcon on insulator structrue having a low defect density handler wafer and process for the preparation thereof
US6306733B1 (en) * 1997-02-26 2001-10-23 Memc Electronic Materials, Spa Ideal oxygen precipitating epitaxial silicon wafers and oxygen out-diffusion-less process therefor

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5024723A (en) 1990-05-07 1991-06-18 Goesele Ulrich M Method of producing a thin silicon on insulator layer by wafer bonding and chemical thinning
JPH08290995A (en) * 1995-04-19 1996-11-05 Sumitomo Metal Ind Ltd Silicon single crystal and its production
JPH0964319A (en) * 1995-08-28 1997-03-07 Toshiba Corp Soi substrate and its manufacture
JPH10150048A (en) * 1996-11-15 1998-06-02 Sumitomo Sitix Corp Semiconductor substrate
GB9700566D0 (en) * 1997-01-13 1997-03-05 Avx Ltd Binder removal
JP3614019B2 (en) * 1998-03-09 2005-01-26 信越半導体株式会社 Manufacturing method of silicon single crystal wafer and silicon single crystal wafer
WO2000013209A2 (en) * 1998-09-02 2000-03-09 Memc Electronic Materials, Inc. Thermally annealed silicon wafers having improved intrinsic gettering
DE19925044B4 (en) * 1999-05-28 2005-07-21 Siltronic Ag Semiconductor wafer with crystal lattice defects and method of making the same
US6599360B2 (en) * 2000-01-25 2003-07-29 Shin-Etsu Handotai Co., Ltd. Silicon wafer, method for determining production conditions of silicon single crystal and method for producing silicon wafer
JP2001308101A (en) * 2000-04-19 2001-11-02 Mitsubishi Materials Silicon Corp Silicon wafer and its heat treatment method
DE10024710A1 (en) * 2000-05-18 2001-12-20 Steag Rtp Systems Gmbh Setting defect profiles in crystals or crystal-like structures
JP2002176058A (en) * 2000-12-11 2002-06-21 Sumitomo Metal Ind Ltd Method of manufacturing silicon semiconductor substrate

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0732431A1 (en) * 1995-03-14 1996-09-18 MEMC Electronic Materials, Inc. Precision controlled precipitation of oxygen in silicon
US6306733B1 (en) * 1997-02-26 2001-10-23 Memc Electronic Materials, Spa Ideal oxygen precipitating epitaxial silicon wafers and oxygen out-diffusion-less process therefor
WO1998045507A1 (en) * 1997-04-09 1998-10-15 Memc Electronic Materials, Inc. Low defect density, ideal oxygen precipitating silicon
EP0942078A1 (en) * 1998-03-09 1999-09-15 Shin-Etsu Handotai Company Limited Method for producing silicon single crystal wafer and silicon single crystal wafer
US20010030348A1 (en) * 1998-09-02 2001-10-18 Falster Robert J. Silcon on insulator structrue having a low defect density handler wafer and process for the preparation thereof
US6284384B1 (en) * 1998-12-09 2001-09-04 Memc Electronic Materials, Inc. Epitaxial silicon wafer with intrinsic gettering

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of EP1456875A2 *

Also Published As

Publication number Publication date
JP2005515633A (en) 2005-05-26
KR100973393B1 (en) 2010-07-30
CN100345263C (en) 2007-10-24
TW200305932A (en) 2003-11-01
KR100745308B1 (en) 2007-08-01
WO2003060982A2 (en) 2003-07-24
EP1456875A2 (en) 2004-09-15
JP2010161393A (en) 2010-07-22
KR100920862B1 (en) 2009-10-09
CN1606799A (en) 2005-04-13
KR20070039175A (en) 2007-04-11
KR20090092844A (en) 2009-09-01
TWI276161B (en) 2007-03-11
KR20040076872A (en) 2004-09-03

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