WO2003038893A3 - Halbleiterstruktur und verfahren zum herstellen derselben - Google Patents

Halbleiterstruktur und verfahren zum herstellen derselben Download PDF

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Publication number
WO2003038893A3
WO2003038893A3 PCT/EP2002/011853 EP0211853W WO03038893A3 WO 2003038893 A3 WO2003038893 A3 WO 2003038893A3 EP 0211853 W EP0211853 W EP 0211853W WO 03038893 A3 WO03038893 A3 WO 03038893A3
Authority
WO
WIPO (PCT)
Prior art keywords
production
semiconductor structure
substrate
recess
main surface
Prior art date
Application number
PCT/EP2002/011853
Other languages
English (en)
French (fr)
Other versions
WO2003038893A2 (de
Inventor
Achim Gratz
Jakob Kriz
Original Assignee
Infineon Technologies Ag
Achim Gratz
Jakob Kriz
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies Ag, Achim Gratz, Jakob Kriz filed Critical Infineon Technologies Ag
Publication of WO2003038893A2 publication Critical patent/WO2003038893A2/de
Publication of WO2003038893A3 publication Critical patent/WO2003038893A3/de

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0611—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
    • H01L27/0617—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type
    • H01L27/0623—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type in combination with bipolar transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8248—Combination of bipolar and field-effect technology
    • H01L21/8249—Bipolar and MOS technology

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Bipolar Transistors (AREA)
  • Bipolar Integrated Circuits (AREA)
  • Element Separation (AREA)

Abstract

Die vorliegende Erfindung schafft eine Halbleiterstruktur und ein Verfahren zum Herstellen derselben, wobei auf einem Substrat (210) mit einer ersten Hauptoberfläche eine Ausnehmung (220) in der ersten Hauptoberfläche des Substrats (210) erzeugt wird. Ferner wird ein aktiver Bereich (244, 246, 250) der Halbleiterstruktur in einem Bereich eines Bodens der Ausnehmung (220) erzeugt und Anschlußbereiche (252) zumindest eines Teils von Anschlüssen in Richtung der ersten Oberfläche des Substrats (210) herausgeführt.
PCT/EP2002/011853 2001-10-26 2002-10-23 Halbleiterstruktur und verfahren zum herstellen derselben WO2003038893A2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE10152915 2001-10-26
DE10152915.5 2001-10-26

Publications (2)

Publication Number Publication Date
WO2003038893A2 WO2003038893A2 (de) 2003-05-08
WO2003038893A3 true WO2003038893A3 (de) 2003-10-09

Family

ID=7703824

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/EP2002/011853 WO2003038893A2 (de) 2001-10-26 2002-10-23 Halbleiterstruktur und verfahren zum herstellen derselben

Country Status (2)

Country Link
TW (1) TW561593B (de)
WO (1) WO2003038893A2 (de)

Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61236155A (ja) * 1985-04-12 1986-10-21 Hitachi Ltd 半導体装置
US4642880A (en) * 1984-04-19 1987-02-17 Kabushiki Kaisha Toshiba Method for manufacturing a recessed semiconductor device
EP0375585A2 (de) * 1988-12-21 1990-06-27 International Business Machines Corporation Verfahren zum Herstellen einer BICMOS-Anordnung
US5166082A (en) * 1990-06-13 1992-11-24 Oki Electric Industry Co., Ltd. BIMOS transistor devices having bipolar and MOS transistors formed in substrate thereof and process for the fabrication of the same
US5886387A (en) * 1995-09-27 1999-03-23 Kabushiki Kaisha Toshiba BiCMOS semiconductor integrated circuit device having MOS transistor and bipolar transistor regions of different thickness
US5904535A (en) * 1995-06-02 1999-05-18 Hyundai Electronics America Method of fabricating a bipolar integrated structure
US6011283A (en) * 1992-10-19 2000-01-04 Hyundai Electronics America Pillar emitter for BiCMOS devices
JP2000277638A (ja) * 1999-03-24 2000-10-06 Hitachi Ltd 半導体装置およびその製造方法
US6133115A (en) * 1995-08-16 2000-10-17 Nec Corporation Formation of gate electrode

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4642880A (en) * 1984-04-19 1987-02-17 Kabushiki Kaisha Toshiba Method for manufacturing a recessed semiconductor device
JPS61236155A (ja) * 1985-04-12 1986-10-21 Hitachi Ltd 半導体装置
EP0375585A2 (de) * 1988-12-21 1990-06-27 International Business Machines Corporation Verfahren zum Herstellen einer BICMOS-Anordnung
US5166082A (en) * 1990-06-13 1992-11-24 Oki Electric Industry Co., Ltd. BIMOS transistor devices having bipolar and MOS transistors formed in substrate thereof and process for the fabrication of the same
US6011283A (en) * 1992-10-19 2000-01-04 Hyundai Electronics America Pillar emitter for BiCMOS devices
US5904535A (en) * 1995-06-02 1999-05-18 Hyundai Electronics America Method of fabricating a bipolar integrated structure
US6133115A (en) * 1995-08-16 2000-10-17 Nec Corporation Formation of gate electrode
US5886387A (en) * 1995-09-27 1999-03-23 Kabushiki Kaisha Toshiba BiCMOS semiconductor integrated circuit device having MOS transistor and bipolar transistor regions of different thickness
JP2000277638A (ja) * 1999-03-24 2000-10-06 Hitachi Ltd 半導体装置およびその製造方法

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
PATENT ABSTRACTS OF JAPAN vol. 011, no. 081 (E - 488) 12 March 1987 (1987-03-12) *
PATENT ABSTRACTS OF JAPAN vol. 2000, no. 13 5 February 2001 (2001-02-05) *

Also Published As

Publication number Publication date
WO2003038893A2 (de) 2003-05-08
TW561593B (en) 2003-11-11

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