WO2003012497A1 - Quartz-plane light circuit element and process for producing the same - Google Patents

Quartz-plane light circuit element and process for producing the same Download PDF

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Publication number
WO2003012497A1
WO2003012497A1 PCT/JP2001/006600 JP0106600W WO03012497A1 WO 2003012497 A1 WO2003012497 A1 WO 2003012497A1 JP 0106600 W JP0106600 W JP 0106600W WO 03012497 A1 WO03012497 A1 WO 03012497A1
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WO
WIPO (PCT)
Prior art keywords
film
silicon dioxide
vapor deposition
substrate
cladding film
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PCT/JP2001/006600
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French (fr)
Japanese (ja)
Inventor
Fumio Matsumura
Original Assignee
Asahi Optronics, Ltd.
Sun Instruments, Inc.
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Application filed by Asahi Optronics, Ltd., Sun Instruments, Inc. filed Critical Asahi Optronics, Ltd.
Priority to PCT/JP2001/006600 priority Critical patent/WO2003012497A1/en
Publication of WO2003012497A1 publication Critical patent/WO2003012497A1/en

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    • C—CHEMISTRY; METALLURGY
    • C03—GLASS; MINERAL OR SLAG WOOL
    • C03B—MANUFACTURE, SHAPING, OR SUPPLEMENTARY PROCESSES
    • C03B19/00—Other methods of shaping glass
    • C03B19/14—Other methods of shaping glass by gas- or vapour- phase reaction processes
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G02B6/13—Integrated optical circuits characterised by the manufacturing method
    • G02B6/132—Integrated optical circuits characterised by the manufacturing method by deposition of thin films
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G02B2006/12083—Constructional arrangements
    • G02B2006/121—Channel; buried or the like

Definitions

  • the present invention relates to a quartz planar optical circuit element necessary for realizing an arrayed optical waveguide grating element and the like indispensable for wavelength division multiplexing optical communication, and a method of manufacturing the quartz planar optical circuit element.
  • a flame deposition method is known as a method for manufacturing a quartz planar optical circuit element.
  • this flame deposition method is a method in which a plurality of substrates 33 are arranged side by side around a disk 31 rotating in the direction of arrow A, and glass fine powder containing silicon dioxide as a main component. after a 3 5 deposited on the substrate 3 3, by using oxygen (0 2) and hydrogen (H 2) and bar Na 3 7 issuing oxyhydrogen flame 3 9 for combusting a mixture of,
  • This is a method in which glass fine powder 35 is melted and vitrified at a high temperature of 1000 ° C. or higher.
  • FIG. 4 is a diagram showing a cross-sectional structure of a conventional quartz planar optical circuit element manufactured using such a flame deposition method.
  • a silicon single crystal substrate (or a synthetic quartz glass substrate) 41 in this case, the upper surface of the diagram
  • five portions of silicon dioxide A lower cladding film 43 is formed by depositing a powder containing phosphorus oxide and boron trioxide and melting and vitrifying the powder at a high temperature of 1000 ° C. or more.
  • a core film is formed by depositing a powder obtained by adding germanium dioxide further to boron and boron trioxide and melting and vitrifying at a high temperature of ⁇ 100 ° C. or higher, and then a predetermined position on the upper portion of the core film
  • a rectangular etching mask is formed using photolithography technology, and the core film is formed into a rectangular shape using reactive ion etching (RIE) to form a core portion 47.
  • RIE reactive ion etching
  • a powder obtained by adding phosphorus pentoxide and boron trioxide to silicon dioxide is deposited so as to cover the lower cladding film 43 and the core portion 47, and melted at a high temperature of 100 ° C. or more.
  • the upper clad part 45 is formed by vitrification.
  • the value of the radius of curvature r becomes negative, a tensile stress is generated in the film and the film is easily brittle, and therefore the value of r is preferably positive.
  • Thermal expansion coefficient of the general silicon single crystal substrate it is said that approximately 5 X 1 0- 6.
  • the thermal expansion coefficient of the silicon dioxide film of amorphous, approximately equal to the synthetic quartz glass board, the thermal expansion coefficient of the silicon dioxide film as crystals from 7 X 1 0- 6 in 1 4 X 1 0-6 about is there.
  • the present invention has been made to solve the above-described problems of the conventional example, and provides a quartz planar optical circuit element which is less dependent on the polarization of waveguide loss, has no substrate warpage, and is excellent in mass production.
  • the purpose is to provide. Disclosure of the invention
  • the circuit element includes a lower cladding film (13) containing silicon dioxide as a main component formed by vapor deposition on one surface of a silicon single crystal substrate or a synthetic quartz glass substrate (11), and the lower cladding film.
  • a membrane (15).
  • the quartz planar optical circuit device further includes a strain correction film (19) containing silicon dioxide as a main component formed by vapor deposition on the surface opposite to the substrate (11).
  • the distortion correction film (19) has substantially the same thermal expansion coefficient as the material of the lower cladding film (13) and the upper cladding film (15). It consists of the material which has.
  • the material mainly composed of silicon dioxide for forming the core portion (17) is a material obtained by adding germanium dioxide to silicon dioxide.
  • the method for manufacturing a quartz planar optical circuit element of the present invention is characterized in that the lower clad film mainly composed of silicon dioxide is formed on one surface of a silicon single crystal substrate or a synthetic quartz glass substrate (11) by vapor deposition. Forming a core film mainly composed of silicon dioxide on the lower cladding film (13) by vapor deposition; and processing the core film into a predetermined shape by anisotropic etching. Forming a core portion (17) by heating, and an upper cladding film mainly composed of silicon dioxide so as to cover the core portion (17) and the lower cladding film (13).
  • the step of forming a distortion correction film (19) containing silicon dioxide as a main component on the surface on the opposite side of the substrate (11) by vapor deposition is included.
  • a distortion correction film (19) containing silicon dioxide as a main component on the surface on the opposite side of the substrate (11) by vapor deposition is included.
  • the distortion correction film (19) is substantially the same as the material of the lower cladding film (13) and the upper cladding film (15). It is made of a material having a coefficient of thermal expansion.
  • the material containing silicon dioxide as a main component for forming the core film is a material obtained by adding germanium dioxide to silicon dioxide.
  • FIG. 1 is a cross-sectional configuration diagram of a quartz planar optical circuit device according to one embodiment of the present invention.
  • FIG. 2A is a diagram showing a step of manufacturing the quartz planar optical circuit device of FIG.
  • FIG. 2B is a diagram showing a step of manufacturing the quartz planar optical circuit device of FIG.
  • FIG. 2C is a diagram showing a step of manufacturing the quartz planar optical circuit device of FIG.
  • FIG. 2D is a diagram showing a step of manufacturing the quartz planar optical circuit device of FIG.
  • FIG. 2E is a diagram showing a step of manufacturing the quartz planar optical circuit element in FIG. 1.
  • FIG. 2F is a diagram showing a step of manufacturing the quartz planar optical circuit device in FIG. 1.
  • FIG. 2G is a diagram showing a step of manufacturing the quartz planar optical circuit device in FIG.
  • FIG. 2H is a diagram showing a step of manufacturing the quartz planar optical circuit device of FIG.
  • FIG. 3 is a view for explaining a film deposition method by a flame deposition method.
  • Fig. 4 shows a conventional quartz planar optical circuit element manufactured using the flame deposition method. It is sectional drawing. BEST MODE FOR CARRYING OUT THE INVENTION
  • the quartz planar optical circuit element of the present embodiment includes a lower clad film mainly composed of silicon dioxide formed by vapor deposition on one surface of a silicon single crystal substrate or a synthetic quartz glass substrate, and the lower clad film. Germanium dioxide or the like is uniformly added to silicon dioxide on the upper part of the silicon dioxide, and silicon dioxide is formed so as to cover a core having a predetermined shape formed by vapor deposition and the core and the lower cladding film.
  • Phosphorus pentoxide or phosphorous pentoxide and boron trioxide are uniformly added to an upper cladding film or a silicon dioxide, and the upper cladding film formed by vapor deposition and vapor deposition on the surface opposite to the substrate And a distortion correction film containing silicon dioxide as a main component and formed by the above method.
  • the deposition material is directly ionized and adhered to the substrate by electric field acceleration (ion plating deposition method), or the ionized gas is accelerated by an electric field to collide with the deposition material and adhere the deposition material to the substrate.
  • a lower cladding film composed mainly of silicon dioxide on the substrate, and a core portion made of silicon dioxide uniformly doped with germanium dioxide, etc.
  • each film is formed at a relatively low temperature, so that the residual stress (film formation stress) of each film is reduced, the refractive index distribution of the optical waveguide is uniform, and the waveguide is formed by the film formation stress. It is possible to obtain a flat-surface circuit element having almost no polarization dependence of loss.
  • the carbon dioxide Since the coefficient of thermal expansion of the film containing silicon as the main component and the coefficient of thermal expansion of the strain correction film containing silicon dioxide as the main component on the back side of the substrate are substantially the same, the residual strain on the front side and the back side of the substrate cancel each other. Work on. For this reason, it is possible to obtain a quartz planar circuit device which hardly warps the substrate, has excellent connectivity with the optical fiber, and can obtain high mass productivity.
  • the method for manufacturing a quartz planar optical circuit element includes a step of forming a lower clad film mainly composed of silicon dioxide on one surface of a silicon single crystal substrate or a synthetic quartz glass substrate by vapor deposition; Forming a core film on a clad film by uniformly depositing silicon dioxide with germanium dioxide or the like by vapor deposition; forming the core film by processing the core film into a predetermined shape by anisotropic etching; An upper cladding film composed mainly of silicon dioxide or an upper cladding obtained by uniformly adding phosphorus pentoxide or phosphorus pentoxide and boron trioxide to silicon dioxide so as to cover the core portion and the lower cladding film. Forming the upper clad film by heat treatment; and forming silicon dioxide as a main component on the surface on the opposite side of the substrate. And forming by vapor deposition a correction film.
  • a lower cladding film containing silicon dioxide as a main component is formed on the front side of a substrate by using an ionization vapor deposition method such as an ion plating vapor deposition method or an ion beam assisted vapor deposition method.
  • An ionization vapor deposition method such as an ion plating vapor deposition method or an ion beam assisted vapor deposition method.
  • a core film to which germanium or the like is uniformly added is formed, the core film is processed into a predetermined shape by anisotropic etching, a core portion is formed, and a carbon dioxide is formed so as to cover the core portion and the lower cladding film.
  • An upper cladding film composed mainly of silicon or an upper cladding film in which phosphorus pentoxide or phosphorus pentoxide and boron trioxide are uniformly added to silicon dioxide is formed, and the upper cladding film is melted by heat treatment.
  • a strain correction film containing silicon dioxide as a main component is formed on the opposite surface of the substrate.
  • the film mainly composed of silicon dioxide on the front side of the substrate and the distortion correction film mainly composed of silicon dioxide on the rear side of the substrate have substantially the same coefficient of thermal expansion, the front side and the rear side of the substrate The residual strains on the sides act to cancel each other. For this reason, it is possible to obtain a quartz planar circuit element that hardly warps the substrate, has excellent connectivity with an optical fiber, and can obtain high mass productivity.
  • FIG. 1 is a cross-sectional view showing one configuration example of a quartz planar optical circuit element according to the present embodiment.
  • the quartz planar optical circuit element of the present embodiment is formed on one surface (the upper surface in the figure) of a substrate 11 such as a silicon single crystal substrate or a synthetic quartz glass substrate by ionization vapor deposition ( Using ion plating deposition or ion beam deposition, a lower clad film 13 is formed by adding silicon dioxide alone or germanium dioxide or titanium dioxide to silicon dioxide uniformly, and the lower clad film 13 is formed.
  • An upper cladding film mainly composed of silicon dioxide or a rectangular core portion 17 made of silicon dioxide uniformly doped with germanium dioxide or the like is formed on the cladding film 13 by ionization vapor deposition.
  • ionization deposition on parts 17 and the lower cladding film 13 apply phosphorus pentoxide to silicon dioxide or phosphorus pentoxide and boron trioxide to silicon dioxide uniformly.
  • An upper clad film 15 is formed, and the surface opposite to the substrate 11 (the lower surface in the figure) is a distortion correction film that performs distortion correction by adding silicon dioxide alone or titanium dioxide to silicon dioxide uniformly. It is composed by arranging nineteen. Next, an example of a method for manufacturing the quartz planar optical circuit element will be described.
  • FIG. 1 2A to 2H are diagrams showing the steps of manufacturing the quartz planar optical circuit device shown in FIG.
  • one surface (upper surface) of a substrate 11 such as a silicon single crystal substrate or a synthetic quartz glass substrate is formed by ionization vapor deposition (ion plating vapor deposition). Or an ion beam assisted vapor deposition method) to form a lower clad film 13 alone of silicon dioxide or by uniformly adding germanium dioxide or titanium dioxide to silicon dioxide.
  • a core film 17 ′ having a higher refractive index obtained by uniformly adding germanium dioxide or the like to silicon dioxide was used to form a lower cladding film 13, as shown in FIG. 2B. Form on top.
  • a metal mask 21 is formed on the formed core film 17 ′ using a sputtering method, and a photoresist 23 is applied thereon.
  • An optical waveguide pattern is formed on the photo resist by an exposure device in which a photo mask is set by using a trisography technique, and a patterned photo resist 23 is formed (see FIG. 2D).
  • the metal mask 21 is patterned by reactive ion etching (RIE) using the pattern of the photoresist 23 as a mask, and the core film is further formed using the metal mask 21.
  • RIE reactive ion etching
  • the core 17 and the lower cladding film 13 were covered by ionization vapor deposition.
  • An upper clad film 15 is formed by uniformly adding phosphorus pentoxide and boron trioxide to silicon dioxide. Perform heat treatment for 0 minutes to melt and flatten the surface.
  • the upper cladding film mainly composed of silicon dioxide may be used as it is without heat treatment.
  • a silicon dioxide alone or a silicon dioxide or titanium dioxide or the like is added uniformly to provide a distortion correction film 19 9 for performing the distortion correction.
  • the material of the distortion compensation film 19 it is desirable to use a material having a thermal expansion coefficient substantially equal to that of the material of the lower cladding film 13 and the material of the upper cladding film 15.
  • the lower cladding film 13 and the upper cladding film 15 generally have a thickness of 10 to 30 ⁇ m, and the core portion 17 has a thickness of 6 to 30 ⁇ m.
  • the relative refractive index difference between the core and the cladding is 0.25 to: about 1.5%.
  • the ionization vapor deposition method is used instead of the conventional flame deposition method.
  • Film formation can be performed uniformly and continuously from a point evaporation source, and the film thickness can be made uniform, and a light guide having a uniform refractive index distribution between film formation ports and within the film formation port. Wave path can be realized.
  • the ionization deposition method used in this embodiment has a lower cladding film, a core film, and an upper cladding film at a low temperature of about 200 ° C., compared with the flame deposition method of about 100 ° C. Since the waveguide film can be formed, the film formation stress (residual stress) generated in the optical waveguide is reduced, and the polarization loss of the waveguide loss can be reduced.
  • the distortion correction film 19 having substantially the same thermal expansion coefficient as the film on the front surface side is formed on the back surface side of the substrate, it is possible to correct the warpage of the substrate, and thus more complete.
  • Optical polarization It is possible to provide a quartz planar optical circuit element having excellent connectivity with a bus and high productivity.
  • the higher the temperature at which the lower cladding film 13 is formed the greater the difference between the thermal expansion of the substrate 11 and the thermal expansion of the lower cladding 13. Becomes larger. That is, if the substrate 11 and the lower cladding film 13 are cooled to room temperature, the substrate 11 and the lower cladding film 13 shrink and the substrate 11
  • the dimension and the dimension of the lower cladding film 13 have a dimensional difference proportional to the difference between the deposition temperature and the room temperature. This causes residual stress (deposition stress) on the substrate 11 and the lower cladding film 13. ) And residual strain. This causes the polarization dependence of the waveguide loss and the warpage of the substrate.
  • the substrate 11 and the lower cladding film are used because the ionization deposition method capable of processing at about 200 ° C. is used instead of the flame deposition method of about 100 ° C. Even when the materials 13 have different coefficients of thermal expansion, the residual stress and residual strain generated in the substrate 11 and the lower cladding film 13 can be reduced. Therefore, according to this embodiment, the polarization dependence of the waveguide loss and the warpage of the substrate can be reduced.
  • a distortion correction film 19 made of a material having substantially the same thermal expansion coefficient as the material of the lower cladding film 13 is formed on the back surface of the substrate 11.
  • the distortion correction film 19 in the process of forming the distortion correction film 19, residual strain opposite to the residual strain generated in the process of forming the lower cladding film 13 is generated. Warpage can be further reduced.
  • the ion plating The lower cladding film composed mainly of silicon dioxide, the core, the upper cladding film, and the other side of the substrate are formed on one surface of the substrate by ionization vapor deposition such as ion vapor deposition or ion beam assisted vapor deposition. Since the strain correction film is formed on the surface of the optical waveguide, the refractive index distribution of the optical waveguide becomes uniform, and the polarization dependence of the waveguide loss due to the film formation stress (residual stress) and the warpage of the substrate are almost eliminated. Therefore, it has excellent connectivity with optical fibers and high mass productivity can be obtained.
  • a lower cladding film is formed on one side of the substrate using an ionization vapor deposition method such as ion plating vapor deposition or ion beam assisted vapor deposition, and a core film is formed thereon.
  • an upper cladding film is formed so as to cover the core portion and the lower cladding film, and the upper cladding film is directly or heat-treated.
  • the optical waveguide is made uniform, and the refractive index distribution of the optical waveguide becomes uniform, resulting in polarization dependence of waveguide loss due to film formation stress and substrate warpage. Is almost eliminated, excellent connectivity with optical fiber, and high mass productivity.
  • the lower cladding film (1) composed mainly of silicon dioxide formed on one surface of a silicon single crystal substrate or a synthetic quartz glass substrate (11) by vapor deposition. 3
  • Phosphorus pentoxide or phosphorus pentoxide and trioxide are added to the upper cladding film (15) or silicon dioxide mainly containing silicon dioxide so as to cover the lower cladding film (13).
  • the quartz planar optical circuit element was configured to include boron and an upper cladding film (15) formed by vapor deposition, the refractive index distribution of the optical waveguide became uniform, and film deposition stress (residual The polarization dependence of the waveguide loss due to stress) and the warpage of the substrate are almost eliminated, and the connection with the optical fiber is excellent and high productivity can be obtained.
  • a distortion correction film (19) containing silicon dioxide as a main component formed by vapor deposition is further provided on the surface on the opposite side of the substrate (11), the residual distortion of the planar optical circuit element can be reduced. It is possible to suppress the warpage of the substrate.
  • the distortion correction film (19) is made of a material having substantially the same coefficient of thermal expansion as the material of the lower cladding film (13) and the upper cladding film (15), The warpage of the substrate can be effectively prevented.

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Abstract

A quartz-plane light circuit element which comprises: a monocrystalline silicon substrate or synthetic quartz glass substrate (11); a lower cladding film (13) consisting mainly of silicon dioxide and formed by vapor deposition on one side of the substrate (11); a core part (17) of a given shape consisting mainly of silicon dioxide and formed by vapor deposition on a part of the lower cladding film (13); an upper cladding film (15) which has been deposited by vapor deposition so as to cover the core part (17) and the lower cladding film (13) and which consists mainly of silicon dioxide or comprises silicon dioxide and evenly incorporated therein either phosphorus pentaoxide or phosphorus pentaoxide and boron trioxide; and a distortion-correcting film (19) consisting mainly of silicon dioxide and formed by vapor deposition on the other side of the substrate (11).

Description

明 細 書 石英平面光回路素子およびその製造方法 技術分野  Description Quartz planar optical circuit element and manufacturing method thereof
本発明は、 波長多重光通信に不可欠なアレイ光導波路グレーティング 素子等を実現するのに必要な石英平面光回路素子とその石英平面光回路 素子の製造方法に関する。 背景技術  The present invention relates to a quartz planar optical circuit element necessary for realizing an arrayed optical waveguide grating element and the like indispensable for wavelength division multiplexing optical communication, and a method of manufacturing the quartz planar optical circuit element. Background art
従来、 石英平面光回路素子を製造する方法としては、 例えば、 火炎堆 積法が知られている。  Conventionally, for example, a flame deposition method is known as a method for manufacturing a quartz planar optical circuit element.
この火炎堆積法とは、 第 3図に示すように、 矢印 A方向に回転する円 盤 3 1の外周部に複数個の基板 3 3を並べて配置し、 二酸化ケイ素を主 成分とするガラス微粒子粉末 3 5を上記基板 3 3上に堆積させた後、 酸 素 （02) と水素 （H 2) とを混合して燃焼させる酸水素炎 3 9を出すバ ーナ 3 7を用いることによって、 1 0 0 0 °C以上の高温でガラス微粒子 粉末 3 5を溶融してガラス化する方法である。 As shown in Fig. 3, this flame deposition method is a method in which a plurality of substrates 33 are arranged side by side around a disk 31 rotating in the direction of arrow A, and glass fine powder containing silicon dioxide as a main component. after a 3 5 deposited on the substrate 3 3, by using oxygen (0 2) and hydrogen (H 2) and bar Na 3 7 issuing oxyhydrogen flame 3 9 for combusting a mixture of, This is a method in which glass fine powder 35 is melted and vitrified at a high temperature of 1000 ° C. or higher.
第 4図は、 このような火炎堆積法を用いて製造した従来の石英平面光 回路素子の断面構造を示す図である。 第 4図に示す石英平面光回路素子 を製造する場合、 まず、 シリ コン単結晶基板 （または、 合成石英ガラス 基板） 4 1の一方の面 （ここでは、 図の上面） に、 二酸化ケイ素に五酸 ィ匕リンと三酸化ボロンを添加した粉末を堆積させて、 1 0 0 0 °C以上の 高温で溶融してガラス化することにより、 下部クラッ ド膜 4 3を形成す る。  FIG. 4 is a diagram showing a cross-sectional structure of a conventional quartz planar optical circuit element manufactured using such a flame deposition method. In manufacturing the quartz planar optical circuit device shown in FIG. 4, first, one surface of a silicon single crystal substrate (or a synthetic quartz glass substrate) 41 (in this case, the upper surface of the diagram) and five portions of silicon dioxide A lower cladding film 43 is formed by depositing a powder containing phosphorus oxide and boron trioxide and melting and vitrifying the powder at a high temperature of 1000 ° C. or more.
次いで、 その下部クラッ ド膜 4 3の上面に、 二酸化ケイ素と五酸化リ ンと三酸化ボロンに更に二酸化ゲルマニウムを添加した粉末を堆積させ- 1 0 0 o°c以上の高温で溶融してガラス化することによりコア膜を形成 した後、 そのコア膜の上部の所定位置にフォ トリ ソグラフィ技術を用い て矩形状のエッチングマスクを形成し、 反応性イオンエッチング （R I E)を用いてコア膜を矩形に加工することによりコア部 4 7を形成する。 さらに、 上記した下部クラッ ド膜 4 3とコア部 4 7とを覆うように、 二酸化ケイ素に五酸化リンと三酸化ボロンを添加した粉末を堆積させ、 1 0 0 o°c以上の高温で溶融してガラス化することにより上部クラッ ド 部 4 5を形成する。 Next, on the upper surface of the lower cladding film 43, silicon dioxide and lithium pentoxide were added. A core film is formed by depositing a powder obtained by adding germanium dioxide further to boron and boron trioxide and melting and vitrifying at a high temperature of −100 ° C. or higher, and then a predetermined position on the upper portion of the core film Next, a rectangular etching mask is formed using photolithography technology, and the core film is formed into a rectangular shape using reactive ion etching (RIE) to form a core portion 47. Further, a powder obtained by adding phosphorus pentoxide and boron trioxide to silicon dioxide is deposited so as to cover the lower cladding film 43 and the core portion 47, and melted at a high temperature of 100 ° C. or more. The upper clad part 45 is formed by vitrification.
しかしながら、 上記火炎堆積法を用いて製造する従来の石英平面光回 路素子では、 最初に基坂上に間欠成膜により粉末を堆積させた後、 熱処 理することでガラス化するため、 同一成膜口ッ ト内においても均一な屈 折率の膜を得ることが困難になるという問題があった。  However, in the conventional quartz planar optical circuit device manufactured using the above-mentioned flame deposition method, powder is first deposited by intermittent film formation on a base slope and then vitrified by heat treatment. There has been a problem that it is difficult to obtain a film having a uniform refractive index even in the film mouth.
また、 これと同時に基板上に二酸化ケイ素を主成分と した粉末を積層 した後、 電気炉等により 1 0 00°C以上の高温でガラス化するため、 徐 冷後の常温に戻した状態では非常に大きな残留応力が発生する可能性が 高くなる。 このことは、 例えば、 応用物理学会第 7回光波センシング技 術研究会の 「石英系フレーナ光回路」 L S T 7 - 1 6 , p p . 1 2 1 - 1 2 6 ( 1 9 9 1， 5, 2 3) などにも記載されている。 このため、 光導波路の導破損失の偏波依存性が大きくなり、 かつ基板の反りも大き くなることから、光ファイバとの接続性が悪くなるという問題があった。 この点をより詳しく説明すると、 例えば、 厚み t 1の基板に厚み t 2 の均一膜を形成したときの膜応力の歪みにより生じる反りの曲率半径を r と した場合、 この rは次式 （ 1 ) により簡易的に示すことができる (TECHNICAL REPORT OF IEICE, OPE95-55, PP49-54(1995-08)参 照）。 r = { 1 / (a ] a 2) d T} {( t l + t 2) /2 + l / [6 X ( t 1 + t 2 )] X ( ] t l - S l + l / t 2 - S 2) X ( S 1 / t 1 3 + S 2/ t 2 3)} ( 1 ) At the same time, after laminating a powder containing silicon dioxide as a main component on the substrate, it is vitrified at a high temperature of 1000 ° C. or more in an electric furnace or the like. The possibility that a large residual stress is generated increases. This is, for example, the “Quartz-based flare optical circuit” of the 7th Lightwave Sensing Technology Study Group of the Japan Society of Applied Physics, LST 7- 16, pp. 1 2 1-1 2 6 (1991 1, 5, 2 3) and so on. For this reason, there is a problem that the dependence of the optical waveguide on the polarization loss is increased, and the warpage of the substrate is also increased, thereby deteriorating the connectivity with the optical fiber. This point will be described in more detail. For example, when a radius of curvature of a warp caused by a distortion of a film stress when a uniform film having a thickness t 2 is formed on a substrate having a thickness t 1 is represented by r, this r is expressed by the following equation (1) ) (See Technical Report of IEICE, OPE95-55, PP49-54 (1995-08)). r = {1 / (a) a 2) d T} {(tl + t 2) / 2 + l / [6 X (t 1 + t 2)] X (] tl-S l + l / t 2- S 2) X (S 1 / t 1 3 + S 2 / t 2 3)} (1)
上記 （ 1 ) 式において、 t nは各層の厚さ （以下、 nは任意の整数）、 a nは各層材料の熱膨張係数、 d Tは応力フリーの温度と常温の温度差、 Sn は S n = E nZ ( 1— v n) の関係にあって、 E nは各層材料のャ ング率、 V nは各層材料のポアソン比である。  In the above equation (1), tn is the thickness of each layer (hereinafter, n is an arbitrary integer), an is the coefficient of thermal expansion of each layer material, d T is the temperature difference between stress-free temperature and normal temperature, and Sn is Sn = In the relationship of EnZ (1-vn), En is the Young's modulus of each layer material, and Vn is the Poisson's ratio of each layer material.
この （ 1 ) 式によれば、 曲率半径 rが大きいほど各層の内部応力が小 さくなることを意味している。 すなわち、 （ a l _ a 2) および d Tが 小さいほど内部応力が小さくなる。  According to this equation (1), the larger the radius of curvature r, the smaller the internal stress of each layer. That is, the smaller the (al_a2) and dT, the smaller the internal stress.
しかし、 曲率半径 rの値が負になると膜に引っ張り応力が発生して脆 性破壊し易くなるため、 rの値は正であることが好ましい。 一般にシリ コン単結晶基板の熱膨張係数は、 5 X 1 0-6程度と言われている。 また、 アモルファスの二酸化ケイ素膜の熱膨張係数は、 ほぼ合成石英ガラス基 板に等しく、 結晶としての二酸化ケイ素膜の熱膨張係数は、 7 X 1 0-6 から 1 4 X 1 0-6程度である。 However, if the value of the radius of curvature r becomes negative, a tensile stress is generated in the film and the film is easily brittle, and therefore the value of r is preferably positive. Thermal expansion coefficient of the general silicon single crystal substrate, it is said that approximately 5 X 1 0- 6. The thermal expansion coefficient of the silicon dioxide film of amorphous, approximately equal to the synthetic quartz glass board, the thermal expansion coefficient of the silicon dioxide film as crystals from 7 X 1 0- 6 in 1 4 X 1 0-6 about is there.
このように、 従来から用いられてきた火炎堆積法によって石英平面光 回路素子を製造すると、 光導波路の導波損失の偏波依存性や基板の反り が大きくなって光ファイバとの接続性が悪くなることから、 高性能な石 英平面光回路素子を量産することが極めて困難な状況にあった。  As described above, when a quartz planar optical circuit element is manufactured by the conventionally used flame deposition method, the polarization dependence of the waveguide loss of the optical waveguide and the warpage of the substrate increase, and the connectivity with the optical fiber deteriorates. Therefore, it was extremely difficult to mass-produce high-performance planar optical circuit elements.
この発明は、 上述した従来例による問題点を解消するためになされた ものであり、 導波損失の偏波依存性が小さく、 基板の反りの無い、 量産 性に優れた石英平面光回路素子を提供することを目的とする。 発明の開示  SUMMARY OF THE INVENTION The present invention has been made to solve the above-described problems of the conventional example, and provides a quartz planar optical circuit element which is less dependent on the polarization of waveguide loss, has no substrate warpage, and is excellent in mass production. The purpose is to provide. Disclosure of the invention
上述した課題を解決し、 目的を達成するために、 本発明の石英平面光 回路素子は、 シリ コン単結晶基板もしくは合成石英ガラス基板 （ 1 1 ) の一方の面に蒸着により形成した二酸化ケイ素を主成分とする下部クラ ッ ド膜 （ 1 3) と、 前記下部クラッ ド膜 （ 1 3) 上の一部に二酸化ケィ 素を主成分とする材料を蒸着により形成した所定形状のコア部 （ 1 7) と、 前記コア部 （ 1 7) と前記下部クラッ ド膜 （ 1 3) とを覆うように、 二酸化ケイ素を主成分とする上部クラッ ド膜 （ 1 5) 又は二酸化ケイ素 に五酸化リンもしくは五酸化リンと三酸化ボロンを均一に添加し、 蒸着 により形成した上部クラッ ド膜 （ 1 5) と、 を備える。 In order to solve the above-mentioned problems and achieve the object, the quartz planar light of the present invention is used. The circuit element includes a lower cladding film (13) containing silicon dioxide as a main component formed by vapor deposition on one surface of a silicon single crystal substrate or a synthetic quartz glass substrate (11), and the lower cladding film. (13) A core part (17) of a predetermined shape formed by vapor deposition of a material mainly composed of silicon dioxide on a part of the upper part, and the core part (17) and the lower cladding film (13) ), Or an upper cladding film formed by vapor deposition by adding phosphorus pentoxide or phosphorus pentoxide and boron trioxide uniformly to silicon dioxide. And a membrane (15).
また、 この発明に係わる石英平面光回路素子において、 前記基板 （ 1 1 ) の反対側の面に蒸着により形成した二酸化ケイ素を主成分とする歪 補正膜 （ 1 9) をさらに備える。  The quartz planar optical circuit device according to the present invention further includes a strain correction film (19) containing silicon dioxide as a main component formed by vapor deposition on the surface opposite to the substrate (11).
また、 この発明に係わる石英平面光回路素子において、 前記歪補正膜 ( 1 9) は、 前記下部クラッ ド膜 （ 1 3) と上部クラッ ド膜 （ 1 5 ) の 材料と略同じ熱膨張係数を有する材料からなる。  Further, in the quartz planar optical circuit device according to the present invention, the distortion correction film (19) has substantially the same thermal expansion coefficient as the material of the lower cladding film (13) and the upper cladding film (15). It consists of the material which has.
また、 この発明に係わる石英平面光回路素子において、前記コア部（ 1 7) を形成する前記二酸化ケイ素を主成分とする材料は、 二酸化ケイ素 に二酸化ゲルマニウムを添加した材料であることを特徴とする請求項 1 に記載の石英平面光回路素子。  Further, in the quartz planar optical circuit device according to the present invention, the material mainly composed of silicon dioxide for forming the core portion (17) is a material obtained by adding germanium dioxide to silicon dioxide. The quartz planar optical circuit device according to claim 1.
また、 本発明の石英平面光回路素子の製造方法は、 シリ コン単結晶基 板もしくは合成石英ガラス基板 （ 1 1 ) の一方の面に蒸着により二酸化 ケィ素を主成分とした下部クラッ ド膜 （ 1 3) を形成する工程と、 前記 下部クラッ ド膜 （ 1 3) 上に二酸化ケイ素を主成分とするコア膜を蒸着 により形成する工程と、 前記コア膜を異方性エッチングにより所定形状 に加工してコア部 （ 1 7) を形成する工程と、 前記コア部 （ 1 7) と前 記下部クラッ ド膜 （ 1 3) とを覆うように、 二酸化ケイ素を主成分とす る上部クラッ ド膜 （ 1 5) 又は二酸化ケイ素に五酸化リ ンもしくは五酸 化リンと三酸化ボロンを均一に添加した上部クラッド膜 （1 5 ) を蒸着 により形成する工程と、 前記上部クラッ ド膜 （1 5 ) を熱処理により溶 融する工程と、 を含む。 In addition, the method for manufacturing a quartz planar optical circuit element of the present invention is characterized in that the lower clad film mainly composed of silicon dioxide is formed on one surface of a silicon single crystal substrate or a synthetic quartz glass substrate (11) by vapor deposition. Forming a core film mainly composed of silicon dioxide on the lower cladding film (13) by vapor deposition; and processing the core film into a predetermined shape by anisotropic etching. Forming a core portion (17) by heating, and an upper cladding film mainly composed of silicon dioxide so as to cover the core portion (17) and the lower cladding film (13). (15) or pentoxide or pentoxide on silicon dioxide A step of forming an upper clad film (15) to which phosphorous chloride and boron trioxide are uniformly added by vapor deposition, and a step of melting the upper clad film (15) by heat treatment.
また、 この発明に係わる石英平面光回路素子の製造方法において、 前 記基板（ 1 1 )の反対側の面に二酸化ケイ素を主成分とした歪補正膜（ 1 9 ) を蒸着により形成する工程をさらに含む。  In the method for manufacturing a quartz planar optical circuit device according to the present invention, the step of forming a distortion correction film (19) containing silicon dioxide as a main component on the surface on the opposite side of the substrate (11) by vapor deposition is included. In addition.
また、 この発明に係わる石英平面光回路素子の製造方法において、 前 記歪補正膜 （1 9 ) は、 前記下部クラッ ド膜 （ 1 3 ) と上部クラッ ド膜 ( 1 5 ) の材料と略同じ熱膨張係数を有する材料からなる。  In the method of manufacturing a quartz planar optical circuit device according to the present invention, the distortion correction film (19) is substantially the same as the material of the lower cladding film (13) and the upper cladding film (15). It is made of a material having a coefficient of thermal expansion.
また、 この発明に係わる石英平面光回路素子の製造方法において、 前 記コア膜を形成する前記二酸化ケイ素を主成分とする材料は、 二酸化ケ ィ素に二酸化ゲルマニウムを添加した材料である。 図面の簡単な説明  In the method for manufacturing a planar quartz optical circuit device according to the present invention, the material containing silicon dioxide as a main component for forming the core film is a material obtained by adding germanium dioxide to silicon dioxide. BRIEF DESCRIPTION OF THE FIGURES
第 1図は、 本発明の一実施形態に係わる石英平面光回路素子の断面構 成図である。  FIG. 1 is a cross-sectional configuration diagram of a quartz planar optical circuit device according to one embodiment of the present invention.
第 2 A図は、第 1図の石英平面光回路素子の製造工程を示す図である。 第 2 B図は、第 1図の石英平面光回路素子の製造工程を示す図である。 第 2 C図は、第 1図の石英平面光回路素子の製造工程を示す図である。 第 2 D図は、第 1図の石英平面光回路素子の製造工程を示す図である。 第 2 E図は、第 1図の石英平面光回路素子の製造工程を示す図である。 第 2 F図は、第 1図の石英平面光回路素子の製造工程を示す図である。 第 2 G図は、第 1図の石英平面光回路素子の製造工程を示す図である。 第 2 H図は、第 1図の石英平面光回路素子の製造工程を示す図である。 第 3図は、 火炎堆積法による成膜方法を説明する図である。  FIG. 2A is a diagram showing a step of manufacturing the quartz planar optical circuit device of FIG. FIG. 2B is a diagram showing a step of manufacturing the quartz planar optical circuit device of FIG. FIG. 2C is a diagram showing a step of manufacturing the quartz planar optical circuit device of FIG. FIG. 2D is a diagram showing a step of manufacturing the quartz planar optical circuit device of FIG. FIG. 2E is a diagram showing a step of manufacturing the quartz planar optical circuit element in FIG. 1. FIG. 2F is a diagram showing a step of manufacturing the quartz planar optical circuit device in FIG. 1. FIG. 2G is a diagram showing a step of manufacturing the quartz planar optical circuit device in FIG. FIG. 2H is a diagram showing a step of manufacturing the quartz planar optical circuit device of FIG. FIG. 3 is a view for explaining a film deposition method by a flame deposition method.
第 4図は、 火炎堆積法を用いて製造した従来の石英平面光回路素子の 断面構成図である。 発明を実施するための最良の形態 Fig. 4 shows a conventional quartz planar optical circuit element manufactured using the flame deposition method. It is sectional drawing. BEST MODE FOR CARRYING OUT THE INVENTION
以下、 本発明の好適な一実施形態について説明する。  Hereinafter, a preferred embodiment of the present invention will be described.
本実施形態の石英平面光回路素子は、 シリ コン単結晶基板もしくは合 成石英ガラス基板の一方の面に蒸着により形成した二酸化ケイ素を主成 分とする下部クラッ ド膜と、 前記下部クラッ ド膜上の一部に二酸化ケィ 素に二酸化ゲルマニウム等を均一に添加し、 蒸着により形成した所定形 状のコア部と、 前記コア部と前記下部クラッ ド膜とを覆うように、 二酸 化ケィ素を主成分とする上部クラッ ド膜又は二酸化ケイ素に五酸化リン もしくは五酸化リンと三酸化ボロンを均一に添加し、 蒸着により形成し た上部クラッ ド膜と、 前記基板の反対側の面に蒸着により形成した二酸 化ケィ素を主成分とする歪補正膜と、 を備えている。  The quartz planar optical circuit element of the present embodiment includes a lower clad film mainly composed of silicon dioxide formed by vapor deposition on one surface of a silicon single crystal substrate or a synthetic quartz glass substrate, and the lower clad film. Germanium dioxide or the like is uniformly added to silicon dioxide on the upper part of the silicon dioxide, and silicon dioxide is formed so as to cover a core having a predetermined shape formed by vapor deposition and the core and the lower cladding film. Phosphorus pentoxide or phosphorous pentoxide and boron trioxide are uniformly added to an upper cladding film or a silicon dioxide, and the upper cladding film formed by vapor deposition and vapor deposition on the surface opposite to the substrate And a distortion correction film containing silicon dioxide as a main component and formed by the above method.
この実施形態では、 蒸着物質を直接イオン化して基板に電界加速によ り付着させたり （イオンプレーティング蒸着法）、 イオン化した気体を 電界加速して蒸着物質に衝突させて蒸着物質を基板に付着させる （ィォ ンビームアシス ト蒸着法） といったイオン化蒸着法を用いて、 基板上に 二酸化ケイ素を主成分とした下部クラッ ド膜、 その上に二酸化ケイ素に 二酸化ゲルマニウム等を均一に添加したコア部、 さらにその上に二酸化 ケィ素を主成分とする上部クラッ ド膜又は二酸化ケイ素に五酸化リンも しくは五酸化リンと三酸化ボロンを均一に添加した上部クラッ ド膜を配 し、 その基板の裏側には二酸化ケイ素を主成分と した歪補正膜を配する ようにする。 このよ うにすることにより、 各膜が比較的低温で成膜され るので、 各膜の残留応力 （成膜応力） が小さくなり、 光導波路の屈折率 分布が均一で、 成膜応力による導波損失の偏波依存性のほとんどない石 英平面回路素子を得ることができる。 また、 基板の表面側の二酸化ケィ 素を主成分とする膜と、 基板の裏面側の二酸化ケイ素を主成分とする歪 補正膜の熱膨張係数が略同一となるため、 基板の表面側と裏面側の残留 歪が互いに打ち消し合うように働く。 このため、基板の反りが殆ど無く、 光ファイバとの接続性に優れ、 高い量産性が得られる石英平面回路素子 を得ることができる。 In this embodiment, the deposition material is directly ionized and adhered to the substrate by electric field acceleration (ion plating deposition method), or the ionized gas is accelerated by an electric field to collide with the deposition material and adhere the deposition material to the substrate. Using a lower cladding film composed mainly of silicon dioxide on the substrate, and a core portion made of silicon dioxide uniformly doped with germanium dioxide, etc. An upper cladding film mainly composed of silicon dioxide or an upper cladding film obtained by uniformly adding phosphorus pentoxide or phosphorus pentoxide and boron trioxide to silicon dioxide is disposed on the upper cladding film. Is to provide a distortion correction film mainly composed of silicon dioxide. By doing so, each film is formed at a relatively low temperature, so that the residual stress (film formation stress) of each film is reduced, the refractive index distribution of the optical waveguide is uniform, and the waveguide is formed by the film formation stress. It is possible to obtain a flat-surface circuit element having almost no polarization dependence of loss. In addition, the carbon dioxide Since the coefficient of thermal expansion of the film containing silicon as the main component and the coefficient of thermal expansion of the strain correction film containing silicon dioxide as the main component on the back side of the substrate are substantially the same, the residual strain on the front side and the back side of the substrate cancel each other. Work on. For this reason, it is possible to obtain a quartz planar circuit device which hardly warps the substrate, has excellent connectivity with the optical fiber, and can obtain high mass productivity.
本実施形態の石英平面光回路素子の製造方法は、 シリ コン単結晶基板 もしくは合成石英ガラス基板の一方の面に蒸着により二酸化ケイ素を主 成分とした下部クラッ ド膜を形成する工程と、 前記下部クラッ ド膜上に 二酸化ケイ素に二酸化ゲルマニウム等を均一に添加したコア膜を蒸着に より形成する工程と、 前記コア膜を異方性エッチングにより所定形状に 加工してコア部を形成する工程と、 前記コア部と前記下部クラッ ド膜と を覆うように、 二酸化ケイ素を主成分とする上部クラッ ド膜又は二酸化 ケィ素に五酸化リンもしくは五酸化リンと三酸化ボロンを均一に添加し た上部クラッ ド膜を蒸着により形成する工程と、 前記上部クラッ ド膜を 熱処理により溶融する工程と、 前記基板の反対側の面に二酸化ケイ素を 主成分とした歪補正膜を蒸着により形成する工程と、 を含む。  The method for manufacturing a quartz planar optical circuit element according to the present embodiment includes a step of forming a lower clad film mainly composed of silicon dioxide on one surface of a silicon single crystal substrate or a synthetic quartz glass substrate by vapor deposition; Forming a core film on a clad film by uniformly depositing silicon dioxide with germanium dioxide or the like by vapor deposition; forming the core film by processing the core film into a predetermined shape by anisotropic etching; An upper cladding film composed mainly of silicon dioxide or an upper cladding obtained by uniformly adding phosphorus pentoxide or phosphorus pentoxide and boron trioxide to silicon dioxide so as to cover the core portion and the lower cladding film. Forming the upper clad film by heat treatment; and forming silicon dioxide as a main component on the surface on the opposite side of the substrate. And forming by vapor deposition a correction film.
この方法では、 イオンプレーティング蒸着法やイオンビームアシス ト 蒸着法といったイオン化蒸着法を用いて、 基板の表側に二酸化ケイ素を 主成分とする下部クラッ ド膜を形成し、 その上に二酸化ケイ素に二酸化 ゲルマニウム等を均一に添加したコア膜を形成し、 コア膜を異方性エツ チングにより所定形状に加工してコア部を形成し、 そのコア部と下部ク ラッ ド膜とを覆うように、 二酸化ケイ素を主成分とする上部クラッ ド膜 又は二酸化ケイ素に五酸化リンもしくは五酸化リンと三酸化ボロンを均 一に添加した上部クラッ ド膜を形成し、 その上部クラッ ド膜を熱処理に より溶融し、 また、 基板の反対側の面に二酸化ケイ素を主成分とした歪 補正膜を形成するようにする。 このようにすることにより、 各膜が比較 的低温で成膜されるので、 各膜の残留応力 （成膜応力） が小さくなり、 光導波路の屈折率分布が均一で、 成膜応力による導波損失の偏波依存性 のほとんどない石英平面回路素子を得ることができる。 また、 基板の表 面側の二酸化ケイ素を主成分とする膜と、 基板の裏面側の二酸化ケイ素 を主成分とする歪補正膜の熱膨張係数が略同一となるため、 基板の表面 側と裏面側の残留歪が互いに打ち消し合うように働く。 このため、 基板 の反りが殆ど無く、 光ファイバとの接続性に優れ、 高い量産性が得られ る石英平面回路素子を得ることができる。 In this method, a lower cladding film containing silicon dioxide as a main component is formed on the front side of a substrate by using an ionization vapor deposition method such as an ion plating vapor deposition method or an ion beam assisted vapor deposition method. A core film to which germanium or the like is uniformly added is formed, the core film is processed into a predetermined shape by anisotropic etching, a core portion is formed, and a carbon dioxide is formed so as to cover the core portion and the lower cladding film. An upper cladding film composed mainly of silicon or an upper cladding film in which phosphorus pentoxide or phosphorus pentoxide and boron trioxide are uniformly added to silicon dioxide is formed, and the upper cladding film is melted by heat treatment. In addition, a strain correction film containing silicon dioxide as a main component is formed on the opposite surface of the substrate. By doing so, each film can be compared Since the film is formed at a low temperature, the residual stress (film formation stress) of each film is small, the refractive index distribution of the optical waveguide is uniform, and the polarization dependence of the waveguide loss due to the film formation stress is almost flat. A circuit element can be obtained. Also, since the film mainly composed of silicon dioxide on the front side of the substrate and the distortion correction film mainly composed of silicon dioxide on the rear side of the substrate have substantially the same coefficient of thermal expansion, the front side and the rear side of the substrate The residual strains on the sides act to cancel each other. For this reason, it is possible to obtain a quartz planar circuit element that hardly warps the substrate, has excellent connectivity with an optical fiber, and can obtain high mass productivity.
以下、 本発明の一実施形態について、 添付図面を参照して詳細に説明 する。  Hereinafter, an embodiment of the present invention will be described in detail with reference to the accompanying drawings.
第 1図は、 本実施形態に係る石英平面光回路素子の一構成例を示す断 面図である。  FIG. 1 is a cross-sectional view showing one configuration example of a quartz planar optical circuit element according to the present embodiment.
まず、 第 1図に示すように、 本実施形態の石英平面光回路素子は、 シ リコン単結晶基板や合成石英ガラス基板などの基板 1 1の一方の面 （図 の上面） にイオン化蒸着法 （イオンプレーティング蒸着法やイオンビー ムアシス ト蒸着法など） を用いて、 二酸化ケイ素単体、 あるいは二酸化 ケィ素に二酸化ゲルマニウムや二酸化チタン等を均一に添加した下部ク ラッ ド膜 1 3を形成し、 その下部クラッ ド膜 1 3上にイオン化蒸着法を 用いて、 二酸化ケイ素を主成分とする上部クラッ ド膜又は二酸化ケイ素 に二酸化ゲルマニウム等を均一に添加した矩形状のコア部 1 7を形成し、 そのコア部 1 7と下部クラッ ド膜 1 3上にイオン化蒸着法を用いて、 二 酸化ケィ素に五酸化リン、 もしくは二酸化ケイ素に五酸化リンと三酸化 ボロンを均一に添加した上部クラッ ド膜 1 5を形成し、 基板 1 1の反対 側の面 （図の下面） には二酸化ケイ素単体か、 二酸化ケイ素に二酸化チ タン等を均一に添加した歪補正を行う歪補正膜 1 9を配することにより 構成されている。 次に、 この石英平面光回路素子の製造方法例について説明する。 First, as shown in FIG. 1, the quartz planar optical circuit element of the present embodiment is formed on one surface (the upper surface in the figure) of a substrate 11 such as a silicon single crystal substrate or a synthetic quartz glass substrate by ionization vapor deposition ( Using ion plating deposition or ion beam deposition, a lower clad film 13 is formed by adding silicon dioxide alone or germanium dioxide or titanium dioxide to silicon dioxide uniformly, and the lower clad film 13 is formed. An upper cladding film mainly composed of silicon dioxide or a rectangular core portion 17 made of silicon dioxide uniformly doped with germanium dioxide or the like is formed on the cladding film 13 by ionization vapor deposition. Using ionization deposition on parts 17 and the lower cladding film 13, apply phosphorus pentoxide to silicon dioxide or phosphorus pentoxide and boron trioxide to silicon dioxide uniformly. An upper clad film 15 is formed, and the surface opposite to the substrate 11 (the lower surface in the figure) is a distortion correction film that performs distortion correction by adding silicon dioxide alone or titanium dioxide to silicon dioxide uniformly. It is composed by arranging nineteen. Next, an example of a method for manufacturing the quartz planar optical circuit element will be described.
第 2 A図乃至第 2 H図は、 第 1図の石英平面光回路素子の製造工程を 示す図である。  2A to 2H are diagrams showing the steps of manufacturing the quartz planar optical circuit device shown in FIG.
本実施形態においては、 第 2 A図に示すように、 シリ コン単結晶基板 もしくは合成石英ガラス基板などの基板 1 1の一方の面 （上面） にィォ ン化蒸着法 （イオンプレーティング蒸着法やイオンビームアシス ト蒸着 法など） を用いて、 二酸化ケイ素単体、 あるいは二酸化ケイ素に二酸化 ゲルマニウムや二酸化チタン等を均一に添加した下部クラッ ド膜 1 3を 形成する。  In this embodiment, as shown in FIG. 2A, one surface (upper surface) of a substrate 11 such as a silicon single crystal substrate or a synthetic quartz glass substrate is formed by ionization vapor deposition (ion plating vapor deposition). Or an ion beam assisted vapor deposition method) to form a lower clad film 13 alone of silicon dioxide or by uniformly adding germanium dioxide or titanium dioxide to silicon dioxide.
次いで、 上記と同様にイオン化蒸着法を用いて、 第 2 B図に示すよう に、 二酸化ケイ素に二酸化ゲルマニウム等を均一に添加したより屈折率 の高いコア膜 1 7 ' を下部クラッ ド膜 1 3上に形成する。  Next, as shown in FIG. 2B, a core film 17 ′ having a higher refractive index obtained by uniformly adding germanium dioxide or the like to silicon dioxide was used to form a lower cladding film 13, as shown in FIG. 2B. Form on top.
そして、 第 2 C図に示すように、 その形成したコア膜 1 7 ' 上にスパ ッタリング法を使って金属マスク 2 1を成膜し、 その上にフォ トレジス ト 2 3を塗布した後、 フォ トリ ソグラフィ技術を用いてフォ トマスクを セッ トした露光機により光導波路のパターンをフォ トレジス ト上に形成 し、 パターン化されたフォ ト レジス ト 2 3を形成する （第 2 D図参照）。 次いで、 第 2 E図に示すように、 そのフォ トレジス ト 2 3のパターン をマスクにして反応性イオンエッチング （R I E ) により金属マスク 2 1をパターニングし、 さらにその金属マスク 2 1を使ってコア膜 1 7 ' を反応性イオンエッチング （R I E ) によって矩形状に加工し、 コア部 1 7を形成する （第 2 F図参照）。  Then, as shown in FIG. 2C, a metal mask 21 is formed on the formed core film 17 ′ using a sputtering method, and a photoresist 23 is applied thereon. An optical waveguide pattern is formed on the photo resist by an exposure device in which a photo mask is set by using a trisography technique, and a patterned photo resist 23 is formed (see FIG. 2D). Next, as shown in FIG. 2E, the metal mask 21 is patterned by reactive ion etching (RIE) using the pattern of the photoresist 23 as a mask, and the core film is further formed using the metal mask 21. 17 'is processed into a rectangular shape by reactive ion etching (RIE) to form a core 17 (see Fig. 2F).
次いで、 第 2 G図に示すように、 上記の金属マスク 2 1を反応性ィォ ンエッチングを用いて除去した後、 コア部 1 7と下部クラッ ド膜 1 3を 覆うようにイオン化蒸着法により二酸化ケイ素に五酸化リンと三酸化ボ ロンを均一に添加した上部クラッ ド膜 1 5を形成し、 約 1 0 0 0 °Cで 3 0分熱処理を行って溶融させ、 表面を平坦化する。 なお、 二酸化ケイ素 を主成分とする上部クラッ ド膜を熱処理することなく、 そのまま使用す る場合もある。 Next, as shown in FIG. 2G, after the metal mask 21 was removed using reactive ion etching, the core 17 and the lower cladding film 13 were covered by ionization vapor deposition. An upper clad film 15 is formed by uniformly adding phosphorus pentoxide and boron trioxide to silicon dioxide. Perform heat treatment for 0 minutes to melt and flatten the surface. The upper cladding film mainly composed of silicon dioxide may be used as it is without heat treatment.
最後に、 第 2 H図に示すように、 基板 1 1の反対側 （下面） に二酸化 ケィ素単体、 あるいは二酸化ケイ素に二酸化チタン等を均一に添加した 歪補正を行うための歪補正膜 1 9をイオン化蒸着法により形成する。 歪 補正膜 1 9の材料としては、 下部クラッ ド膜 1 3及び上部クラッ ド膜 1 5の材料と熱膨張係数が略等しい材料を用いるのが望ましい。  Finally, as shown in FIG. 2H, on the opposite side (lower surface) of the substrate 11, a silicon dioxide alone or a silicon dioxide or titanium dioxide or the like is added uniformly to provide a distortion correction film 19 9 for performing the distortion correction. Is formed by an ionization vapor deposition method. As the material of the distortion compensation film 19, it is desirable to use a material having a thermal expansion coefficient substantially equal to that of the material of the lower cladding film 13 and the material of the upper cladding film 15.
このようにして製造したシングルモード光導波路においては、 一般に 下部クラッ ド膜 1 3と上部クラッ ド膜 1 5の膜厚が 1 0〜 3 0 μ m、 コ ァ部 1 7の膜厚が 6〜 8 ΠΙ、 そしてコアとクラッ ドとの比屈折率差が 0 . 2 5〜： 1 . 5 %程度である。  In the single-mode optical waveguide manufactured in this manner, the lower cladding film 13 and the upper cladding film 15 generally have a thickness of 10 to 30 μm, and the core portion 17 has a thickness of 6 to 30 μm. The relative refractive index difference between the core and the cladding is 0.25 to: about 1.5%.
以上述べたように、 本実施形態によれば、 石英平面光回路素子を構成 する各膜を形成する際に、 従来からの火炎堆積法に代えてイオン化蒸着 法を用いたため、 蒸着基板全体への成膜を点の蒸発源から均一かつ連続 的に行えるようになり、 膜厚を均一化することができると共に、 成膜口 ッ ト間および成膜口ッ ト内における屈折率分布の均一な光導波路を実現 することができる。  As described above, according to the present embodiment, when forming each film constituting the quartz planar optical circuit element, the ionization vapor deposition method is used instead of the conventional flame deposition method. Film formation can be performed uniformly and continuously from a point evaporation source, and the film thickness can be made uniform, and a light guide having a uniform refractive index distribution between film formation ports and within the film formation port. Wave path can be realized.
また、 本実施形態で用いたイオン化蒸着法は、 約 1 0 0 0 °Cの火炎堆 積法と比べると、 2 0 0 °C前後の低温で下部クラッ ド膜、 コア膜、 そし て上部クラッ ド膜を成膜することができるため、 光導波路に生じる成膜 応力 （残留応力） が小さくなつて、 導波損失の低偏波依存化が可能とな る。  In addition, the ionization deposition method used in this embodiment has a lower cladding film, a core film, and an upper cladding film at a low temperature of about 200 ° C., compared with the flame deposition method of about 100 ° C. Since the waveguide film can be formed, the film formation stress (residual stress) generated in the optical waveguide is reduced, and the polarization loss of the waveguide loss can be reduced.
さらに、 本実施形態によれば、 基板の裏面側に、 表面側の膜と熱膨張 係数が略同一の歪補正膜 1 9を形成したため、 基板の反りを修正するこ とが可能となり、 より完全な低偏波依存化が実現できるので、 光フアイ バとの接続性に優れた量産性の高い石英平面光回路素子を提供すること ができる。 Further, according to the present embodiment, since the distortion correction film 19 having substantially the same thermal expansion coefficient as the film on the front surface side is formed on the back surface side of the substrate, it is possible to correct the warpage of the substrate, and thus more complete. Optical polarization It is possible to provide a quartz planar optical circuit element having excellent connectivity with a bus and high productivity.
以上の本実施形態の作用についてまとめると以下のようになる。  The operation of the present embodiment described above is summarized as follows.
( 1 ) 第 2図 （ a ) に示すように基板 1 1の表面に下部クラッ ド膜 1 3 を形成する場合、 例えば基板 1 1の材料の熱膨張係数と下部クラッ ド膜 (1) When the lower cladding film 13 is formed on the surface of the substrate 11 as shown in FIG. 2 (a), for example, the thermal expansion coefficient of the material of the substrate 11 and the lower cladding film
1 3の材料の熱膨張係数が異なっていると、 下部クラッ ド膜 1 3を成膜 するときの温度が高いほど基板 1 1の熱膨張量と下部クラッ ド膜 1 3の 熱膨張量の差が大きくなる。 すなわち、 成膜温度で応力フリーの状態で あれば、基板 1 1 と下部クラッ ド膜 1 3が室温まで冷却されたときには、 基板 1 1 と下部クラッ ド膜 1 3は収縮し、 基板 1 1の寸法と下部クラッ ド膜 1 3の寸法には、 成膜温度と室温の差に比例した寸法差が生じるこ とになり、 これが基板 1 1 と下部クラッ ド膜 1 3に残留応力 （成膜応力） と残留歪を生じさせることとなる。 これが導波損失の偏波依存性と基板 の反りを生じさせる。 If the materials 13 have different coefficients of thermal expansion, the higher the temperature at which the lower cladding film 13 is formed, the greater the difference between the thermal expansion of the substrate 11 and the thermal expansion of the lower cladding 13. Becomes larger. That is, if the substrate 11 and the lower cladding film 13 are cooled to room temperature, the substrate 11 and the lower cladding film 13 shrink and the substrate 11 The dimension and the dimension of the lower cladding film 13 have a dimensional difference proportional to the difference between the deposition temperature and the room temperature. This causes residual stress (deposition stress) on the substrate 11 and the lower cladding film 13. ) And residual strain. This causes the polarization dependence of the waveguide loss and the warpage of the substrate.
この点、 本実施形態では、 約 1 0 0 0 °Cの火炎堆積法を用いずに、 2 0 0 °C程度で処理できるイオン化蒸着法を用いているため、 基板 1 1 と 下部クラッ ド膜 1 3の材料の熱膨張率が異なっていた場合でも、 基板 1 1 と下部クラッ ド膜 1 3に生ずる残留応力と残留歪を小さくすることが できる。 そのため、 本実施形態によれば、 導波損失の偏波依存性と基板 の反りを小さくすることができる。  In this regard, in the present embodiment, the substrate 11 and the lower cladding film are used because the ionization deposition method capable of processing at about 200 ° C. is used instead of the flame deposition method of about 100 ° C. Even when the materials 13 have different coefficients of thermal expansion, the residual stress and residual strain generated in the substrate 11 and the lower cladding film 13 can be reduced. Therefore, according to this embodiment, the polarization dependence of the waveguide loss and the warpage of the substrate can be reduced.
( 2 ) さらに、 第 2図 （h ) に示すように、 基板 1 1の裏面側に、 下部 クラッ ド膜 1 3の材料と略同じ熱膨張率を有する材料からなる歪補正膜 1 9を成膜すると、 歪補正膜 1 9の成膜工程で、 下部クラッ ド膜 1 3の 成膜工程で生じた残留歪と反対の残留歪が生ずるので、 これらの歪が打 ち消しあって、 基板の反りをさらに小さくすることができる。  (2) Further, as shown in FIG. 2 (h), a distortion correction film 19 made of a material having substantially the same thermal expansion coefficient as the material of the lower cladding film 13 is formed on the back surface of the substrate 11. When the film is formed, in the process of forming the distortion correction film 19, residual strain opposite to the residual strain generated in the process of forming the lower cladding film 13 is generated. Warpage can be further reduced.
以上説明したように、 上記の実施形態によれば、 イオンプレーティン グ蒸着法やイオンビームアシス ト蒸着法といったイオン化蒸着法を用い て、 基板の一方の面に二酸化ケイ素を主成分とした下部クラッ ド膜、 コ ァ部、 上部クラッ ド膜、 および基板の反対側の面には歪補正膜を形成す るようにしたので、 光導波路の屈折率分布が均一となり、 成膜応力 （残 留応力） による導波損失の偏波依存性や基板の反りが殆ど無くなって、 光ファイバとの接続性に優れ、 高い量産性が得られる。 As described above, according to the above embodiment, the ion plating The lower cladding film composed mainly of silicon dioxide, the core, the upper cladding film, and the other side of the substrate are formed on one surface of the substrate by ionization vapor deposition such as ion vapor deposition or ion beam assisted vapor deposition. Since the strain correction film is formed on the surface of the optical waveguide, the refractive index distribution of the optical waveguide becomes uniform, and the polarization dependence of the waveguide loss due to the film formation stress (residual stress) and the warpage of the substrate are almost eliminated. Therefore, it has excellent connectivity with optical fibers and high mass productivity can be obtained.
また、 イオンプレーティング蒸着法やイオンビームアシス ト蒸着法と いったイオン化蒸着法を用いて、 基板の一方の面に下部クラッ ド膜を形 成し、 その上にコア膜を形成し、 コア膜を異方性エッチングで所定形状 に加工してコア部を形成し、 そのコア部と下部クラッ ド膜とを覆うよう に上部クラッ ド膜を形成し、 その上部クラッ ド膜を直接又は熱処理によ つて溶融し、 基板の反対側の面に歪補正膜を形成するようにしたので、 光導波路の屈折率分布が均一となって、 成膜応力による導波損失の偏波 依存性や基板の反りが殆ど無くなり、 光ファイバとの接続性に優れ、 高 い量産性が得られる。  Also, a lower cladding film is formed on one side of the substrate using an ionization vapor deposition method such as ion plating vapor deposition or ion beam assisted vapor deposition, and a core film is formed thereon. Is processed into a predetermined shape by anisotropic etching to form a core portion, an upper cladding film is formed so as to cover the core portion and the lower cladding film, and the upper cladding film is directly or heat-treated. The optical waveguide is made uniform, and the refractive index distribution of the optical waveguide becomes uniform, resulting in polarization dependence of waveguide loss due to film formation stress and substrate warpage. Is almost eliminated, excellent connectivity with optical fiber, and high mass productivity.
なお、 本発明は、 その主旨を逸脱しない範囲で、 上記実施形態を修正 又は変形したものに適用可能である。 産業上の利用可能性  The present invention can be applied to a modification or modification of the above embodiment without departing from the gist of the invention. Industrial applicability
以上説明した様に、 本発明によれば、 シリ コン単結晶基板もしくは合 成石英ガラス基板 （ 1 1 ) の一方の面に蒸着により形成した二酸化ケィ 素を主成分とする下部クラッ ド膜 （ 1 3 ) と、 前記下部クラッ ド膜 （ 1 3 ) 上の一部に二酸化ケイ素を主成分とする材料を蒸着により形成した 所定形状のコア部 （ 1 7 ) と、 前記コア部 （ 1 7 ) と前記下部クラッ ド 膜 （ 1 3 ) とを覆うように、 二酸化ケイ素を主成分とする上部クラッ ド 膜 （ 1 5 ) 又は二酸化ケイ素に五酸化リンもしくは五酸化リンと三酸化 ボロンを均一に添加し、 蒸着により形成した上部クラッ ド膜 （ 1 5) と、 を備えるように石英平面光回路素子を構成したので、 光導波路の屈折率 分布が均一となり、 成膜応力 （残留応力） による導波損失の偏波依存性 や基板の反りが殆ど無くなって、 光ファイバとの接続性に優れ、 高い量 産性が得られる。 As described above, according to the present invention, the lower cladding film (1) composed mainly of silicon dioxide formed on one surface of a silicon single crystal substrate or a synthetic quartz glass substrate (11) by vapor deposition. 3), a core part (17) having a predetermined shape in which a material mainly composed of silicon dioxide is formed on a part of the lower clad film (13) by vapor deposition, and the core part (17). Phosphorus pentoxide or phosphorus pentoxide and trioxide are added to the upper cladding film (15) or silicon dioxide mainly containing silicon dioxide so as to cover the lower cladding film (13). Since the quartz planar optical circuit element was configured to include boron and an upper cladding film (15) formed by vapor deposition, the refractive index distribution of the optical waveguide became uniform, and film deposition stress (residual The polarization dependence of the waveguide loss due to stress) and the warpage of the substrate are almost eliminated, and the connection with the optical fiber is excellent and high productivity can be obtained.
また、 基板 （ 1 1 ) の反対側の面に蒸着により形成した二酸化ケイ素 を主成分とする歪補正膜 （ 1 9) をさらに備える様に構成したので、 石 英平面光回路素子の残留歪を抑制し、 基板の反りを防止することができ る。  In addition, since a distortion correction film (19) containing silicon dioxide as a main component formed by vapor deposition is further provided on the surface on the opposite side of the substrate (11), the residual distortion of the planar optical circuit element can be reduced. It is possible to suppress the warpage of the substrate.
また、 歪補正膜 （ 1 9) は、 下部クラッ ド膜 （ 1 3) と上部クラッ ド 膜 （ 1 5 ) の材料と略同じ熱膨張係数を有する材料からなる様に構成さ れているので、 基板の反りを効果的に防止することができる。  Also, since the distortion correction film (19) is made of a material having substantially the same coefficient of thermal expansion as the material of the lower cladding film (13) and the upper cladding film (15), The warpage of the substrate can be effectively prevented.
また、 シリコン単結晶基板もしくは合成石英ガラス基板 （ 1 1 ) の一 方の面に蒸着により二酸化ケイ素を主成分と した下部クラッ ド膜 （ 1 3) を形成する工程と、 前記下部クラッ ド膜 （ 1 3) 上に二酸化ケイ素 を主成分とするコア膜を蒸着により形成する工程と、 前記コア膜を異方 性エッチングにより所定形状に加工してコア部 （ 1 7) を形成する工程 と、 前記コア部 （ 1 7) と前記下部クラッ ド膜 （ 1 3) とを覆うように、 二酸化ケイ素を主成分とする上部クラッ ド膜 （ 1 5) 又は二酸化ケイ素 に五酸化リンもしくは五酸化リンと三酸化ボロンを均一に添加した上部 クラッ ド膜 （ 1 5) を蒸着により形成する工程と、 前記上部クラッ ド膜 ( 1 5) を熱処理により溶融する工程と、 を含む様に石英平面光回路素 子の製造方法を構成したので、 光導波路の屈折率分布が均一となって、 成膜応力による導波損失の偏波依存性や基板の反りが殆ど無くなり、 光 ファイバとの接続性に優れ、 高い量産性が得られる。  Forming a lower cladding film (13) containing silicon dioxide as a main component by vapor deposition on one surface of a silicon single crystal substrate or a synthetic quartz glass substrate (11); 13) a step of forming a core film containing silicon dioxide as a main component thereon by vapor deposition, a step of forming the core portion (17) by processing the core film into a predetermined shape by anisotropic etching, In order to cover the core portion (17) and the lower cladding film (13), the upper cladding film (15) containing silicon dioxide as a main component or the silicon dioxide on phosphorus pentoxide or phosphorus pentoxide and trioxide. A step of forming an upper clad film (15) to which boron oxide is uniformly added by vapor deposition, and a step of melting the upper clad film (15) by heat treatment so as to include: Since the manufacturing method of The refractive index distribution of the optical waveguide becomes uniform, warpage of the polarization dependence and the substrate of the waveguide loss due to deposition stress almost eliminated, excellent connectivity with the optical fiber, high productivity is obtained.

Claims

請 求 の 範 囲 The scope of the claims
1. シリ コン単結晶基板もしくは合成石英ガラス基板 （ 1 1 ) の一方の 面に蒸着により形成した二酸化ケイ素を主成分とする下部クラッ ド膜 ( 1 3) と、 1. A lower cladding film (13) mainly composed of silicon dioxide formed on one side of a silicon single crystal substrate or a synthetic quartz glass substrate (11) by vapor deposition;
前記下部クラッ ド膜 （ 1 3 ) 上の一部に二酸化ケイ素を主成分とする 材料を蒸着により形成した所定形状のコア部 （ 1 7) と、  A core part (17) having a predetermined shape formed by vapor deposition of a material containing silicon dioxide as a main component on a part of the lower cladding film (13);
前記コア部 （ 1 7) と前記下部クラッ ド膜 （ 1 3) とを覆うように、 二酸化ケイ素を主成分とする上部クラッ ド膜 （ 1 5) 又は二酸化ケイ素 に五酸化リンもしくは五酸化リンと三酸化ボロンを均一に添加し、 蒸着 により形成した上部クラッ ド膜 （ 1 5) と、  In order to cover the core part (17) and the lower cladding film (13), phosphorus pentoxide or phosphorus pentoxide is added to the upper cladding film (15) or silicon dioxide containing silicon dioxide as a main component. An upper clad film (15) formed by uniform addition of boron trioxide and evaporation,
を備えることを特徴とする石英平面光回路素子。  A quartz planar optical circuit device comprising:
2. 前記基板 （ 1 1 ) の反対側の面に蒸着により形成した二酸化ケイ素 を主成分とする歪補正膜 （ 1 9) をさらに備えることを特徴とする請求 項 1に記載の石英平面光回路素子。  2. The quartz planar optical circuit according to claim 1, further comprising a distortion correction film (19) containing silicon dioxide as a main component formed by vapor deposition on the surface on the opposite side of the substrate (11). element.
3. 前記歪補正膜 （ 1 9) は、 前記下部クラッ ド膜 （ 1 3) と上部クラ ッ ド膜 （ 1 5) の材料と略同じ熱膨張係数を有する材料からなることを 特徴とする請求項 2に記載の石英平面光回路素子。  3. The distortion correction film (19) is made of a material having substantially the same coefficient of thermal expansion as the material of the lower cladding film (13) and the upper cladding film (15). Item 3. The quartz planar optical circuit element according to Item 2.
4. 前記コア部 （ 1 7) を形成する前記二酸化ケイ素を主成分とする材 料は、 二酸化ケイ素に二酸化ゲルマニウムを添加した材料であることを 特徴とする請求項 1に記載の石英平面光回路素子。  4. The planar quartz optical circuit according to claim 1, wherein the material containing silicon dioxide as a main component forming the core portion (17) is a material obtained by adding germanium dioxide to silicon dioxide. element.
5. シリ コン単結晶基板もしくは合成石英ガラス基板 （ 1 1 ) の一方の 面に蒸着により二酸化ケイ素を主成分とした下部クラッ ド膜 （ 1 3) を 形成する工程と、  5. a step of forming a lower cladding film (13) containing silicon dioxide as a main component on one surface of a silicon single crystal substrate or a synthetic quartz glass substrate (11) by vapor deposition;
前記下部クラッ ド膜 （ 1 3) 上に二酸化ケイ素を主成分とするコア膜 を蒸着により形成する工程と、 前記コア膜を異方性エッチングにより所定形状に加工してコア部 （ 1 7) を形成する工程と、 Forming a core film composed mainly of silicon dioxide on the lower cladding film (13) by vapor deposition; Processing the core film into a predetermined shape by anisotropic etching to form a core portion (17);
前記コア部 （ 1 7) と前記下部クラッ ド膜 （ 1 3) とを覆うように、 二酸化ケイ素を主成分とする上部クラッ ド膜 （ 1 5) 又は二酸化ケイ素 に五酸化リンもしくは五酸化リンと三酸化ボロンを均一に添加した上部 クラッ ド膜 （ 1 5) を蒸着により形成する工程と、  In order to cover the core part (17) and the lower cladding film (13), phosphorus pentoxide or phosphorus pentoxide is added to the upper cladding film (15) or silicon dioxide containing silicon dioxide as a main component. Forming an upper clad film (15) to which boron trioxide is uniformly added by vapor deposition;
前記上部クラッ ド膜 （ 1 5) を熱処理により溶融する工程と、 を含むことを特徴とする石英平面光回路素子の製造方法。  Melting the upper cladding film (15) by heat treatment.
6. 前記基板 （ 1 1 ) の反対側の面に二酸化ケイ素を主成分とした歪補 正膜 （ 1 9) を蒸着により形成する工程をさらに含むことを特徴とする 請求項 5に記載の石英平面光回路素子の製造方法。  6. The quartz according to claim 5, further comprising a step of forming a strain correction film (19) containing silicon dioxide as a main component by vapor deposition on the surface on the opposite side of the substrate (11). A method for manufacturing a planar optical circuit element.
7. 前記歪捕正膜 （ 1 9) は、 前記下部クラッ ド膜 （ 1 3) と上部クラ ッ ド膜 （ 1 5) の材料と略同じ熱膨張係数を有する材料からなることを 特徴とする請求項 6に記載の石英平面光回路素子の製造方法。  7. The strain correction film (19) is made of a material having substantially the same coefficient of thermal expansion as the material of the lower cladding film (13) and the upper cladding film (15). 7. The method for manufacturing a quartz planar optical circuit device according to claim 6.
8. 前記コア膜を形成する前記二酸化ケイ素を主成分とする材料は、 二 酸化ケィ素に二酸化ゲルマニウムを添加した材料であることを特徴とす る請求項 5に記載の石英平面光回路素子の製造方法。  8. The quartz planar optical circuit device according to claim 5, wherein the material containing silicon dioxide as a main component forming the core film is a material obtained by adding germanium dioxide to silicon dioxide. Production method.
PCT/JP2001/006600 2001-07-31 2001-07-31 Quartz-plane light circuit element and process for producing the same WO2003012497A1 (en)

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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0304709A2 (en) * 1987-08-28 1989-03-01 Hitachi, Ltd. Waveguide type optical device
JPH08110425A (en) * 1994-10-11 1996-04-30 Hitachi Cable Ltd Optical waveguide and its production and light transmission module
JPH10104451A (en) * 1996-09-30 1998-04-24 Shin Etsu Chem Co Ltd Substrate for optical waveguide and its production
JPH1184157A (en) * 1997-09-04 1999-03-26 Toyo Commun Equip Co Ltd Production of optical waveguide
EP1074864A2 (en) * 1999-08-06 2001-02-07 Nhk Spring Co.Ltd. Method of fabricating planar optical waveguide devices

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0304709A2 (en) * 1987-08-28 1989-03-01 Hitachi, Ltd. Waveguide type optical device
JPH08110425A (en) * 1994-10-11 1996-04-30 Hitachi Cable Ltd Optical waveguide and its production and light transmission module
JPH10104451A (en) * 1996-09-30 1998-04-24 Shin Etsu Chem Co Ltd Substrate for optical waveguide and its production
JPH1184157A (en) * 1997-09-04 1999-03-26 Toyo Commun Equip Co Ltd Production of optical waveguide
EP1074864A2 (en) * 1999-08-06 2001-02-07 Nhk Spring Co.Ltd. Method of fabricating planar optical waveguide devices

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