WO2002056370A8 - Circuit integre et procede de fabrication - Google Patents

Circuit integre et procede de fabrication

Info

Publication number
WO2002056370A8
WO2002056370A8 PCT/FR2002/000054 FR0200054W WO02056370A8 WO 2002056370 A8 WO2002056370 A8 WO 2002056370A8 FR 0200054 W FR0200054 W FR 0200054W WO 02056370 A8 WO02056370 A8 WO 02056370A8
Authority
WO
WIPO (PCT)
Prior art keywords
integrated circuit
casing
making same
storage capacitor
trc
Prior art date
Application number
PCT/FR2002/000054
Other languages
English (en)
Other versions
WO2002056370A1 (fr
Inventor
Olivier Menut
Yvon Gris
Original Assignee
St Microelectronics Sa
Olivier Menut
Yvon Gris
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by St Microelectronics Sa, Olivier Menut, Yvon Gris filed Critical St Microelectronics Sa
Priority to EP02710090A priority Critical patent/EP1350267A1/fr
Priority to US10/466,145 priority patent/US7115933B2/en
Publication of WO2002056370A1 publication Critical patent/WO2002056370A1/fr
Publication of WO2002056370A8 publication Critical patent/WO2002056370A8/fr
Priority to US11/533,939 priority patent/US7470585B2/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/80—Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier
    • H01L29/808—Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier with a PN junction gate, e.g. PN homojunction gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/01—Manufacture or treatment
    • H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/03—Making the capacitor or connections thereto
    • H10B12/038—Making the capacitor or connections thereto the capacitor being in a trench in the substrate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/01—Manufacture or treatment
    • H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/05—Making the transistor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/37—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells the capacitor being at least partially in a trench in the substrate
    • H10B12/373—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells the capacitor being at least partially in a trench in the substrate the capacitor extending under or around the transistor

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Electromagnetism (AREA)
  • Ceramic Engineering (AREA)
  • Semiconductor Memories (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

Selon un mode de mise en oeuvre, le circuit intégré, comprend un dispositif semiconducteur de stockage de charges comportant au moins un transistor de commande T et un condensateur de stockage TRC. Le dispositif comprend un substrat comportant une région inférieure contenant au moins une tranchée capacitive enterrée TRC formant ledit condensateur de stockage, et un caisson CS situé au-dessus de ladite région inférieure de substrat. Le transistor de commande T est réalisé dans et sur le caisson et ladite tranchée capacitive est située sous le transistor et est en contact avec le caisson.
PCT/FR2002/000054 2001-01-12 2002-01-09 Circuit integre et procede de fabrication WO2002056370A1 (fr)

Priority Applications (3)

Application Number Priority Date Filing Date Title
EP02710090A EP1350267A1 (fr) 2001-01-12 2002-01-09 Circuit integre et procede de fabrication
US10/466,145 US7115933B2 (en) 2001-01-12 2002-01-09 Integrated circuit and fabrication process
US11/533,939 US7470585B2 (en) 2001-01-12 2006-09-21 Integrated circuit and fabrication process

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR0100419A FR2819632B1 (fr) 2001-01-12 2001-01-12 Circuit integre comportant un dispositif analogique de stockage de charges, et procede de fabrication
FR01/00419 2001-01-12

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US11/533,939 Division US7470585B2 (en) 2001-01-12 2006-09-21 Integrated circuit and fabrication process

Publications (2)

Publication Number Publication Date
WO2002056370A1 WO2002056370A1 (fr) 2002-07-18
WO2002056370A8 true WO2002056370A8 (fr) 2002-08-08

Family

ID=8858769

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/FR2002/000054 WO2002056370A1 (fr) 2001-01-12 2002-01-09 Circuit integre et procede de fabrication

Country Status (4)

Country Link
US (2) US7115933B2 (fr)
EP (1) EP1350267A1 (fr)
FR (1) FR2819632B1 (fr)
WO (1) WO2002056370A1 (fr)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6888214B2 (en) * 2002-11-12 2005-05-03 Micron Technology, Inc. Isolation techniques for reducing dark current in CMOS image sensors
FR2889356A1 (fr) * 2005-07-26 2007-02-02 St Microelectronics Crolles 2 Cellule memoire a un transistor a corps isole a sensibilite de lecture amelioree
US7414460B1 (en) 2006-03-31 2008-08-19 Integrated Device Technology, Inc. System and method for integrated circuit charge recycling
US20080273409A1 (en) * 2007-05-01 2008-11-06 Thummalapally Damodar R Junction field effect dynamic random access memory cell and applications therefor
US7729149B2 (en) * 2007-05-01 2010-06-01 Suvolta, Inc. Content addressable memory cell including a junction field effect transistor
US7633784B2 (en) * 2007-05-17 2009-12-15 Dsm Solutions, Inc. Junction field effect dynamic random access memory cell and content addressable memory cell
US9059030B2 (en) * 2011-10-07 2015-06-16 Micron Technology, Inc. Memory cells having capacitor dielectric directly against a transistor source/drain region
FR3085540B1 (fr) * 2018-08-31 2020-09-25 St Microelectronics Rousset Dispositif integre de mesure temporelle a constante de temps ultra longue et procede de fabrication
FR3099964B1 (fr) * 2019-08-14 2024-03-29 St Microelectronics Crolles 2 Sas Procédé de réalisation d’une électrode dans un substrat de base et dispositif électronique

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60152058A (ja) * 1984-01-20 1985-08-10 Toshiba Corp 半導体記憶装置
US4649625A (en) * 1985-10-21 1987-03-17 International Business Machines Corporation Dynamic memory device having a single-crystal transistor on a trench capacitor structure and a fabrication method therefor
US4728623A (en) * 1986-10-03 1988-03-01 International Business Machines Corporation Fabrication method for forming a self-aligned contact window and connection in an epitaxial layer and device structures employing the method
US5307169A (en) * 1991-05-07 1994-04-26 Olympus Optical Co., Ltd. Solid-state imaging device using high relative dielectric constant material as insulating film
US5998821A (en) * 1997-05-21 1999-12-07 Kabushiki Kaisha Toshiba Dynamic ram structure having a trench capacitor
US5843820A (en) * 1997-09-29 1998-12-01 Vanguard International Semiconductor Corporation Method of fabricating a new dynamic random access memory (DRAM) cell having a buried horizontal trench capacitor
US6383864B2 (en) * 1997-09-30 2002-05-07 Siemens Aktiengesellschaft Memory cell for dynamic random access memory (DRAM)
US5981332A (en) * 1997-09-30 1999-11-09 Siemens Aktiengesellschaft Reduced parasitic leakage in semiconductor devices
US6600199B2 (en) * 2000-12-29 2003-07-29 International Business Machines Corporation Deep trench-buried layer array and integrated device structures for noise isolation and latch up immunity
FR2819631B1 (fr) * 2001-01-12 2003-04-04 St Microelectronics Sa Procede de fabrication d'un substrat monocristallin, et circuit integre comportant un tel substrat
FR2819636B1 (fr) * 2001-01-12 2003-09-26 St Microelectronics Sa Circuit integre comportant un point memoire de type dram, et procede de fabrication

Also Published As

Publication number Publication date
US7115933B2 (en) 2006-10-03
US20040113193A1 (en) 2004-06-17
FR2819632B1 (fr) 2003-09-26
WO2002056370A1 (fr) 2002-07-18
US20070015326A1 (en) 2007-01-18
US7470585B2 (en) 2008-12-30
EP1350267A1 (fr) 2003-10-08
FR2819632A1 (fr) 2002-07-19

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