WO2002047062A1 - Dispositif d'affichage electroluminescent - Google Patents

Dispositif d'affichage electroluminescent Download PDF

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Publication number
WO2002047062A1
WO2002047062A1 PCT/JP2001/010810 JP0110810W WO0247062A1 WO 2002047062 A1 WO2002047062 A1 WO 2002047062A1 JP 0110810 W JP0110810 W JP 0110810W WO 0247062 A1 WO0247062 A1 WO 0247062A1
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WO
WIPO (PCT)
Prior art keywords
scanning line
transistor
display device
signal
electrode
Prior art date
Application number
PCT/JP2001/010810
Other languages
English (en)
Japanese (ja)
Inventor
Yutaka Nanno
Kouji Senda
Original Assignee
Matsushita Electric Industrial Co., Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co., Ltd. filed Critical Matsushita Electric Industrial Co., Ltd.
Priority to US10/433,296 priority Critical patent/US7173612B2/en
Publication of WO2002047062A1 publication Critical patent/WO2002047062A1/fr

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Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3258—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the voltage across the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3266—Details of drivers for scan electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0439—Pixel structures
    • G09G2300/0443—Pixel structures with several sub-pixels for the same colour in a pixel, not specifically used to display gradations
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0439—Pixel structures
    • G09G2300/0465—Improved aperture ratio, e.g. by size reduction of the pixel circuit, e.g. for improving the pixel density or the maximum displayable luminance or brightness
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0804—Sub-multiplexed active matrix panel, i.e. wherein one active driving circuit is used at pixel level for multiple image producing elements
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0814—Several active elements per pixel in active matrix panels used for selection purposes, e.g. logical AND for partial update
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0828—Several active elements per pixel in active matrix panels forming a digital to analog [D/A] conversion circuit
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G09G2300/0861—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
    • G09G2300/0866—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes by means of changes in the pixel supply voltage
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0876—Supplementary capacities in pixels having special driving circuits and electrodes instead of being connected to common electrode or ground; Use of additional capacitively coupled compensation electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0243—Details of the generation of driving signals
    • G09G2310/0254—Control of polarity reversal in general, other than for liquid crystal displays
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/06—Details of flat display driving waveforms
    • G09G2310/061—Details of flat display driving waveforms for resetting or blanking
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0257—Reduction of after-image effects
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0261—Improving the quality of display appearance in the context of movement of objects on the screen or movement of the observer relative to the screen
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007—Display of intermediate tones
    • G09G3/2011—Display of intermediate tones by amplitude modulation
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007—Display of intermediate tones
    • G09G3/2074—Display of intermediate tones using sub-pixels

Definitions

  • the present invention relates to an EL (Electric Exit Luminescence) display device. Background technology
  • FIGS. 32 and 33 The configuration of the unit pixel of the conventional EL display device is shown in FIGS. 32 and 33.
  • GL denotes a scanning line
  • 13 denotes an auxiliary capacitor
  • SL denotes a signal line
  • 11 denotes an EL element
  • Tr 1 denotes a switching transistor
  • Tr denotes a switching transistor
  • Reference numeral 2 denotes a driving transistor
  • reference numeral 70 denotes a current supply line for supplying a current to the £ 1 ⁇ element 11.
  • the storage capacitor 13 continues to apply a voltage to the gate of the driving transistor Tr 2, the switching transistor Tr 1 Even if the value becomes 0FF, the current continues to flow from the current supply line 70 to the EL element 11 until the image signal is written in the next frame. It is driven to emit light by a current corresponding to the image signal.
  • the EL element continues to emit light during one frame period. Therefore, when displaying a moving image, the image of the previous frame overlaps the image of the next frame due to the afterimage phenomenon, and the image is blurred by the image observer. Let's recognize it. (2001 FPD technology large scale whole p122).
  • Inserting a blanking period meaning a period during which the EL element stops emitting light and the entire screen is in a black display state
  • Inserting a blanking period means a period during which the EL element stops emitting light and the entire screen is in a black display state
  • Japanese Patent Application Laid-Open No. 2000-200221 discloses a dedicated train for giving a blanking signal and a kinging signal. A configuration is disclosed in which a blanking signal is turned on for a predetermined period immediately before the start of the next one frame period by setting up a display.
  • the invention according to claim 1 of the present invention is characterized in that it comprises a plurality of scanning lines to which a scanning signal is supplied and a plurality of signal lines to which an image signal is supplied.
  • the unit pixels are arranged in a matrix, and each unit pixel includes an EL element and a driving circuit for controlling an amount of current supplied to the EL element via a current supply line.
  • the switching operation is changed by the transistor and the scanning signal, and the signal line and the driving transistor are changed by the change of the switching operation.
  • a display unit having a switching transistor for switching between conduction and interruption of the gate electrode of the switching element, and a signal line side driving circuit for supplying an image signal to the signal line And the scanning line
  • a scanning signal is supplied to the gate of the driving transistor, and the EL is supplied via the scanning line within a holding period for holding a voltage written to a gate electrode of the driving transistor. It features a scanning line side driving circuit that outputs a blanking signal for forcibly stopping the light emitting state of the element.
  • the EL element of each pixel emits light in response to an image signal, a desired image is displayed, and the EL element emits light within one frame. An unacceptable blanking period will be inserted. Therefore, in the moving image display, a black display is inserted between the image of the previous frame and the image of the next frame. As a result, the afterimage phenomenon is suppressed, and a clear image can be recognized.
  • stop includes not only the case where the light emission state is completely stopped but also the state near the complete stop.
  • the invention according to claim 2 is the EL display device according to claim 1, wherein the blanking signal forcibly sets the driving transistor to the 0 FF state. It is characterized by being a signal to be set.
  • OFF state includes a state close to the complete OFF state (extremely weak ON state), in addition to the complete OFF state.
  • the invention according to claim 3 is the EL display device according to claim 2, wherein one electrode of the unit pixel is connected to a gate electrode of the driving transistor.
  • the other electrode includes an auxiliary capacitor connected to any one of the plurality of scan lines, and the blanking signal is transmitted from the specific scan line to the specific scan line. It is characterized in that it is given to a gate electrode of a driving transistor via an auxiliary capacitor.
  • the invention according to claim 4 is the EL display device according to claim 3, wherein the specific scanning line corresponds to a scanning line connected to a selected pixel. It is characterized in that it is a scanning line in the latter stage.
  • the scanning line of the selected pixel itself for a specific scanning line.
  • the transition of the selection pulse from ON to OFF the parasitic capacitance of the driving transistor connected to the scanning line of the pixel itself is calculated. It is expected that the potential of the pixel electrode will change due to the influence, and in order to prevent this, it is necessary to add a large storage capacitor.
  • such a problem can be solved by setting a specific scanning line as a subsequent scanning line.
  • wiring routing can be minimized.
  • the invention according to claim 5 is the EL display device according to claim 4, wherein the switching transistor and the driving transistor are both provided.
  • a P-channel transistor, the anode electrode of the EL element is configured as a pixel electrode, and the power source electrode of the EL element is a counter electrode. It is characterized in that
  • the driving voltage of the entire display device can be reduced as compared with the case where transistors having different polarities are used.
  • the invention according to claim 6 is the EL display device according to claim 4, wherein the switching transistor and the driving transistor are both provided.
  • An N-channel transistor, the cathode electrode of the EL element is configured as a pixel electrode, and the anode electrode of the EL element is a counter electrode. It is characterized in that
  • the driving voltage of the entire display device can be reduced as compared with the case where transistors having different polarities are used.
  • the invention according to claim 7 is the EL display device according to claim 4.
  • the switching transistor is a transistor having a multigate structure in which a plurality of transistors are connected in series. This is the feature.
  • the switching transistor for switching has the required characteristics, that is, the low leakage current, in other words, the retention characteristics of the data storage device. Good things are desired. Therefore, as described above, by forming the switching transistor for switching into a multi-gate structure, it is possible to obtain good off-characteristics. .
  • the invention according to claim 8 is the EL display device according to claim 4, wherein the switching transistor has an LDD (Lightly doped drain) structure. It is characterized by being a transistor.
  • LDD Lightly doped drain
  • the invention according to claim 9 is the EL display device according to claim 4, wherein each of the unit pixels is divided into a plurality of subpixels, and each of the subpixels is individually subpixel.
  • An electrode, a switching transistor, a control transistor, an auxiliary capacitor, and a scanning line are provided, and the on / off of each of the sub-pixels is combined.
  • a blanking signal is given to each sub-pixel via a scanning line.
  • an EL display device having excellent gradation properties is configured.
  • an area of a light emitting portion of the EL element in the sub-pixel is determined according to a gray scale to be displayed. It is characterized in that it is weighted according to the number of input bits.
  • the area ratio of the light-emitting portion of each sub-pixel that constitutes one unit pixel is 1: 2: 4:...: 2 (n - lf) and 2 n gradations can be displayed according to the weight.
  • the invention according to claim 11 is the EL display device according to claim 4, wherein the switching transistor and the driving transistor are connected to each other. It is characterized by being formed of polysilicon. .
  • Polysilicon has a higher mobility than amorphous silicon, and it is easy to miniaturize the device. Therefore, when a plurality of transistors are used in one pixel as in the present invention, it is particularly effective.
  • the invention according to claim 12 is the EL display device according to claim 4, wherein an operation area of the driving transistor is a linear area.
  • the threshold value of the driving transistor or the driving transistor can be increased. Even if the voltage applied to the gate of the transistor varies, it is possible to make it hardly affect the current value. Therefore, it is possible to use even a transistor with poor characteristics, which has been considered to be unusable in the past.
  • the invention according to claim 13 is the EL display device according to claim 1, wherein any one of the plurality of scanning lines is the control transistor.
  • the device is connected to a ground electrode of the EL element via a resistor, a power source electrode of the EL element is configured as a counter electrode, and the specific scanning line connects the current supply line.
  • the EL element is driven to emit light by a current flowing from the specific scanning line to the EL element, and the blanking signal is supplied from the specific scanning line.
  • the blanking signal is a signal set at a voltage level lower than the potential of the power source electrode of the EL element. .
  • a dedicated current supply line for supplying a current to the EL element becomes unnecessary.
  • the opening ratio can be made larger than in the conventional example, and the interlayer short-circuits and the intra-layer shorts caused by the current supply lines can be used.
  • An EL display device in which line defects are prevented from occurring and the yield is improved can be formed.
  • the invention according to claim 14 is the EL display device according to claim 1, wherein any one of the plurality of scanning lines is the control transistor.
  • the cathode is connected to a cathode electrode of the EL element via a star
  • the anode electrode of the EL element is configured as a counter electrode
  • the specific scanning line connects the current supply line.
  • the EL element is driven to emit light by a current flowing from the EL element toward the specific scanning line, and the blanking signal is output from the specific scanning line.
  • the blanking signal is supplied at a higher voltage level than the potential of the anode electrode of the EL element.
  • the invention according to claim 15 is the EL display device according to claim 13, wherein the specific scanning line is a preceding scanning line. Similar to the operation of the invention according to claim 4, a change in the pixel electrode potential caused by the parasitic capacitance of the transistor is suppressed without adding a large storage capacitance. it can .
  • the invention according to claim 16 is the EL display device according to claim 13, wherein the inductance of the specific scanning line and a scanning line connected to the specific scanning line are provided.
  • the sum of the output impedance of the final stage in the side drive circuit is the in-beader of the EL element connected to the specific scanning line.
  • the characteristic is that it is 20% or less with respect to the dose.
  • the regulation of the impedance is such that if it exceeds 20%, the potential at the terminal end of the scanning line will drop, and sufficient voltage will not be applied to the EL element, resulting in a uniform display. Is not obtained.
  • the invention according to claim 17 is the EL display device according to claim 13, wherein each of the unit pixels is divided into a plurality of sub-pixels, and each of the sub-pixels is individually It has sub-pixel electrodes, switching transistors for switching, control transistors, auxiliary capacitors, and scanning lines, and can be used to combine the on / off of each sub-pixel. In addition to this, a gray scale is displayed, and a blanking signal is given to each sub-pixel via a scanning line.
  • the invention according to claim 18 is the EL display device according to claim 17, wherein the area of the light-emitting portion of the EL element in the sub-pixel corresponds to the gray scale to be displayed. It is characterized in that it is weighted according to the number of input bits.
  • the invention according to claim 19 is provided with a plurality of scanning lines to which a scanning signal is supplied and a plurality of signal lines to which an image signal is supplied, and a unit pixel is a matrix.
  • Each unit pixel is arranged in a matrix, and each unit pixel performs a switching operation by an EL element, a driving transistor for controlling the amount of current flowing through the EL element, and a scanning signal.
  • the switching between the conduction of the signal line and the gate electrode of the driving transistor due to the change of the switching operation as well as the change of the switching operation.
  • each pixel is provided for each row of the matrix-arranged unit pixels, and is written to a gate electrode of the driving transistor.
  • a blanking signal is supplied for forcibly setting the driving transistor to the 0 FF state during the holding period for holding the applied voltage.
  • An auxiliary capacitor connected to the gate electrode of the driving transistor and the other electrode connected to the blanking signal wiring. The blanking signal is supplied from the blanking signal wiring via the storage capacitor. Then, it is provided to a gate electrode of a driving transistor.
  • the invention according to claim 20 is the EL display device according to claim 19, wherein the wiring for the blanking signal is individually provided to the blanking signal drive circuit. It is characterized by being connected.
  • the blanking signal is supplied at a different timing for each blanking signal wiring.
  • the invention according to claim 21 is the EL display device according to claim 19, wherein the blanking signal wiring is provided via one common line. It is characterized in that it is connected to the blanking signal drive circuit.
  • FIG. 1 is a circuit diagram showing a configuration of the EL display device according to the first embodiment.
  • FIG. 2 is a circuit diagram showing a configuration of a scanning line side driving circuit used in the EL display device according to the first embodiment.
  • FIG. 3 is a circuit diagram showing a configuration of the select circuit A1.
  • FIG. 4 is a cross-sectional view showing a configuration of one pixel of the EL display device according to the first embodiment. .
  • FIG. 5 is a plan view showing a configuration of one pixel of the EL display device according to the first embodiment.
  • FIG. 6 is a timing chart of the light emitting operation of the EL display device according to the first embodiment
  • FIG. 6 (a) is a waveform diagram of the image signal voltage
  • FIG. FIG. 6B is a waveform diagram of the voltage of the scanning line GLa
  • FIG. 6C is a waveform diagram of the voltage of the scanning line GLb.
  • FIG. 7 is a configuration diagram of vertically adjacent pixels 10 a and 10 b for explaining the light emission operation of the EL element according to the first embodiment.
  • FIG. 8 is a cross-sectional view showing a configuration of one pixel of the EL display device according to the second embodiment.
  • FIG. 9 is a timing chart of a light emitting operation of the EL display device according to the second embodiment
  • FIG. 9 (a) is a waveform diagram of an image signal voltage
  • FIG. FIG. 9B is a waveform diagram of the voltage of the scanning line GLc
  • FIG. 9C is a waveform diagram of the voltage of the scanning line GLd.
  • FIG. 10 is a configuration diagram of vertically adjacent pixels 10 c and 10 d for explaining the light emission behavior of the EL element according to the second embodiment.
  • FIG. 11 is a plan view of a display unit of the EL display device according to the third embodiment.
  • FIG. 12 is a circuit diagram of a display unit of the EL display device according to the third embodiment. .
  • FIG. 13 is a plan view showing a modification of the display unit of the EL display device according to the third embodiment.
  • FIG. 14 is a simulation diagram showing the results of analyzing the operating points of the EL element and the driving transistor in the EL display device according to the fourth embodiment. is there .
  • FIG. 15 is a circuit diagram of a display unit of the EL display device according to the fifth embodiment.
  • FIG. 16 is a timing chart of a light emitting operation of the EL display device according to the fifth embodiment.
  • FIG. 17 is a circuit diagram of a display unit of the EL display device according to the sixth embodiment.
  • FIG. 18 is a timing chart of the light emitting operation of the EL display device according to the sixth embodiment.
  • FIG. 19 is a circuit diagram showing a configuration of an active matrix type EL display device according to the seventh embodiment.
  • FIG. 20 is a circuit diagram showing a configuration of a scanning line side driving circuit 4A used for an active matrix type EL display device according to the seventh embodiment.
  • FIG. 21 is a timing chart of the light emitting operation of the EL element of the seventh embodiment
  • FIG. 21 (a) is a waveform diagram of the image signal 'voltage
  • FIG. ) Is a waveform diagram of the voltage of the scanning line GLa
  • FIG. 21 (c) is a waveform diagram of the voltage of the scanning line GLb.
  • FIG. 22 is a configuration diagram of upper and lower adjacent pixels 10a and 10Ob for explaining the light emitting operation of the EL element in the seventh embodiment.
  • FIG. 23 is a circuit diagram of an EL display device according to the eighth embodiment.
  • FIG. 24 is a timing chart of the light emitting operation of the EL display device according to the eighth embodiment.
  • FIG. 24 (a) is a waveform diagram of the image signal voltage
  • FIG. 24 (b) is a waveform diagram of the voltage of the scanning line GLa
  • FIG. c) is a waveform diagram of the voltage of the scanning line GLb.
  • Fig. 25 shows the scan line and the current flowing through the scan line when the pixel electrode connected to the driving transistor becomes the anode electrode. This is an equivalent circuit that includes the driven EL elements.
  • Fig. 26 shows the case where the pixel electrode connected to the driving transistor becomes a cathode electrode, and is driven by the scanning line and the current flowing through the scanning line.
  • This is an equivalent circuit that includes the EL element and the like.
  • FIG. 27 is a graph showing the result of performing circuit simulation on the equivalent circuits of FIGS. 25 and 26.
  • FIG. 28 is a plan view of a display unit of the display device according to Embodiment 10.
  • FIG. 29 is a circuit diagram of a display device according to Embodiment 10.
  • FIG. 30 is a plan view showing a modification of the display unit of the EL display device according to Embodiment 10.
  • FIG. 31 is a circuit diagram of an active matrix type EL display device according to Embodiment 11 of the present invention.
  • FIG. 32 is a circuit diagram showing a configuration of a conventional example.
  • FIG. 33 is a plan view showing the configuration of the conventional example. BEST MODE FOR CARRYING OUT THE INVENTION
  • FIG. 1 is a circuit diagram showing a configuration of an active matrix EL display device according to the first embodiment.
  • the active matrix EL display device 1 includes a display unit 2 in which unit pixels 10 are arranged in a matrix, and a scanning line GL 1 in each unit pixel 10. , GL 2,... (When collectively referring to scanning lines, A scanning line side driving circuit 4 for outputting a scanning signal via a signal line GL, and signal lines SL 1, SL 2,... (When signal lines are collectively referred to) are connected to each unit pixel 10.
  • a signal line side driving circuit 6 for outputting an image signal via a signal supply line SL (referred to by reference numeral SL) and a current supply line 70 for supplying a current to each EL element 11. .
  • the unit pixel 10 includes an EL element 11 functioning as a light-emitting body of the unit pixel, a switching transistor Trl for switching, and a driving current amount to the EL element 11. It has a driving transistor Tr 2 to be controlled and an auxiliary capacitor 13. One electrode of the auxiliary capacitance 13 is connected to the subsequent scanning line GL as a specific scanning line, and the other electrode of the auxiliary capacitance 13 is a gate of a driving transistor Tr> 2 and It is commonly connected to the drain of the switching transistor Trl.
  • Each of the transistors Tr 1 and Tr 2 is a thin-film transistor (TFT) having the same polarity.
  • the P-channel transistor is used. It consists of a transistor.
  • FIG. 2 is a block diagram showing the configuration of the scanning line driving circuit
  • FIG. 3 is a circuit diagram showing a partial configuration of the scanning line driving circuit.
  • the scanning line side driving circuit 4 includes selector circuits A 1, A 2,... Corresponding to the scanning lines GL 1, GL 2, (referred to as ⁇ when the selector circuits are collectively referred to as ⁇ ). ).
  • the selector circuit A receives three input signals VI, V2, and V3 having different voltage levels, respectively, and outputs the signals.
  • two select signals Sa and Sb select signals are collectively denoted by reference symbols Sa and Sb).
  • select signals When the select signals are individually indicated, reference numerals S a and S b are appended with a suffix, for example, for a select signal related to the selector circuit A 1, S a 1 and S b 1 are indicated). Then, depending on the combination of the logical values of the select signals S a and S b, one of the three input signals VI, V 2, and V 3 is generated. It is configured to be selected and output to the scanning line GL.
  • the select signals Sa and Sb are generated by an external controller (not shown) and supplied to the scanning line driving circuit 4.
  • the selector circuit A1 is composed of four inverters 3a, 3b, 3c, and 3d, and five trans fer gates 5a and 5b. , 5c, 5d, 5e. .
  • select signal S a1 is logic “0” and select signal Sb 1 is logic “1”
  • V 2 is selected and the scanning line is selected.
  • select signal S a1 is logic “1” and the select signal Sb 1 is logic “0”
  • V 3 is selected and output to the scanning line GL 1.
  • the selector circuit A1 selects one of V1 to V3 in accordance with the logical values of the select signals Sal and S1 and supplies it to the scanning line GL. Output .
  • the remaining selector circuits A 2,... Other than the selector circuit A 1 are It has a configuration similar to that of the evening circuit Al, and, like the selector circuit A1, the logical values of the select signals Sa2, Sb2; Sa3, Sb3; One of V1 to V3 is selected according to the combination and output to the scanning lines GL2, GL3, ....
  • the scanning line driving circuit 4 is configured to select any one of V1 to V3 and output it to the scanning line GL.
  • V1 is set to a voltage level for turning on the switching transistor Tr1 for switching
  • V2 is set to the switch level.
  • the voltage level at which the switching transistor Tr1 for switching is turned off is set. That is, V 1 and V 2 correspond to the normal scanning signal.
  • V 3 is set to the blanking signal voltage level.
  • FIG. 4 is a cross-sectional view showing a configuration of one pixel
  • FIG. 5 is a plan view showing a configuration of one pixel
  • the EL element 11 has an anode electrode 31 (corresponding to the pixel electrode 20 in the present embodiment) and a cathode electrode 32 (this embodiment). In this embodiment, this is equivalent to the counter electrode 21), and the EL light emitting layer 22 disposed between the anode electrode 31 and the cathode electrode 32.
  • reference numeral 35 denotes a glass substrate
  • 37 denotes a gate insulating film
  • 38 denotes a flattening film
  • 39 denotes an inter-layer insulating film.
  • the anode electrode 31 is a transparent electrode such as an indium tin oxide (ITO), and the cathode electrode 32 is opaque.
  • An electrode Mg, Al, or the like, or a metal electrode made of alloy of these metals and Ag, Li, etc.
  • the EL element 11 may be an organic EL element or an inorganic EL element, or may have a configuration having a charge injection layer and a charge transport layer. That is, the configuration shown in FIG. 4 is not limited to the configuration shown in FIG. 4, and a known EL element may be used. I can do it.
  • the substrate 35 need only be one that can carry an EL element, and is not limited to glass, but may be a polycarbonate, a polymethylmethacrylate.
  • a transparent substrate such as a resin film such as a glass plate or a polystyrene film may be used.
  • FIG. 6 is a timing chart of the light emitting operation of the EL element.
  • FIG. 6 (a) is a waveform diagram of the image signal voltage
  • FIG. 6 (b) is a waveform diagram of the voltage of the scanning line GLa.
  • FIG. 6 (c) is a waveform diagram of the voltage of the scanning line GLb. It is a figure.
  • two vertically adjacent pixels 10a and 10b shown in FIG. 7 will be described as an example. Note that, in FIG.
  • the components related to the pixel 10a are denoted by a suffix a (for example, the scanning line is denoted by the reference numeral GLa, and is used for switching. Transistors are indicated by Tr1a, etc.), and components related to pixel 10b are indicated by a suffix b (for example, the scanning line is denoted by GLb and Transistors for tuning are indicated by Tr 1b etc.).
  • the counter electrode potential is set to 7.4 V
  • the potential of the current supply line 70 is set to 12.4 V.
  • the image signal has a binary voltage level of 5 V and 12.4 V, and indicates a light emitting state at 5 V and a non-light emitting state at 12.4 V.
  • the scanning line GLa at this stage is changed from V2 level (12.4 V in the first embodiment) to V
  • the level is switched to one level (0 V in the first embodiment), and pixel 10a is selected.
  • the switching transistor Trla which is a P-channel transistor, is turned on.
  • the image signal voltage (7.4 V) is applied to the gate of the driving transistor Tr2a via the signal line SL.
  • G and auxiliary capacity 1 3 a Is applied to That is, the period from time T1 to time T2 corresponds to the image signal writing period.
  • the potential of the current supply line 70 is set to 12.4 V
  • the potential between the gate and the source of the driving transistor Tr 2a is 7 V. '. 4-1 2.
  • 4 — 5 V is applied.
  • the driving transistor Tr 2a becomes 0 N
  • the EL is connected via the current supply line 0.70 and the driving transistor 2a.
  • a current flows from the anode electrode (pixel electrode) of the element 11a to the cathode electrode (counter electrode), and the EL element 11a emits light.
  • the voltage written to the gate electrode of the driving transistor Tr 2a is held, and the EL element 11a continues to emit light by a predetermined driving current. .
  • the voltage is assisted via the subsequent scanning line GLb.
  • a blanking signal is given to the capacitor 13a.
  • the scanning line GLb at the subsequent stage is switched to the blanking signal voltage V3 (in this embodiment, 17.5 V).
  • V3 the blanking signal voltage
  • the gate electrode of the driving transistor Tr 2a is capacitively coupled to the subsequent scanning line GLb, so that the driving transistor Tr 2a
  • the gate potential increases by about 5 V.
  • the driving transistor Tr2a is turned off, and the EL is turned off.
  • the emission of the EL element is completely stopped by the blanking signal voltage applied to the gate of 2a in the transistor.
  • the extinction may be reduced (for example, the brightness level is less than about 1%) rather than the extinction where the light emission stops.
  • the EL element has the fast response of the order of s, it is in the order of ms. Even with a blanking signal having a pulse width (T3 to T4), blanking of the EL element can be performed.
  • the image signal voltage is written in the same manner as described above.
  • the driving transistor Tr 2a is turned off.
  • the EL element stops emitting light, and the non-emitting state is maintained until the next frame period.
  • the non-light-emission state at this time is based on the image display, and is not based on the blanking signal. In this way, the pixel 10a is driven to emit light in response to the image signal, and a blanking state is obtained within one frame period.
  • the light emission operation for pixel 10a was described, but the same operation is performed for the other pixels, and the EL element of each pixel responds to the image signal. It emits light and displays the desired image, and a blanking period in which the EL element does not emit light is inserted in one frame. . Therefore, in the moving image display, a black display is inserted between the image of the previous frame and the image of the next frame, thereby suppressing the afterimage phenomenon. To be able to recognize images clearly. .
  • an N-channel transistor can be used as the driving transistor Tr 2, but the P-channel transistor as in this embodiment can be used. It is desirable to use a cell-type transistor. If the driving transistor Tr 2 ′ is formed by an N-channel transistor, the driving transistor Tr 2 is turned on. Therefore, the gate voltage required for driving the active matrix EL device must be higher than the gate voltage of the EL device. Because it increases.
  • FIG. 8 is a cross-sectional view showing a configuration of one pixel of the active matrix EL display device according to the second embodiment.
  • each of the transistors Tr 1 and Tr 2 is an N-channel transistor, and the power source of the EL element is used.
  • the electrodes are configured as pixel electrodes and the anode electrodes are configured as counter electrodes, and other configurations are the same as in the first embodiment.
  • the force source electrode is an opaque electrode
  • the anode electrode is an ITO electrode.
  • FIG. 9 is a timing chart of a light emitting operation of the EL display device according to the second embodiment.
  • FIG. 9 (a) is a waveform diagram of the image signal voltage
  • FIG. 9 (b) is a waveform diagram of the voltage of the scanning line GLc
  • FIG. 9 (c) is a waveform diagram of the voltage of the scanning line GLd.
  • two vertically adjacent pixels 10c and 10d shown in FIG. 10 will be described as an example.
  • components related to the pixel 10 c are denoted by a suffix c (for example, the scanning line is denoted by reference numeral GL c and the switching gate is denoted by GL c).
  • Transistors are denoted by Tr1c, etc.), and components related to the pixel 10d are denoted by a suffix d (for example, the scanning line is denoted by GLd and the switch is denoted by GLd).
  • the transistor for tuning is indicated by Tr1d, etc.).
  • the scanning line GLc at this stage is changed from the V2 level (0V in the second embodiment) to the V1 level.
  • the voltage is switched to 12.5 V
  • the pixel 10 is selected.
  • the switching transistor Tr1c which is an N-channel transistor, is turned on.
  • the N-channel transistor Tr1c is turned on, the image signal voltage (5.0 V) is supplied to the N-channel transistor via the signal line SL for driving the N-channel transistor.
  • the potential of the current supply line 70 is ⁇ 5.0 V
  • the counter electrode potential is set to 0 V.
  • the driving transistor Tr 2c since approximately 5 V is applied between the gate and source of the driving transistor Tr 2c, the driving transistor Tr 2c is turned on. Become . As a result, a current flows from the anode electrode (counter electrode) to the force source electrode (pixel electrode), and the EL element 11c emits light. The light emission state is changed to the scanning line GL at the subsequent stage. It is held until timing (time T3) at which d becomes the blanking signal voltage V3 (_5.0 V in the present embodiment). Since the gate electrode of the driving transistor Tr 2c is connected to the subsequent scanning line GL d via the auxiliary capacitance 13 c, the time T 3 As a result, the gate potential of the driving transistor Tr 2c decreases by about 5 V.
  • the transistors Tr1 and Tr2 when the withstand voltage of the entire system is allowed, the transistors Tr1 and Tr2 have different polarities. It is also possible to make it consist of an evening.
  • FIG. 11 is a plan view of a display unit of a display device according to Embodiment 3
  • FIG. 12 is a circuit diagram thereof.
  • FIGS. 11 and 12 show only the configuration relating to one pixel.
  • the third embodiment is characterized in that one unit pixel is divided into a plurality of regions, and gradation is displayed by an area gradation method. It is something.
  • a specific configuration will be described with reference to FIGS. 11 and 12.
  • the unit pixel 10 has a structure divided into a plurality of regions (four in the third embodiment).
  • the configuration of the sub-pixel 50 that is the divided area is the same as the configuration of the unit pixel 10 in the first embodiment. That is, each of the sub-pixels 50 has a scanning line GL, a switching transistor Trl, and a driving transistor Tr2. It has auxiliary capacity 13.
  • a gradation display method is realized by combining light emission / non-light emission of the divided sub-pixel regions.
  • a digital image signal is supplied to the signal line SL.
  • the aperture ratio of the pixel can be increased.
  • the present invention relating to such a configuration particularly employs an area gray scale method to provide an active matrix excellent in display uniformity and gray scale. Trix type EL display It is extremely effective in realizing the device.
  • the operating conditions of the driving transistor Tr 2 operating in the linear region are as follows. It is characterized by being driven more. One.
  • EL devices are current-controlled light-emitting devices whose brightness varies according to the current flowing through the device, so they must be driven at a constant current to eliminate display glare. .
  • As a method of performing such a constant current drive there is a method of providing a constant current circuit in a pixel.
  • the threshold value of the driving transistor is determined by operating the driving transistor ′ in the linear region. Or, if the voltage applied to the gate of the drive transistor varies, it should have little effect on the current value. I can do it.
  • the scan line GL n-1 on the n-th first line, the scan line GL n on the n-th line, the signal line SL on the m-th column, and the signal line SL on the m + 1-th column Although only four pixels related to the signal line SLm + 1 are illustrated, the other pixels have the same configuration.
  • Blanking signal wiring is provided individually for each row.
  • BL n-1 is the wiring for the blanking signal on the nth-1st row
  • BLn is the wiring for the blanking signal on the nth row.
  • the blanking signal wiring BL n-1 is connected to one electrode of the storage capacitor 13 of each pixel belonging to the n-th row.
  • the blanking signal wiring BLn is connected to one electrode of the storage capacitor 13 of each pixel belonging to the n-th row.
  • the blanking signal drive circuit 80 supplies a blanking signal of a predetermined voltage at a predetermined timing via the blanking signal wiring BLn-1 and BLn. It is configured as follows.
  • a scanning line side driving circuit composed of an output buffer (for example, a scanning line side driving circuit 4A according to a seventh embodiment described later) is used.
  • the potential of the scanning line GLn-1 corresponds to the noise level (V2 level) as shown in FIG. 16C, and in the present embodiment, 12.5.
  • V changes to a low level (corresponding to the V1 level, and 0 V in the present embodiment).
  • An image signal voltage (7.4 V) is applied to the gate electrode of the driving transistor Tr2 via the signal lines SLm and SLm + 1.
  • the timing to provide blanking and the time width of the blanking signal corresponding to each row as necessary.
  • the output timing it is possible to arbitrarily give the same effect or different time so that the effect is maximized.
  • the scanning lines GL 1, GL 2,..., GL ⁇ ,..., GL 1 ast (meaning the last scanning line) are sequentially changed.
  • the pixels in each row are selected and emit light sequentially.
  • the potential of the blanking signal wiring BL rises by 5 V.
  • the pixels belonging to all the rows stop emitting light at the time T3. That is, at time T3, the entire display surface turns black.
  • the potential of the blanking signal wiring decreases by 5 V, and returns to the original low level state. Accordingly, the blanking state is released.
  • Embodiment 6 is different from Embodiment 5 in comparison with Embodiment 5.
  • the advantage is that the configuration of the planning signal drive circuit 80 can be simplified.
  • FIG. 19 is a circuit diagram showing a configuration of an active matrix type EL display device according to the seventh embodiment.
  • Embodiment 7 is similar to Embodiment 1 described above, and corresponding portions are denoted by the same reference characters, and detailed description is omitted.
  • the current supply line 70 is provided in the first embodiment, the current supply line 70 is omitted in the seventh embodiment, and the EL element is connected to the scanning line GL. It is configured to supply a drive current to 11. Also, the blanking signal is configured to be directly supplied to the EL element from the scanning line GL.
  • a scanning line side driving circuit 4A is used in place of the scanning line side driving circuit 4 of the first embodiment.
  • the scanning line side driving circuit 4A is composed of a shift register 65 and an output buffer 40, and the noise is reduced. It is configured to selectively output binary signal levels of low level and low level.
  • components related to pixel 10 a are denoted by a suffix a (for example, the scanning line is denoted by GL a, and the switching is performed).
  • Transistors are denoted by 1a, etc.
  • components related to pixel 10b are denoted by a suffix b (for example, the scanning line is denoted by GLb, The switching transistor for switching is indicated by Tr1b, etc.).
  • Tr1b the cathode electrode potential of the EL element is set to 7.4 V.
  • the EL element 11a emits light by the same operation as the above-described light emitting operation of the EL element lib.
  • the preceding scanning line GLa is the write time of the next frame.
  • the noise level is maintained until the mining (time T4).
  • the preceding scanning line GLa is high. From bell to low level Changes to.
  • the potential (0 V) of the preceding scanning line GLa becomes lower than the potential (7.4 V) of the force source electrode of 1 lb of the EL element. Therefore, current supply to 1 lb of EL element stops, and 1 lb of EL element stops emitting light.
  • the potential of the preceding scanning line GLa changes from a low level to a noy level. Accordingly, in accordance with the potential written to the gate electrode of the driving transistor Tr2a during the writing period, the pre-scanning line GLa is further added to the pre-scanning line GLa.
  • the current supplied from a not shown (not shown) is controlled and flows through the EL element 11a to emit light. In this case, since the image signal voltage during the writing period (period from time T4 to T5) is 12.4 V, the EL element 11a does not emit light. . Of course, if the image signal voltage is 7.4 V, the EL element 11a emits light.
  • the switching transistor Trla for switching is 0 N state, and even if 7.4 V is written to the driving transistor Tr 2a during that period, the EL element 11 a There is no change in the blanking state. The reason is that the EL element 1.1a is in the blanking state before the EL element 11b is brought into the blanking state. Therefore, even if 7.4 V is written to the driving transistor Tr2a, the scanning line (the former stage) that supplies the current to the EL element 1 la is used.
  • FIG. 23 is a circuit diagram of the EL display device according to the eighth embodiment
  • FIG. 24 is a timing chart of the light emission operation of the EL display device according to the eighth embodiment.
  • FIG. 24 (a) is a waveform diagram of the image signal voltage
  • FIG. 24 (b) is a waveform diagram of the voltage of the scanning line GLc
  • FIG. 24 (c) is a scanning line GL. It is a waveform diagram of the voltage of d.
  • the switching transistor and the control transistor are N-channel transistor.
  • the anode electrode of the EL element is used as a counter electrode
  • the force source electrode is used as a pixel electrode
  • the current flowing from the EL element to the scanning line causes Are configured to emit light.
  • the light emitting and blanking operation of the present embodiment will be described below by taking two vertically adjacent pixels 10 c and 10 d shown in FIG. 23 as an example. I will do it.
  • the anode electrode potential (counter electrode potential) is set to 3.0 V.
  • the register Tr 2 d is turned ON. As a result, a current flows from the EL element 1Id to the preceding scanning line GLc, and the EL element 11d emits light.
  • the preceding scanning line GLc is used to write the next frame. Maintain the low level until the mining (time T4).
  • the preceding scanning line GLc is at the low level ( In the present embodiment, the voltage is changed from V) to the noise level.
  • the potential (12.4 V) of the preceding scanning line GLc becomes higher than the potential of the anode electrode (3.0 V) of the EL element 1Id. Therefore, the current supply to the EL element 11d stops, and the EL element 11d stops emitting light.
  • the pixel 10d enters the blanking state. Then, the preceding scanning line GLc remains at the noise level until the writing period W1 (time T4 to T5) of the preceding pixel 10c is completed. Therefore, the EL element lid is It remains in the ranking state. In this way, the EL element 11 d emits light in response to an image signal and stops emitting light in one frame period. The state will be obtained. The remaining EL elements other than the EL element 11d also perform the same light emission and blanking operations as the EL element 11d. .,.
  • a blanking period can be inserted within one frame.
  • the blanking signal V for blanking the pixel 10d during the high level period from time T3 to time T4 on the preceding scanning line GLc. 3 is the output period, and the period of the noise level from time T4 to time T5 is the writing period W1 because the image signal is written to the pixel 10c. .
  • the blanking signal voltage is set to a value that matches the high level (12.4 V) of the scanning signal, FIG. As shown in 4 (b), the period from time T1 to T5 is a low-level period.
  • the blanking signal voltage V3 is set to be the same as the high level (12.4 V) of the scanning signal, but is limited to this. It is not a thing. That is, it is sufficient that the blanking signal voltage V 3 is higher than the potential of the anode electrode (opposite electrode) of the EL element, and the current flowing to the EL element is thereby reduced. Can be stopped.
  • Fig. 25 shows the scanning line and the current flowing through the scanning line when the pixel electrode connected to the driving transistor becomes the anode electrode.
  • Figure 26 shows the equivalent circuit including the EL element, etc.
  • Fig. 26 shows the case where the pixel electrode connected to the drive transistor is used as the force source electrode.
  • 2 shows an equivalent circuit including an EL element driven by a current flowing through the scanning line and the scanning line.
  • reference numeral 40 denotes the final stage of the scanning line side driving circuit 4A
  • reference numeral 41 denotes the resistance of the scanning line GL. Indicates the capacity of the scanning line GL. As shown in FIG.
  • Figure 27 shows the results of circuit simulation for this equivalent circuit.
  • line L1 indicates the input of the knockout 40
  • line L2 indicates the output of the knockout 40
  • line L1 indicates the output of the knockout 40.
  • 3 is the terminal K when the sum of the impedance of the scanning line GL and the output impedance of the notch 40 is about 2% of the scanning line impedance.
  • the line L4 is the sum of the impedance of the scan line GL and the output impedance of the scan line GL
  • the sum of the output impedance of the Indicates the potential at the terminal K at 20% of the impedance.
  • the sum of the output impedance and the impedance of the scanning line GL ′ corresponds to the impedance of the EL element 11 of each pixel.
  • it exceeds 20% it is recognized that the potential at the terminal K of the scanning line GL drops significantly. Therefore, a sufficient voltage is not applied to the EL element 11 and uniform display cannot be obtained.
  • FIG. 28 is a plan view of a display unit of the display device according to Embodiment 10, and FIG. 29 is a circuit diagram thereof.
  • FIGS. 28 and 29 show only the configuration related to one pixel.
  • the tenth embodiment is characterized in that one unit pixel in the seventh embodiment is divided into a plurality of regions and gradation display is performed by an area gradation method. is there .
  • FIG. The unit pixel 10 has a structure divided into a plurality of regions (four in the fourth embodiment).
  • the configuration of the sub-pixel 50 which is the divided area is the same as the configuration of the unit pixel 10 in the first embodiment.
  • each of the sub-pixels 50 has a scanning line GL, a switching transistor Tr1, and a driving transistor Tr1. It has r 2 and auxiliary capacity 13. It is desirable that the source of the driving transistor Tr1 be configured to be connected to the scanning line of an adjacent sub-pixel.
  • a gradation display method is realized by combining light emission / non-light emission of the divided sub-pixel regions.
  • the digital image signal is supplied to the signal line SL.
  • the area of the light emitting portion of the EL element 11 in the sub-pixel 50 divided into a plurality of regions is weighted according to the bit. It has been done. In this way, instead of dividing the light equally, the area ratio of the light emitting portion is set to 1: 2: 4 :, ...: 2 ( n1 ) corresponding to the bit. By attaching it, it is possible to display 2n gradations.
  • a display of 64 gradations can be realized by a 6-bit data overnight.
  • the electrode layout of the sub-pixel is not limited to FIGS. 28 and 30.
  • FIG. 31 is a circuit diagram of an active matrix type EL display device according to Embodiment 11 of the present invention.
  • Embodiment 11 is similar to Embodiment 7, and corresponding parts are denoted by the same reference characters.
  • FIG. 31 shows only the configuration related to the unit pixel.
  • the eleventh embodiment is characterized in that a circuit configuration having an off-set canceller function is provided, and a switching transformer is provided.
  • a switching transistor Tr4 that is ON / OFF controlled by a transistor Tr3 and a transistor reset signal is provided. .
  • the offset canceller function in the above circuit will be described.
  • the current value of the transistor Tr 2 becomes: f (V on + V dd + V t ⁇ V t), and the function of the value in which V t is canceled out is Therefore, even if the threshold value Vt of the transistor Tr2 has a noise or a surge, the EL element can be driven without being affected by the noise and the surge. And can be done.
  • the gate of the driving transistor is connected to the subsequent scanning line via the auxiliary capacitor, and the blanking signal is transmitted from the subsequent scanning line.
  • the present invention is not limited to this. That is, any one of the scanning lines may be connected to the auxiliary capacitor instead of the subsequent scanning line, and a blanking signal may be supplied from that scanning line. Therefore, for example, it is possible to use the scanning line of the selected pixel itself. However, in this case, as the selection pulse changes from on to off, the parasitic capacitance of the driving transistor connected to the scanning line of the pixel itself is reduced. The effect is expected to change the potential of the pixel electrode. To prevent this, it is necessary to add a large storage capacitor.
  • the problem can be solved by setting the scanning line giving the blanking signal to the subsequent scanning line. Because the scanning line that supplies the blanking signal is the subsequent scanning line, the wiring routing is also minimized and the parasitic capacitance of the transistor is reduced. It has the advantage that the electric potential fluctuation due to the above can be minimized. Therefore, it is desirable that the specific scanning line be the scanning line after the pixel.
  • the switching transistor Tr1 in the first to eleventh embodiments has a low leakage current as a required characteristic. In other words, in other words, it is desired to have good data retention characteristics. Therefore, the switching transistor Tr1 is a multi-gate structure or an LDD in which a plurality of transistors are connected in series. It is desirable to use one having a (Ligh tlydoped dr ain) structure, and in this way, it is possible to obtain good off-characteristics.
  • the transistor when the transistor is made of low-temperature polysilicon, the number of scanning line driving circuits and signal line driving circuits is small. At least one of the transistors may be integrally formed on a glass substrate at the same time when a transistor for the pixel portion is manufactured.
  • the peripheral drive circuit as a built-in drive circuit in this way, power consumption can be significantly reduced, and the entire display device can be made lighter and thinner. be able to .
  • the operating condition that the operating region of the driving transistor Tr 2 operates in the linear region It may be driven by a motor.
  • the specific scanning line is a preceding scanning line with respect to the scanning line connected to the selected pixel
  • the present invention is not limited to this.
  • the scanning line may be any one of the scanning lines.
  • the scanning line of the selected pixel itself may be used.
  • the parasitic capacitance of the driving transistor connected to the scan line of the pixel itself affects the parasitic capacitance of the driving transistor.
  • the potential of the pixel electrode is expected to change, and in order to prevent this, it is necessary to add a large storage capacitor. Regarding this point, it is possible to solve such a problem by using a specific scanning line as a scanning line in the preceding stage.
  • the specific scanning line is set as the preceding scanning line. As a result, it is possible to minimize the wiring routing and minimize the potential fluctuation due to the parasitic capacitance of the transistor. Has advantages. Therefore, it is desirable that the specific scanning line be the preceding scanning line of the pixel.
  • the EL element of each pixel emits light in response to an image signal, a desired image is displayed, and the EL element does not emit light within one frame. A locking period will be introduced. Therefore, in the moving image display, a black display is inserted between the image of the previous frame and the image of the next frame. As a result, the afterimage phenomenon is suppressed, and a clear image can be recognized.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Electroluminescent Light Sources (AREA)
  • Control Of El Displays (AREA)

Abstract

Un dispositif d'affichage électroluminescent (1) comprend une unité d'affichage (2) constituée de pixels (10) agencés sous forme d'une matrice, un circuit de commande (6) de lignes de signaux et un circuit de commande (4) de lignes de balayage. Chaque pixel (10) comprend un élément électroluminescent (11), un transistor de commutation (Tr1), un transistor de commande (Tr2) et un condensateur auxiliaire (13). Une électrode du condensateur auxiliaire (13) est connectée à une électrode de grille du transistor (Tr2), l'autre électrode étant connectée à une ligne de balayage à étages successifs (GL). Le circuit de commande (4) de lignes de balayage émet un signal de suppression en vue de stopper énergiquement l'émission de lumière de l'élément électroluminescent (11) par l'intermédiaire de la ligne de balayage à étages successifs (GL) pendant un temps de maintien durant lequel la tension enregistrée dans l'électrode de grille du transistor (Tr2) est maintenue.
PCT/JP2001/010810 2000-12-08 2001-12-10 Dispositif d'affichage electroluminescent WO2002047062A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US10/433,296 US7173612B2 (en) 2000-12-08 2001-12-10 EL display device providing means for delivery of blanking signals to pixel elements

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP2000-373704 2000-12-08
JP2000373704 2000-12-08
JP2001-138139 2001-05-09
JP2001138139 2001-05-09

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WO2002047062A1 true WO2002047062A1 (fr) 2002-06-13

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US (1) US7173612B2 (fr)
TW (1) TW548621B (fr)
WO (1) WO2002047062A1 (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100369096C (zh) * 2003-04-01 2008-02-13 三星Sdi株式会社 发光显示器、显示屏及其驱动方法

Families Citing this family (39)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100544821B1 (ko) * 1997-02-17 2006-01-24 세이코 엡슨 가부시키가이샤 유기 ｅｌ 장치
US6462722B1 (en) * 1997-02-17 2002-10-08 Seiko Epson Corporation Current-driven light-emitting display apparatus and method of producing the same
JPH1173158A (ja) * 1997-08-28 1999-03-16 Seiko Epson Corp 表示素子
JP2002351401A (ja) * 2001-03-21 2002-12-06 Mitsubishi Electric Corp 自発光型表示装置
US7365713B2 (en) 2001-10-24 2008-04-29 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and driving method thereof
JP4102088B2 (ja) * 2002-03-27 2008-06-18 松下電器産業株式会社 階調制御用出力回路
KR100638304B1 (ko) * 2002-04-26 2006-10-26 도시바 마쯔시따 디스플레이 테크놀로지 컴퍼니, 리미티드 Ｅｌ 표시 패널의 드라이버 회로
WO2003092165A1 (fr) * 2002-04-26 2003-11-06 Toshiba Matsushita Display Technology Co., Ltd. Circuits a semi-conducteur destines a commander par courant un affichage et affichage correspondant
TW550538B (en) * 2002-05-07 2003-09-01 Au Optronics Corp Method of driving display device
GB0221745D0 (en) * 2002-09-19 2002-10-30 Koninkl Philips Electronics Nv Active martrix display
EP1552499A1 (fr) * 2002-09-23 2005-07-13 Koninklijke Philips Electronics N.V. Dispositifs d'affichage a matrice active
GB0227356D0 (en) * 2002-11-23 2002-12-31 Koninkl Philips Electronics Nv Colour active matrix electroluminescent display devices
US7253812B2 (en) * 2003-02-12 2007-08-07 Sanyo Electric Co., Ltd. El display driver and El display
TWI230914B (en) * 2003-03-12 2005-04-11 Au Optronics Corp Circuit of current driving active matrix organic light emitting diode pixel and driving method thereof
JP2004294865A (ja) * 2003-03-27 2004-10-21 Sanyo Electric Co Ltd 表示回路
KR100835028B1 (ko) * 2003-05-07 2008-06-03 도시바 마쯔시따 디스플레이 테크놀로지 컴퍼니, 리미티드 매트릭스형 표시 장치
WO2004100118A1 (fr) * 2003-05-07 2004-11-18 Toshiba Matsushita Display Technology Co., Ltd. Afficheur el et son procede d'excitation
US7202842B2 (en) * 2003-09-17 2007-04-10 Hitachi Displays, Ltd. Display apparatus
TWI263186B (en) * 2004-07-16 2006-10-01 Sanyo Electric Co Semiconductor device, display device and driving method of display device
KR100592641B1 (ko) * 2004-07-28 2006-06-26 삼성에스디아이 주식회사 화소 회로 및 그것을 채용한 유기 발광 표시 장치
KR100642264B1 (ko) 2005-02-04 2006-11-06 재단법인서울대학교산학협력재단 유기발광소자의 화소구조
JP2006251453A (ja) * 2005-03-11 2006-09-21 Sanyo Electric Co Ltd アクティブマトリクス型表示装置及びその駆動方法
TWI327720B (en) * 2005-03-11 2010-07-21 Sanyo Electric Co Active matrix type display device and driving method thereof
JP4986468B2 (ja) * 2005-03-11 2012-07-25 三洋電機株式会社 アクティブマトリクス型表示装置
JP5084111B2 (ja) * 2005-03-31 2012-11-28 三洋電機株式会社 表示装置及び表示装置の駆動方法
US20070001954A1 (en) * 2005-07-04 2007-01-04 Semiconductor Energy Laboratory Co., Ltd. Display device and driving method of display device
TW200707385A (en) * 2005-07-15 2007-02-16 Seiko Epson Corp Electronic device, method of driving the same, electro-optical device, and electronic apparatus
EP1758072A3 (fr) * 2005-08-24 2007-05-02 Semiconductor Energy Laboratory Co., Ltd. Dispositif d'affichage et son méthode de commande
JP4923505B2 (ja) * 2005-10-07 2012-04-25 ソニー株式会社 画素回路及び表示装置
US20070126667A1 (en) * 2005-12-01 2007-06-07 Toshiba Matsushita Display Technology Co., Ltd. El display apparatus and method for driving el display apparatus
KR100965022B1 (ko) * 2006-02-20 2010-06-21 도시바 모바일 디스플레이 가부시키가이샤 Ｅｌ 표시 장치 및 ｅｌ 표시 장치의 구동 방법
JP4208902B2 (ja) * 2006-06-30 2009-01-14 キヤノン株式会社 アクティブマトリクス型表示装置およびその駆動方法
JP5310214B2 (ja) * 2009-04-13 2013-10-09 ソニー株式会社 表示装置および電子機器
JP5770068B2 (ja) * 2010-11-12 2015-08-26 株式会社半導体エネルギー研究所 半導体装置
US20140184667A1 (en) * 2012-12-28 2014-07-03 Nvidia Corporation Display device with binary mode amoled pixel pattern
US9310931B2 (en) * 2013-03-15 2016-04-12 Apple Inc. Dynamic cross-talk mitigation for integrated touch screens
EP3249639A1 (fr) * 2016-05-26 2017-11-29 Nederlandse Organisatie voor toegepast- natuurwetenschappelijk onderzoek TNO Dispositif d'affichage à matrice conformable
EP3270518B1 (fr) * 2016-07-14 2019-08-07 Intel IP Corporation Récepteur de duplexage à répartition dans le temps ayant une impédance constante pour un terminal en ligne à large bande avec transmission asynchrone
US11145251B2 (en) * 2018-10-23 2021-10-12 Innolux Corporation Display device

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6122326A (ja) * 1984-03-23 1986-01-30 Citizen Watch Co Ltd 階調表示装置
JPH1068931A (ja) * 1996-08-28 1998-03-10 Sharp Corp アクティブマトリクス型液晶表示装置
JP2000276078A (ja) * 1999-03-23 2000-10-06 Sanyo Electric Co Ltd 有機エレクトロルミネッセンス表示装置
JP2000276075A (ja) * 1999-03-26 2000-10-06 Matsushita Electric Ind Co Ltd 電流制御型発光素子の駆動回路
JP2000330527A (ja) * 1999-03-18 2000-11-30 Semiconductor Energy Lab Co Ltd 表示装置
JP2001060076A (ja) * 1999-06-17 2001-03-06 Sony Corp 画像表示装置

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4006383A (en) * 1975-11-28 1977-02-01 Westinghouse Electric Corporation Electroluminescent display panel with enlarged active display areas
US5172108A (en) * 1988-02-15 1992-12-15 Nec Corporation Multilevel image display method and system
FR2637407B1 (fr) * 1988-09-30 1994-02-11 Commissariat A Energie Atomique Procede d'affichage de niveaux de gris sur un ecran a cristaux liquides ferroelectriques a phase smectique chirale
JPH06325869A (ja) 1993-05-18 1994-11-25 Mitsubishi Kasei Corp 有機電界発光パネル
US5714968A (en) * 1994-08-09 1998-02-03 Nec Corporation Current-dependent light-emitting element drive circuit for use in active matrix display device
US5550066A (en) 1994-12-14 1996-08-27 Eastman Kodak Company Method of fabricating a TFT-EL pixel
US5684365A (en) 1994-12-14 1997-11-04 Eastman Kodak Company TFT-el display panel using organic electroluminescent media
US5952789A (en) 1997-04-14 1999-09-14 Sarnoff Corporation Active matrix organic light emitting diode (amoled) display pixel structure and data load/illuminate circuit therefor
JP3686769B2 (ja) 1999-01-29 2005-08-24 日本電気株式会社 有機ｅｌ素子駆動装置と駆動方法
US7193594B1 (en) 1999-03-18 2007-03-20 Semiconductor Energy Laboratory Co., Ltd. Display device
GB9914808D0 (en) * 1999-06-25 1999-08-25 Koninkl Philips Electronics Nv Active matrix electroluminscent device
GB9914807D0 (en) * 1999-06-25 1999-08-25 Koninkl Philips Electronics Nv Active matrix electroluminescent display device
KR100861756B1 (ko) * 1999-07-14 2008-10-06 소니 가부시끼 가이샤 전류 구동 회로 및 그것을 사용한 표시 장치, 화소 회로,및 구동 방법
US6847341B2 (en) * 2000-04-19 2005-01-25 Semiconductor Energy Laboratory Co., Ltd. Electronic device and method of driving the same
JP2003167551A (ja) * 2001-11-28 2003-06-13 Internatl Business Mach Corp <Ibm> 画素回路の駆動方法、画素回路及びこれを用いたｅｌ表示装置並びに駆動制御装置

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6122326A (ja) * 1984-03-23 1986-01-30 Citizen Watch Co Ltd 階調表示装置
JPH1068931A (ja) * 1996-08-28 1998-03-10 Sharp Corp アクティブマトリクス型液晶表示装置
JP2000330527A (ja) * 1999-03-18 2000-11-30 Semiconductor Energy Lab Co Ltd 表示装置
JP2000276078A (ja) * 1999-03-23 2000-10-06 Sanyo Electric Co Ltd 有機エレクトロルミネッセンス表示装置
JP2000276075A (ja) * 1999-03-26 2000-10-06 Matsushita Electric Ind Co Ltd 電流制御型発光素子の駆動回路
JP2001060076A (ja) * 1999-06-17 2001-03-06 Sony Corp 画像表示装置

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100369096C (zh) * 2003-04-01 2008-02-13 三星Sdi株式会社 发光显示器、显示屏及其驱动方法

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